Semiconductor Devices

Abstract

To provide a transistor using an oxide semiconductor film, or to provide a transistor using an oxide semiconductor film with reduced oxygen deficiency, or to provide a transistor with excellent electric characteristics.SOLUTION: A semiconductor device comprises a first insulation film, a first oxide semiconductor film, a gate insulation film, and a gate electrode. The first insulation film includes a first region and a second region. The first region is a region harder to transmit oxygen than the second region. The first oxide semiconductor film is arranged at least on the second region.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. Alternatively, the present invention relates to a process, a machine, relating to the manufacture or composition of matter, especially The present invention relates to, for example, a semiconductor device, a display device, a liquid crystal display device, a light emitting device, and a driving method thereof. In particular, the present invention relates to a semiconductor device having, for example, a transistor, The present invention relates to a semiconductor device, a display device, a light-emitting device, or a driving method thereof. The present invention relates to an electronic device having, for example, the semiconductor device, the display device, or the light-emitting device. Related to vessels, etc.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Display devices, light-emitting devices, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. The semiconductor device may include a conductor device. [Background technology]

[0003] A technology for constructing a transistor using a semiconductor film formed on a substrate with an insulating surface is The transistor is widely used in semiconductor devices such as integrated circuits and display devices. Silicon films are known as semiconductor films that can be used in transistors.

[0004] The silicon film used as the semiconductor film of a transistor is either an amorphous silicon film or a polycrystalline silicon film depending on the application. For example, the transistors that make up large display devices When applied to a large-area substrate, amorphous silicon film is used, for which film formation technology is established. On the other hand, a transistor that constitutes a high-performance display device in which a driving circuit is integrally formed is preferably When applied to polycrystalline silicon, it is possible to fabricate transistors with high field effect mobility. The polycrystalline silicon film is preferably formed by heat treatment at high temperature compared to the amorphous silicon film. Alternatively, a method of forming the insulating film by laser beam treatment is known.

[0005] In recent years, transistors using oxide semiconductor films containing indium, gallium, and zinc have been is attracting attention.

[0006] Since the oxide semiconductor film can be formed by a sputtering method or the like, it can be used to form a large display device. In addition, a transistor using an oxide semiconductor film can be used. has high field-effect mobility, enabling the realization of high-performance display devices with integrated drive circuits. In addition, some of the production equipment for transistors using amorphous silicon films can be improved and used. This also has the advantage of reducing capital investment.

[0007] As a method for imparting stable electrical characteristics to a transistor using an oxide semiconductor film, A technique for doping oxygen into an insulating film in contact with a conductive film has been disclosed (see Patent Document 1). By using the technique disclosed in Patent Document 1, oxygen vacancies in an oxide semiconductor film can be reduced. As a result, the variation in electrical characteristics of transistors using an oxide semiconductor film can be reduced. This reduces the load and improves reliability.

[0008] Incidentally, a transistor including an oxide semiconductor film has a very low leakage current in an off state. For example, it is known that a transistor using an oxide semiconductor film has low lead. A low-power consumption CPU that utilizes clock characteristics has been disclosed (see Patent Document 2). [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-243974 [Patent Document 2] Japanese Patent Application Laid-Open No. 2012-257187 Summary of the Invention [Problem to be solved by the invention]

[0010] Another object of the present invention is to provide a transistor including an oxide semiconductor film. An object of the present invention is to provide a transistor including an oxide semiconductor film with reduced loss.

[0011] Another object is to provide a transistor with excellent electrical characteristics. Another object of the present invention is to provide a transistor having a high on-state current. One of the objects is to provide a transistor having stable electrical characteristics. Another object of the present invention is to provide a transistor having improved switching characteristics. One of our goals is to provide the following.

[0012] Another object is to provide a transistor with low off-state current. Another object is to provide a semiconductor device or the like including the transistor. It is an object of the present invention to provide a semiconductor device or the like.

[0013] Another object is to provide an insulating film having regions with different oxygen diffusion coefficients. Alternatively, an oxide semiconductor film having a high-resistance region and a low-resistance region may be provided. This is one of the challenges.

[0014] Alternatively, it is an object of the present invention to form regions having different oxygen diffusion coefficients in an insulating film.

[0015] The description of these problems does not preclude the existence of other problems. It is not necessary for the present invention to solve all of these problems. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other issues from the descriptions in the patent, claims, etc. [Means for solving the problem]

[0016] Even if the insulating film has a large oxygen diffusion coefficient, by adding impurities to the insulating film, The region where the oxygen diffusion coefficient is small, that is, the region that blocks oxygen (also called the oxygen blocking region), For example, a silicon oxide film or a silicon oxynitride film can be formed. When phosphorus or boron is added to an oxide insulating film, such as a silicon dioxide film, An oxygen blocking region can be formed.

[0017] The oxygen blocking region, for example, has less oxygen (oxygen atoms and oxygen atoms) than other regions. This is the region where the diffusion coefficient of oxygen molecules (including molecules with oxygen atoms) is small. When thermally diffusing, oxygen is more permeable (passes through) the oxygen-blocking area than the other areas. For example, by having an oxygen blocking region, Compared to when there is no oxygen permeation rate, the rate is less than 20%, less than 15%, less than 10%, and less than 5%. It may be less than, less than 2% or less than 1%.

[0018] By providing an oxygen-blocking region in a part of a semiconductor device, oxygen vacancies in an oxide semiconductor film can be reduced. It may be possible to reduce it.

[0019] By providing the oxygen-blocking region, for example, oxygen is released from the oxide semiconductor film, and the semiconductor It may be possible to prevent the substance from diffusing outside the body device (also known as out-diffusion). By providing the oxygen-blocking region, excess oxygen is prevented from being contained in a film in contact with the oxide semiconductor film. When the oxide semiconductor film is covered with the silicon dioxide, the outward diffusion of excess oxygen is reduced and the excess oxygen is efficiently supplied to the oxide semiconductor film. This may be possible.

[0020] Excess oxygen refers to oxygen that can be released (or is released) when heat is applied. The heat refers to heat applied during the manufacturing process of a semiconductor device. is oxygen released by heat at a temperature equal to or lower than that applied during the manufacturing process of the semiconductor device. Excess oxygen can migrate, for example, within a film or layer. They move between atoms in the layer, or move in a domino effect, replacing oxygen that makes up the film or layer. There are cases where this is the case.

[0021] Films containing excess oxygen were analyzed by thermal desorption spectroscopy (TDS). on Spectroscopy) is 1×10 18 atoms / cm 3 That's it, 1x 10 19 atoms / cm 3 or more than 1×10 20 atoms / cm 3 More than oxygen (acid Sometimes, the number of atoms (converted to the number of elementary atoms) is detected.

[0022] Alternatively, the film containing excess oxygen may contain peroxide radicals. The spin density due to the valence is 5×10 17 pieces / cm 3 The membrane is defined as above. Films containing oxidizing radicals are analyzed by electron spin resonance (ESR). In the case of the IR spectrum, there may be an asymmetric signal around the g-value of 2.01.

[0023] One aspect of the present invention is a semiconductor device including a first insulating film having an island shape on a substrate and a first insulating film provided on the first insulating film. an oxide semiconductor film, a gate insulating film provided on the first oxide semiconductor film, and a gate insulating film a gate electrode provided thereon, and the first insulating film has a first region and a second region. The first region is a region that is less permeable to oxygen than the second region, and the first oxide The semiconductor film is a semiconductor device disposed on at least the second region.

[0024] Another embodiment of the present invention is a semiconductor device including a first insulating film on a substrate and a first insulating film provided on the first insulating film. an oxide semiconductor film, a gate insulating film provided on the first oxide semiconductor film, and a gate insulating film a gate electrode provided thereon, and the first insulating film has a first region and a second region. The first region is a region that is less permeable to oxygen than the second region, and the first insulating film has a protrusion, the protrusion includes at least a part of the second region, and the first oxide semiconductor film The semiconductor device is disposed on the second region.

[0025] In the above structure, the second region preferably overlaps with the gate electrode. It is preferable that the oxide semiconductor film have a high resistance region and a low resistance region. The first region is preferably a region containing phosphorus or boron. Preferably, one region contains phosphorus or boron.

[0026] Furthermore, one embodiment of the present invention is a method for manufacturing a semiconductor device comprising: a first insulating film having an island shape on a substrate; a first oxide semiconductor film; a gate insulating film provided on the first oxide semiconductor film; and a gate insulating film. The gate electrode is provided on the insulating film, and the protective insulating film is made of a first oxide. The protective insulating film is disposed on the semiconductor film and the gate electrode, and the protective insulating film is the first insulating film and the gate insulating film. The semiconductor device is in contact with the insulating film, and the insulating film is difficult for oxygen to pass through.

[0027] Another embodiment of the present invention is a semiconductor device including a first insulating film on a substrate and a first insulating film provided on the first insulating film. an oxide semiconductor film, a second insulating film provided on the first oxide semiconductor film, and a second insulating film a gate electrode provided on the first insulating film and a protective insulating film, the first insulating film having a protrusion, The insulating film is disposed on the first insulating film, the first oxide semiconductor film, and the gate electrode, and a protective insulating film is disposed on the first insulating film, the first oxide semiconductor film, and the gate electrode. The insulating film is in contact with the first insulating film and the gate insulating film, and the protective insulating film is a semiconductor that is difficult for oxygen to pass through. It is a body device.

[0028] In the above structure, the first insulating film preferably contains excess oxygen. The insulating film is preferably thicker than the gate insulating film. The sum of the thickness of the second oxide semiconductor film and the thickness of the first insulating film is less than the gate thickness. It is preferable that the thickness of the insulating film is thicker than that of the insulating film.

[0029] In addition, one embodiment of the present invention is a method for forming a first insulating film on a substrate, and forming a first oxide film on the first insulating film. forming a second insulating film on the first oxide semiconductor film; After the gate electrode is formed, the first oxide is formed on the first gate electrode using the gate electrode as a mask. This is a method for manufacturing a semiconductor device in which phosphorus or boron is added to the semiconductor film and the first insulating film. . [Effects of the Invention]

[0030] According to one embodiment of the present invention, a transistor including an oxide semiconductor film can be provided. Alternatively, a transistor including an oxide semiconductor film in which oxygen vacancies are reduced can be provided. Cut.

[0031] Alternatively, a transistor having excellent electrical characteristics can be provided. Alternatively, a transistor having a high on-state current can be provided. Alternatively, a transistor with stable electrical characteristics can be provided. .

[0032] Alternatively, a transistor with a small off-state current can be provided. It is possible to provide a transistor having high mobility. Alternatively, a semiconductor device having the transistor can be provided. It is possible. [Brief explanation of the drawings]

[0033] [Figure 1] 1A and 1B are schematic cross-sectional views illustrating the diffusion of excess oxygen inside a semiconductor device. [Figure 2] FIG. 2 is a diagram illustrating the incidence of ions. [Figure 3] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device according to one embodiment of the present invention. [Figure 4]1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device according to one embodiment of the present invention. [Figure 5] FIG. 1 is a cross-sectional view of a transistor. [Figure 6] FIG. 1 is a diagram illustrating a band structure. [Figure 7] 10A and 10B are diagrams showing electrical characteristics of a transistor. [Figure 8] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 9] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 10] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 11] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device according to one embodiment of the present invention. [Figure 12] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 13] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 14] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 15] 1A and 1B are schematic cross-sectional views illustrating the diffusion of excess oxygen inside a semiconductor device. [Figure 16] 1A and 1B are schematic cross-sectional views illustrating the addition of impurities inside a semiconductor device. [Figure 17] 1A and 1B are schematic cross-sectional views illustrating the addition of impurities inside a semiconductor device. [Figure 18] 1A and 1B are schematic cross-sectional views illustrating the addition of impurities inside a semiconductor device. [Figure 19] FIG. 1 is a cross-sectional view illustrating an example of a semiconductor device according to one embodiment of the present invention. [Figure 20] FIG. 1 is a block diagram illustrating an example of a CPU according to one embodiment of the present invention. [Figure 21] 1A and 1B illustrate examples of electronic devices according to one embodiment of the present invention. [Figure 22] FIG. 1 shows the relationship between substrate temperature and ion intensity measured by TDS. [Figure 23]FIG. 10 is a graph showing the relationship between the phosphorus ion implantation concentration and the amount of released oxygen. [Figure 24] FIG. 10 is a graph showing the relationship between etching depth and oxygen release amount. [Figure 25] FIG. 1 shows the relationship between substrate temperature and ion intensity measured by TDS. [Figure 26] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device according to one embodiment of the present invention. [Figure 27] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 28] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 29] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 30] FIG. 1 is a diagram showing an element for measuring the resistance of a semiconductor. [Figure 31] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device according to one embodiment of the present invention. [Figure 32] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 33] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 34] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention [Figure 35] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0034] The embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the above, and various modifications in form and details can be easily made by those skilled in the art. It is understood that the present invention should not be construed as being limited to the description of the following embodiments. In explaining the configuration of the invention using the drawings, the same symbols are used in different The hatch pattern is used in common between drawings. However, there are cases where no particular symbol is attached.

[0035] It should be noted that in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0036] Also, voltage is a voltage between a certain potential and a reference potential (for example, ground potential (GND) or source potential). Therefore, voltage can be replaced with potential. .

[0037] In this specification, even when the expression "electrically connect" is used, it does not mean that the actual circuit In some cases, there may be no physical connection and only wires running.

[0038] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of the processes or the order of stacking. Therefore, for example, "the first" should not be replaced with "the second" or "the third" In addition, the ordinal numbers described in this specification and The ordinal numbers used to identify an aspect of the invention may not be consistent.

[0039] In this specification, the shape of an object may be referred to as, for example, a "diameter," a "particle size," a "size," a "diameter ... When specifying "width" etc., it is the length of one side of the smallest cube that the object can fit into, or the length of the object. The equivalent diameter of a circle in a cross section of an object may be read as the diameter of a circle in a cross section of the object. The diameter of a circle with an area equal to the cross section of the body.

[0040] Even when written as "semiconductor," if the conductivity is sufficiently low, it may be written as "insulator." In addition, the boundary between "semiconductor" and "insulator" is vague, and Therefore, the term "semiconductor" as used herein may be used interchangeably with "insulator." Similarly, the term "insulator" used herein can be interpreted as "semiconductor." " can sometimes be rephrased as ".

[0041] Also, even if a material is written as a "semiconductor," if the material has a sufficiently high conductivity, it may be written as a "conductor." In addition, the boundary between "semiconductor" and "conductor" is vague, and Therefore, the term "semiconductor" as used herein may be used interchangeably with "conductor." Similarly, the term "conductor" used in this specification can be used to refer to a "semiconductor." " can sometimes be rephrased as ".

[0042] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is between 85° and 95°.

[0043] <About the behavior of excess oxygen> The behavior of excess oxygen inside a semiconductor device will be described below with reference to FIG.

[0044] FIG. 1A shows a substrate 50, an insulating film 52 on the substrate 50, and island-shaped oxide semiconductors on the insulating film 52. The sample having the conductor film 56, the insulating film 52, and the insulating film 68 on the oxide semiconductor film 56. In the sample shown in FIG. 1(A), the insulating film 52 is formed of excess oxygen (e It is an insulating film containing SiO.

[0045] The insulating film 52 may be an oxide film, an oxynitride film, or the like. The film 52 may be a silicon oxide film or a silicon oxynitride film. In this specification, the term "oxynitride film" refers to a film containing nitrogen in an amount of 0.1 atomic % to 25 atomic %. The term "nitride oxide film" refers to an oxide film containing less than 0.1 atomic % of oxygen. This refers to a nitride film containing 25 atomic % or more of silicon.

[0046] The oxide semiconductor film 56 and the insulating film 68 will be described in detail below to avoid redundancy. The description of the compound semiconductor film 103 and the insulating film 106 is referred to. The details are omitted.

[0047] When heat is applied, excess oxygen diffuses through the insulating film 52. For example, When the excess oxygen reaches the interface between the insulating film 52 and the oxide semiconductor film 56, it is absorbed into the oxide semiconductor film 56. By reducing the oxygen vacancies in the oxide semiconductor film 56, Therefore, the density of defect states due to oxygen vacancies in the oxide semiconductor film 56 can be reduced. .

[0048] However, all of the excess oxygen diffusing in the insulating film 52 is transferred between the insulating film 52 and the oxide semiconductor film 56 For example, the excess oxygen diffused in the insulating film 52 does not reach the interface with the insulating film 6. 8. Alternatively, for example, the over-diffusion in the insulating film 52 may occur. Excess oxygen may react with the wiring that makes up the semiconductor device, increasing the wiring resistance. .

[0049] Therefore, the sample structure shown in Figure 1(A) may not be efficient in utilizing excess oxygen. do.

[0050] FIG. 1(B) shows an example of a sample structure that can efficiently utilize excess oxygen.

[0051] FIG. 1(B) shows a sample having a structure similar to that of the sample shown in FIG. 1(A). The sample shown in (B) is different in that the insulating film 52 has a region 53 in the vicinity of the insulating film 68. In the sample shown in FIG. 1B, the insulating film 52 is an insulating film containing excess oxygen. The region 53 is , the depth from the top surface of the insulating film 52 is 1 nm or more and 200 nm or less, preferably 5 nm or more and 150 nm or less. The thickness of the region is preferably 10 nm to 100 nm. The region 53 may be provided over the entire insulating film 52 in the depth direction.

[0052] The region 53 is an oxygen blocking region. For example, the insulating film 52 may be doped with boron, carbon, magnesium, or the like. Smoke, aluminum, silicon, phosphorus, calcium, scandium, titanium, vanadium , chromium, manganese, iron, cobalt, nickel, gallium, germanium, arsenic, yttrium Sodium, zirconium, niobium, molybdenum, indium, tin, lanthanum, cerium, Adding one or more elements selected from neodymium, hafnium, tantalum, and tungsten In some cases, it is possible to form an oxygen blocking region 53. The addition of phosphorus or boron to the insulating film 52 is unlikely to cause the metal to have a high resistance. When added, the oxygen-blocking property is high (the oxygen diffusion coefficient is small), and the particularly good quality region 53 The region 53 can be formed by, for example, doping the above-mentioned impurity element in the insulating film 52. x10 19atoms / cm 3 or more, preferably 1 × 10 20 atoms / cm 3 That's all, More preferably, 2 × 10 20 atoms / cm 3 More preferably, 5 × 10 20 a toms / cm 3 This is an area that includes the above.

[0053] The behavior of excess oxygen in the sample shown in FIG. 1(B) is shown below.

[0054] When heat is applied, excess oxygen diffuses through the insulating film 52. The excess oxygen diffused through the insulating film 52 When the oxygen reaches the interface between the insulating film 52 and the oxide semiconductor film 56, oxygen vacancies in the oxide semiconductor film 56 occur. You can make up for the loss.

[0055] The excess oxygen diffusing in the insulating film 52 is unlikely to penetrate the region 53, so the insulating film 52 and the oxide The proportion of excess oxygen that reaches the interface with the semiconductor film 56 is increased. It is possible to fill oxygen vacancies in the semiconductor film 56. In addition, for example, the oxygen diffuses in the insulating film 52. In addition, the excess oxygen can be prevented from diffusing outward through the insulating film 68. For example, excess oxygen diffused in the insulating film 52 reacts with wiring and the like that constitutes the semiconductor device, This can prevent the wiring resistance from increasing.

[0056] Therefore, the sample shown in Figure 1(B) has a structure that allows for efficient utilization of excess oxygen. You can see that.

[0057] Next, we investigated the sample structure different from that shown in Figure 1(B) to see if it is possible to efficiently utilize excess oxygen. An example of this is shown in FIG. 15(A). The difference from FIG. 1(B) is that in FIG. 15(A), a protrusion is formed on the insulating film 72. The point is that it has a part.

[0058] FIG. 15A shows a substrate 70, an insulating film 72 on the substrate 70, and island-shaped oxides on the insulating film 72. A sample having a semiconductor film 76, an insulating film 72, and an insulating film 88 on the oxide semiconductor film 76. In the sample shown in FIG. 15(A), the insulating film 72 is an insulating film containing excess oxygen. In FIG. 15(A), the insulating film 72 has a convex portion, and an oxide semiconductor is formed on the convex portion. The conductive film 76 is located on the insulating film 72. For the insulating film 72, refer to the description of the insulating film 52. The conductor film 76 and the insulating film 88 are redundant, so they will be described later. 03 and the description of the insulating film 106 are referred to, and the description here will be omitted.

[0059] Region 73 is an oxygen blocking region. For details about the oxygen blocking region, see the description of region 53. Illuminate.

[0060] When heat is applied, excess oxygen diffuses in the insulating film 72. The excess oxygen diffused in the insulating film 72 When the oxygen reaches the interface between the insulating film 72 and the oxide semiconductor film 76, oxygen vacancies in the oxide semiconductor film 76 occur. You can make up for the loss.

[0061] The excess oxygen diffusing in the insulating film 72 is unlikely to penetrate the region 73, so the insulating film 72 and the oxide The proportion of excess oxygen that reaches the interface with the semiconductor film 76 is increased. It is possible to fill oxygen vacancies in the semiconductor film 76. In addition, for example, oxygen is diffused in the insulating film 72. The excess oxygen can be prevented from diffusing outward. Excess oxygen diffused inside reacts with the wiring that makes up the semiconductor device, increasing the wiring resistance. This can suppress the above.

[0062] Therefore, the sample shown in Figure 15(A) has a structure that allows for efficient utilization of excess oxygen. It can be seen that...

[0063] 15(C), the insulating film 72 may be formed in an island shape. The island-like structure of the oxygen-containing region restricts lateral oxygen diffusion, allowing oxygen to be efficiently absorbed. This allows the oxide semiconductor film 76 to be supplied with the oxygen.

[0064] <Addition of impurities to oxide semiconductor films> FIG. 16B shows an example in which the resistance can be reduced by adding impurities to an oxide semiconductor film. FIG. 16(B) shows a substrate 70, an insulating film 72 on the substrate 70, and an oxide semiconductor layer on the insulating film 72. 10 shows a cross-sectional structure of a sample having a conductive film 76.

[0065] The region 77 is a part of the oxide semiconductor film 76 and contains impurities. The oxide semiconductor film 76 contains boron, carbon, magnesium, aluminum, silicon, and phosphorus. , calcium, scandium, titanium, vanadium, chromium, manganese, iron, cobalt, Nickel, gallium, germanium, arsenic, yttrium, zirconium, niobium, molybdenum Butane, indium, tin, lanthanum, cerium, neodymium, hafnium, tantalum, When one or more selected from tungsten are added, the region 77 having impurities is formed. The region 77 may be formed in the oxide semiconductor film 76 by, for example, impurity elements of 5×10 19 atoms / cm 3 or more, preferably 1 × 10 20 atom s / cm 3 More preferably, 2 × 10 20 atoms / cm 3More preferably, is 5 x 10 20 atoms / cm 3 Region 77 includes the above. The same impurities as those used in the present invention can be added.

[0066] The carrier density of the oxide semiconductor film can be increased by adding the impurities described above. Therefore, by adding impurities to the oxide semiconductor film 76, the oxide semiconductor The resistance of the body membrane can be reduced.

[0067] The addition of the impurities described above may cause oxygen vacancies in the oxide semiconductor film 76. When hydrogen is added to the oxide semiconductor film 76 in which oxygen vacancies are formed, hydrogen is added to the oxygen vacancy sites. As a result, the resistance of the oxide semiconductor film 76 is further increased. In some cases, it may be possible to lower the

[0068] The addition of hydrogen can be carried out by, for example, ion doping, ion implantation, plasma treatment, etc. Alternatively, the heat treatment may be performed in an atmosphere containing hydrogen. Alternatively, the film containing hydrogen may be treated with an acid. The hydrogen-containing film may be formed on or under the oxide semiconductor film 76 and doped with hydrogen. For example, a silicon nitride film can be used.

[0069] Here, hydrogen is stabilized when it enters the oxygen vacancy site. The hydrogen that has been absorbed remains at the oxygen vacancy site, preventing hydrogen from diffusing into the channel region. can.

[0070] Also, as shown in FIG. 16(C), for example, by partially doping impurities, an oxide semiconductor can be formed. The conductive film 76 has an impurity-doped region 77 and an undoped region 79 formed by oxidation. The nitride semiconductor film 76 can also be formed separately.

[0071] Next, an example in which a low-resistance region of an oxide semiconductor film is further combined with the structure shown in FIG. FIG. 18(A) shows an oxide film having an oxygen blocking region and having low resistance due to the addition of impurities. Here, the oxygen blocking region is an insulating film doped with impurities. .

[0072] FIG. 18(A) shows a substrate 70, an insulating film 72 on the substrate 70, and island-shaped oxides on the insulating film 72. A sample having a semiconductor film 76, an insulating film 72, and an insulating film 88 on the oxide semiconductor film 76. In the sample shown in FIG. 18(A), the insulating film 72 is an insulating film containing excess oxygen. In FIG. 18A, the insulating film 72 has a projection, and the oxide semiconductor film 76 is an insulating film. The insulating film 72 is located on the convex portion of the insulating film 72. For the insulating film 72, refer to the description of the insulating film 52. The oxide semiconductor film 76 and the insulating film 88 are redundant, so they will be described later. Please refer to the description of the conductor film 103 and the insulating film 106, and the description here will be omitted. Abbreviated.

[0073] Region 73 is an oxygen blocking region. For details of region 73, refer to the description of region 53. When the temperature is increased, excess oxygen diffuses through the insulating film 72. The excess oxygen diffused through the insulating film 72 is When the oxygen reaches the interface between the insulating film 72 and the oxide semiconductor film 76, oxygen vacancies in the oxide semiconductor film 76 can be filled.

[0074] The excess oxygen diffusing in the insulating film 72 is unlikely to penetrate the region 73, so the insulating film 72 and the oxide The proportion of excess oxygen that reaches the interface with the semiconductor film 76 is increased. It is possible to fill oxygen vacancies in the semiconductor film 76. In addition, for example, oxygen is diffused in the insulating film 72. The excess oxygen can be prevented from diffusing outward. Excess oxygen diffused inside reacts with the wiring that makes up the semiconductor device, increasing the wiring resistance. This can suppress the above.

[0075] The region 77 is a part of the oxide semiconductor film 76, and is a region to which impurities are added. By adding impurities to the oxide semiconductor film, the resistance of the oxide semiconductor film can be reduced. For example, as shown in FIG. 18A, the oxide semiconductor film 76 In other words, a low resistance region 78 can be created in a part of the oxide semiconductor. In the body membrane 76, it is possible to create regions with low resistance and regions with high resistance.

[0076] The impurities added to the region 77 are the same as those added to the region 73. Therefore, the region 77 and the region 73 can be formed at the same time.

[0077] By separately creating a low resistance region and a high resistance region in the oxide semiconductor film 76, For example, the resistance of the source and drain regions of a transistor can be reduced, improving the on-state characteristics of the transistor. can be increased.

[0078] 18(B), the insulating film 72 may be formed in an island shape. The island-like structure of the oxygen-containing region restricts lateral oxygen diffusion, allowing oxygen to be efficiently absorbed. This allows the oxide semiconductor film 76 to be supplied with the oxygen.

[0079] <Method of adding impurities> The following describes a method for forming the oxygen blocking region shown as region 53 in FIG. 1(B). This article explains:

[0080] First, the insulating film 52 is formed.

[0081] Next, an oxide semiconductor film that will become the oxide semiconductor film 56 is formed.

[0082] Next, a resist is formed on the oxide semiconductor film. The resist is exposed to light through a photomask. After that, the resist mask is formed by developing.

[0083] Next, the oxide semiconductor film is etched using a resist mask to form an oxide semiconductor film 56. Complete.

[0084] Next, with the resist mask remaining, impurities are added to the insulating film 52 to form a region 53. In this way, by leaving the resist mask, the oxide semiconductor film 56 is formed on the upper surface thereof. However, the upper surface of the oxide semiconductor film 56 can be prevented from being doped with impurities. If the resist mask is to be removed in a later step, the insulating film 52 and the oxide film 53 are removed after the resist mask is removed. The semiconductor film 56 may be doped with impurities.

[0085] The impurities added to the insulating film 52 include, for example, boron, carbon, magnesium, and aluminum. Sodium, silicon, phosphorus, calcium, scandium, titanium, vanadium, chromium, manganese Gunn, iron, cobalt, nickel, gallium, germanium, arsenic, yttrium, zirconium Sodium, niobium, molybdenum, indium, tin, lanthanum, cerium, neodymium, hafnium The insulating film may be made of one or more materials selected from the group consisting of tungsten, tantalum, and tungsten. Adding phosphorus or boron to 52 creates a particularly good region 53 with high oxygen blocking properties. It can be formed.

[0086] The impurity is added to the insulating film 52 by ion doping (a method without mass separation), ion The ion implantation method (a method for performing mass separation), plasma treatment, etc. may be used. Using ion doping or ion implantation, which generates and ionizes molecular clusters. However, the insulating film may be formed by plasma treatment in an atmosphere containing impurity elements. Impurities may be added to 52.

[0087] When the region 53 is formed in the insulating film 52 by using the ion doping method or the ion implantation method For example, the acceleration voltage in the ion doping method or ion implantation method is 0.5 kV or more. 100 kV or less, preferably 1 kV or more and 50 kV or less, more preferably 1 kV or more and 30 kV or less The ion implantation concentration is set to: 5×10 14 atoms / cm 2 or more, preferably 1 × 10 15 atoms / cm 2 End Let's say.

[0088] The addition of ions by ion doping or ion implantation is performed at a specific angle to the sample surface. Although the method may be performed from a certain angle (e.g., perpendicular), it is preferable to perform the method shown in FIG. is a simplified representation of the incident angle of one ion to the sample surface at angles (θ) and (φ). This is a diagram showing the objective.

[0089] The x-axis, y-axis, and z-axis in the figure are straight lines that intersect at the point of incidence of an ion. The y-axis is a line that is arbitrarily determined on the surface of the sample. The y-axis is a line that is on the surface of the sample and perpendicular to the x-axis. The z-axis is the normal to the sample surface at the point of incidence. The angle (θ) is the angle The angle (φ) is the angle between the incident direction of the ions and the z-axis in the top view. This is the angle between the incident direction and the x-axis.

[0090] When ions are incident on the sample surface only at specific angles (θ, φ), the amount of added ions is For example, the oxide semiconductor film 56 and the insulating film 52 may be formed on the insulating film 52. A resist mask is provided. Therefore, the ions are etched into a part of the insulating film 52 by the resist mask. Therefore, it is necessary to make the ions incident from multiple angles. This preferably reduces the effect of shadows generated on the insulating film 52.

[0091] As shown in FIGS. 2A1 and 2A2, the ions are oriented at a first angle (θ , φ), and then at a second angle (θ, φ). The angle (θ, φ) and the second angle (θ, φ) are angles in which at least one of θ and φ is different.

[0092] In the first angle (θ, φ), the angle (θ) is, for example, equal to or greater than 0° and less than 90°, preferably The second angle ( In the case of (θ, φ), the angle (θ) is, for example, 0° or more and less than 90°, preferably 30° or more. The second angle (θ, φ) is set to 88° or less, and more preferably 60° or more and 85° or less. The angle (φ) at the first angle (θ, φ) is, for example, 90° or more larger than the angle (φ) at the second angle (θ, φ). The angle is 270° or less, preferably 135° or more and 225° or less. The first angle (θ, φ) and the second angle (θ, φ) shown are examples and are not limited thereto. It is not something that can be done.

[0093] The ion incidence angle is classified into two types: a first angle (θ, φ) and a second angle (θ, φ). For example, the angle (θ, φ) of the first to nth angles (n is a natural number of 2 or more) can be set. The first to n-th angles (θ, φ) may be set such that at least one of θ and φ is Includes different angles.

[0094] Alternatively, as shown in FIG. 2(B), ions are incident on the sample surface at a first angle (θ, φ). After that, the angle (θ) passes through 90° and scans in the θ direction to the second angle (θ, φ) ( However, the angle (φ) at which the ions are incident can be The incident angle (φ) is not limited to the above, and may be any of the first to n-th angles (n is a natural number of 2 or more). By scanning the ion incident angle θ, it is possible to obtain a high aspect ratio (for example, 1 or more, 2 or more, 5 or more, or 10 or more) even in openings, etc., ions are reliably added to deep areas. Therefore, the oxygen blocking region can be formed without any gaps.

[0095] In the first angle (θ, φ), the angle (θ) is, for example, equal to or greater than 0° and less than 90°, preferably The second angle ( In the case of (θ, φ), the angle (θ) is, for example, 0° or more and less than 90°, preferably 30° or more. The first angle (θ, φ) and the second angle (θ, φ) are set to 88° or less, and more preferably 60° to 85°. The two angles (θ, φ) may be the same angle (θ).

[0096] The θ scan may be performed continuously, for example, at 0.5°, 1°, 2°, 3°, 4°, 5°, 6°, 10°, 12°, 18°, 20°, 24° or 30° steps You can also scan in stages.

[0097] Alternatively, the ions may be incident at a first angle (θ, φ) relative to the sample surface, as shown in FIG. 2(C). After the beam is projected, it is scanned in the φ direction (also called φ scanning) to a second angle (θ, φ). However, the angle (θ) at which ions are incident is not limited to one type, and may be any of the first to fourth types. The light may be incident at an angle (θ) of n (n is a natural number of 2 or more).

[0098] In the first angle (θ, φ) and the second angle (θ, φ), the angle (θ) is, for example, 0 30° or more and less than 90°, preferably 30° or more and less than 88°, and more preferably 60° or more and less than 85°. The first angle (θ, φ) and the second angle (θ, φ) are the same angle (φ). That's fine.

[0099] The φ scan may be performed continuously, for example, at 0.5°, 1°, 2°, 3°, 4°, 5°, 6°, 10°, 12°, 18°, 20°, 24° or 30° steps You can also scan in stages.

[0100] Although not shown, the θ scan and the φ scan may be performed in combination.

[0101] By using the method shown in FIG. 2, the region 53 is formed in a region that does not overlap with the oxide semiconductor film 56. In addition, the insulating film 52 can also be formed in a region that partially overlaps with the oxide semiconductor film 56. The region other than 53 (region not blocking oxygen) is the region where the oxide semiconductor film 56 is provided. Therefore, the region 53 can be formed so as not to protrude from the insulating film 52. The excess oxygen can be effectively utilized to reduce oxygen vacancies in the oxide semiconductor film 56. Cut.

[0102] After the region 53 is formed in the insulating film 52 in the above manner, the insulating film 52 is An insulating film 68 is formed on the oxide semiconductor film 56 to form the sample structure shown in FIG. 1(B). It can be manufactured.

[0103] Next, a method for fabricating the sample structure shown in FIG. 5(A) is a diagram for explaining the method for fabricating the sample structure shown in FIG. explain.

[0104] First, an insulating film 72 is formed on a substrate 70 .

[0105] Next, an oxide semiconductor film that will become the oxide semiconductor film 76 is formed.

[0106] Next, a resist is formed on the oxide semiconductor film. The resist is exposed to light through a photomask. After that, the resist mask 81 is formed by developing.

[0107] Next, the oxide semiconductor film and the insulating film 72 are etched using the resist mask 81 to form an island. The oxide semiconductor film 76 having a protrusion and the insulating film 72 having a protrusion are formed.

[0108] Next, while leaving the resist mask 81, impurities are added to the insulating film 72 to form a region 73 For the impurities to be added to the insulating film 72, refer to the description of the impurities to be added to the insulating film 52. do.

[0109] Region 73 can be formed using ion doping or ion implantation.

[0110] For details about the ion doping method and the ion implantation method, please refer to the description in the area 53. By using this method, the region 73 includes a region that does not overlap with the oxide semiconductor film 76. A region 73a that partially overlaps with the oxide semiconductor film 76 can also be formed. By forming 73a, outward diffusion of oxygen from the side of the film is suppressed, and oxygen is efficiently can be supplied to the oxide semiconductor film 76.

[0111] Next, a method for fabricating the sample structure shown in FIG. 16(B) will be described.

[0112] First, an insulating film 72 is formed on a substrate 70 .

[0113] Next, an oxide semiconductor film that will become the oxide semiconductor film 76 is formed (FIG. 16(A)).

[0114] Next, impurities are added to the oxide semiconductor film 76 to form a region 77 (FIG. 16B). For the impurities added to the oxide semiconductor film 76, refer to the description of the impurities added to the insulating film 52. do.

[0115] Region 77 can be formed using ion doping or ion implantation.

[0116] For details on ion doping and ion implantation, see the description in area 53. By adding impurities to the conductive film 76, the resistance can be reduced. A region 77 having low resistance can be formed in the conductive film 76 .

[0117] Next, a method for manufacturing the sample structure shown in FIG. After forming a resist mask (not shown) on the portion that will become the region 79, impurities are added. By adding impurities, impurities are introduced only into the region 77 by using ion doping or ion implantation. That is, the oxide semiconductor film 76 has a low resistance region 77 and a high resistance region 78. It is possible to create a region 79 that is a resistance.

[0118] Next, a method for fabricating the sample structure shown in Figure 18(A) will be described. ) is a diagram for explaining the method for fabricating the sample structure shown in FIG. 18(A). The fabrication method is as follows. Explain the law.

[0119] First, the insulating film 72 is formed.

[0120] Next, an oxide semiconductor film to be the oxide semiconductor film 76 is formed (see FIG. 17A).

[0121] Next, a resist is formed on the oxide semiconductor film. The resist is exposed to light through a photomask. After that, the resist mask 81 is formed by developing.

[0122] Next, the oxide semiconductor film and the insulating film 72 are etched using the resist mask 81 to form an island. The oxide semiconductor film 76 having a projection and the insulating film 72 having a projection are formed (see FIG. 17B). ).

[0123] Next, a resist mask 82 having a smaller area than the resist mask 81 is formed on the resist mask 81. The resist mask 82 is used to add impurities to the insulating film 72. The impurity added to the insulating film 72 is added to the insulating film 73 (see FIG. 17(C)). Please refer to the description of impurities added in 52.

[0124] Region 73 can be formed using ion doping or ion implantation.

[0125] For details about the ion doping method and the ion implantation method, please refer to the description in the area 53. By using this method, the region 73 has a region that does not overlap with the oxide semiconductor film 76 and a region that does not overlap with the oxide semiconductor film 76. The insulating film 74 can also be formed in the region where the insulating film 74 overlaps with the oxide semiconductor film 76. That is, the insulating film 74 can be formed in the region of FIG. As shown in 73, the region 73 is formed not only on the upper surface of the insulating film 72 but also on the side surfaces of the protrusions of the insulating film 72. It can be formed.

[0126] The impurities added to the region 77 are the same as those added to the region 73. Therefore, when the region 73, which is an oxygen blocking region, is formed by adding impurities, The oxide semiconductor film 76 is also doped with impurities by the same impurity doping process. 17C). By adding impurities to the oxide semiconductor film 76, As a result, the resistance of the oxide semiconductor film can be reduced, as shown in FIG. As shown in A), a low-resistance region 78 is formed in a part of the oxide semiconductor film 76. In other words, the oxide semiconductor film 76 has a low resistance region and a high resistance region. You can create different areas.

[0127] The oxide semiconductor film 76 is provided with a high resistance by using the step of forming an oxygen blocking region in the insulating film 72. It is possible to create regions where the resistance is high and regions where the resistance is low.

[0128] <Explanation of transistor structure and manufacturing method> A structure and a manufacturing method of a transistor according to one embodiment of the present invention will be described below.

[0129] <Transistor Structure (1)> First, an example of a top-gate self-aligned transistor will be described.

[0130] In the self-aligned top gate structure, the gate electrode is used as a mask to Since the source and drain regions are formed in a self-aligned manner, the source and drain regions and the gate This allows a significant reduction in the area of ​​overlap with the gate electrode, which is effective in reducing parasitic capacitance. This phenomenon is particularly noticeable in miniaturized transistors, as the channel length becomes shorter. It is more effective in the area between the gate electrode and the source or drain electrode, or in the area between the gate electrode and the source or drain electrode. The parasitic capacitance that may occur between the gate electrode and the low-resistance region of the semiconductor film is reduced. This can improve the switching characteristics of the transistor.

[0131] 3A and 3B are a top view and a cross-sectional view of a transistor. In Fig. 3(A), a cross-sectional view corresponding to the dashed dotted line AB is shown in Fig. 3(B). Also, a cross-sectional view corresponding to the dashed dotted line CD in FIG. 3(A) is shown in FIG. 3(C).

[0132] The channel length is the length of the semiconductor film in the region where the semiconductor film and the gate electrode overlap in the top view. , the distance between the source region and the drain region. In other words, in FIG. 3(A), the channel length is The channel width is the distance between the semiconductor film and the gate electrode. The length of the overlapping region where the source region and the drain region face each other in parallel is That is, in FIG. 3(A), the channel width is the channel width 182 indicated by the arrow in the drawing. Note that the channel formation region is a region in the oxide semiconductor film 103 in the top view. , refers to a region that overlaps with the gate electrode 105 and is sandwiched between the source region and the drain region.

[0133] In FIG. 3B, the transistor is formed by a base insulating film 102 on a substrate 101 and a base insulating film 102, an insulating film 121, an oxide semiconductor film 103 on the insulating film 121, and an oxide semiconductor film A gate insulating film 104 on the gate electrode 103, a gate electrode 105 on the gate insulating film 104, and a gate electrode an insulating film 106 on the electrode 105, the oxide semiconductor film 103, and the base insulating film 102; The source electrode 107a and the drain electrode 107b are formed on the oxide semiconductor film 103 and the insulating film 106. The insulating film 121 is an insulating film containing excess oxygen. The base insulating film 102 may not be provided.

[0134] In FIG. 3B, a region 151a is a part of the oxide semiconductor film. The regions 151c and 151d are part of the insulating film and are oxygen blocking regions. For the oxygen blocking region, please refer to the description of the region 53. The transistor shown has oxygen-blocking regions 151b, 151c, and 151d. d) or more of the above.

[0135] First, the oxygen blocking regions 151b, 151c, and 151d will be described. do.

[0136] The region 151b is a region of the insulating film 121 that contacts the insulating film 106. The region 151b is The depth from the surface of the insulating film 121 in contact with the insulating film 106 is 1 nm or more and 200 nm or less, preferably It is set to 5 nm or more and 150 nm or less, more preferably 10 nm or more and 100 nm or less. As shown in FIG. 4B, the region 151b is formed only on the side surface of the insulating film 121. For example, it may be provided in an area overlapping with the area 151a.

[0137] As shown in FIGS. 3B and 3C, the region 151c is an insulating layer of the gate insulating film 104. The region 151c is a region in contact with the insulating film 106 of the gate insulating film 104. The depth from the contact surface is 1 nm or more and 200 nm or less, preferably 5 nm or more and 150 nm or less, More preferably, the region is provided to be 10 nm or more and 100 nm or less.

[0138] As shown in FIG. 3B, the region 151d is a region of the base insulating film 102 that contacts the insulating film 106. The region 151d is a region having a depth of 1 nm or more and 200 nm or less from the top surface of the base insulating film 102. , preferably 5 nm or more and 150 nm or less, and more preferably 10 nm or more and 100 nm or less. As shown in FIG. 4(B) and FIG. 4(C), the area 151d It may be provided not only on the top surface but also on the entire base insulating film 102 in the depth direction. Furthermore, the substrate 101 may also be provided with the region 151d.

[0139] When the transistor has the region 151b, the excess oxygen contained in the insulating film 121 is converted into an oxide semiconductor. This can be effectively utilized to reduce oxygen vacancies in the conductive film 103. For example, the region 15 If the insulating film 121 does not have the insulating film 106, excess oxygen contained in the insulating film 121 will diffuse outward. In addition, excess oxygen contained in the insulating film 121 may be lost due to diffusion. The source electrode 107a and the drain electrode 107b may be oxidized.

[0140] Even when the transistor has the region 151d, the insulating film 121 and the base insulating film 102 The excess oxygen can be effectively utilized to reduce oxygen vacancies in the oxide semiconductor film 103. For example, if the region 151d is not provided, the insulating film 121 and the base insulating film 102 may be formed of a metal oxide film. In some cases, excess oxygen may be lost due to outward diffusion. If there is no oxygen, excess oxygen contained in the insulating film 121 and the base insulating film 102 will flow into the source electrode 107a In addition, the drain electrode 107b may be oxidized.

[0141] Even if the transistor has the region 151c, the excess oxygen contained in the gate insulating film 104 can be effectively used to reduce oxygen vacancies in the oxide semiconductor film 103. For example, If the region 151c is not provided, excess oxygen contained in the gate insulating film 104 will diffuse outward. Furthermore, if the region 151c is not provided, the gate insulating film 1 The excess oxygen contained in O4 oxidizes the source electrode 107a and the drain electrode 107b. This may be the case.

[0142] Next, the region 151a, which is part of the oxide semiconductor film 103, will be described.

[0143] The region 151a is a region of the oxide semiconductor film 103 where the source electrode 107a and the drain electrode 10 7b is a region in contact with the insulating film 106. The region 151a is a region on the top surface of the oxide semiconductor film 103. or a depth from the side of 1 nm to 200 nm, preferably 5 nm to 150 nm; More preferably, the region is provided with a thickness of 10 nm or more and 100 nm or less. As shown in FIG. 1, the region 151a is a region in the depth direction except for the channel formation region of the oxide semiconductor film 103. In this case, the insulating film 104 may be provided over the entire oxide semiconductor film 103.

[0144] In order to form the oxygen blocking regions 151b, 151c, and 151d, In the step of adding impurities, the region 151a is also doped with impurities. By adding , the resistance of the region 151a can be reduced.

[0145] The region 122 shown in FIG. 3B is not in contact with the source electrode 107a or the drain electrode 107b. The region 122 is a region that is small and does not overlap with the gate electrode 105. If the resistance of the region 122 is high, This can cause a decrease in the on-state current of the transistor.

[0146] By adding impurities to the region 151a, which is a part of the oxide semiconductor film 103, The resistance of region 122 can be reduced, which increases the on-current and This can improve the performance of the computer.

[0147] The step of adding impurities to form a low-resistance region is carried out in the oxygen blocking region. A step of adding impurities to form the regions 151b, 151c, and 151d. This allows the process to be shortened, leading to cost reduction. Furthermore, the simplification of the process is expected to improve yield.

[0148] The oxide semiconductor film 103 will be described below.

[0149] The oxide semiconductor film 103 is an oxide containing indium. When the oxide semiconductor film 103 contains the oxide semiconductor film 103, carrier mobility (electron mobility) is increased. It is preferable that the element M is contained. Examples of the element M include aluminum, gallium, and yttrium. The element M is, for example, an element with high bond energy with oxygen. The element M is, for example, an element that has the function of increasing the energy gap of the oxide. The oxide semiconductor film 103 preferably contains zinc. When the oxide contains zinc, The energy of the top of the valence band of an oxide is, for example, It can be controlled by numerical ratios.

[0150] However, the oxide semiconductor film 103 is not limited to an oxide containing indium. The film 103 may be, for example, Zn—Sn oxide or Ga—Sn oxide.

[0151] In the channel formation region of the oxide semiconductor film 103, a first oxide semiconductor film is formed above and below the channel formation region of the oxide semiconductor film 103. and a second oxide semiconductor film. Note that the second oxide semiconductor film may be an oxide semiconductor It is provided between the conductor film 103 and the gate insulating film 104 .

[0152] The first oxide semiconductor film contains at least one element other than oxygen contained in the oxide semiconductor film 103, or The oxide semiconductor film 103 is an oxide semiconductor film composed of two or more kinds of oxides. Since the first oxide semiconductor film is composed of one or more elements other than the element, An interface state is unlikely to be formed at the interface between the oxide semiconductor film 103 and the first oxide semiconductor film. stomach.

[0153] The second oxide semiconductor film contains at least one element other than oxygen contained in the oxide semiconductor film 103, or The oxide semiconductor film 103 is an oxide semiconductor film composed of two or more kinds of oxides. Since the second oxide semiconductor film is composed of one or more elements other than the element, An interface state is unlikely to be formed at the interface between the oxide semiconductor film 103 and the second oxide semiconductor film. stomach.

[0154] When the first oxide semiconductor film is an In-M-Zn oxide, the sum of In and M is 100 In atomic %, the atomic ratio of In to M is preferably 50 atomic %. %, M is 50 atomic % or more, and more preferably In is less than 25 atomic %. In addition, the oxide semiconductor film 103 is an In-M-Zn oxide film. In the case of oxides, the atomic ratio of In to M when the sum of In and M is 100 atomic % The ratio is preferably 25 atomic % or more for In and less than 75 atomic % for M, and more preferably 10 atomic % or more for M. Preferably, In is 34 atomic % or more and M is less than 66 atomic %. When the oxide semiconductor film of 2 is an In-M-Zn oxide, the sum of In and M is 100 atoms. When expressed as ic%, the atomic ratio of In to M is preferably less than 50 atomic %. M is 50 atomic % or more, more preferably In is less than 25 atomic %, and M is 7 The second oxide semiconductor film has a content of 5 atomic % or more. The same oxide may also be used.

[0155] Here, the first oxide semiconductor film is formed between the first oxide semiconductor film and the oxide semiconductor film 103. In some cases, the oxide semiconductor film 10 may have a mixed region of the oxide semiconductor film 10 and the oxide semiconductor film 103. Between the oxide semiconductor film 103 and the second oxide semiconductor film, The interfacial state density is low in the interfacial region. The stack of the first oxide semiconductor film, the oxide semiconductor film 103, and the second oxide semiconductor film is Near each interface, the energy changes continuously (also called a continuous junction). It becomes a structure.

[0156] The oxide semiconductor film 103 is formed using an oxide with a wide energy gap. The energy gap of the film 103 is, for example, 2.5 eV or more and 4.2 eV or less, preferably is set to 2.8 eV or more and 3.8 eV or less, more preferably 3 eV or more and 3.5 eV or less. The energy gap of the second oxide semiconductor film is greater than or equal to 2.7 eV and less than or equal to 4.9 eV. Preferably, 3 eV or more and 4.7 eV or less, and more preferably, 3.2 eV or more and 4.4 eV or less Let's say.

[0157] The first oxide semiconductor film is formed using an oxide having a wide energy gap. The energy gap of the first oxide semiconductor film is preferably 2.7 eV to 4.9 eV. Preferably, the range is 3 eV or more and 4.7 eV or less, and more preferably, 3.2 eV or more and 4.4 eV or less. .

[0158] The second oxide semiconductor film is formed using an oxide having a wide energy gap. The energy gap of the compound semiconductor film is 2.7 eV or more and 4.9 eV or less, preferably 3 e 5 or more and 4.7 eV or less, more preferably 3.2 eV or more and 4.4 eV or less, provided that The first oxide semiconductor film and the second oxide semiconductor film are thicker than the oxide semiconductor film 103. The oxide has a large energy gap.

[0159] The oxide semiconductor film 103 is made of an oxide having a higher electron affinity than the first oxide semiconductor film. For example, the oxide semiconductor film 103 may be formed of a material having an electron affinity of 0.05% or less than that of the first oxide semiconductor film. 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, and more preferably The electron affinity is 0.15 eV or more and 0.4 eV or less. It is the difference in energy between the empty level and the bottom of the conduction band.

[0160] The oxide semiconductor film 103 is made of an oxide semiconductor film having a higher electron affinity than the second oxide semiconductor film. For example, a compound having a higher electron density than the second oxide semiconductor film is used as the oxide semiconductor film 103. Affinity of 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, More preferably, an oxide having a larger molecular weight than the oxide by 0.15 eV or more and 0.5 eV or less is used.

[0161] At this time, when an electric field is applied to the gate electrode 105, the first oxide semiconductor film, the oxide semiconductor The oxide semiconductor film 103 has a larger electron affinity than the second oxide semiconductor film 103. Current flows as

[0162] In addition, in terms of the on-state current of the transistor, it is preferable that the thickness of the second oxide semiconductor film is as small as possible. For example, the second oxide semiconductor film has a thickness of less than 10 nm, preferably 5 nm or less, and more preferably 10 nm or less. On the other hand, the second oxide semiconductor film is mainly a layer through which current flows. The oxide semiconductor film 103 is doped with an element other than oxygen (such as silicon) that constitutes the gate insulating film 104. ) from entering the second oxide semiconductor film. It is preferable that the second oxide semiconductor film has a certain thickness. For example, the thickness of the second oxide semiconductor film is 0. It is set to 3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more.

[0163] In order to improve reliability, the first oxide semiconductor film is thick and the oxide semiconductor film 103 is thin. It is preferable that the first oxide semiconductor film be thin and the second oxide semiconductor film be thin. The thickness of the semiconductor film is 20 nm or more, preferably 30 nm or more, and more preferably 40 nm or more. The thickness of the first oxide semiconductor film is set to 20 nm or more, more preferably 60 nm or more. or more, preferably 30 nm or more, more preferably 40 nm or more, and even more preferably 60 nm or more By setting the thickness to m or more, the electric field is mainly generated from the interface between the base insulating film 102 and the first oxide semiconductor film. The distance to the oxide semiconductor film 103 through which the current flows is 20 nm or more, preferably 30 nm or more. Preferably, the distance is 40 nm or more, more preferably 60 nm or more. Since the productivity of the semiconductor device may be reduced, the thickness of the first oxide semiconductor film is set to 200 nm. The thickness is preferably 120 nm or less, and more preferably 80 nm or less. The thickness of the semiconductor film 103 is 3 nm or more and 100 nm or less, preferably 3 nm or more and 80 nm or less. More preferably, the thickness is 3 nm or more and 50 nm or less.

[0164] For example, the thickness of the first oxide semiconductor film is larger than that of the oxide semiconductor film 103. The thickness of the conductor film 103 may be set to be thicker than the thickness of the second oxide semiconductor film.

[0165] When the insulating film 121 is formed in an island shape, the thickness of the first oxide semiconductor film and the insulating film 121 are The sum of the thicknesses of 21 is 20 nm or more, preferably 30 nm or more, and more preferably 40 nm or more. By making the thickness of the insulating film 102 and the insulating film 121 equal to or larger than 60 nm, and more preferably equal to or larger than 60 nm, The distance from the interface with the oxide semiconductor film 103 through which the current mainly flows is preferably 20 nm or more. The distance is preferably at least 30 nm, more preferably at least 40 nm, and even more preferably at least 60 nm. That is, by providing a thick insulating film 121, it is possible to make the first oxide semiconductor film thin. By thinning the first oxide semiconductor film, The amount of excess oxygen supplied to the oxide semiconductor can be reduced, and the oxide semiconductor is the main current-carrying element. Since the amount of oxygen that can be supplied to the film 103 increases relatively, further improvement in characteristics is expected.

[0166] The influence of impurities in the oxide semiconductor film 103 will be described below. In order to stabilize the electrical characteristics of the transistor, the impurity concentration in the oxide semiconductor film 103 is reduced. In addition, it is effective to lower the carrier density and increase the purity of the oxide semiconductor film 10. The carrier density of 3 is 1×10 17 pieces / cm 3 Less than 1×10 15 pieces / cm 3 Less than or is 1 x 10 13 pieces / cm 3 The impurity concentration in the oxide semiconductor film 103 is reduced. To achieve this, it is preferable to also reduce the impurity concentration in the adjacent films.

[0167] For example, when silicon is contained in the oxide semiconductor film 103, carrier traps and carriers Therefore, the oxide semiconductor film 103 and the first oxide semiconductor film The silicon concentration between the two was measured by secondary ion mass spectroscopy (SIMS). Ion Mass Spectrometry (IMS) 19 atoms / c m 3 Less than 5 x 10 18 atoms / cm 3 less than 2 × 10 18 atoms / cm 3 In addition, the oxide semiconductor film 103 and the second oxide semiconductor The silicon concentration between the film and the silicon layer was measured by SIMS at 1×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 less than 2 × 10 18 atoms / cm 3 Less than.

[0168] Furthermore, when hydrogen is contained in the oxide semiconductor film 103, the carrier density may increase. The hydrogen concentration of the oxide semiconductor film 103 is 2×10 20 atom s / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than or equal to 1× 10 19 atoms / cm 3 Less than 5 × 10, more preferably 18 atoms / cm 3 Below Furthermore, when nitrogen is contained in the oxide semiconductor film 103, the carrier density is increased. The nitrogen concentration of the oxide semiconductor film 103 was found to be 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Below, more preferred Preferably 1 x 10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atom s / cm 3 The following applies.

[0169] In order to reduce the hydrogen concentration in the oxide semiconductor film 103, the hydrogen concentration in the first oxide semiconductor film The hydrogen concentration in the first oxide semiconductor film is preferably reduced by 2× 10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Below, More preferably 1×10 19 atoms / cm 3 Less than 5 × 10, more preferably 18 at oms / cm 3 In order to reduce the nitrogen concentration in the oxide semiconductor film 103, It is preferable to reduce the nitrogen concentration in the first oxide semiconductor film. The degree is 5×10 in SIMS. 19 atoms / cm 3 Less than 5 x 10 1 8 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Below, further Preferably 5 x 10 17 atoms / cm 3 The following applies.

[0170] In order to reduce the hydrogen concentration in the oxide semiconductor film 103, the hydrogen concentration in the second oxide semiconductor film The hydrogen concentration of the second oxide semiconductor film is preferably reduced by 2× 10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Below, More preferably 1×10 19 atoms / cm 3 Less than 5 × 10, more preferably 18 at oms / cm 3In order to reduce the nitrogen concentration in the oxide semiconductor film 103, It is preferable to reduce the nitrogen concentration in the second oxide semiconductor film. The degree is 5×10 in SIMS. 19 atoms / cm 3 Less than 5 x 10 1 8 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Below, further Preferably 5 x 10 17 atoms / cm 3 The following applies.

[0171] The structure of the oxide semiconductor film will be described below.

[0172] Oxide semiconductor films are roughly classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. The single-crystal oxide semiconductor film is called CAAC-OS (C Axis Aligned Crystal Polycrystalline oxide semiconductor film The oxide semiconductor film includes a microcrystalline oxide semiconductor film, an amorphous oxide semiconductor film, and the like.

[0173] First, the CAAC-OS film will be described.

[0174] The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal parts aligned along the c-axis.

[0175] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed under a crystalline microscope, clear boundaries between the crystals, i.e., crystal boundaries, are clearly visible. It is not possible to confirm the grain boundary. It can be said that the AC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0176] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). ) It can be confirmed that the metal atoms are arranged in layers in the crystalline part. Each layer has a surface on which the CAAC-OS film is formed (also referred to as a surface on which the CAAC-OS film is formed) or an uneven surface on which the CAAC-OS film is formed. The shape reflects this and is aligned parallel to the surface on which the CAAC-OS film is formed or the top surface.

[0177] On the other hand, the CAAC-OS film was observed by TEM from a direction approximately perpendicular to the sample surface (planar TEM). When observed, it was found that the metal atoms were arranged in triangular or hexagonal shapes in the crystals. However, there is no regularity in the arrangement of metal atoms between different crystal parts. stomach.

[0178] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It turns out that there are.

[0179] Most of the crystals in the CAAC-OS film are cubes with sides of less than 100 nm. Therefore, the crystal part included in the CAAC-OS film has a side length of 10n This also includes cases where the size fits within a cube of less than 100 mm, less than 5 nm, or less than 3 nm. In addition, multiple crystals in the CAAC-OS film are connected to form a single large crystal region. For example, in a planar TEM image, 2 Over 5μm 2 More than or equal to 1000 μm 2 Crystal regions with more than this size may be observed.

[0180] X-ray diffraction (XRD) was performed on the CAAC-OS film. For example, a CAAC-OS film with InGaZnO4 crystals was found by structural analysis using the device. In the out-of-plane analysis, a peak was observed at a diffraction angle (2θ) of approximately 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. This indicates that the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis is approximately aligned on the surface on which the film is formed or on the upper surface. It can be seen that it is oriented in a substantially vertical direction.

[0181] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is expressed as a hexagonal crystal system. .

[0182] On the other hand, in-pl X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the analysis by the ane method, a peak may appear at 2θ around 56°. This is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is set as the axis (φ axis). When the sample is rotated and analyzed (φ scan), the crystal plane equivalent to the (110) plane is In contrast, in the case of the CAAC-OS film, 2θ is set to 5 Even when the φ is fixed at around 6° and scanned, no clear peak appears.

[0183] From the above, it is concluded that the a-axis and b-axis orientations are inconsistent between different crystal regions in the CAAC-OS film. Although it is regular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. Therefore, the layered arrangement confirmed by the cross-sectional TEM observation mentioned above is consistent with the above. Each layer of aligned metal atoms is a plane parallel to the ab plane of the crystal.

[0184] The crystalline part is formed when the CAAC-OS film is formed or when a crystallization process such as a heat treatment is performed. As described above, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed or the surface on which the CAAC-OS film is formed. The orientation of the CAAC-OS film is parallel to the normal vector of the top surface. When the shape is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed. Or it may not be parallel to the normal vector of the upper surface.

[0185] Furthermore, the distribution of c-axis oriented crystal parts in the CAAC-OS film does not need to be uniform. For example, the crystalline part of the CAAC-OS film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film. When the crystal is formed by this method, the region near the top surface has a larger amount of c-axis oriented crystals than the region near the surface on which the crystal is formed. In addition, when impurities are added to the CAAC-OS film, the proportion of impurities may increase. The region where the ZnO was added was transformed, and regions with different proportions of c-axis oriented crystals were formed. This may also occur.

[0186] In addition, the out-of-plane method of CAAC-OS film with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ around 31°, a peak also appeared at 2θ around 36°. The peak at 2θ around 36° is due to the presence of c-axis orientation in part of the CAAC-OS film. The CAAC-OS film contains crystals that do not have a 2θ of around 31°. It is preferable that the peak is exhibited at 2θ of around 36° and that the peak is not exhibited at 2θ of around 36°.

[0187] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. These are elements other than the main components of the oxide semiconductor film, such as silicon and transition metal elements. The elements that bond to oxygen more strongly than the metal elements that constitute the oxide semiconductor film, such as fluorine, are oxidized. By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, reducing its crystallinity. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide have an atomic radius (or molecular radius) is large, and when it is contained inside the oxide semiconductor film, The impurities contained in the oxide semiconductor film are likely to disturb the atomic arrangement and cause a decrease in crystallinity. Objects can act as carrier traps or carrier sources.

[0188] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in the semiconductor film can become carrier traps or trap hydrogen, It can be a source of carrier generation.

[0189] Low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "substantially highly purified intrinsic" refers to a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film. Since there are fewer carrier generation sources, the carrier density can be reduced. A transistor using an oxide semiconductor film has electrical characteristics such as a negative threshold voltage ( It is also called marion.) It is rare for it to become high purity genuine or substantially high purity genuine. The oxide semiconductor film has few carrier traps. A transistor using such a material has little fluctuation in electrical characteristics and is highly reliable. Note that it takes a long time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time between the charges is long and the charge may behave as if it is a fixed charge. However, a transistor using an oxide semiconductor film with a high density of defect states has unstable electrical characteristics. There are cases where this happens.

[0190] In addition, transistors using CAAC-OS films show improved electrical characteristics when irradiated with visible light or ultraviolet light. The fluctuation is small.

[0191] Next, a microcrystalline oxide semiconductor film will be described.

[0192] In the microcrystalline oxide semiconductor film, crystal parts can be clearly seen in the TEM image. The crystal part contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or less. , or 1 nm to 10 nm in size. Nanocrystals (nc) are microcrystals of 1 nm or less and 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline Oxide Semiconductor Film) The nc-OS film is called a TE film. In the M observation image, the grain boundaries may not be clearly visible.

[0193] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or more). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, the nc-OS film may be indistinguishable from an amorphous oxide semiconductor film. For example, an XRD apparatus using X-rays with a diameter larger than that of the crystals is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal plane is shown. In addition, the probe diameter ( Electron beam diffraction (also called selected area electron beam diffraction) using an electron beam of, for example, 50 nm or more On the other hand, for the nc-OS film, the crystalline The probe diameter is close to the size of the crystal part or smaller than the crystal part (for example, 1 nm to 30 nm). When electron beam diffraction using a sagittal beam (also called nanobeam electron diffraction) is performed, spots are observed. Furthermore, when nanobeam electron diffraction is performed on the nc-OS film, circular patterns (ripples) are observed. In addition, nanobeams on the nc-OS film may be observed. When electron diffraction is performed, multiple spots may be observed within the ring-shaped region.

[0194] The nc-OS film is an oxide semiconductor film with higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The S film has a higher defect state density than the CAAC-OS film.

[0195] The oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, or a CA The AC-OS film may be a laminated film having two or more kinds of films.

[0196] The base insulating film 102 shown in FIG. 3 is an insulating film containing, for example, silicon oxide or silicon oxynitride. The base insulating film 102 may have a thickness of, for example, 20 nm or more and 1000 nm or less. Preferably, the thickness is 50 nm or more and 1000 nm or less, and more preferably, 100 nm or more and 100 0 nm or less, and more preferably 200 nm or more and 1000 nm or less.

[0197] Alternatively, a silicon nitride film may be used as the base insulating film 102. Alternatively, an aluminum oxide film may be used. By using a silicon nitride film or an aluminum oxide film with low oxygen permeability, This can prevent oxygen from diffusing from the insulating film 121 to the base insulating film 102 .

[0198] The insulating film 121 is an insulating film containing excess oxygen. The insulating film 121 is, for example, silicon oxide. Alternatively, an insulating film containing silicon oxynitride may be used as a single layer or a stacked layer. The insulating film 102 has a thickness of, for example, 20 nm or more and 1000 nm or less, preferably 50 nm or more. at most 1000 nm, more preferably at least 100 nm and no greater than 1000 nm, is between 200 nm and 1000 nm.

[0199] Alternatively, for example, the first layer of the insulating film 121 may be a silicon nitride film and the second layer may be a silicon oxide film. In this case, the silicon oxide film may be a silicon oxynitride film. The silicon oxide film may be a silicon nitride oxide film. Silicon nitride film is used. Silicon nitride film releases less hydrogen and ammonia. Silicon nitride films are impermeable to hydrogen, water, and oxygen, or are almost impermeable to them. By using a silicon nitride film with low oxygen permeability, This prevents oxygen from diffusing from the insulating film 121 to the base insulating film 102 .

[0200] Alternatively, for example, the first layer of the insulating film 121 may be made of aluminum oxide and the second layer may be made of silicon oxide. By using an aluminum oxide film with low oxygen permeability, the insulating film 121 This can prevent oxygen from diffusing from the insulating film 102 to the base insulating film 102 .

[0201] Alternatively, for example, the base insulating film 102 may be a silicon nitride film, and the insulating film 121 may be a silicon oxide film. The silicon oxide film may be a silicon oxynitride film. The silicon film may be a silicon nitride oxide film. The silicon oxide film is an oxide film with a low defect density. It is preferable to use a silicon film. Specifically, the signal with a g value of 2.001 in ESR is derived from The density of spins is 3×10 17 pieces / cm 3 Less than or equal to 5 x 10 16 pieces / cm 3 Below Silicon oxide film, which is the lower of the two, is used. Silicon nitride film releases less hydrogen and ammonia. The amount of hydrogen and ammonia released can be measured by TDS. Silicon nitride films are impermeable to hydrogen, water, and oxygen, or are almost impermeable to them. A silicon nitride film that does not penetrate is used.

[0202] Alternatively, for example, the base insulating film 102 is a silicon nitride film, and the insulating film 121 is a first oxide silicon film. The first silicon oxide film and the second silicon oxide film may be stacked. The film and / or the second silicon oxide film may be a silicon oxynitride film. The silicon film may be a silicon nitride oxide film. The first silicon oxide film has a low defect density. It is preferable to use a silicon oxide film. The density of spins originating from the number is 3×10 17 pieces / cm 3 Less than or equal to 5 x 10 16 pieces / cm 3 The second silicon oxide film is an oxide film containing excess oxygen. The silicon nitride film is a silicon nitride film that releases less hydrogen and ammonia. Silicon nitride films are also impermeable to hydrogen, water, and oxygen. A silicon nitride film that is almost opaque is used.

[0203] The gate insulating film 104 is made of, for example, aluminum oxide, magnesium oxide, silicon oxide, Silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide , yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide Alternatively, an insulating film containing tantalum oxide may be used as a single layer or a stacked layer. The insulating film 104 is preferably an insulating film containing excess oxygen. For example, the thickness (or equivalent oxide film thickness) is 1 nm or more and 500 nm or less, preferably 3 nm or more. 300 nm or less, more preferably 5 nm or more and 100 nm or less, and even more preferably 5 nm or less The upper limit is 50 nm or less.

[0204] The gate insulating film 104 has, for example, a first layer made of a silicon nitride film and a second layer made of a silicon oxide film. The silicon oxide film may be replaced with a silicon oxynitride film. The silicon nitride film may be replaced with a silicon nitride oxide film. It is preferable to use a silicon oxide film with a small g value of 2.001 in ESR. The density of spins originating from the signal is 3×10 17 pieces / cm 3 Less than or equal to 5 x 10 16 pieces / cm 3 The silicon oxide film is an oxide film containing excess oxygen. It is preferable to use a silicon nitride film. The silicon nitride film has a low rate of release of hydrogen gas and ammonia gas. The amount of hydrogen gas and ammonia gas released is measured by TDS. It can be determined.

[0205] For example, one layer of the gate insulating film 104, such as a stack of silicon oxide and hafnium oxide, may be used. Partially contains materials with many electron capture levels, such as hafnium oxide, aluminum oxide, and tantalum oxide using a higher temperature (higher than the operating temperature or storage temperature of the semiconductor device, or The gate temperature is between 125°C and 450°C, typically between 150°C and 300°C. The state in which the potential of the electrode 105 is higher than the potential of the source electrode 107a and the drain electrode 107b is By maintaining the temperature for 1 second or more, typically 1 minute or more, the oxide semiconductor film 103 is heated to the gate electrode 1 Electrons move toward 05, and some of them are captured by the electron capture level.

[0206] In this way, the semiconductor device in which the necessary number of electrons are trapped in the electron trap level has a threshold voltage of 1000 V. The amount of captured electrons is controlled by controlling the voltage of the gate electrode 105. This allows the threshold voltage to be controlled. The sealing treatment may be performed during the manufacturing process of a semiconductor device.

[0207] For example, wiring connected to the source electrode 107a or the drain electrode 107b of the semiconductor device. After metal formation, or after the front-end process (wafer processing), or after the wafer die It is advisable to carry out this at any stage before shipping from the factory, such as after the singulation process or after packaging. Even in this case, it is preferable not to expose the film to a temperature of 125°C or higher for more than one hour thereafter.

[0208] A simplified cross-sectional view shows an example in which the gate insulating film 104 is also used as an electron capture layer. Shows.

[0209] FIG. 5A shows a semiconductor device having a semiconductor film 901, an electron capture layer 902, and a gate electrode 903. The electron trap layer 902 corresponds to the gate insulating film 104 in FIG. The gate electrode 903 corresponds to the gate electrode 105 in FIG.

[0210] Here, the electron trap layer 902 has a level (electron trap level) for trapping electrons inside. Alternatively, the electron trap layer 902 may have electrons already trapped therein by some means or process. Alternatively, the electron capture layer 902 may be formed by some means or treatment. This is a layer that is shifted and has the potential to trap electrons inside. Even if such a level is present, it may not be formed due to differences in the formation method and conditions.

[0211] For example, as shown in FIG. 5B, the first insulating film 902a and the second insulating film 902b It may be a laminated body, or a first insulating film 902a, a second insulating film 902b, and the like, as shown in FIG. 5(C). 902b and the third insulating film 902c, or a laminate of more insulating films. good.

[0212] Here, all or some of the constituent elements of the first to third insulating films may be the same. In addition, the first to third insulating films are formed by different methods (or under different conditions) in whole or in part. It may be possible.

[0213] For example, an insulating film formed by sputtering is used as the second insulating film 902b, and a chemical vapor deposition method is used as the second insulating film 902b. Chemical Vapor Deposition (CVD) and atomic layer deposition ( The insulating film formed by the ALD (Atomic Layer Deposition) method is In the case of FIG. 5C, the third insulating film 902c may also be the first insulating film 902a. However, one aspect of the embodiment of the present invention is not limited to this. The insulating film formed by the CVD method or the ALD method is used as the second insulating film 902b, and the insulating film formed by the sputtering method is used as the second insulating film 902b. An insulating film formed by a ring method may be used as the first insulating film 902a.

[0214] Here, the insulating film formed by the CVD method has the function of a normal gate insulating film. Therefore, the leakage current between the gate and the drain or between the gate and the source can be reduced. On the other hand, the insulating film formed by the sputtering method has many electron trap levels. Therefore, the threshold voltage of the transistor can be changed more significantly. By adopting such a configuration, the leakage current is small and the threshold voltage is sufficiently controlled. It is possible to have a controlled configuration.

[0215] The method for forming the semiconductor film 901 and the first insulating film 902a in contact with the semiconductor film 901 are as follows: For example, the same manufacturing method may be used for the semiconductor film 9 When the first insulating film 901 is formed by sputtering, the first insulating film 902a is also formed by sputtering. The second insulating film 902b may be formed by a CVD method or an ALD method. In this case, the third insulating film 902c may also be formed by sputtering. When the insulating film 901 is formed by the CVD method, the first insulating film 902a is also formed by the CVD method, and the second insulating film The insulating film 902b may be formed by sputtering. The insulating film 902c may also be formed by the CVD method. The current is small, the threshold voltage is well controlled, and the device is easy to manufacture. However, one aspect of the embodiment of the present invention is not limited to this.

[0216] Various methods can be used for the CVD method, including thermal CVD, photo CVD, Methods such as plasma CVD, MOCVD, and LPCVD can be used. Therefore, even if different CVD methods are used to form one insulating film and another insulating film, good.

[0217] An example of a band diagram from point A to point B of the semiconductor device shown in FIG. 5(B) is shown in FIG. 6(A). In the figure, Ec indicates the bottom of the conduction band, and Ev indicates the top of the valence band. The potential of O3 is the same as that of the source electrode or the drain electrode (neither of which is shown).

[0218] As shown in FIG. 5C, the electron trap layer 902 is provided with a second insulating film 902b having a higher electron affinity than the second insulating film 902b. The provision of the small third insulating film 902c allows the inside of the second insulating film 902b or This is effective in retaining electrons captured in the electron capture level at the interface with other insulating films.

[0219] In this case, even if the second insulating film 902b is thin, the third insulating film 902c is physically sufficient. If the thickness is sufficiently large, the electrons trapped in the electron trap level 904 can be held.

[0220] The second insulating film 902b is formed by a method (or a shape) that increases the number of electron trap levels 904. Therefore, the boundary between the first insulating film 902a and the second insulating film 902b is Many electron trap levels are formed at the interface between the second insulating film 902b and the third insulating film 902c. will be done.

[0221] If the potential and temperature of the gate electrode 903 are as shown above, the semiconductor film 90 Electrons 905 move from 1 toward the gate electrode 903, and im tunneling, Poole-Frenkel conduction, thermal excitation, or a combination of these By combining these electrons, they enter the electron trapping layer 902 and some of them are trapped in the electron trapping level 904. As a result, the electron trap layer 902 becomes negatively charged (see FIG. 6B).

[0222] When the electron trap layer 902 traps electrons in this way, the threshold voltage of the semiconductor device is increased as shown in FIG. In particular, when the semiconductor film 901 is made of a material with a large band gap (wide band gap), When the potential of the gate electrode 903 is set to the same as the potential of the source electrode, This can significantly reduce the source-drain current (Icut current).

[0223] For example, in the case of an In-Ga-Zn oxide with a band gap of 3.2 eV, Icu The current density (current value per 1 μm of channel width) is 1 zA / μm (1 × 10 -21 A / μ m) or less, typically 1yA / μm (1×10 -24 A / μm or less.

[0224] FIG. 7A shows the state before and after electron capture in the electron capture layer 902. After that, the current (Id) per 1 μm of channel width between the source and drain electrodes at room temperature The graph shows the potential (Vg) dependence of the gate electrode 903. The potential of the gate electrode 903 is set to 0 V, and the potential of the drain electrode is set to +1 V. The current cannot be measured directly, but it can be measured by other methods, such as subthreshold values. It can be estimated based on the

[0225] Initially, as shown by curve 906, the threshold voltage of the semiconductor device was Vth1, but as electrons were trapped, After the acquisition, the threshold increases (moves in the positive direction) as shown by curve 907. ), Vth2. As a result, the current density at Vg=0 is 1 aA / μm (1×1 0 -18 A / μm) or less, for example, 1zA / μm or more and 1yA / μm or less.

[0226] For example, as shown in FIG. 7B, the charge stored in the capacitor 909 is transferred to the transistor 908. Consider the control circuit. Here, the leakage current between the electrodes of the capacitance element 909 is ignored. The capacitance of the element 909 is 1 fF, and the potential of the capacitor element 909 on the transistor 908 side is +1 Assume that the potentials of V and Vd are 0V.

[0227] The Id-Vg characteristics of the transistor 908 are shown by the curve 906 in FIG. With a channel width of 0.1 μm, the Icut current density is approximately 1 fA, and the transistor 90 The resistance at this time is about 1 x 10 15 Ω. Therefore, the transistor 908 and the capacitance The time constant of the circuit including the element 909 is about 1 second. This means that much of the charge stored in the

[0228] The Id-Vg characteristics of the transistor 908 are shown by the curve 907 in FIG. When the channel width is 0.1 μm, the Icut current density is about 1 yA, and the transistor 90 The resistance at this time is about 1 x 10 24 Ω. Therefore, the transistor 908 and the capacitance The time constant of the circuit consisting of element 909 is approximately 1 × 10 9 seconds (= about 31 years). That is, 1 This means that even after 0 years, 1 / 3 of the charge stored in the capacitor element 909 remains. do.

[0229] In this way, a simple circuit consisting of a transistor and a capacitance element can be used without generating excessive voltage. It is possible to retain charge for 10 years without applying voltage.

[0230] The electron capture layer 902 can be made of various materials. For example, hafnium oxide (oxygen, Hafnium), aluminum oxide (oxygen, aluminum), tantalum oxide (oxygen, tantalum) Insulators containing one or more of the following: aluminum silicate (oxygen, silicon, aluminum) In addition, films containing elements such as nitrogen, silicon, hydrogen, and halogens can be used. In addition, in the case of a multilayer structure, the upper and lower layers containing these elements may On either side or in the middle of the sandwiched layer, silicon oxide, silicon oxynitride, silicon nitride oxide, A layer having silicon, silicon nitride, etc. is disposed to form the electron trap layer 902 of the multilayer body. That's fine.

[0231] Note that the semiconductor film 901 has a hole-holding property like an intrinsic or substantially intrinsic oxide semiconductor. It is possible to use a material with a very large effective mass or where holes are substantially localized. In this case, holes are not injected from the semiconductor film 901 to the electron capture layer 902. Therefore, the electrons captured in the electron capture level 904 combine with holes and disappear. Therefore, the charge retention characteristics can be improved.

[0232] The gate electrode 105 is made of, for example, aluminum, titanium, chromium, cobalt, nickel, or copper. , yttrium, zirconium, molybdenum, ruthenium, silver, tantalum or tungsten The conductive film containing the ternary moiety may be used as a single layer or a multilayer.

[0233] The insulating film 106 is made of, for example, silicon oxide, silicon oxynitride, germanium oxide, or silicon dioxide. tritium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or A single layer of insulating film containing tantalum oxide, silicon nitride, silicon nitride oxide, and aluminum oxide The insulating film 106 may be formed by a single layer or a multilayer structure. nm or less, preferably 50 nm to 1000 nm, and more preferably 100 nm or more The thickness is set to 1000 nm or less, and more preferably 200 nm or more and 1000 nm or less.

[0234] For example, the insulating film 106 has a first layer made of aluminum oxide and a second layer made of silicon oxide. Alternatively, the insulating film 106 may have a first layer made of silicon nitride and a second layer made of silicon dioxide. Alternatively, a laminated film of silicon oxide may be used. Alternatively, a laminated film of silicon nitride oxide may be used as the first layer. A laminated film may also be used. Aluminum oxide, silicon nitride, and nitride oxide, which have low oxygen permeability, may be used. By using silicon for the first layer, it is possible to prevent oxygen from diffusing from the insulating film 121. can.

[0235] The source electrode 107a and the drain electrode 107b are made of, for example, aluminum, titanium, or quartz. chromium, cobalt, nickel, copper, yttrium, zirconium, molybdenum, ruthenium A conductive film containing silver, tantalum, or tungsten may be used as a single layer or a laminated layer. .

[0236] There is no particular limitation on the substrate 101. For example, a glass substrate, a ceramic substrate, a quartz substrate, a surface treatment substrate, etc. A fiber substrate or the like may be used as the substrate 101. Also, a substrate made of silicon or silicon carbide may be used. a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, and a compound semiconductor made of silicon germanium Substrates, SOI (Silicon On Insulator) substrates, etc. can also be applied. It is possible to use such a substrate on which a semiconductor element is provided as the substrate 101. Good too.

[0237] A flexible substrate may be used as the substrate 101. The method of providing a transistor is to fabricate a transistor on a non-flexible substrate and then Alternatively, the resistor may be peeled off and transferred to the flexible substrate 101. A release layer may be provided between the non-flexible substrate and the transistor.

[0238] <Method for fabricating transistor structure (1)> An example of a method for fabricating the transistor structure (1) will be described below.

[0239] 8 to 10 are cross-sectional views illustrating a method for manufacturing the transistors of FIGS. 3B and 3C. The figure is shown.

[0240] First, a substrate 101 is prepared.

[0241] Next, a base insulating film 102 is formed. The insulating film 102 may be formed by a method such as sputtering or CVD. method, molecular beam epitaxy (MBE) method , ALD or Pulsed Laser Deposition (PLD) The film can be formed by using the ion method.

[0242] When a silicon wafer is used as the substrate 101, the insulating film 102 is formed by thermal oxidation. It may be formed.

[0243] Next, an insulating film 135 is formed. The insulating film 135 is an insulating film containing excess oxygen. The insulating film 135 may be formed by selecting from the insulating films shown as the insulating film 121. The methods are sputtering, CVD, and molecular beam epitaxy (MBE). The film may be formed by using a beam epitaxy method, an ALD method, or a PLD method.

[0244] Next, in order to flatten the surface of the insulating film 135, chemical mechanical polishing (CMP) is performed. CMP (mechanical polishing) may be performed. By performing this, the average surface roughness (Ra) of the base insulating film 102 is set to 1 nm or less, preferably 0.3 nm or less. By making Ra equal to or less than the above-mentioned numerical value, The crystallinity of the oxide semiconductor film 103 may be increased. It can be measured using an atomic force microscope.

[0245] Next, oxygen is added to the insulating film 135 to form an insulating film containing excess oxygen. The element is added, for example, by ion implantation at an acceleration voltage of 2 kV or more and 100 kV or less. 5×1014 ions / cm 2 5x10 or more 16 ions / cm 2 Do this at the following concentrations: stomach.

[0246] Next, an oxide semiconductor film 136 is formed (see FIG. 8A). The oxide semiconductor film 103 may be selected from the oxide semiconductor films shown in FIG. The oxide semiconductor film 136 is formed by a sputtering method, a CVD method, an MBE method, an ALD method, or the like. The film may be formed using the PLD method.

[0247] Next, first heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The first heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The first heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more.

[0248] Next, a layer to be a resist mask 131 is formed over the oxide semiconductor film 136. When the oxide semiconductor film 136 is microfabricated to a side of 100 nm or less, A hard mask may be provided between the layers that will become the resist mask 131 .

[0249] Note that the hard mask is a layer that can be selectively etched with respect to the oxide semiconductor film 136. As a hard mask, for example, a material containing tungsten, molybdenum, titanium or tantalum may be used. A single layer or a stack of a single element, nitride, or alloy may be used. An insulating film containing silicon oxide, silicon oxynitride, or silicon nitride is formed as a single layer or Alternatively, they may be used in layers.

[0250] It should be noted that the present invention is not limited to the case where a layer serving as the resist mask 131 is formed on the hard mask. For example, in order to improve the adhesion between the hard mask and the layer that will become the resist mask 131, A coating layer made of an organic material may be formed on the hard mask.

[0251] The layer that becomes the resist mask 131 may be a photosensitive organic or inorganic layer. The layer that becomes the resist mask 131 may be formed by spin coating or the like.

[0252] Next, the layer that will become the resist mask 131 is irradiated with light using a photomask. Examples include KrF excimer laser light, ArF excimer laser light, and EUV (Extreme UV) Ultraviolet light or the like may be used. A liquid immersion technique may be used in which the resist mask 13 is filled with liquid (for example, water) and exposed to light. Instead of light, an electron beam or an ion beam may be used to irradiate the layer to be formed. When using a electron beam or an ion beam, a photomask is not required. When no special processing is required, high pressure water is used as the light to be irradiated onto the layer that will become the resist mask 131. The g-line or i-line of a silver lamp may also be used.

[0253] The substrate 101 is then immersed in a developer to remove the exposed areas of the layer that will become the resist mask 131. The resist mask 131 is formed by removing or leaving the resist mask 131 (see FIG. 8B).

[0254] Next, part of the oxide semiconductor film 136 is etched using the resist mask 131 to form an island-like oxide semiconductor film. The oxide semiconductor film 103 is then formed. A part of the insulating film is etched to form an island-shaped insulating film 121 (see FIG. 8(C)).

[0255] In FIG. 8, the insulating film 121 is formed in an island shape, but it does not necessarily have to be formed in an island shape. Alternatively, the shape may have a protrusion.

[0256] As a method for etching part of the oxide semiconductor film 136, dry etching treatment is used. The dry etching is preferably carried out in an atmosphere containing, for example, methane and a rare gas. As a method for etching a part of the insulating film 121, for example, a three-phase etching method may be used. This may be carried out in an atmosphere containing fluoromethane and a rare gas.

[0257] Here, the oxide semiconductor film 136 and the insulating film 135 are formed using the resist mask 131. The oxide semiconductor film 136 and the insulating film 135 were etched using different resist masks. In the cross-sectional view shown in FIG. 3B, the insulating film 121 and the oxide semiconductor The conductive film 103 is shown with almost the same width, but as shown in FIG. 19(A), for example, The width of the oxide semiconductor film 121 may be larger than the width of the oxide semiconductor film 103. In the cross section shown in FIG. 19(B), the insulating film 121 is formed of an oxide. Since the insulating film 106 can cover the insulating film 121, oxygen can be absorbed through the insulating film 106. It can prevent the spread of

[0258] Next, the resist mask 131 is removed. The resist mask 131 is removed by plasma treatment. This can be done by chemical treatment, etc. Preferably, it is removed by plasma ashing.

[0259] Next, the gate insulating film 104 is formed. A conductive film to be formed as 5 is deposited (see FIG. 8(D)).

[0260] The gate insulating film 104 may be formed by selecting from the insulating films shown as the gate insulating film 104. The gate insulating film 104 is preferably formed by a sputtering method, a CVD method, an MBE method, an ALD method, or the like. The conductive film that becomes the gate electrode 105 may be formed by the PLD method. The conductive film can be formed by sputtering, CVD, or the like. The film may be formed by a method such as a SiO2 deposition method, an MBE method, an ALD method, or a PLD method.

[0261] Next, the conductive film is processed by photolithography or the like to form the gate electrode 105. Next, using the gate electrode as a mask, a part of the gate insulating film 104 is etched (FIG. 9( See A). ).

[0262] Next, using the gate electrode 105 as a mask, the gate insulating film 104, the oxide semiconductor film 103, Impurities are added to the insulating film 121 and the base insulating film 102 to form regions 151a and 151b. , regions 151c and 151d are formed (see FIG. 9B). The method for forming the region 51a, the region 151b, the region 151c, and the region 151d is not necessary for the insulating film 52. Please refer to the description of the method for forming the region 53 by adding a pure substance. The impurities described in the forming method are unlikely to cause the metal to have high resistance. The impurities are added using the gate electrode 105 as a mask, and the regions 151a to 151c are doped with the impurities. When 151d is formed, it is unlikely to become a factor that increases the resistance of the gate electrode 105, for example. Regions 151b, 151c, and 151d are oxygen-blocking regions. Reference numeral 51a denotes a region in the oxide semiconductor film 103 to which impurities are added.

[0263] By forming the oxygen blocking regions 151b, 151c, and 151d, This suppresses outward diffusion of excess oxygen from the insulating film 121 and efficiently supplies oxygen to the oxide semiconductor film 103. It will be possible to supply

[0264] In addition, impurities are added to a region 151a, which is a part of the oxide semiconductor film 103. As a result, the contact area between the source electrode 107a or the drain electrode 107b and the oxide semiconductor film 103 is This reduces the resistance of the region from the on-state region to the channel formation region. The current is higher, which can improve the performance of the transistor.

[0265] Next, second heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The second heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The second heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more. A region 151a in which impurities are added to the oxide semiconductor film 103 by heat treatment In some cases, the resistance of the oxide semiconductor film 103 can be reduced. Therefore, the oxygen vacancies in the oxide semiconductor film 103 can be reduced. Furthermore, the crystallinity of the oxide semiconductor film 103 can be improved, and the amount of hydrogen and water can be reduced. By performing the second heat treatment, impurities such as fluorine and methyl methacrylate can be removed. In some cases, heat treatment may not be necessary.

[0266] Next, the insulating film 106 is formed (see FIG. 9(C)). The insulating film 106 may be formed by a method such as sputtering or CV. The film may be formed by the D method, MBE method, ALD method or PLD method.

[0267] Next, an opening is provided in the insulating film 106 (see FIG. 10(A)). As a etching method, for example, dry etching or the like can be used.

[0268] Next, a source electrode 107a and a drain electrode 107b are formed on the surface of the insulating film 106 and in the opening. The conductive film 107 is formed as a source electrode 1b (see FIG. 10(B)). The conductive film may be selected from the conductive films shown as the gate electrode 107a and the drain electrode 107b. The conductive film is formed using the sputtering method, CVD method, MBE method, ALD method or PLD method. Just do that.

[0269] Next, the conductive film is processed by photolithography or the like to form the source electrode 107a and the drain electrode 107b. The rain electrode 107b is formed (see FIG. 10(C)).

[0270] Next, a third heat treatment is preferably performed. The third heat treatment is a combination of the first heat treatment and the second heat treatment. The conditions for the first and second heat treatments are selected from those shown in the first and second heat treatments. The third heat treatment can be performed at a low temperature. There are cases where it is not necessary to carry out the analysis.

[0271] In the above manner, the transistor shown in FIG. 3 can be manufactured.

[0272] <Transistor Structure (2)> Next, we have a top-gate self-alignment transistor with a different gate insulating film shape from that of the transistor structure (1). An example of an in-type transistor will be described.

[0273] 11A and 11B are a top view and a cross-sectional view of a transistor. 11(A) shows a top view. In FIG. 11(A), a cross-sectional view corresponding to the dashed line AB is shown in FIG. 11(B). 11(C) is a cross-sectional view corresponding to the dashed line CD in FIG. 11(A). Shown below.

[0274] In FIG. 11B, the transistor is formed by a base insulating film 202 on a substrate 201 and a base insulating film 203 on a substrate 201. The insulating film 221 on the film 202, the oxide semiconductor film 203 on the insulating film 221, and the oxide semiconductor A gate insulating film 204 on the film 203, a gate electrode 205 on the gate insulating film 204, and a gate electrode The insulating film 206 on the gate electrode 205 and the gate insulating film 204, the oxide semiconductor film 203, and the and a source electrode 207a and a drain electrode 207b on the insulating film 206. The insulating film 221 is an insulating film containing excess oxygen. It doesn't matter if you don't have one.

[0275] The transistor shown in Figure 3 and the transistor shown in Figure 11 have different gate insulating film shapes. Therefore, unless otherwise specified, please refer to the description of Figure 3.

[0276] For example, the substrate 201 is described with reference to the description of the substrate 101. The insulating base film 202 is For the insulating film 221, refer to the description of the insulating film 121. For the oxide semiconductor film 203, refer to the description of the oxide semiconductor film 103. For the gate insulating film 204, refer to the description of the gate insulating film 104. The insulating film 206 is formed by the insulating film 106. The source electrode 207a and the drain electrode 207b are connected to the source electrode 107a and See the description of the drain electrode 107b.

[0277] In FIG. 11B, the region 251a is a part of the oxide semiconductor film. 1b, region 251c, region 251d, and region 251e are part of the insulating film, and are oxygen-blocked. This is the locking region. For the oxygen blocking region, see the description of region 53 above. The transistor shown in FIG. 11B has an oxygen blocking region 251b and a The region 251c, the region 251d, and the region 251e.

[0278] First, the oxygen-blocking regions 251b, 251c, 251d, and 251 Let's talk about e.

[0279] The region 251b is a region of the insulating film 221 that contacts the gate insulating film 204. b is a depth of 1 nm to 200 nm from the surface of the insulating film 221 in contact with the gate insulating film 204 Preferably, the thickness is 5 nm or more and 150 nm or less, and more preferably, the thickness is 10 nm or more and 100 nm or less. This is the area provided below.

[0280] As shown in FIGS. 11B and 11C, the region 251c is formed in the gate insulating film 204. The region 251c is a region of the gate insulating film 204 located below the gate electrode. 11(A), the end 217a of the gate electrode 205 facing the source electrode 207a is , and the end 217b facing the drain electrode 207b. 7a or the end 217b is 1 nm or more and 2 μm or less, preferably 5 nm or more and 1 μm or less. The thickness is preferably in the range of 10 nm to 500 nm.

[0281] As shown in FIG. 11(B), the region 251d is formed by the gate insulating film 204 of the base insulating film 202. The region 251d is a region that contacts the gate insulating film 204 of the base insulating film 202. The depth from the surface is 1 nm or more and 200 nm or less, preferably 5 nm or more and 150 nm or less, and more preferably Preferably, the region is set to a thickness of 10 nm or more and 100 nm or less.

[0282] The region 251e is a region of the gate insulating film 204 that contacts the insulating film 206. is a region formed over the entire depth of the gate insulating film, as shown in FIG. 11(B). .

[0283] When the transistor has the region 251b, the excess oxygen contained in the insulating film 221 is converted into an oxide semiconductor. This can be effectively utilized to reduce oxygen vacancies in the conductive film 203. For example, the region 25 If the insulating film 221 does not have the layer 1b, excess oxygen contained in the insulating film 221 will be lost due to outward diffusion. In addition, excess oxygen contained in the insulating film 221 may cause the source electrode 207a and The drain electrode 207b may be oxidized.

[0284] Even when the transistor has the region 251d, the insulating film 221 and the base insulating film 202 The excess oxygen can be effectively utilized to reduce oxygen vacancies in the oxide semiconductor film 203. For example, if the region 251d is not provided, the insulating film 221 and the base insulating film 202 may be formed of a metal oxide film. The excess oxygen may be lost due to outward diffusion. If there is no oxygen, excess oxygen contained in the insulating film 221 and the base insulating film 202 will flow into the source electrode 207a In addition, the drain electrode 207b may be oxidized.

[0285] Even if the transistor has the region 251c, the excess oxygen contained in the gate insulating film 204 can be effectively used to reduce oxygen vacancies in the oxide semiconductor film 203. For example, If the region 251c is not provided, excess oxygen contained in the gate insulating film 204 will diffuse outward. In addition, excess oxygen contained in the gate insulating film 204 may be lost due to The source electrode 207a and the drain electrode 207b may be oxidized.

[0286] Even when the transistor has the region 251e, the insulating film 221, the base insulating film 202, or The excess oxygen contained in the gate insulating film 204 is oxidized to reduce oxygen vacancies in the oxide semiconductor film 203. For example, if the region 251e is not provided, the insulating film 221, Excess oxygen contained in the base insulating film 202 or the gate insulating film 204 diffuses outward. In addition, the insulating film 221, the base insulating film 202, or the gate insulating film may be lost. The excess oxygen contained in 204 oxidizes the source electrode 207a and the drain electrode 207b. This may be possible.

[0287] Next, the region 251a, which is part of the oxide semiconductor film 203, will be described.

[0288] The region 251a is a region of the oxide semiconductor film 203 where the source electrode 207a and the drain electrode 20 7b is a region in contact with the gate insulating film 204. The region 251a is a region in contact with the oxide semiconductor film 203. A depth of 1 nm to 200 nm, preferably 5 nm to 150 nm, from the top or side surface Below, it is more preferable that the region be provided with a thickness of 10 nm or more and 100 nm or less.

[0289] The oxygen blocking regions are formed as regions 251b, 251c, 251d, and 251e. In the step of adding impurities to form the region 251a, the region 251a is also doped with impurities. In this case, the resistance of the region 251a can be reduced by adding impurities.

[0290] The region 222 shown in FIG. 11(B) is in contact with the source electrode 207a or the drain electrode 207b. The region 222 is a region that does not overlap with the gate electrode 205. If the resistance of the region 222 is high, This can cause a decrease in the on-state current of the transistor.

[0291] By adding impurities to the region 251a, which is a part of the oxide semiconductor film 203, The resistance of region 222 can be reduced, which increases the on-current and This can improve the performance of the computer.

[0292] The step of adding impurities to form a low-resistance region is carried out in the oxygen blocking region. Impurities for forming the regions 251b, 251c, 251d, and 251e This allows the process to be shortened and costs to be reduced. Furthermore, by simplifying the process, an improvement in yield can be expected.

[0293] <Method for fabricating transistor structure (2)> An example of a method for manufacturing the transistor structure (2) will be described below.

[0294] 12 to 14 show a method for manufacturing the transistors in FIGS. 11B and 11C. A cross-sectional view is shown.

[0295] First, a substrate 201 is prepared.

[0296] Next, the base insulating film 202 is formed. The base insulating film 202 is formed by the same method as that for forming the base insulating film 102. Please refer to the description about.

[0297] Next, an insulating film 235 is formed. The insulating film 235 is an insulating film containing excess oxygen. For 235, refer to the description of the method for forming the insulating film 135.

[0298] Next, oxygen is added to the insulating film 235 to form an insulating film containing excess oxygen. The element is added, for example, by ion implantation at an acceleration voltage of 2 kV or more and 100 kV or less. 5×10 14 ions / cm 2 5x10 or more 16 ions / cm 2 Do this at the following concentrations: stomach.

[0299] Next, an oxide semiconductor film 236 is formed (see FIG. 12A). The oxide semiconductor films 103 and 104 may be formed by selecting the oxide semiconductor film 103 from the oxide semiconductor films 103 and 104. The oxide semiconductor film 236 may be formed by a sputtering method, a CVD method, an MBE method, an ALD method, or the like. The film can be formed by using the PLD method.

[0300] Next, first heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The first heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The first heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more.

[0301] Next, the oxide semiconductor film 236 and the insulating film 235 are partly etched to form the oxide semiconductor film The oxide semiconductor film 203 and the insulating film 221 are formed (see FIG. 12B). The method for forming the oxide semiconductor film 103 and the insulating film 221 is the same as that for forming the oxide semiconductor film 103 and the insulating film 221 shown in FIG. See the method for forming 121.

[0302] In FIG. 12, the insulating film 221 is formed in an island shape, but it does not need to be formed in an island shape. It may have a shape with a convex portion.

[0303] Next, the gate insulating film 204 is formed. A conductive film to be formed as 5 is then deposited (see FIG. 12(C)).

[0304] For the gate insulating film 204, refer to the description of the method for forming the gate insulating film 104. For the electrode 205, refer to the description of the method for forming the gate electrode 105.

[0305] Next, the conductive film is processed by photolithography or the like to form a gate electrode 205. (See FIG. 13(A)). Unlike the transistor structure (1), the gate insulating film 204 will remain.

[0306] Next, using the gate electrode 205 as a mask, the gate insulating film 204, the oxide semiconductor film 203, Impurities are added to the insulating film 221 and the base insulating film 202 to form regions 251a and 251b. , regions 251c, 251d, and 251e are formed (see FIG. 13(B)). By adding the above, regions 251a, 251b, 251c, 251d, and 251e are formed. The method for forming the region 53 is described as follows. Regions 251b, 251c, 251d, and 251e are oxygen blocks. A region 251a is a region in which impurities are added to part of the oxide semiconductor film 203. When impurities are added using ion doping or ion implantation, The regions 251a, 251b, and 251d are impurity-insulated through the gate insulating film 204. Therefore, it is preferable to increase the acceleration voltage depending on the thickness of the gate insulating film 204. For example, when the thickness of the gate insulating film 204 is 20 nm, the ion doping method or the The acceleration voltage in the on-implantation method is 0.5 kV or more and 100 kV or less, preferably 1 kV or more. The voltage is set to 50 kV or less, and more preferably 5 kV or more and 50 kV or less.

[0307] The oxygen blocking regions are formed as regions 251b, 251c, 251d, and 251e. By forming the insulating film 121, outward diffusion of excess oxygen in the insulating film 121 is suppressed, and the oxide semiconductor film 103 This allows for efficient oxygen supply.

[0308] In addition, impurities are added to a region 251a, which is a part of the oxide semiconductor film 103. As a result, the contact area between the source electrode 107a or the drain electrode 107b and the oxide semiconductor film 103 is This reduces the resistance of the region from the on-state region to the channel formation region. The current is higher, which can improve the performance of the transistor.

[0309] Next, second heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The second heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The second heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more. A region 251a in which impurities are added to the oxide semiconductor film 203 by heat treatment In some cases, the resistance of the oxide semiconductor film 203 can be reduced. Therefore, the oxygen vacancies in the oxide semiconductor film 203 can be reduced. In addition, the crystallinity of the oxide semiconductor film 203 can be improved, and the amount of hydrogen and water can be reduced. By performing the second heat treatment, impurities such as fluorine and methyl methacrylate can be removed. In some cases, heat treatment may not be necessary.

[0310] Next, an insulating film 206 is formed (see FIG. 13(C)). See the description at 106.

[0311] Next, a part of the insulating film 206 is etched to provide an opening (see FIG. 14(A)). As a method for etching a part of the film 206, for example, dry etching or the like may be used. This can be done.

[0312] Next, a source electrode 207a and a drain electrode 207b are formed on the surface of the insulating film 206 and in the openings. The conductive film 207 is formed as a source electrode 1b (see FIG. 14(B)). Please refer to the description of the film formation method of the drain electrode 107a and the drain electrode 107b.

[0313] Next, the conductive film is processed by photolithography or the like to form the source electrode 207a and the drain electrode 207b. The rain electrode 207b is formed (see FIG. 14(C)).

[0314] Next, a third heat treatment is preferably performed. The third heat treatment is a combination of the first heat treatment and the second heat treatment. The conditions for the first and second heat treatments are selected from those shown in the first and second heat treatments. The third heat treatment can be performed at a low temperature. There are cases where it is not necessary to carry out the analysis.

[0315] In the above manner, the transistor shown in FIG. 11 can be manufactured.

[0316] <Transistor Structure (3)> Next, a top gate self-alignment process is performed by forming a sidewall insulating film on the sidewall of the gate electrode. An example of a transistor of this type will be described.

[0317] 26A and 26B are a top view and a cross-sectional view of a transistor. 26(A) shows a top view. In FIG. 26(A), a cross-sectional view corresponding to the dashed line AB is shown in FIG. 26(B). In addition, a cross-sectional view corresponding to the dashed line CD in FIG. 26(A) is shown in FIG. 26(C). Shown below.

[0318] In FIG. 26B, the transistor is formed by a base insulating film 302 on a substrate 301 and a base insulating film 303 on a substrate 302. An insulating film 321 on the film 302, an oxide semiconductor film 303 on the insulating film 321, and an oxide semiconductor A gate insulating film 304 on the film 303, a gate electrode 305 on the gate insulating film 304, and a gate electrode 305 on the gate insulating film 304. The sidewall insulating film 308 on the sidewall of the oxide semiconductor film 303 and the underlayer an insulating film 306 in contact with the insulating film 302 and the sidewall insulating film 308; and an oxide semiconductor The insulating film 32 has a source electrode 307a and a drain electrode 307b on the insulating film 32. The insulating film 1 contains excess oxygen. It's okay.

[0319] The transistor shown in FIG. 3 and the transistor shown in FIG. 26 are different in that the transistor shown in FIG. 26 has a sidewall insulating layer. The main difference is that it has a membrane. Unless otherwise specified, the other common parts are shown in Figure 3 Please refer to the description about.

[0320] For example, the substrate 301 is described with reference to the description of the substrate 101. The insulating base film 302 is For the insulating film 321, refer to the description of the insulating film 121. For the oxide semiconductor film 303, refer to the description of the oxide semiconductor film 103. For the gate insulating film 304, refer to the description of the gate insulating film 104. For the insulating film 306, please refer to the description of the insulating film 106. The source electrode 307a and the drain electrode 307b are connected to the source electrode 107a and See the description of the drain electrode 107b.

[0321] In FIG. 26B, the region 351a is a part of the oxide semiconductor film. 1b, region 351c, and region 351d are part of the insulating film and are oxygen blocking regions. For the oxygen blocking region, please refer to the description of the region 53 above. The transistor shown in B) has oxygen-blocking regions 351b, 351c, and 351d.

[0322] First, the oxygen blocking regions 351b, 351c, and 351d will be described. The region 351b is a region of the insulating film 321 that contacts the insulating film 306. The depth from the surface of the insulating film 321 that contacts the insulating film 306 is preferably 1 nm or more and 200 nm or less. Preferably, the thickness is 5 nm or more and 150 nm or less, more preferably 10 nm or more and 100 nm or less. This is an area where

[0323] As shown in FIGS. 26B and 26C, the region 351c is formed by a sidewall insulating film. 308, which is in contact with the source electrode 307a, the drain electrode 307b, or the insulating film 306. The region 351c is a region where the source electrode 307a, the drain electrode 307b, or the insulating layer 307b is not connected. The depth from the surface in contact with the insulating film 306 is 1 nm or more and 200 nm or less, preferably 5 nm or more and 150 The region is preferably provided with a thickness of 10 nm or more and 100 nm or less.

[0324] As shown in FIG. 26(B), the region 351d is in contact with the insulating film 306 of the base insulating film 302. The region 351d is a region having a depth of 1 nm to 200 nm from the top surface of the base insulating film 302. Preferably, the thickness is 5 nm or more and 150 nm or less, and more preferably, the thickness is 10 nm or more and 100 nm or less. The region 351d may also be provided on the substrate 301. do not have.

[0325] When the transistor has the region 351b, the excess oxygen contained in the insulating film 321 is converted into an oxide semiconductor. This can be effectively utilized to reduce oxygen vacancies in the conductive film 303. For example, the region 35 Without the layer 1b, excess oxygen contained in the insulating film 321 would be lost due to outward diffusion. In addition, excess oxygen contained in the insulating film 321 may cause the source electrode 307a and The drain electrode 307b may be oxidized.

[0326] Even when the transistor has the region 351d, the insulating film 321 and the base insulating film 302 The excess oxygen can be effectively utilized to reduce oxygen vacancies in the oxide semiconductor film 303. For example, if the region 351d is not provided, the insulating film 321 and the base insulating film 302 may be formed of a metal oxide film. The excess oxygen may be lost due to outward diffusion. If there is no oxygen, excess oxygen contained in the insulating film 321 and the base insulating film 302 will flow into the source electrode 307a In addition, the drain electrode 307b may be oxidized.

[0327] Even if the transistor has the region 351c, the excess oxygen contained in the gate insulating film 304 can be effectively used to reduce oxygen vacancies in the oxide semiconductor film 303. For example, If the region 351c is not provided, excess oxygen contained in the gate insulating film 304 will diffuse outward. In addition, excess oxygen contained in the gate insulating film 304 may be lost due to The source electrode 307a and the drain electrode 307b may be oxidized.

[0328] Next, the region 351a, which is part of the oxide semiconductor film 303, will be described.

[0329] The region 351a is a region of the oxide semiconductor film 303 where the source electrode 307a and the drain electrode 30 7b is a region in contact with the insulating film 306. The region 351a is a region on the top surface of the oxide semiconductor film 303. or a depth from the side of 1 nm to 200 nm, preferably 5 nm to 150 nm; More preferably, the region is provided with a thickness of 10 nm or more and 100 nm or less.

[0330] In order to form the oxygen blocking regions 351b, 351c, and 351d, In the step of adding impurities, the region 351a is also doped with impurities. By adding , the resistance of the region 351a can be reduced.

[0331] The region 322 shown in FIG. 26(B) is in contact with the source electrode 307a or the drain electrode 307b. The region 322 is a region that does not overlap with the gate electrode 305. If the resistance of the region 322 is high, This can cause a decrease in the on-state current of the transistor.

[0332] By adding impurities to the region 351a, which is a part of the oxide semiconductor film 303, The resistance of region 322 can be reduced, which increases the on-current and This can improve the performance of the computer.

[0333] The step of adding impurities to form a low-resistance region is carried out in the oxygen blocking region. A step of adding impurities to form the regions 351b, 351c, and 351d. This allows the process to be shortened, leading to cost reduction. Furthermore, the simplification of the process is expected to improve yield.

[0334] <Method for fabricating transistor structure (3)> An example of a method for manufacturing the transistor structure (3) will be described below.

[0335] 27 to 29 show a method for manufacturing the transistors of FIGS. 26B and 26C. A cross-sectional view is shown.

[0336] First, a substrate 301 is prepared.

[0337] Next, the base insulating film 302 is formed. The base insulating film 302 is formed by the same method as that for forming the base insulating film 102. Please refer to the description about.

[0338] Next, an insulating film 321 is formed. The insulating film 321 is an insulating film containing excess oxygen. For 321, refer to the description of the method for forming the insulating film 135.

[0339] Next, oxygen is added to the insulating film 321 to form an insulating film containing excess oxygen. The element is added, for example, by ion implantation at an acceleration voltage of 2 kV or more and 100 kV or less. 5×10 14 ions / cm 2 5x10 or more 16 ions / cm 2 Do this at the following concentrations: stomach.

[0340] Next, the oxide semiconductor film 303 is formed. The oxide semiconductor film 3 may be selected from the oxide semiconductor films shown as the oxide semiconductor film 103. 03 is formed using the sputtering method, CVD method, MBE method, ALD method or PLD method. Just do that.

[0341] Next, first heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The first heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The first heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more.

[0342] Next, a resist mask is formed over the oxide semiconductor film 303. When the oxide semiconductor film 303 and the resist mask 304 are microfabricated to a side of 100 nm or less, A hard mask may be provided between the resist mask and the resist mask. See Q131.

[0343] Next, an island-shaped oxide semiconductor film 303 is formed using a resist mask. Then, an insulating film 321 is formed (see FIG. 27(A)).

[0344] In FIG. 27(A), the insulating film 321 is formed in an island shape, but it is not necessarily formed in an island shape. It is not necessary to have a convex shape, and it may have a convex shape.

[0345] Dry etching treatment is preferably used to form the oxide semiconductor film 303. The etching process may be performed in an atmosphere containing, for example, methane and a rare gas. It is preferable to use dry etching to form the insulating film 321. The method for this may be carried out in an atmosphere containing, for example, trifluoromethane and a rare gas.

[0346] Here, the oxide semiconductor film 303 and the insulating film 321 are formed using a resist mask. However, the oxide semiconductor film 303 and the insulating film 321 may be formed using different resist masks. In the cross-sectional view of FIG. 26B, the insulating film 321 and the oxide semiconductor film 303 are Although the widths are shown as being almost the same, for example, the width of the insulating film 321 is smaller than the width of the oxide semiconductor film 303. It can be big or small.

[0347] Next, the resist mask is removed. The resist mask can be removed by plasma treatment, chemical treatment, etc. Preferably, the removal is carried out by plasma ashing.

[0348] Next, the gate insulating film 304 is formed. Following the gate insulating film 304, the gate electrode 30 The gate insulating film 304 is formed by the same method as that for forming the gate insulating film 104. The gate electrode 305 is formed by the method described above for forming the gate electrode 105. Next, the conductive film is processed by photolithography or the like to form a gate electrode 305. (See FIG. 27(B)).

[0349] Next, an insulating film 309 is formed (see FIG. 27(C)). A deep etching is performed to form a sidewall insulating film 308 (see FIG. 28(A)).

[0350] Next, using the gate electrode 305 and the sidewall insulating film 308 as a mask, an oxide semiconductor Impurities are added to the base film 303, the insulating film 321, and the base insulating film 302, forming regions 351a, Regions 351b and 351d are formed. The region 351a and the region 351c are formed by adding impurities (see FIG. 28(B)). The method for forming the regions 1b, 351c, and 351d is to add impurities to the insulating film 52. Please refer to the description of the method for forming region 53. Region 351b, region 351c, region 3 The region 351a is an oxygen-blocking region of the oxide semiconductor film 303. This is a region where impurities are added to the part.

[0351] By forming the oxygen blocking regions 351b, 351c, and 351d, Therefore, outward diffusion of excess oxygen contained in the insulating film 321 can be suppressed and the oxide semiconductor film 303 can be efficiently formed. This makes it possible to supply oxygen quickly.

[0352] In addition, impurities are added to a region 351a, which is a part of the oxide semiconductor film 303. As a result, the source electrode 307a or the drain electrode 307b is in contact with the oxide semiconductor film 303. This reduces the resistance of the region from the on-state region to the channel formation region. The current is higher, which can improve the performance of the transistor.

[0353] Next, second heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The second heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The second heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more. A region 351a in which impurities are added to the oxide semiconductor film 303 by heat treatment In some cases, the resistance of the oxide semiconductor film 303 can be reduced. Therefore, the oxygen vacancies in the oxide semiconductor film 303 can be reduced. In addition, the crystallinity of the oxide semiconductor film 303 can be improved, and the amount of hydrogen and water can be reduced. By performing the second heat treatment, impurities such as fluorine and methyl methacrylate can be removed. In some cases, heat treatment may not be necessary.

[0354] Next, an insulating film 306 is formed (see FIG. 28(C)). See the description at 106.

[0355] Next, a part of the insulating film 306 is etched to provide an opening (see FIG. 29(A)). As a method for etching a part of the film 306, for example, dry etching or the like can be used. This can be done.

[0356] Next, a source electrode 307a and a drain electrode 307b are formed on the surface of the insulating film 306 and in the openings. The conductive film 307 is formed as a source electrode 1b (see FIG. 29(B)). Please refer to the description of the film formation method of the drain electrode 107a and the drain electrode 107b.

[0357] In addition, when a metal film is formed as a conductive film on an insulating film containing oxygen, the conductive film in contact with the insulating film At the interface, a metal oxide layer may form due to a reaction with oxygen contained in the insulating film. If such a metal oxide layer is formed, there is a problem that the adhesion between the insulating film and the metal is weakened. Here, the insulating film containing oxygen is formed on the sidewall insulating film 308, and the source electrode 307a and An example in which a metal is used for the drain electrode 307b will be described. By adding a substance to form the region 351c, the diffusion of oxygen can be suppressed. The interfaces between the sidewall insulating film 308 and the source electrode 307a and the drain electrode 307b This can prevent the formation of a metal oxide layer on the insulating film, which reduces the adhesion between the insulating film and the metal. The sidewall insulating film 308 can suppress the source electrode 307a and In addition, peeling of the drain electrode 307b can be prevented.

[0358] Next, CMP (Chemical Mechanical Polishing) method etc. By performing a planarization process using the (See Figure 29(C)).

[0359] Next, a third heat treatment is preferably performed. The third heat treatment is a combination of the first heat treatment and the second heat treatment. The conditions for the first and second heat treatments are selected from those shown in the first and second heat treatments. The third heat treatment can be performed at a low temperature. There are cases where it is not necessary to carry out the analysis.

[0360] In this manner, the transistor shown in FIG. 26 can be manufactured.

[0361] <Transistor Structure (4)> Next, a three-layer stacked structure of oxide semiconductor films and a film with low oxygen permeability as a protective film were An example of a top gate self-aligned transistor using the above-mentioned method will be described.

[0362] 31A and 31B are a top view and a cross-sectional view of a transistor. 31(A) shows a top view. In FIG. 31(A), a cross-sectional view corresponding to the dashed line AB is shown in FIG. 31(B). In addition, a cross-sectional view corresponding to the dashed line CD in FIG. 31(A) is shown in FIG. 31(C). Shown below.

[0363] In FIG. 31B, the transistor is formed by a base insulating film 402 on a substrate 401 and a base insulating film 403 on a substrate 401. The insulating film 421 over the oxide semiconductor film 402, the oxide semiconductor film 403b over the insulating film 421, and the oxide semiconductor film 403b over the insulating film 421 are The oxide semiconductor film 403a on the oxide semiconductor film 403b, and the oxide semiconductor film 403a on the oxide semiconductor film 403a a gate insulating film 404 on the oxide semiconductor film 403c; The gate electrode 405, the oxide semiconductor film 403a, and the base insulating film 402, and the gate insulating film 404, the oxide semiconductor film 403c, and the oxide semiconductor film 4 an insulating film 408 in contact with the insulating film 421; an insulating film 406 on the insulating film 408; The source electrode 407a and the drain electrode on the oxide semiconductor film 403b and the insulating film 406 The insulating film 421 is an insulating film containing excess oxygen. The transistor does not have the base insulating film 402. In addition, the oxide semiconductor film 403c has the following structure in the cross section shown in FIG. The insulating film 421, the oxide semiconductor film 403b, and the oxide semiconductor film 403c are disposed over the base insulating film 402. It contacts the membrane 403a.

[0364] The insulating film 408 is a film with low oxygen permeability. For example, the insulating film 408 is made of aluminum oxide. A membrane may be used.

[0365] Alternatively, a silicon nitride film may be used as the insulating film 408. The silicon nitride film is resistant to hydrogen and arsenic. A silicon nitride film with low ammonia release is used. The amount of hydrogen and ammonia released is The silicon nitride film is impermeable to hydrogen, water, and oxygen. A silicon nitride film that is transparent or almost opaque is used. Just use it.

[0366] The oxide semiconductor films 403a, 403b, and 403c are Details will be provided below.

[0367] The common parts between the transistor shown in FIG. 3 and the transistor shown in FIG. 31 are as follows: Unless otherwise specified, refer to the description of FIG. 3. For example, the substrate 401 is the same as the substrate 10. For the base insulating film 402, refer to the description of the base insulating film 102. For the insulating film 421, refer to the description of the insulating film 121. For the gate insulating film 404, Please refer to the description of the gate insulating film 104. The gate electrode 405 is For the insulating film 406, refer to the description of the insulating film 106. The source electrode 407a and the drain electrode 407b are See the description for 107b.

[0368] In the cross section shown in FIG. 31(B), the end face of the insulating film 421 is covered with the insulating film 408. The insulating film 408 has low oxygen permeability. The oxide semiconductor film 403a, the oxide semiconductor film 403b, and the oxide semiconductor film 403c are formed by suppressing the lateral diffusion. In addition, the end surface of the insulating film 421 can be efficiently supplied with oxygen to the insulating film 403c. If the insulating film 421 is not covered with O8, excess oxygen contained in the insulating film 421 will In some cases, the drain electrode 407b may be oxidized.

[0369] In addition, since the insulating film 408 is provided on the base insulating film 402, the insulating film 421 is The diffusion of oxygen into the insulating film 406 can be suppressed through the insulating film 402. It is also possible to prevent oxygen contained in 402 from diffusing into the insulating film 406. The oxide semiconductor film 403a, the oxide semiconductor film 403b, and the oxide semiconductor film 403c are In addition, the insulating film 408 is formed on the base insulating film 402. If the insulating film 421 is not provided, excess oxygen contained in the insulating film 421 may The electrode 407b may be oxidized.

[0370] As shown in FIG. 35, impurity-doped regions 451a, 451b, and 451c The regions 451b, 451c, and 451d may be provided as oxygen blocks. The region 451a functions as a low-resistance region of the oxide semiconductor film. It works.

[0371] Next, the oxide semiconductor film 403a, the oxide semiconductor film 403b, and the oxide semiconductor film 403c The oxide semiconductor film 403b is formed by removing the oxygen contained in the oxide semiconductor film 403a. The oxide semiconductor film is composed of one or more elements other than the oxide semiconductor. The oxide semiconductor film 403a is formed by adding one or more elements other than oxygen to the oxide semiconductor film 403a. Since the oxide semiconductor film 403a and the oxide semiconductor film 403b are formed, the oxide semiconductor film 403a and the oxide semiconductor film 403b are In this case, interface states are unlikely to be formed.

[0372] The oxide semiconductor film 403c contains at least one element other than oxygen contained in the oxide semiconductor film 403a. The oxide semiconductor film 403a is an oxide semiconductor film composed of one or more kinds of oxide semiconductors. The oxide semiconductor film 403c is composed of one or more elements other than oxygen. Therefore, the interface state at the interface between the oxide semiconductor film 403a and the oxide semiconductor film 403c is Hard to form.

[0373] When the oxide semiconductor film 403b is an In-M-Zn oxide, the sum of In and M is 10 When the atomic ratio of In to M is 0 atomic %, the atomic ratio of In is preferably 50 atomic %. c%, M is 50 atomic % or more, and more preferably In is less than 25 atomic %. In addition, the oxide semiconductor film 403a is an In-MZ film. In the case of n-oxide, when the sum of In and M is 100 atomic %, the atoms of In and M The atomic ratio of In is preferably 25 atomic % or more and M is less than 75 atomic %. More preferably, In is 34 atomic % or more and M is less than 66 atomic %. When the oxide semiconductor film 403c is an In-M-Zn oxide, the sum of In and M is 100a. When the atomic ratio of In to M is 50 atomic %, the atomic ratio of In is preferably 50 atomic %. less than 50 atomic %; M is 50 atomic % or more, and more preferably In is less than 25 atomic %; M is 75 atomic % or more. The same oxide as that of 403b may be used.

[0374] Here, an oxide semiconductor film 403b is formed between the oxide semiconductor film 403a and the oxide semiconductor film 403b. In some cases, the oxide semiconductor film 403b and the oxide semiconductor film 403a are mixed. Between the oxide semiconductor film 403a and the oxide semiconductor film 403c, There may be a mixed region with the conductive film 403c. The mixed region has a low interface state density. Therefore, the oxide semiconductor film 403b, the oxide semiconductor film 403a, and the oxide semiconductor film 4 In the stack of 03c, the energy changes continuously near each interface (continuous (also called a junction.) This results in a band structure.

[0375] The oxide semiconductor film 403a is formed using an oxide with a wide energy gap. The energy gap of the conductive film 403a is preferably, for example, 2.5 eV or more and 4.2 eV or less. Preferably, the voltage is 2.8 eV or more and 3.8 eV or less, and more preferably, 3 eV or more and 3.5 eV or less. do.

[0376] The oxide semiconductor film 403b is formed using an oxide with a wide energy gap. The energy gap of the oxide semiconductor film 403b is preferably greater than or equal to 2.7 eV and less than or equal to 4.9 eV. Preferably, it is 3 eV or more and 4.7 eV or less, and more preferably, it is 3.2 eV or more and 4.4 eV or less. do.

[0377] The oxide semiconductor film 403c is formed using an oxide with a wide energy gap. The energy gap of the semiconductor film 403c is 2.7 eV or more and 4.9 eV or less, preferably It is set to 3 eV or more and 4.7 eV or less, and more preferably 3.2 eV or more and 4.4 eV or less. The oxide semiconductor film 403b and the oxide semiconductor film 403c are formed by the oxide semiconductor film 403. The oxide has an energy gap larger than a.

[0378] The oxide semiconductor film 403a is made of an oxide having a higher electron affinity than the oxide semiconductor film 403b. For example, the oxide semiconductor film 403a may be formed by using a material having a higher electron affinity than the oxide semiconductor film 403b. The sum of the electrons is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, More preferably, an oxide having an electron affinity of 0.15 eV or more and 0.4 eV or less is used. The force is the difference in energy between the vacuum level and the bottom of the conduction band.

[0379] In addition, the oxide semiconductor film 403a is formed of a material having a higher electron affinity than the oxide semiconductor film 403c. For example, the oxide semiconductor film 403a may be formed using an oxide having a lower conductivity than the oxide semiconductor film 403c. The electron affinity is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less. An oxide having a larger valence of 0.5 eV or less, more preferably 0.15 eV or more and 0.5 eV or less, is used.

[0380] At this time, when an electric field is applied to the gate electrode 405, the oxide semiconductor film 403b and the oxide semiconductor film 403c are The oxide semiconductor film 403a and the oxide semiconductor film 403c have a larger electron affinity. Current mainly flows through 3a.

[0381] In addition, in order to reduce the on-state current of the transistor, the smaller the thickness of the oxide semiconductor film 403c, the greater the For example, the oxide semiconductor film 403c has a thickness of less than 10 nm, preferably less than or equal to 5 nm. On the other hand, the oxide semiconductor film 403c has a thickness of 3 nm or less. The oxide semiconductor film 403a is then filled with silicon and other elements (other than oxygen) that constitute the gate insulating film 404. Therefore, the oxide semiconductor film 4 For example, the oxide semiconductor film 403c preferably has a certain thickness. The thickness is set to 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more.

[0382] In order to improve reliability, the oxide semiconductor film 403b is thick and the oxide semiconductor film 403 It is preferable that the oxide semiconductor film 403a be thin and the oxide semiconductor film 403c be thin. The thickness of the compound semiconductor film 403b is 20 nm or more, preferably 30 nm or more, and more preferably The thickness of the oxide semiconductor film 403b is set to 40 nm or more, more preferably 60 nm or more. 20 nm or more, preferably 30 nm or more, more preferably 40 nm or more, and more preferably When the thickness is 60 nm or more, the insulating film 102 can be formed from the interface between the base insulating film 102 and the oxide semiconductor film 403b. The thickness of the insulating film 403a from the insulating film 403b to the oxide semiconductor film 403a through which current mainly flows is 20 nm or more, preferably 30 nm or more. m or more, more preferably 40 nm or more, and even more preferably 60 nm or more. However, the thickness of the oxide semiconductor film 403b may be reduced because productivity of the semiconductor device may decrease. The thickness is 200 nm or less, preferably 120 nm or less, and more preferably 80 nm or less. The thickness of the oxide semiconductor film 403a is greater than or equal to 3 nm and less than or equal to 100 nm, preferably 3 The thickness is preferably from 3 nm to 50 nm, more preferably from 3 nm to 50 nm.

[0383] For example, the thickness of the oxide semiconductor film 403b is larger than that of the oxide semiconductor film 403a. The thickness of the oxide semiconductor film 403a may be set to be thicker than the thickness of the oxide semiconductor film 403c.

[0384] The sum of the thickness of the oxide semiconductor film 403b and the thickness of the insulating film 421 is preferably 20 nm or more. Preferably, the thickness is 30 nm or more, more preferably 40 nm or more, and even more preferably 60 nm or more. As a result, the insulating film 421 is formed at the interface between the base insulating film 402 and the insulating film 421 and the oxide semiconductor film 403a. The thickness is 20 nm or more, preferably 30 nm or more, more preferably 40 nm or more, and more preferably In other words, by providing a thick insulating film 421, the distance between the oxide film and the insulating film can be increased. The oxide semiconductor film 403b can be thinned. This can reduce the amount of excess oxygen supplied to the oxide semiconductor film. The amount of oxygen that can be supplied to the oxide semiconductor film 403a increases relatively. Improved characteristics are expected.

[0385] <Method for fabricating transistor structure (4)> An example of a method for manufacturing the transistor structure (4) will be described below.

[0386] 32 to 34 show a method for manufacturing the transistors of FIGS. 31B and 31C. A cross-sectional view is shown.

[0387] First, a substrate 401 is prepared.

[0388] Next, the base insulating film 402 is formed. The base insulating film 402 is formed by the same method as that for forming the base insulating film 102. Please refer to the description about.

[0389] Next, an insulating film 421 is formed. The insulating film 421 contains excess oxygen. For 421, refer to the description of the method for forming the insulating film 135.

[0390] Next, oxygen is added to the insulating film 421 to form an insulating film containing excess oxygen. The element is added, for example, by ion implantation at an acceleration voltage of 2 kV or more and 100 kV or less. 5×10 14 ions / cm 2 5x10 or more 16 ions / cm 2 Do this at the following concentrations: stomach.

[0391] Next, an oxide semiconductor film 403b and an oxide semiconductor film 403a are formed (FIG. 32(A)). The oxide semiconductor film 403b and the oxide semiconductor film 403a are each an oxide semiconductor. The oxide semiconductor film 403b and the oxide semiconductor film 403a are selected from the oxide semiconductor films shown in FIG. The oxide semiconductor film 403b and the oxide semiconductor film 403a may be formed by sputtering. The film may be formed by a deposition method, a CVD method, an MBE method, an ALD method, or a PLD method.

[0392] Next, first heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The first heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The first heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more.

[0393] Next, a resist mask is formed over the oxide semiconductor film 403b. When the oxide semiconductor film 403b is microfabricated to a side of 100 nm or less, A hard mask may be provided between the masks. See Thomas 131.

[0394] Next, the island-shaped oxide semiconductor film 403b and the oxide semiconductor film 40 3a is formed. Subsequently, an island-shaped insulating film 421 is formed (see FIG. 32(B)).

[0395] In FIG. 32(B), the insulating film 421 is formed in an island shape, but it is not necessarily formed in an island shape. It is not necessary to have a convex shape, and it may have a convex shape.

[0396] The oxide semiconductor film 403b and the oxide semiconductor film 403a are formed by dry etching. The dry etching process is preferably carried out using a gas containing, for example, methane and a rare gas. The insulating film 421 may also be formed by dry etching. The insulating film 421 is preferably etched using, for example, methane trifluoride and rare gas. The heating may be carried out in an atmosphere containing gas.

[0397] Here, the oxide semiconductor film 403b and the oxide semiconductor film 403 a and the insulating film 421 were formed, but the oxide semiconductor film 403b, the oxide semiconductor film 403a The insulating film 421 may be formed using a different resist mask. In the cross-sectional view shown in FIG. 1, the insulating film 421, the oxide semiconductor film 403b, and the oxide semiconductor film 403 Although the widths a are almost the same, for example, when the width of the insulating film 421 is the same as that of the oxide semiconductor film 403b The width of the oxide semiconductor film 403a may be larger or smaller than that of the oxide semiconductor film 403a.

[0398] Next, the resist mask is removed. The resist mask can be removed by plasma treatment, chemical treatment, etc. Preferably, the removal is carried out by plasma ashing.

[0399] Next, the oxide semiconductor film 403c is formed. The oxide semiconductor film may be selected from the oxide semiconductor films shown as the semiconductor film 403c. The body film 403c is formed by using a sputtering method, a CVD method, an MBE method, an ALD method, or a PLD method. The film can be formed by

[0400] Next, a gate insulating film 404 and a gate electrode 405 are formed. The gate electrode 405 is formed by the gate insulating film 104. Please refer to the description of the film formation method in 105.

[0401] Next, a resist mask 431 is formed (see FIG. 32(C)). The gate electrode 405 is etched using the etching method. Next, the gate insulating film 404 is etched. Next, the oxide semiconductor film 403c is etched (see FIG. 33A). The electrode 405 may be etched by dry etching, for example. The insulating film 404 may be etched by dry etching, for example. The nitride semiconductor film 403c may be etched by, for example, dry etching.

[0402] Next, an insulating film 408 is formed (see FIG. 33(B)). The insulating film 408 may be a film having low oxygen permeability.

[0403] Next, second heat treatment is preferably performed at a temperature of 250° C. or higher and 650° C. or lower. The second heat treatment is preferably performed at a temperature of 300° C. or higher and 500° C. or lower. oxidizing gas atmosphere, or atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas The second heat treatment may be carried out under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more. By the heat treatment, the oxide semiconductor film 403a, the oxide semiconductor film 403b, and the oxide semiconductor film 403b are Excess oxygen can be transferred from the insulating film 421 to the insulating film 403c. Oxygen vacancies in the oxide semiconductor film 403a, the oxide semiconductor film 403b, and the oxide semiconductor film 403c In addition, the oxide semiconductor films 403a, 403b, and and the crystallinity of the oxide semiconductor film 403c is increased, and impurities such as hydrogen and water are removed. By performing the second heat treatment, it is possible to avoid the need for the first heat treatment. There may be cases where this is the case.

[0404] Next, an insulating film 406 is formed (see FIG. 33C). See the description at 106.

[0405] Next, a part of the insulating film 406 is etched to provide an opening (see FIG. 34A). As a method for etching a part of the film 406, for example, dry etching or the like can be used. This can be done.

[0406] Next, a source electrode 407a and a drain electrode 407b are formed on the surface of the insulating film 406 and in the openings. A conductive film for forming source electrodes 407a and b is formed and processed by photolithography or the like. The source electrode 407a and the drain electrode 407b are formed (see FIG. 34(B)). The drain electrode 407b is formed by the same method as that for forming the source electrode 107a and the drain electrode 107b. Please refer to the description below.

[0407] Next, a third heat treatment is preferably performed. The third heat treatment is a combination of the first heat treatment and the second heat treatment. The conditions for the first and second heat treatments are selected from those shown in the first and second heat treatments. The third heat treatment can be performed at a low temperature. There are cases where it is not necessary to carry out the analysis.

[0408] In the above manner, the transistor shown in FIG. 31 can be manufactured.

[0409] The above has described an example of a structure of a transistor according to one embodiment of the present invention and a manufacturing method thereof. However, the structure of a transistor according to one embodiment of the present invention is not limited to the above example. For example, a transistor according to one embodiment of the present invention may have a bottom A contact structure may be used, or a structure without source and drain electrodes may be used. That's fine.

[0410] In the transistor according to one embodiment of the present invention, excess oxygen in an insulating film is substituted by oxygen in an oxide semiconductor film. Therefore, the transistor can be effectively utilized to reduce the oxygen vacancies. The transistor is formed using an oxide semiconductor film.

[0411] Therefore, the transistor according to one embodiment of the present invention is free from deterioration caused by oxygen vacancies. For example, oxygen vacancies in an oxide semiconductor film can become trap centers, which can cause degradation. In addition, oxygen vacancies can trap hydrogen to form donor levels, The threshold voltage of the transistor may be shifted in the negative direction.

[0412] The transistor according to one embodiment of the present invention can effectively utilize excess oxygen. It can be applied to the construction of wiring. It also has little deterioration and stable electrical characteristics. Since the increase in resistance due to oxidation is small, the on-current can be increased. Since there is no negative voltage fluctuation, the off-state current can be reduced.

[0413] <Applied products> The following describes application products using the above-described transistors.

[0414] The above-described transistors can be used in various applications, such as memories, CPUs, and display devices. This can be done.

[0415] <cpu> FIG. 20 shows a specific configuration of a CPU that uses the above-described transistors at least in part. FIG.

[0416] The CPU shown in FIG. 20A includes an ALU 1191 (ALU: Arithmetic) on a board 1190. metic logic unit, logic operation circuit), ALU controller 1192, Instruction decoder 1193, interrupt controller 1194, timing controller controller 1195, register 1196, register controller 1197, bus interface Interface 1198 (Bus I / F), rewritable ROM 1199, and ROM interface The substrate 1190 is a semiconductor substrate. , SOI substrate, glass substrate, etc. ROM1199 and ROM interface 1189 may be provided on a separate chip. This is just a simplified example of the configuration of a CPU, and actual CPUs have a wide variety of configurations depending on their applications. It has.

[0417] The instructions input to the CPU via the bus interface 1198 are After being input to the decoder 1193 and decoded, the ALU controller 1192 Rupture controller 1194, register controller 1197, timing controller It is entered into 1195.

[0418] ALU controller 1192, interrupt controller 1194, register controller The timing controller 1197 and the timing controller 1195 control various Specifically, the ALU controller 1192 controls the operation of the ALU 1191. The interrupt controller 1194 also generates signals for the CPU program. During system execution, interrupt requests from external I / O devices and peripheral circuits are handled according to their priority and mask. The register controller 1197 determines the address of the register 1196 and processes it. It generates a response and reads or writes to register 1196 depending on the state of the CPU.

[0419] The timing controller 1195 controls the ALU 1191 and the ALU controller 119 2, an instruction decoder 1193, an interrupt controller 1194, and It generates a signal to control the timing of the operation of the register controller 1197. The timing controller 1195 generates an internal clock signal CLK1 based on the reference clock signal CLK1. The internal clock generating unit generates the internal clock signal CLK2. It is supplied to various circuits.

[0420] In the CPU shown in FIG. 20A, a register 1196 is provided with a memory cell. The above-described transistors can be used as memory cells of the register 1196 .

[0421] In the CPU shown in FIG. 20A, the register controller 1197 controls the ALU 1191 The holding operation in register 1196 is selected according to the instruction from register 1196. In the memory cell of 196, data is held by a flip-flop or Select whether to hold data using a flip-flop. When this is selected, the power supply voltage is supplied to the memory cell in the register 1196. If data retention in the capacitor is selected, rewriting data to the capacitor The supply of the power supply voltage to the memory cells in the register 1196 can be stopped. do.

[0422] Regarding power supply shutdown, as shown in FIG. 20(B) or FIG. 20(C), A switching element is connected between nodes to which the power supply potential VDD or VSS is applied. The circuits in Figures 20(B) and 20(C) are explained below. Make it clear.

[0423] 20B and 20C show switches that control the supply of power supply potential to memory cells. The memory device uses the above-mentioned transistor as the switching element.

[0424] The memory device shown in FIG. 20B includes a switching element 1141 and a memory cell 1142. Specifically, each memory cell 1142 has: The above-described transistors can be used. A high-level power supply potential VDD is supplied to the filter 1142 via the switching element 1141. Furthermore, each memory cell 1142 included in the memory cell group 1143 is supplied with a signal. The potential of IN and the potential of the low-level power supply potential VSS are applied.

[0425] In FIG. 20B, the above-described transistor is used as the switching element 1141. The transistor is switched by a signal SigA applied to its gate electrode layer. is controlled.

[0426] In FIG. 20B, the switching element 1141 has only one transistor. However, there is no particular limitation to the configuration, and a plurality of transistors may be included. When the switching element 1141 has a plurality of transistors functioning as switching elements, The plurality of transistors may be connected in parallel or in series. Alternatively, the series and parallel connections may be combined.

[0427] In FIG. 20B, a memory cell group 1143 is enabled by a switching element 1141. The supply of a high-level power supply potential VDD to each memory cell 1142 is controlled. The supply of the low-level power supply potential VSS is controlled by the switching element 1141. That's fine.

[0428] In addition, in FIG. 20C, each memory cell 1142 included in the memory cell group 1143 is A low-level power supply potential VSS is supplied to the memory device through the switching element 1141. The switching element 1141 switches each memory cell in the memory cell group 1143. The supply of a low-level power supply potential VSS to the memory cell 1142 can be controlled.

[0429] A switch is provided between the memory cell group and a node to which the power supply potential VDD or VSS is applied. When a switching element is installed to temporarily stop CPU operation and cut off the supply of power voltage It is possible to retain data even in this state, and power consumption can be reduced. Specifically, for example, a user of a personal computer inputs information into an input device such as a keyboard. You can stop the CPU from operating while you are no longer entering information, which will save you money. Power consumption can be reduced.

[0430] Here, we have taken the CPU as an example, but the same can be said for DSP (Digital Signal Processor) processor), custom LSI, FPGA (Field Programmable Gate Array) It can also be applied to LSIs such as MOS gate arrays.

[0431] <Installation example> In FIG. 21A, a television device 8000 includes a housing 8001 and a display unit 8002. The display unit 8002 displays images and the speaker unit 8003 outputs audio. It is possible to output

[0432] The television device 8000 may include a receiver, a modem, and the like. The device 8000 can receive general television broadcasts using a receiver, and also has a modem. By connecting to a wired or wireless communication network via communication of information from one person to another (from one person to another) or two-way (between a sender and a receiver, or between receivers) It is also possible to do this.

[0433] The television device 8000 also includes a CPU and memory for performing information communication. The television device 8000 may use the above-described memory and CPU. be.

[0434] In FIG. 21(A), an alarm device 8100 is a residential fire alarm, and includes a detection unit and a microphone. The microcomputer 8101 has the above-mentioned This includes CPUs that use transistors.

[0435] In FIG. 21(A), an air conditioner having an indoor unit 8200 and an outdoor unit 8204 is shown. The CPU includes the above-mentioned transistor. The device includes a housing 8201, an air outlet 8202, a CPU 8203, and the like. Although the CPU 8203 is provided in the indoor unit 8200, 203 may be provided in the outdoor unit 8204. Alternatively, the indoor unit 8200 and the outdoor unit 82 The CPU 8203 may be provided in both the MOS transistor 04 and the MOS transistor 05. The inclusion of a CPU makes the air conditioner more energy efficient.

[0436] In FIG. 21A, an electric refrigerator-freezer 8300 includes a C Specifically, the electric refrigerator-freezer 8300 includes a housing 8301, a refrigerator compartment door 83 8302, a freezer door 8303, a CPU 8304, etc. In FIG. 04 is provided inside the housing 8301. This inclusion makes the electric refrigerator-freezer 8300 more energy efficient.

[0437] 21(B) and 21(C) show examples of electric vehicles. The power of the secondary battery 9701 is supplied to the control circuit 970. The output is adjusted by the control circuit 9702 and supplied to the driving device 9703. The processor 9704 includes a ROM, RAM, CPU, etc. The inclusion of a CPU using transistors will enable the electric vehicle 9700 to be more energy efficient. .

[0438] The drive unit 9703 is a DC motor or an AC motor alone, or a motor and an internal combustion engine. The processing device 9704 is configured by combining the operation information of the driver of the electric vehicle 9700. Information (acceleration, deceleration, stopping, etc.) and driving information (uphill and downhill slopes, etc., Based on input information (load information, etc.), a control signal is output to the control circuit 9702. 9702 controls the power supplied from the secondary battery 9701 in response to a control signal from the processing unit 9704. The energy is adjusted to control the output of the drive unit 9703. If an AC motor is installed, In this case, although not shown, an inverter for converting direct current to alternating current is also built in.

[0439] It should be noted that this embodiment describes an example of the basic principle. Part or all of the above-mentioned forms may be freely combined with part or all of the embodiments. It can be implemented as, adapted to, or substituted for. [Example]

[0440] In this embodiment, a silicon oxide film or a silicon oxynitride film, which is an insulating film containing excess oxygen, is used. Phosphorus was added as an impurity to the mixture, and oxygen release due to TDS was evaluated.

[0441] The sample preparation method is described below.

[0442] First, a silicon wafer was prepared as a substrate. Then, the silicon wafer was oxidized by thermal oxidation. Then, a first silicon oxide film having a thickness of 100 nm was formed on the surface. A second silicon oxide film having a thickness of 300 nm was formed by a coating method.

[0443] The second silicon oxide film was formed using a synthetic quartz target and 50 sccm of oxygen as the film-forming gas. The pressure was set to 0.4 Pa, the deposition power was set to 1.5 kW (13.56 MHz), and the target The film was formed with a substrate distance of 60 mm and a substrate temperature of 100°C.

[0444] Next, phosphorus ions (P + ) was injected to Example Sample 1, Example Sample Sample 2 and Example Sample 3 were prepared.

[0445] The addition of phosphorus ions was carried out by ion implantation at an acceleration voltage of 30 kV. In material 1, the phosphorus ion implantation concentration is 1×10 15 ions / cm 2 Example sample 2 was , the phosphorus ion implantation concentration is 2×10 15 ions / cm 2 Example sample 3 was phosphorus The ion implantation concentration is 1×10 16 ions / cm 2 As a comparative example, A sample was prepared that had not been implanted with silicon ions.

[0446] FIG. 22 shows the TDS results of Example Sample 1, Example Sample 2, Example Sample 3 and the Comparative Example Sample. The relationship between the substrate temperature and the ion intensity of a mass-to-charge ratio (M / z) of 32 is shown. Each sample was cut into 10 mm x 10 mm pieces and analyzed. The emitted gas includes oxygen gas (O2). In this example, the gas detected at M / z 32 All gas is considered to be oxygen gas.

[0447] As can be seen from FIG. 22, the comparative sample without phosphorus ion implantation exhibited a high annealing rate at a substrate temperature of 250° C. or higher, 450° C. or higher. On the other hand, Example Sample 1, which was implanted with phosphorus ions, released oxygen gas in the range of about 100°C or less. Example Samples 2 and 3 released less oxygen gas than the comparative sample. I found out.

[0448] From FIG. 22, the amount of oxygen released from Example Sample 1 is 8.1×10 15 atoms / cm 2 (2. 7×10 20 atoms / cm 3 ) The amount of oxygen released from Example Sample 2 was 5. 5×10 15 atoms / cm 2 (1.8×10 20 atoms / cm 3 ) was. The amount of oxygen released from Example Sample 3 was 1.1 × 10 14 atoms / cm 2 (3.7×10 18 atoms / cm 3 ) The amount of oxygen released from the comparative sample was 1.1 × 10 1 6 atoms / cm 2 (3.7×10 20 atoms / cm 3 ) In addition, the unit The amount of oxygen released per unit area was calculated from the thickness of the second silicon oxide film, 300 nm.

[0449] Figure 23 shows the amount of released oxygen calculated from Figure 22. The amount of released oxygen is calculated in terms of oxygen atoms. FIG. 23 shows the relationship between the phosphorus ion implantation concentration and the amount of oxygen released. The amount of oxygen released from a comparative sample into which ions were not implanted is shown by a broken line.

[0450] Therefore, in order to reduce the amount of oxygen released by heating, an accelerating voltage of 30 kV is required. So, let's say we add 1×10 phosphorus ions to the silicon oxide film. 15 ions / cm 2 Above, preferably 2×10 15 ions / cm 2 More preferably, 1 × 10 16 ions / cm 2 Below It was found that the above concentration should be injected.

[0451] As shown in Figure 22, implanting phosphorus ions into an insulating film that can release oxygen by heating It can be seen that the amount of oxygen released by heating can be reduced.

[0452] Next, a method for producing Example Sample 4 will be described.

[0453] First, a silicon wafer was prepared as a substrate. Then, the silicon wafer was oxidized by thermal oxidation. Then, a silicon oxide film with a thickness of 100 nm was formed on the surface by the CVD method. A silicon oxynitride film having a thickness of 300 nm was formed.

[0454] The silicon oxynitride film was formed using silane 2sccm and nitrous oxide 4000sccm as the deposition gas. The pressure was 700 Pa, the deposition power was 250 W (60 MHz), and the electrode distance was 9 The film was formed at a thickness of 100 mm and a substrate temperature of 400°C.

[0455] Next, phosphorus ions (P + ) was injected to prepare Example Sample 4. The phosphorus ions were added by ion implantation at an acceleration voltage of 30 kV. Sample 4 has a phosphorus ion implantation concentration of 1×10 16 ions / cm 2 It was decided.

[0456] Therefore, the difference between Example Sample 3 and Example Sample 4 is whether the second silicon oxide film is used. The only difference is whether to use a silicon oxynitride film.

[0457] Next, Example Sample 3 and Example Sample 4 were etched, and the etching depth and the amount of oxygen released were measured. The relationship between the above was evaluated. Example Sample 3 and Example Sample 4 were cut into 10 mm x 10 mm pieces. For TDS measurements, one cut piece of sample was used for each measurement.

[0458] FIG. 24 shows the thickness of the second silicon oxide film or silicon oxynitride film without etching. The amount of oxygen released at each etching depth was plotted, with the etching depth set at 0 nm. The etchant used was a mixture of 6.7% ammonium hydrogen fluoride and 1% ammonium fluoride. The test was carried out at 20°C using a mixed solution containing 2.7% (LAL500 manufactured by Stella Chemifa Corporation). FIG. 24(A) shows the amount of oxygen released from Example Sample 3, and FIG. 24(B) shows the amount of oxygen released from Example Sample 4. are shown respectively.

[0459] FIG. 24 shows the calculated results of the second silicon oxide film or silicon oxynitride film. The calculation is based on the TRIM (Transport of Ion in The film density was 2.2 g / cm 3 By calculation, each sample It was found that the maximum phosphorus concentration was in the range of depth 50 nm to 60 nm.

[0460] As shown in FIG. 24(A), in Example Sample 3, the second silicon oxide film is etched to a depth of 50 nm. It was found that the amount of oxygen released increased by applying a second silicon oxide film. It was found that the amount of oxygen released was saturated when etching was performed to a depth of 90 nm. 24(B), in Example Sample 4, the silicon oxynitride film was etched to a depth of 78 nm. It was found that the amount of oxygen released increased by applying a silicon oxynitride film. It was found that the amount of oxygen released was saturated when etching was performed to a depth of 3 nm.

[0461] As can be seen from Figure 24, when the area where the phosphorus concentration in the insulating film is at its maximum is etched, the amount of oxygen released is It was found that the phosphorus concentration changed significantly. 20 atoms / c m 3 It was found that by doing so, a region exhibiting high oxygen blocking properties could be formed. It was also found that oxygen released by heating was retained in the low phosphorus concentration region. It was.

[0462] In this example, the insulating films containing excess oxygen, such as a silicon oxide film and a silicon oxynitride film, It can be seen that an oxygen blocking region can be formed by adding phosphorus as an impurity to the silicon dioxide. [Example]

[0463] In this embodiment, boron is added as an impurity to a silicon oxide film, which is an insulating film containing excess oxygen. The oxygen release due to TDS was evaluated.

[0464] The sample preparation method is described below.

[0465] First, a silicon wafer was prepared as a substrate. Then, the silicon wafer was oxidized by thermal oxidation. Then, a first silicon oxide film having a thickness of 100 nm was formed on the surface. A second silicon oxide film having a thickness of 300 nm was formed by a coating method.

[0466] The second silicon oxide film was formed using a synthetic quartz target and 50 sccm of oxygen as the film-forming gas. The pressure was set to 0.4 Pa, the deposition power was set to 1.5 kW (13.56 MHz), and the target The film was formed with a substrate distance of 60 mm and a substrate temperature of 100°C.

[0467] Next, boron ions (B + ) to prepare Example Sample 5. did.

[0468] The boron ions were added by ion implantation at an acceleration voltage of 10 kV. Sample 5 has a boron ion implantation concentration of 1×10 16 ions / cm 2 In addition, the comparison As an example sample, a sample without ion implantation was prepared. It is the same as the sample shown in the previous example.

[0469] FIG. 25 shows the relationship between the substrate temperature and the M / z 32 incident light intensity measured by TDS for Example Sample 5 and Comparative Example Sample. The relationship between the on-state intensity and the TDS measurement was This was done for the following reasons.

[0470] As can be seen from FIG. 25, the comparative sample without boron ion implantation exhibited a 45% increase in the substrate temperature from 250° C. to 45° C. On the other hand, Example Sample 5, which was implanted with boron ions, released oxygen gas at temperatures below 0°C. It was found that the amount of oxygen gas released was smaller than that of the comparative sample.

[0471] From FIG. 25, the amount of oxygen released from Example Sample 5 is 3.1×10 15 atoms / cm 2 (1. 0×10 20 atoms / cm 3 ) The amount of oxygen released from the comparative sample was 1.1 x10 16 atoms / cm 2 (3.7×10 20 atoms / cm 3 ) was. The amount of oxygen released per unit volume was calculated from the thickness of the second silicon oxide film, 300 nm. .

[0472] Therefore, in order to reduce the amount of oxygen released by heating, an accelerating voltage of 10 kV is required. So, let's say we add 1×10 boron ions to the silicon oxide film. 16 ions / cm 2 Inject at a concentration of I found out I should enter.

[0473] As shown in Figure 25, boron ions are implanted into an insulating film that can release oxygen when heated. This also shows that the amount of oxygen released by heating can be reduced.

[0474] In this example, boron is added as an impurity to a silicon oxide film, which is an insulating film containing excess oxygen. It is clear that the oxygen blocking region can be formed by adding oxygen. [Example]

[0475] In this example, phosphorus or boron was added to an oxide semiconductor as an impurity and heat treatment was performed. The resistance was measured afterwards.

[0476] The sample preparation method is described below.

[0477] First, a glass substrate was prepared as a substrate 1001. Next, an insulating film 1002 was formed. The insulating film 1002 was a silicon oxide film formed to a thickness of 300 nm by sputtering. Used as a sputtering target, and argon and oxygen (both 25 sccm) as deposition gases The substrate temperature was 100°C, and the distance between the substrate and the sputtering target was 60°C. The film was formed with a thickness of 1.5 mm, a pressure of 0.4 Pa, and an RF power of 1.5 kW.

[0478] Next, an oxide semiconductor film 1003 was formed. The oxide semiconductor film 1003 was made of In:Ga:Zn A sputtering method using a polycrystalline oxide target with an atomic ratio of 1:1:1 was used. Under a mixed atmosphere of argon and oxygen (argon:oxygen = 30 sccm:15 sccm), A pressure of 0.4 Pa and a power supply of 0.5 kW were applied, and the distance between the target and the substrate was set to 60°C. The film was formed at a temperature of 400°C and a thickness of 1 mm. After that, the film was heated at 450°C in a nitrogen atmosphere for 1 hour. Heat treatment was carried out.

[0479] Next, a resist mask is formed, and the oxide semiconductor film 1003 is removed by wet etching. Unnecessary parts were removed. ITO-07N (Kanto Chemical Co., Ltd.) was used for wet etching. .

[0480] Next, an insulating film 1004 was formed. The insulating film 1004 was formed by a CVD method to a thickness of 20 nm. A silicon oxynitride film was formed. The silicon oxynitride film was formed by using silane 1 sccm and The pressure was 40 Pa, and the deposition power was 150 W (60 M Hz), the electrode distance was 28 mm, and the substrate temperature was 400°C.

[0481] Next, phosphorus ions (P + ) or boron ions (B + ) was injected. Phosphorus ions were implanted into sample A under the conditions of an acceleration voltage of 40 kV and an implantation concentration of 1.0 × 1 0 15 cm -2 In addition, boron ions were implanted into sample B, and the implantation conditions were an acceleration voltage of 1 5 kV, injection concentration 3.0 × 10 15 cm -2 As a comparative example, ion implantation was performed. Sample C was prepared without this treatment.

[0482] In this example, phosphorus ions were implanted after forming a 20-nm insulating film over the oxide semiconductor film. However, the insulating film was not formed or was removed after forming it to expose the oxide semiconductor film. Ions may be implanted. The insulating film 1004 may be thicker than 20 nm.

[0483] Next, an insulating film 1005 was formed. The insulating film 1005 was formed by a CVD method to a thickness of 300 nm. The silicon oxynitride film was formed using silane gas at 5 sccm and nitrous oxide 1000sccm, the pressure was 133.30Pa, and the film formation power was 35 The frequency was set to 13.56 MHz, the electrode distance was set to 20 mm, and the substrate temperature was set to 325°C. It was filmed.

[0484] Next, a heat treatment is performed to remove water, nitrogen, hydrogen, and the like from the insulating films 1004 and 1005. At the same time, part of oxygen contained in the insulating film 1004 was supplied to the oxide semiconductor film. was subjected to a heat treatment at 450°C for 1 hour in an oxygen atmosphere.

[0485] Next, a resist mask is formed, and the insulating film 1004 and the insulating film 1005 are removed by dry etching. An opening 1010 was formed in 1005. The dry etching process was carried out using an ICP device. The etching gas introduced into the processing chamber of the ICP device was trifluoromethane at a flow rate of 22.5 sccm. The conditions used were a gas pressure of 127.5 sccm, helium at 127.5 sccm, and methane at 5 sccm. The pressure in the processing chamber was 3.5 Pa, the ICP power was 475 W, and the bias power was 300 W. Ta.

[0486] Next, a 150 nm thick film is deposited on the surface of the insulating film and in the opening 1010 by sputtering. The conductive film 1007 was formed using titanium. The titanium film was formed under the following conditions: The gas flow rate was set to 20 sccm, the pressure to 0.1 Pa, and the power supply power (DC) to 12 kW. The distance between the substrate and the target was set to 400 mm, and the substrate temperature was set to room temperature.

[0487] Next, a resist mask is formed, and the conductive film 1007 is processed by dry etching. The electrodes 1007a and 1007b were formed. The dry etching process was carried out using an ICP device. The etching gas used is boron trichloride at 60 sccm and chlorine at 20 sccm. The pressure in the processing chamber was 2.0 Pa, the ICP power was 350 W, and the bias power was 2 The power was set to 0 W. Then, a heat treatment was performed in a nitrogen atmosphere at 150° C. for 12 minutes.

[0488] In this manner, Sample A, Sample B, and Sample C as a comparative example were prepared.

[0489] Next, the resistance values ​​of the fabricated samples A and B were measured. The oxide semiconductor film 1003 is formed in an island shape. The electrodes 1007b are spaced apart by 732 μm. 7a, the relationship between the electrode 1007b and the opening 1010 in the insulating film 1004 and the insulating film 1005 Shows.

[0490] The resistance value was measured by applying terminals to the electrodes 1007a and 1007b. The resistance values ​​of sample A and sample B were 5.4×10 5 [Ω], 1.5×10 4 [Ω], 2.1× 10 6 It was [Ω].

[0491] By adding phosphorus and boron to the oxide semiconductor film 1003, the oxide semiconductor film 10 We were able to lower the resistance of 03. [Explanation of symbols]

[0492] 50 boards 52 insulating film 53 areas 56 Oxide semiconductor film 68 insulating film 70 boards 72 insulating film 73 areas 73a area 76 Oxide semiconductor film 77 areas 78 areas 79 areas 81 Resist mask 82 Resist mask 88 insulating film 101 Substrate 102 Undercoat insulating film 103 Oxide semiconductor film 104 Gate insulating film 105 gate electrode 106 insulating film 107 Conductive film 107a Source electrode 107b Drain electrode 121 insulating film 122 areas 131 Resist mask 135 insulating film 136 Oxide semiconductor film 151a area 151b area 151c area 151d area 181 channel length 182 channel width 201 Substrate 202 Undercoat insulating film 203 Oxide semiconductor film 204 Gate insulating film 205 gate electrode 206 Insulating film 207 Conductive Film 207a Source electrode 207b Drain electrode 217a End 217b End 221 Insulating film 222 areas 235 insulating film 236 Oxide semiconductor film 251a area 251b area 251c area 251d area 251e area 301 Substrate 302 Undercoat insulating film 303 Oxide semiconductor film 304 Gate insulating film 305 Gate electrode 306 Insulating film 307 Conductive Film 307a Source electrode 307b Drain electrode 308 Sidewall insulating film 309 Insulating Film 321 Insulating Film 322 areas 351a area 351b area 351c area 351d area 401 Substrate 402 Undercoat insulating film 403a Oxide semiconductor film 403b Oxide semiconductor film 403c Oxide semiconductor film 404 Gate insulating film 405 Gate electrode 406 Insulating film 407a Source electrode 407b Drain electrode 408 Insulating film 421 Insulating film 431 Resist mask 451a area 451b area 451c area 451d area 901 Semiconductor Film 902 Electron capture layer 902a First insulating film 902b Second insulating film 902c Third insulating film 903 Gate electrode 904 Electron capture level 905 Electronic 906 curve 907 curve 908 Transistor 909 Capacitor 1001 board 1002 insulating film 1003 Oxide semiconductor film 1004 insulating film 1005 insulating film 1007 Conductive film 1007a electrode 1007b Electrode 1010 Opening 1141 Switching element 1142 memory cells 1143 memory cell group 1189 ROM interface 1190 PCB 1191 ALU 1192 ALU controller 1193 Instruction Decoder 1194 Interrupt Controller 1195 Timing Controller 1196 registers 1197 Register Controller 1198 Bus Interface 1199 ROM 8000 Television Equipment 8001 Case 8002 Display section 8003 Speaker section 8100 Alarm device 8101 Microcomputer 8200 indoor unit 8201 Housing 8202 Ventilation outlet 8203 CPU 8204 Outdoor unit 8300 Electric refrigerator-freezer 8301 Housing 8302 Refrigerator door 8303 Freezer door 8304 CPU 9700 Electric Vehicle 9701 Secondary battery 9702 Control circuit 9703 Drive unit 9704 Processing equipment< / cpu>

Claims

1. a first insulating layer; an oxide semiconductor layer on the first insulating layer; a gate insulating layer provided on the oxide semiconductor layer and in contact with an upper surface of the first insulating layer; a gate electrode layer on the gate insulating layer; a second insulating layer on the gate electrode layer; a conductive layer electrically connected to the oxide semiconductor layer through the opening in the second insulating layer, a first region of the first insulating layer, a second region of the gate insulating layer, and a third region of the oxide semiconductor layer each contain an element having a function of reducing resistance of the oxide semiconductor; The second insulating layer contains nitrogen, oxygen, and silicon, and the oxygen content is equal to or greater than 0.1 atomic % and less than 25 atomic %.

2. In claim 1, A semiconductor device, wherein a portion of the first insulating layer contains an element having a function of lowering the resistance of the oxide semiconductor.

Images