Method for forming a power semiconductor with a heat sink - Patent Application 20070122997

Abstract

A method of forming a power semiconductor with a heat sink, the method including providing a power semiconductor having a power semiconductor die, a plurality of pin terminals, and a plate terminal, where the power semiconductor die has a plurality of semiconductor terminals, each of the pin terminals being electrically coupled to a corresponding one of the semiconductor terminals, and the plate terminal being electrically coupled to one of the pin terminals, the plate terminal having an outer surface covered with at least one sinter-resistant material, removing the at least one sinter-resistant material from the plate terminal to expose the outer surface, heating a heat sink to a predetermined temperature, and sintering the heat sink to the outer surface of the plate terminal.

Description

STATEMENT REGARDING FEDERALLY FUNDED RESEARCH

[0001] This invention was made with government support under grant contract DE-EE0009191 awarded by the U.S. Department of Energy. The government has certain rights in this invention. CROSS-REFERENCE TO RELATED APPLICATIONS

[0002]

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 209,588, filed June 11, 2021. [Technical Field]

[0003]

[0003] The present disclosure relates to a method for forming a power semiconductor with a heat sink. [Background technology]

[0004]

[0004] This section provides background information related to the present disclosure that is not necessarily prior art.

[0005]

[0005] Modern vehicle electric drive units employ inverters to control the supply of power to the windings of polyphase AC electric motors. The inverter includes many power semiconductors that are used to convert high-voltage DC power into AC power that is appropriately phased to operate the electric motor more efficiently. During operation of the vehicle electric drive unit, a significant amount of heat can be generated by the power semiconductors. From International Patent (PCT) Publication No. WO 2020 / 219955, it is known to form an inverter having heat-sink-equipped power semiconductors, where the heat sinks are soldered to the conductive (backside) terminals of the power semiconductors, and to use a cooling liquid across the inverter so that heat is dissipated from the power semiconductors to the heat sink and from the heat sink directly into a liquid coolant that flows through the inverter.

[0006] While this approach has proven satisfactory for its intended purposes, it would still be desirable to provide a heatsinked power semiconductor having a conductive (backside) terminal-to-heatsink connection that is relatively more heat tolerant than the solder connection described above, and it would also be desirable for the heatsinked power semiconductor to be formed using commercially available (i.e., "off the shelf") power semiconductors. Summary of the Invention

[0007]

[0007] This section provides a general overview of the disclosure and is not a comprehensive disclosure of its entire scope or all of its features.

[0008] In one aspect, the present disclosure provides a method for forming a power semiconductor with a heat sink, the method including providing a power semiconductor having a power semiconductor die, a plurality of pin terminals, and a plate terminal, wherein the power semiconductor die has a plurality of semiconductor terminals, each of the pin terminals being electrically coupled to a corresponding one of the semiconductor terminals, the plate terminal being electrically coupled to one of the pin terminals, the plate terminal having an outer surface covered with at least one sinter-resistant material, removing the at least one sinter-resistant material from the plate terminal to expose the outer surface, heating a heat sink to a predetermined temperature, and sintering the heat sink to the outer surface of the plate terminal.

[0009]

[0009] Further areas of applicability will become apparent from the description provided herein. The description and specific examples in this summary are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.

[0010]

[0010] The drawings described in this specification are intended to illustrate selected embodiments rather than all possible implementation forms and are not intended to limit the scope of the present disclosure. [Brief explanation of the drawings]

[0011] [Figure 1]

[0011] FIG. 1 is a rear perspective view of an exemplary heat sink-equipped power semiconductor formed in accordance with the teachings of the present disclosure. [Figure 2]

[0012] 2 is a front perspective view of a portion of the heat sink power semiconductor of FIG. 1, the view illustrating the power semiconductor without an encapsulant for clarity. [Figure 3]

[0013] 1 is a side view of a conventional commercially available power semiconductor; [Figure 4]

[0014] 1 is a side view illustrating a power semiconductor component with a heat sink before sintering the heat sink to the power semiconductor; [Figure 5]

[0015] 5 is a side view illustrating the heat sink and power semiconductor component shown in FIG. 4 while the heat sink and power semiconductor are being sintered together. DETAILED DESCRIPTION OF THE INVENTION

[0012]

[0016] Corresponding reference numerals indicate corresponding parts throughout the several views of the drawings.

[0013]

[0017] 1-2 of the drawings, a heatsinked power semiconductor constructed in accordance with the teachings of the present disclosure is generally designated by the reference numeral 10. The heatsinked power semiconductor 10 may include a power semiconductor 12 and a heatsink 14.

[0014]

[0018] The power semiconductor 12 may be any type of power semiconductor, such as a transistor. For example, the power semiconductor 12 may be an integrated-gate bipolar transistor (IGBT), but in the particular example provided, is a metal-oxide-silicon field-effect transistor (MOSFET). The power semiconductor 12 may include a semiconductor die 20, a plurality of pin terminals 22, a plate terminal 24, and an encapsulant 26. The semiconductor die 20 may have a plurality of semiconductor terminals (not specifically shown), each electrically coupled to an associated one of the pin terminals 22. In the example provided, the semiconductor die 20 has four semiconductor terminals, including a gate (not specifically shown), a source-sense (not specifically shown), a source (not specifically shown), and a drain (not specifically shown). Each of the pin terminals 22 may be formed of a conductive metal material, such as copper, and may be electrically coupled to an associated one of the semiconductor terminals. For example, each of the pin terminals 22 may be bonded to an associated one of the semiconductor terminals using a solder material, thereby electrically and physically coupling the pin terminal 22 to the associated one of the semiconductor terminals. Alternatively, one of the pin terminals 22 may be electrically coupled to the associated one of the semiconductor terminals using one or more bond wires 30. The plate terminal 24 may be electrically coupled to one of the pin terminals 22 or may be directly attached to one of the semiconductor terminals. In the example provided, pin terminal 22a is electrically coupled to the gate, pin terminal 22b is electrically coupled to the source sense, pin terminal 22c is electrically coupled to the source, and pin terminal 22d is electrically coupled to both the drain and the plate terminal 24. The plate terminal 24 is formed of a suitable conductive metal material, such as copper. The encapsulant 26 is formed of an encapsulation material disposed over the semiconductor die 20. The semiconductor die 20 and the bond wires 30 are completely encapsulated in the encapsulation material, and the pin terminals 22 are partially encapsulated in the encapsulation material. Optionally, the plate terminals 24 may be partially encapsulated in an encapsulating material.

[0015]

[0019] The heat sink 14 may include a heat sink base 40 and a plurality of fins 42 fixedly coupled to and projecting outwardly from the heat sink base 40. The heat sink base 40 may be formed of a suitable material, such as copper. The fins 42 may be shaped and spaced apart in any desired manner. In the particular example provided, each of the fins 42 has a tapered, rod-like configuration with an elliptical cross-sectional shape that is relatively large where the proximal end of the fin 42 abuts the heat sink base 40 and relatively narrows at the opposite or distal end. Furthermore, the distal ends of the fins 42 are angled to lie in a plane that is not perpendicular to the longitudinal axis of the fin 42. Thus, the fins 42 do not have a uniform height in the example provided. If desired, the heat sink 14 may be integrally and unitarily formed by any desired method, such as investment casting, cold forging, or metal injection molding (MIM). Alternatively, the heat sink base 40 and the fins 42 may be formed as separate components and assembled together such that the fins 42 are fixedly coupled to the heat sink base 40 .

[0016]

[0020] A suitable sintering material 50, such as a silver sintering material or a copper sintering material, is used to fixedly bond the heat sink 14 to the plate terminal 24. The sintering material 50 is disposed between the heat sink base 40 and the plate terminal 24.

[0017]

[0021] Referring to FIG. 3, an exemplary method for forming the heatsink-equipped power semiconductor 10 (FIG. 1) is described. The method includes providing a conventional, commercially available power semiconductor 60. The conventional, commercially available power semiconductor 60 is generally similar to the power semiconductor 12 (FIG. 1), except that at least one sinter-resistant layer is applied to or formed on the outer surface 24a of the plate terminal 24. Each sinter-resistant layer 62 is separate from the plate terminal 24 and may comprise a metal oxide, such as an oxidized form of a metal (i.e., a metal other than that forming the plate terminal 24), and / or one or more plating layers, such as tin and / or nickel plating. The conventional, commercially available power semiconductor 60 is typically electrically and / or mechanically coupled to another component via a solder connection. The sinter-resistant layer(s) 62, especially when including an overlayer of tin or nickel plating, typically do not interfere with the wetting and bonding necessary to form a solder joint.

[0018]

[0022] 3 and 4, all of the sinter-resistant layer 62, and optionally oxides on the plate terminals 24, if present, are removed from a conventional commercially available power semiconductor 60 to form the power semiconductor 12. Removal of the sinter-resistant layer(s) 62 and, if desired, oxides on the plate terminals 24 may be performed by any suitable process, such as a polishing process (e.g., grinding, sanding), exposure to a chemical solution (e.g., acid), a metal cutting process (e.g., milling), or ablation (e.g., ion beam ablation, laser beam ablation, electroablation).

[0019]

[0023] Optionally, the heat sink 14 may be subjected to a suitable process to remove oxides and / or oils from the outer surface 68 of the heat sink base 40 .

[0020]

[0024] A sintering material 50 is applied to the outer surface 68 of the heat sink base 40. The sintering material 50 may be in any desired form, such as a paste. The heat sink 14 and sintering material 50 may be heated to a first predetermined temperature for a first predetermined time to drive off volatile compounds in the sintering material 50. Optionally, the heat sink 14 and sintering material 50 may be heated in a vacuum or in an atmosphere formed of one or more inert gases.

[0021]

[0025] 4 and 5, the power semiconductor 12 is then assembled to the heated heat sink 14 such that the sintered material 50 is disposed between the outer surface 68 of the heat sink base 40 and the outer surface 24a of the plate terminal 24. A compressive force F is applied to the assembly of the power semiconductor 12, the sintered material 50, and the heat sink 14. Those skilled in the art will appreciate that the compressive force F is applied across the contact area between the outer surface 68 of the heat sink base 40, the sintered material 50, and the outer surface 24a of the plate terminal 24, and therefore can be controlled as a function of pressure (i.e., the compressive force F is equal to the applied pressure divided by the contact area). It will be appreciated that a fixture (not specifically shown) can be used to hold the power semiconductor 12 and the heat sink 14 and apply the compressive force. In one relatively simple form, the fixture includes a pair of steel plates that abut the fins 42 of the heat sink 14 and the encapsulation 26 of the power semiconductor 12, and a plurality of threaded fasteners that fasten the steel plates together. The threaded fasteners are tightened to generate a clamping force (i.e., a compressive force). It will also be appreciated that the portion of the fixture abutting the fins 42 of the heat sink 14, along with the heat sink 14 and the sintered material 50, may be heated to a predetermined first temperature. In a relatively more advanced form, a controllable device such as a servo press may be used to apply a compressive force to the two plate-like components of the fixture abutting the fins 42 and the power semiconductors 12. The controllable device may have a movable ram, and optionally, the controllable device may record the ram position and / or ram force to enable monitoring of the dimensions of the heat sink-attached power semiconductors 10 and / or the pressure applied across the interfaces (i.e., contact areas) between the heat sink 14, the sintered material 50, and the power semiconductors 12.

[0022]

[0026] In one form, residual heat from the heat sink 14 and sintered material 50, and fixtures, if used, or portions thereof, in combination with the compressive force F, is used to diffuse the sintered material 50 into the heat sink base 40 and plate terminals 24. In another form, the assembly of the power semiconductor 12, sintered material 50, and heat sink 14 is heated to a second predetermined temperature while the compressive force is maintained on the assembly to aid or accelerate the diffusion of the sintered material 50 into the heat sink base 40 and plate terminals 24. Optionally, the assembly may be disposed in a vacuum or an atmosphere formed of one or more inert gases while the sintered material 50 diffuses into the heat sink base 40 and plate terminals 24.

[0023]

[0027] Depending on the method for creating the compressive force F, the magnitude of the compressive force may change as the assembly heats up and / or as the assembly cools, but the magnitude of the compressive force F preferably remains above a predetermined threshold until the compressive force F is removed at a suitable time (i.e., after the power semiconductor 12 and the heat sink 14 have been sintered together).

[0024]

[0028] It will be understood that the first predetermined temperature and the second predetermined temperature are lower than the melting points of any of the plate terminal 24 , the heat sink 14 , and the sintered material 50 .

[0025]

[0029] The compressive force F may be maintained on the assembly for a second predetermined time period to allow the sintered material 50 to diffuse into the plate terminals 24 and the heat sink base 40, fusing the assembly together (thereby forming the heat sink-equipped power semiconductor 10 ( FIG. 1 )) as if the heat sink base 40, the sintered material 50, and the plate terminals 24 were formed as one solid part. After the second predetermined time period has elapsed, the heat sink-equipped power semiconductor 10 may be allowed to cool, after which the compressive force F may be removed from the heat sink-equipped power semiconductor 10.

[0026]

[0030] It should be noted that the maximum temperature to which the power semiconductor 12 can be exposed is limited by both the internal joints (e.g., the bond wires 30 to the semiconductor terminals and pin terminals 22) and the encapsulation material that forms the encapsulant 26. The compressive force F is also limited by the strength of the encapsulation material that forms the encapsulant 26. Both the internal joints and the encapsulation material can withstand brief exposure to temperatures above their maximum steady-state operating temperatures.

[0027]

[0031] The foregoing description of the embodiments has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the present disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, may be interchangeable and used in selected embodiments even if not specifically shown or described. The same may be modified in many ways. Such variations should not be considered a departure from the present disclosure, and all such modifications are intended to be included within the scope of the present disclosure.

Claims

1. 1. A method for forming a heat sinked power semiconductor, comprising: a power semiconductor having a power semiconductor die, a plurality of pin terminals, and a plate terminal, wherein the power semiconductor die has a plurality of semiconductor terminals, each of the pin terminals being electrically coupled to a corresponding one of the semiconductor terminals, and the plate terminal being electrically coupled to one of the pin terminals, the plate terminal having an outer surface covered with at least one sinter-resistant material; removing the at least one sinter-resistant material from the plate terminal to expose the outer surface; heating the heat sink to a predetermined temperature; sintering the heat sink onto the outer surface of the plate terminal; A method comprising:

2. The method of claim 1 , further comprising applying a sintering paste to at least one of the heat sink and the exterior surface.

3. The method of claim 2 , wherein the sinter paste is applied to the heat sink before heating the heat sink to the predetermined temperature.

4. 2. The method of claim 1, wherein sintering the heat sink to the outer surface of the plate terminal comprises applying a compressive force between the plate terminal of the power semiconductor and the heat sink.

5. 5. The method of claim 4, wherein a fixture having a first fixture component is used to apply the compressive force to the plate terminal of the power semiconductor and the heat sink, and the heat sink is attached to the first fixture component before the heat sink is heated to the predetermined temperature.

6. The method of claim 4 , wherein the compressive force is maintained for a predetermined time.

7. The method of claim 4 , wherein the compressive force is maintained until the heat sink has a temperature below a predetermined temperature threshold.

8. The method of claim 1 , wherein removing the at least one sinter-resistant material from the plate terminal comprises processing the power semiconductor with a polishing process.

9. The method of claim 8 , wherein the polishing step comprises at least one of grinding and sanding.

10. The method of claim 1 , wherein removing the at least one sinter-resistant material from the plate terminal comprises exposing the plate terminal to a chemical solution.

11. The method of claim 10 , wherein the chemical solution is an acid.

12. 10. The method of claim 1, wherein removing the at least one sinter-resistant material from the plate terminal comprises processing the power semiconductor with a metal cutting process.

13. The method of claim 1 , wherein removing the at least one sinter-resistant material from the plate terminal comprises ablating the plate terminal.

14. The method of claim 1 , wherein the sinter-resistant material comprises at least one of silver and copper.

15. 2. The method of claim 1, wherein sintering the heat sink to the outer surface of the plate terminal comprises applying a force to the heat sink and the power semiconductor that drives an outer surface of a heat sink base of the heat sink toward the outer surface of the plate terminal.

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