Engineered Materials for Electronics Assemblies
A multilayer solder material with a high thermal conductivity core layer addresses thermal expansion mismatch issues, enhancing the reliability and performance of electronic devices by reducing stress and maintaining heat dissipation.
Patent Information
- Application Number
- JP2023560315
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-04-21
- Filing Date
- 2022-04-14
- Publication Date
- 2026-01-07
- Estimated Expiration
- 2042-04-14
AI Technical Summary
Existing solder materials for electronic assemblies face challenges in maintaining normal operating temperatures and efficient heat dissipation due to thermal expansion mismatch between components, leading to increased shear stress and reduced reliability.
A multilayer solder material comprising a core layer with higher thermal conductivity than the solder, sandwiched between solder layers, which reduces stress caused by thermal expansion mismatch while maintaining heat dissipation.
The multilayer solder material effectively reduces stress and maintains high thermal conductivity, improving the performance and reliability of electronic devices under high temperatures.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to solder materials for use in electronic assemblies.
[0002] IGBTs, MOSFETs, high-power LEDs, high-power microprocessors, and normal operation Packaging of high power electronic devices, such as other large area devices that generate large amounts of heat inside There are two main challenges associated with the assembly. The first is to maintain normal operating temperatures. The second challenge is how to ensure efficient dissipation of the heat generated to maintain the solder. or other adhesive material. This is a method to reduce shear stress due to mismatch of thermal expansion (CTE).
[0003] FIG. 1 shows a typical circuit diagram including a device 2 connected to a substrate 4 via interconnects 3 (Level I). The assembly of a typical electronic device 1 is shown. The substrate 4 has interconnects 5 (Level II ) and is connected to a printed circuit board (PCB) 6. CB6 is connected to heat sink 8 via interconnect 7 (Level III). The most important interconnects for the output electronic devices are the device / die to the substrate and the substrate to the plate. The PCB is connected to a heat sink by an interconnect (i.e., (i.e., 3, 5, and 7 in Figure 1). Such interconnects are in the path of heat dissipation. Therefore, it is desirable for the interconnect material to have high thermal conductivity. Semiconductor die, substrate, and PCB materials , have different CTEs, which causes stresses at the interface during high temperature operation. To minimize this, designers typically increase the interface thickness of the interconnects. This increases the heat resistance of the interface.
[0004] Solder is one of the most common interconnect materials used in the electronics industry. However, the thermal conductivity of the material is less than 65 W / mK. It would be advantageous to be able to use interconnect materials that have a thicker solder interconnect. The problem is that during the reflow process, when the solder is in its liquid phase, the die or substrate The goal is to float the material on top of the liquid before it is cooled to a temperature below freezing. This results in die / substrate movement in all directions (so-called "tilt"), which This is a concern for device performance and reliability. This is the issue.
[0005] The present invention aims to address at least some of the problems associated with the prior art, or at least , and seeks to provide a commercially acceptable alternative thereto.
[0006] In a first aspect, the present invention provides a solder material for use in an electronic assembly, comprising: The materials used are a solder layer; a core layer including a core material, the core layer being sandwiched between the solder layers; The thermal conductivity of the core material is greater than the thermal conductivity of the solder.
[0007] Each aspect or embodiment defined herein may be used interchangeably with any other aspect or embodiment unless expressly indicated otherwise. Any aspect or embodiment indicated as being particularly preferred or advantageous may be combined with any other aspect or embodiment. Any feature indicated may be combined with any other feature or features indicated as preferred or advantageous. good.
[0008] The inventors have surprisingly found that a high temperature conductive material can be used to connect components of electronic devices that operate at high temperatures. When used for soldering, such solder materials have the potential to compensate for mismatches in the CTE values of the connected components. We discovered that it is possible to reduce the stress caused by the collision. Although not intended to be a concrete structure, the presence of the core material "thickens" the joint between the connected components, It is believed that this acts to reduce stress. Advantageously, such stress This reduction can be provided without significantly reducing heat dissipation from the connected components. Without being bound by theory, this is because the thermal conductivity of the core material is greater than that of the solder. In other words, the thermal conductivity is higher than that of solder. By using a core material with As a result, it is possible to reduce thermal stress in IGBTs, MOSFETs, and high-power High power electronic devices such as LEDs, high power microprocessors, or other large area devices The device generates a lot of heat during normal operation and its components are connected using solder materials. Such performance and reliability may be improved at high temperatures. and / or during on / off switching.
[0009] Joints or interconnections formed using solder materials include SnCu, SAC, SnA Better thermomechanical properties compared to typical Pb-free solders such as SnBi and SnO It can be reliable.
[0010] As used herein, the term "electronic assembly" refers to, for example, electronic packages and devices. This includes assembly with devices, such as attaching a device or die to a substrate, This includes mounting a substrate to a printed circuit board or mounting a printed circuit board to a heat sink. obtain.
[0011] As used herein, the term "solder" refers to a material having a melting point in the range of 90 to 400°C. It includes any fusible metal or metal alloy.
[0012] The solder material includes a solder layer and a core layer. The solder material is made of the solder layer and the core layer. "Consisting essentially of" means that the solder material is Other non-specified components may be included as long as they do not materially affect the properties of the solder material. This means:
[0013] The solder material typically includes two solder layers, but may include three or more solder layers. The solder layers may be formed of the same solder or different solders. The same solder, or at least have a similar reflow temperature, i.e., only 20°C lower. , typically by no more than 10°C, more typically by no more than 5°C. It is formed by
[0014] The solder and core are in the form of layers. Such layers are typically formed on two opposing surfaces. It will be in the form of a sheet where one side (major surface) has a significantly larger surface area than the other surfaces. The layers may be the same size and shape, or may be different sizes and / or shapes. The core layer may have a similar size and shape to one or more of the solder layers. The electrodes may be the same or have different sizes and / or shapes.
[0015] The core layer comprises a core material. The core layer can consist essentially of the core material, or It may consist of:
[0016] The core layer is sandwiched between the solder layers. Typically, the solder layers are at least 1 / 2" thick. Substantially the entirety of two opposing surfaces, typically the major (i.e., largest surface area) surfaces. The core layer is completely encapsulated in the solder so that the core material is not exposed. In this state, the first solder sheet may be considered to cover the major surface of the sheet. A second solder layer covers the opposing major surface of the sheet, and the two solder layers are "vertical" to the major surfaces. The core layer then "drops" and covers the remaining surface of the core layer. Alternatively, the core layer may cover only a portion of the surface. Typically only two opposing surfaces, more typically the main surfaces, are covered by a solder layer. It can be covered.
[0017] The solder layer is typically in direct contact with the core layer. It is a layer.
[0018] The thermal conductivity of the core material is greater than that of the solder. Conductivity was measured using the nano-flash transient measurement technique. It is measured by
[0019] The core material preferably has a thermal conductivity of 65 W / mK or more, preferably above 65 w / mK, more preferably or more preferably has a thermal conductivity of greater than 70 W / mK, and even more preferably greater than 75 W / mK. The thermal conductivity of the thermal material may be less than 600 W / mK. This can be measured by flash transient measurement techniques. Since solder has a thermal conductivity of less than 65 w / mK, the presence of a core material with high thermal conductivity is required. increases the overall thermal conductivity of the solder material.
[0020] The melting point of the core material is preferably higher than the reflow temperature of the solder. is at least 50°C higher than the solder reflow temperature, typically at least 75°C higher. The melting temperature may be at least 100°C higher than the reflow temperature. The term "solder" is used herein to refer to the process by which a solid mass of solder is reliably melted (as opposed to simply softened). It is used to refer to the temperature above which solder melts. Below this temperature, solder will not flow. If you heat it above that temperature again, the solder will flow again, i.e., "reflow." By having a core material that has a melting temperature higher than the reflow temperature of the solder, This allows the joint / package to be easily and efficiently mounted without a substantial increase in die / package movement and / or tilt. The thickness of the interconnect may increase because when the solder is in a liquid state, the liquid This results from the die / package floating above the solder, which is connected using solder material. The performance or reliability of electronic devices having the components may be improved.
[0021] The thickness of the core layer is preferably 100 to 500 μm, more preferably 200 to 400 μm. More preferably, the thickness is 150 to 300 μm. The response caused by the mismatch in CTE of the components is reduced without excessively increasing the noise. It may be particularly suitable for reducing forces. Increasing the thickness may increase heat resistance. A thicker thickness may result in higher resistance but lower lateral stress.
[0022] The thickness of each solder layer is preferably 25 to 150 μm, more preferably 50 to 100 μm. , more preferably more than 50 to 99 μm, even more preferably 55 to 95 μm, and even more preferably In a preferred embodiment, the thickness of each solder layer is greater than 50 μm to 1 In another preferred embodiment, the thickness of each solder layer is 55 μm to 150 μm. Such a thickness can be achieved without significantly reducing the overall thermal conductivity of the solder material, and provides adequate adhesion between components without excessively increasing the size of the device. The thinner the thickness, the higher the lateral force during high temperature operation of the temperature cycle. This can result in stresses of up to 100 MPa.
[0023] The thickness of the core and solder layer can be adjusted as desired by the package design and the interconnect. The thickness may be selected to achieve the desired thickness of the portion.
[0024] The core material preferably comprises (or consists of or essentially of) a metal and / or alloy. Metals and metal alloys are used in components joined by soldering materials. It may provide sufficient conductivity to provide a high level of electrical connection therebetween.
[0025] The core material is preferably copper, silver, nickel, molybdenum, beryllium, cobalt, iron , copper-tungsten alloy, nickel-silver alloy, copper-zinc alloy, and copper-nickel-zinc alloy more preferably comprising (or consisting of) one or more of gold, and more preferably one or more of copper and silver; Such materials have a favorable combination of high electrical conductivity and high thermal conductivity. A combination may be provided.
[0026] The CTE of the core material affects the stress at the interface. This stress is determined by the appropriate core material. For example, the CTE of nickel is 13 ppm. / K, the CTE of copper is 17 ppm / K, and the CTE of CuW alloys depends on the composition: It can be tailored to meet the needs of the device design.
[0027] The core material preferably has a viscosity of at least 1 x 10 at 20°C. 5 S / m, preferably less At most 1 x 10 6 S / m, more preferably at least 1×10 7 S / m, even more preferred Usually at least 4x10 7 S / m, and even more preferably at least 5x10 7 S / m guide Such conductivity provides a high electrical conductivity between components joined by the soldering material. The electrical connection may be provided at the same level.
[0028] The solder is preferably lead-free, meaning that no lead is intentionally added. Therefore, the lead content is zero or below the incidental impurity level. A non-containing solder may be preferable in view of health concerns and regulatory requirements.
[0029] The solder is preferably an In or SnIn alloy (e.g., 5 to 58% Sn, 42 to 95% In), SnBi alloys (e.g., 42-60% Sn, 40-58% Bi), BiIn alloys (e.g., 5-67% Bi, 33-95% In), AgIn alloy (e.g., 1-5% A g, 95-99% In, e.g., 3% Ag, 97% In), SnAg alloy (e.g., 90 ~97.5%Sn, 2.5~10%Ag), SnCu alloys (e.g., 99.3~99.6 %Sn, 0.4-0.7%Cu), InGa alloys (e.g., 99.3-99.5%In, 0.5-0.7% Ga), SnBiAgCu alloy (e.g., 50% Sn, 47% Bi, 1 %Ag, 2%Cu), SnBiZn alloy (e.g., 65.5%Sn, 31.5%Bi, 3 %Zn), SnInAg alloy (e.g., 77.2%Sn, 20%In, 2.8%Ag), SnBiAgCuIn alloy (e.g., 82.3% Sn, 2.2% Bi, 3% Ag, 0.5 %Cu, 12%In), SnZn alloys (e.g., 91%Sn, 9%Zn), SnCuIn Ga alloy (e.g., 92.8% Sn, 0.7% Cu, 6% In, 0.5% Ga), SnC SnAg alloy (e.g., 95.5% Sn, 3.8% Ag, 0.7% Cu), SnAgSb alloy Gold (e.g., 95% Sn, 3.5% Ag, 1.5% Sb), SnSb alloy (e.g., 95 %Sn, 5%Sb), Innolot alloy (Sn-Ag3.7Cu0.65Bi3.0S b1.43Ni0.15), and SnCuSb alloys (e.g., 4-95% Sn, 1-2% The alloy contains one or more of the following: Cu, 4% Sb. The percentage values refer to weight percent. The alloy may contain any undesired Such alloys may contain the listed elements along with other impurities. It may be particularly suitable for connecting elements.
[0030] In a preferred example, the core material comprises copper and the solder comprises a Sn-20In-2Ag alloy.
[0031] In a preferred embodiment, the thickness of the core layer is 150 to 300 μm, and the thickness of each solder layer is The thickness is greater than 50 to 100 μm, and the core material includes one or more of copper and silver. In such an embodiment, the thickness of each solder layer is preferably 55 to 100 μm. Such solder materials are particularly suited to providing a high degree of thermal conductivity without significantly reducing the heat dissipation from the connected components. It is possible to reduce the stress caused by the mismatch in CTE values of the components. could be.
[0032] The core layer preferably comprises two or more core layers separated by one or more further solder layers. two or more core sublayers are formed from a core material, and the core material of one sublayer is The core material of the different sublayers has a different coefficient of thermal expansion. This means that the thermal expansion coefficient is different on one side than on the other side. This can result in solder materials with different thermal expansion coefficients. This can be useful when connecting components that have different thermal expansion coefficients at high temperatures. In such cases, the components with higher thermal expansion coefficients may be more The solder material may be connected to a side of the solder material having a core sublayer with a higher coefficient of thermal expansion than the The component with the lower coefficient of thermal expansion is soldered with a core sublayer having a lower coefficient of thermal expansion. The material may be connected to the side of the material.
[0033] The further solder layer includes a solder material. The solder material of the further solder layer is Alternatively, the solder material of the further solder layer may be the same as that of the solder layer. It may be different from the solder material.
[0034] The core material of one core sublayer is preferably different from the core material of another core sublayer.
[0035] The solder material preferably comprises two sublayers. In a preferred embodiment of such a configuration: The core material of one core sublayer preferably comprises copper, and the core material of the other core sublayer preferably comprises copper. Preferably, it comprises nickel. Such metals have a favorable coefficient of thermal expansion across their thickness. This can result in a solder material that exhibits a large change in temperature.
[0036] The solder material preferably comprises three sublayers. In such a case, the core sublayer is preferably The thermal expansion coefficient of the core material of the layer is In a preferred embodiment of such an arrangement, the three sublayers are a layer and two outer sublayers, the core material of one core sublayer comprising copper, and the core material of another core sublayer comprising copper. The core material includes nickel, and the core material of another core sublayer includes a copper-tungsten alloy. In another preferred embodiment, the core material of one core sublayer comprises silver and the core material of another core sublayer comprises silver. The core material includes nickel, and the core material of the other core sublayer includes molybdenum. Suitable metals result in solder materials that exhibit a favorable change in coefficient of thermal expansion across their thickness. It is possible.
[0037] The core sublayers may have different thicknesses, or the core sublayers may have the same thickness. The core sublayer preferably has a thickness of 10 to 80 μm, more preferably 20 to 60 μm, and even more preferably The thickness is usually 25 to 50 μm.
[0038] The further solder layer may have the same thickness as the above-mentioned solder layer or may be thinner than the above-mentioned solder layer. may have a thickness different from that of the
[0039] In a preferred embodiment, The solder material is not in the form of a rectangular parallelepiped having a length, width, and thickness, the thickness being the thickness of the core layer. perpendicular to the plane, the length is 10 mm, and the width is 10 mm; and / or the thickness of the core layer is not 0.2 mm, 0.3 mm, or 0.4 mm; and / or the solder layers each do not have a thickness of 0.05 or 0.1 mm; and / or The solder material does not contain Sn20%In2%Ag, and / or The core material does not contain copper.
[0040] In a more preferred embodiment, The solder material is not in the form of a rectangular parallelepiped having a length, width, and thickness, the thickness being the thickness of the core layer. perpendicular to the plane, the length is 10 mm, and the width is 10 mm; The thickness of the core layer is not 0.2 mm, 0.3 mm, or 0.4 mm, the solder layers each have a thickness of not 0.05 or 0.1 mm; The solder material does not contain Sn20%In2%Ag, and The core material does not contain copper.
[0041] The solder material is preferably in the form of a foil, strip, film, ribbon, or preform; More preferably, it is in the form of a preform. Such a form may be a component of an electronic device. and / or may exhibit favorable handling properties. .
[0042] In a preferred embodiment, the core is completely coated with solder. For example, the core is completely surrounded by solder and no part of the core is exposed. Some of the material is not exposed to air or other operating environments. This design allows for the use of, for example, Cu or Ni is preferred for core materials that tend to oxidize when exposed to oxygen and / or humidity, such as There may be some cases where this is necessary.
[0043] In an alternative preferred embodiment, the core has only two large opposing surfaces, typically two The two largest opposing surfaces (major surfaces) are coated with solder. Sheets or ribbons of various sizes can be coated with solder and preformed from them. The frames can be cut in a high speed stamping process, making them relatively easy to mass produce. obtain.
[0044] The solder material preferably has a thermal conductivity of more than 65 W / mK, more preferably more than 80 W / mK, and even more preferably More preferably, the effective heat is greater than 100 W / mK, even more preferably greater than 130 W / mK. "Effective thermal conductivity" means the total thermal conductivity of the solder material, i.e. That is, both the solder (which has a lower thermal conductivity) and the core (which has a higher thermal conductivity) Such effective thermal conductivity can improve heat dissipation from the solder material.
[0045] A first aspect of the present invention relates to a solder material. The term "solder material" refers to a "multilayer structure." Furthermore, the term "solder layer" can be used interchangeably with the term "two or more solder layers." Further, for the avoidance of doubt, solder layer is defined as a layer that contains solder material. The solder layer is typically the outer layer.
[0046] Accordingly, a first aspect of the present invention is to provide a multilayer laminate for use in an electronic assembly. The multilayer material is called Two or more (e.g., outer) solder layers, each solder layer comprising a solder material, and a core layer including a core material, the core layer being sandwiched between two or more solder layers; Including, The thermal conductivity of the core material is greater than the thermal conductivity of the solder material.
[0047] In a further aspect, the present invention provides a multi-layer structure for use in an electronic assembly, the multi-layer The structure is Two outer solder layers, each of which comprises a solder material. and a core layer sandwiched between two outer solder layers; the core layer includes two outer core sublayers and optionally one or more central core sublayers; The two core sublayers, and the central core layer, if present, are interconnected by one or more solder layers. They are separated into the outer core sub-layer and the inner core sub-layer comprise a core material; The core material of one outer core sublayer has a different thermal expansion coefficient than the core material of the other outer core sublayer. having a number, The thermal conductivity of the core material is greater than the thermal conductivity of the solder material.
[0048] The advantages and preferred features of the first aspect apply equally to this aspect.
[0049] The core preferably includes at least one central core sublayer and outer and inner core sublayers. The coefficient of thermal expansion of the core material increases across the thickness of the core. As mentioned above, this can be beneficial when connecting components with different thermal expansion coefficients, It may reduce stress caused by different thermal expansion coefficients at high temperatures.
[0050] In a further aspect, the present invention relates to a solder material as described herein or a multilayer structure as described herein. For the avoidance of doubt, the advantages and preferred aspects of the first aspect are as follows: The features apply equally to this aspect. Such joints are This may exhibit a favorable combination of low stress caused by E mismatch and high heat dissipation. Therefore, electronic devices containing such junctions have the following advantages over conventional electronic devices: The thickness of the solder joint can be determined by the thickness of the core layer and the solder layer. Typically, the thickness does not change during reflow.
[0051] In a further aspect, the present invention relates to a solder material as described herein or a multilayer structure as described herein. For the avoidance of doubt, the advantages and preferred features of the first aspect are as follows: The characteristics apply equally to this embodiment. Such interconnects are It may exhibit a favorable combination of low stress caused by TE mismatch and high heat dissipation. Therefore, electronic devices containing such interconnects are not as readily adaptable as conventional electronic devices. may exhibit improved performance and reliability compared to
[0052] In a further aspect, the present invention provides the solder materials, multilayer structures, solder joints, or an electronic device comprising the interconnect. The preferred features and advantages apply equally to this aspect. Compared to electronic devices, they may exhibit improved performance and reliability.
[0053] In a further aspect, the present invention provides a solder material, or multi-layer structure, solder joint, as described herein. IGBT, MOSFET, LED, or microprocessor, including the part or interconnect For the avoidance of doubt, the advantages and preferred features of the first aspect are the same as those of this aspect. Such electronic devices are well suited for application. It can demonstrate superior performance and reliability.
[0054] In a further aspect, the present invention relates to a surface mount technology (SMT) solder. soldering, die attach soldering, thermal interface soldering, hand soldering, laser and RF In a soldering method selected from induction soldering and thermosonic soldering The present invention provides the use of the solder material described herein or the multilayer structure described herein in a method for manufacturing a semiconductor device. To avoid this, the advantages and preferred features of the first aspect apply equally to this aspect. The solder materials and multilayer structures described herein are particularly well suited for such applications.
[0055] In a further aspect, the present invention provides a die attach (Level I), substrate attach (Level II) or package-to-heat sink attachment (Level III), For the avoidance of doubt, the present invention provides the use of the solder material or multi-layer structure described herein. The advantages and preferred features of the first aspect apply equally to this aspect. Solder materials and multi-layer structures are particularly suitable for such applications.
[0056] In a further aspect, the present invention provides a method of forming a solder joint, the method comprising: a solder material as described herein or a solder material as described herein adjacent two or more workpieces to be joined; and providing a multi-layer structure of and heating the solder material to form a soldered joint.
[0057] For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect. The resulting joint is free from the low temperature caused by the CTE mismatch of the joined components. Such a joint can exhibit a favorable combination of stress and high heat dissipation. Electronic devices containing the compound exhibit improved performance and reliability compared to conventional electronic devices. It can be shown.
[0058] The two or more workpieces to be joined are preferably a device or die and a substrate, or PCBs and printed circuit boards (PCBs), or a printed circuit board and a heat sink.
[0059] Such workpieces are particularly suitable for joining by solder materials. They are required to have high heat dissipation and they exhibit low stress resulting from CTE mismatch. This is because it is beneficial to do so.
[0060] In a further aspect, the present invention relates to a solder material as described herein or a multilayer structure as described herein. A method for manufacturing a structure, comprising: providing two or more layers of solder; providing a layer of core material; and laminating a layer of solder on either side of the layer of core material. do.
[0061] For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect. Depending on the solder and core materials and processing conditions, the thickness of the structure after lamination is reduced. To achieve the target size, the reduction factor must be taken into account.
[0062] The layer of core material is preferably in the form of a ribbon and / or the layer of solder is preferably in the form of a ribbon. It's in the form.
[0063] The ribbon is preferably provided by casting, extrusion or drawing.
[0064] The layers are preferably laminated in a co-stretching process, preferably a high pressure co-stretching process.
[0065] The stacked layers are preferably diced and / or punched.
[0066] In a further aspect, the present invention relates to a solder material as described herein or a multilayer structure as described herein. A method for manufacturing a structure, comprising: providing a layer of core material; and coating the core material with solder.
[0067] The surface of the layer of core material is preferably cleaned before being coated with solder. This strengthens the bond between the core and the solder, thereby reducing the occurrence of delamination. The loss of reliability of devices containing joints formed using solder materials is reduced. obtain.
[0068] Coating the core material with solder is preferably done by, for example, melting the core material. This involves contacting the core material with a molten solder bath by immersion in the solder bath.
[0069] Various process parameters such as solder bath temperature, ribbon speed through the solder bath, etc. It can be varied to control the thickness of the solder coating. [Brief explanation of the drawings]
[0070] The invention will now be described with reference to the following non-limiting drawings. [Figure 1] 1 shows a schematic diagram of the assembly of a typical electronic device. [Figure 2] 1 shows a cross-sectional schematic view of an alternative arrangement of solder material according to the present invention; [Figure 3] 1 shows a cross-sectional schematic view of a solder material according to the present invention; [Figure 4] 1 shows a cross-sectional schematic view of a solder material according to the present invention; [Figure 5] 1 shows a microscope image of a cross section of a solder material according to the present invention.
[0071] FIG. 2 shows cross-sectional views of two types of solder materials according to the present invention. The solder material shown in the top picture includes a core layer 9 sandwiched between two solder layers 10. It has solder only on the bottom side. There is no solder on the sides. The other solder material is on the entire core. All sides have solder.
[0072] 3 and 4 show cross-sectional views of two solder materials according to the present invention. In this material, the core layer 9 comprises two core sublayers 11 separated by a further solder layer 12. The two core layers 11 are made of core material. The core material of the top sublayer is the same as that of the bottom sublayer. In a preferred embodiment, the core material of the upper core sublayer has a different coefficient of thermal expansion than the core material of the upper core sublayer. The base material is nickel, and the core material of the bottom core sublayer is nickel. TE decreases from top to bottom. In the solder material of FIG. 4, the core layer 9 is The three core layers 11 are formed of a core material. The core material of the top sublayer has a different thermal expansion coefficient than the core materials of the middle and bottom sublayers. The coefficient of thermal expansion of the core material of the core sublayer increases through the thickness of the solder material. In a preferred embodiment, the core material of the upper core sublayer is molybdenum. The core material of the middle core sublayer is nickel, and the core material of the bottom core sublayer is silver. As a result, the CTE decreases from top to bottom. The core material of the layer is a copper-tungsten alloy, and the core material of the intermediate core sublayer is nickel. The core material of the bottom core sublayer is copper. As a result, the CTE increases from top to bottom. do.
[0073] The invention will now be discussed with reference to the following non-limiting examples.
[0074] Example 1 The solder material (preform) was prepared by a high-pressure lamination process. The central core is 300 μm thick and made of copper. The solder on both sides is Sn20%In2%Ag. The solder thickness is 50-10 The effective thermal conductivity of this sample was measured by the nano-flash transient measurement technique. The estimated value is approximately 130 W / mK.
[0075] Example 2 Several preforms were prepared in the same manner as in Example 1, but the core (Keff=4 The thickness of the solder layer (Keff=54W / mK) and the temperature (Keff=500W / mK) are changed. The thermal performance of the renovation was evaluated. Table 1 shows the estimated thermal resistance and equivalent thermal conductivity. Compared to solder alone, the thermal resistance of the thick interface is much lower (equivalent Keff is much higher) ).
[0076] [Table 1] Table 2: Selected examples of Cu-core preforms, their estimated heat resistance and equivalent thermal conductivity .
[0077] The invention is now further described by the following numbered clauses: 1. A solder material comprising: a core comprising a core material; a solder at least partially coating the core; , including solder materials.
[0078] 2. A solder material as defined in clause 1 for use in an electronic assembly.
[0079] 3. A solder material according to clause 1 or clause 2, wherein the core is in the form of a layer.
[0080] 4. The thickness of the core layer is 100 to 500 μm, preferably 200 to 400 μm, more preferably or 150 to 300 μm.
[0081] 5. Clause 3, in which the solder is in the form of layers and the core is sandwiched between two solder layers. or a solder material as described in clause 4.
[0082] 6. The thickness of the solder layer is 25 to 150 μm, preferably 50 to 100 μm. 7. The solder material according to claim 6.
[0083] 7. Any of the preceding clauses in the form of foil, strip, film, ribbon, or preform. The solder material according to any one of claims 1 to 10.
[0084] 8. Any of the preceding clauses where the melting point of the core material is higher than the reflow temperature of the solder. The solder material described.
[0085] 9. Any of the preceding clauses, in which the thermal conductivity of the core material is greater than the thermal conductivity of the solder. 1. A solder material according to claim 1.
[0086] 10. The core material has a thermal conductivity of 65 W / mK or more, preferably greater than 65 W / mK, more preferably Clause 9 has a thermal conductivity of more than 70 W / mK, even more preferably more than 75 W / mK. 1. A solder material according to claim 1.
[0087] 11. The solder according to any one of the preceding clauses, wherein the core material comprises a metal and / or an alloy. It's made of...
[0088] 12. Core materials include copper, silver, nickel, molybdenum, beryllium, cobalt, iron, and copper- Tungsten alloys, nickel-silver alloys, copper-zinc alloys, and copper-nickel-zinc alloys 10. The solder material of claim 9, further comprising one or more of the following:
[0089] 13. A soldering material according to any one of the preceding clauses, wherein the solder does not contain lead.
[0090] 14. Solder is In, SnIn alloy (e.g., 5-58% Sn, 42-95% In) , SnBi alloys (e.g., 42-60% Sn, 40-58% Bi), BiIn alloys (e.g., For example, 5-67% Bi, 33-95% In), AgIn alloys (for example, 3% Ag, 97% I n), SnAg alloy (e.g., 90-97.5% Sn, 2.5-10% Ag), SnCu alloys (e.g., 99.3-99.6% Sn, 0.4-0.7% Cu), InGa alloys (e.g., For example, 99.3-99.5% In, 0.5-0.7% Ga), SnBiAgCu alloys (e.g. For example, 50% Sn, 47% Bi, 1% Ag, 2% Cu), SnBiZn alloy (for example, 6 5.5%Sn, 31.5%Bi, 3%Zn), SnInAg alloys (e.g., 77.2%S n, 20% In, 2.8% Ag), SnBiAgCuIn alloys (e.g., 82.3% Sn , 2.2%Bi, 3%Ag, 0.5%Cu, 12%In), SnZn alloy (e.g., 91 %Sn, 9%Zn), SnCuInGa alloys (e.g., 92.8%Sn, 0.7%Cu, 6% In, 0.5% Ga), SnCuAg alloy (e.g., 95.5% Sn, 3.8% Ag , 0.7%Cu), SnAgSb alloys (e.g., 95%Sn, 3.5%Ag, 1.5%S b), and SnCuSb alloys (e.g., 4-95% Sn, 1-2% Cu, 4% Sb) 10. The solder material of claim 9, further comprising one or more of the following:
[0091] 15. The preceding condition, wherein the core material includes copper and the solder includes a Sn-20In-2Ag alloy. The solder material according to any one of the items.
[0092] 16. The core and solder are in the form of layers, with the solder layers coated on either side of the core layer. 10. The solder material of claim 9, wherein the solder material is coated with a conductive material.
[0093] 17. The thickness of the core layer is 100 to 500 μm, preferably 200 to 400 μm, more preferably 17. The solder material according to claim 16, preferably having a thickness of 150 to 300 μm.
[0094] 18. The thickness of the solder layer is 25 to 150 μm, preferably 50 to 100 μm. A solder material according to clause 16 or 17.
[0095] 19. The core is completely coated with solder, as described in any of the preceding clauses. The solder material listed.
[0096] More than 20.65 W / mK, preferably more than 80 W / mK, more preferably more than 100 W / m 1. The method of claim 1, further comprising the step of: The solder material according to any one of claims 1 to 5.
[0097] 21. Surface Mount Technology (SMT) soldering, die attach soldering, thermal interface soldering soldering, hand soldering, laser and RF induction soldering, and thermosonic soldering Use of the solder material according to any one of the preceding clauses in a soldering method selected from For.
[0098] 22. Die Attach (Level I), Substrate Attach (Level II) or Package to H For installation in a water sink (Level III), as described in any one of clauses 1 to 20 Use of solder materials.
[0099] 23. An interconnection comprising the solder material of any one of clauses 1-20.
[0100] 24. The solder material according to any one of clauses 1 to 20 or the interconnection according to clause 23. including connections to IGBTs, MOSFETs, LEDs, or microprocessors.
[0101] 25. A method of forming a solder joint, comprising: a solder material according to any one of clauses 1 to 20 adjacent to two or more workpieces to be joined; and and heating the solder material to form a soldered joint.
[0102] 26. A method for producing a solder material according to any one of clauses 1 to 20, comprising: providing two or more layers of solder; providing a layer of core material; and laminating a layer of solder on either side of the layer of core material.
[0103] 27. The layer of core material is preferably in the form of a ribbon and / or the layer of solder is 26. The method according to clause 26, in the form of a bong.
[0104] 28. The method of clause 27, wherein the ribbon is provided by casting, extrusion, or drawing.
[0105] 29. Clause 26, wherein the layers are laminated by a co-stretching process, preferably a high pressure co-stretching process. 29. The method of any one of claims 1 to 28.
[0106] 30. Any of clauses 26 to 29, wherein the laminated layers are diced and / or punched. The method according to any one of claims 1 to 5.
[0107] 31. A method for producing a solder material according to any one of clauses 1 to 20, comprising: providing a layer of core material; and coating the core material with solder.
[0108] 32. The surface of the layer of core material is cleaned before being coated with solder. Clause 31 The method described below.
[0109] 33. Coating the core material with solder involves passing the core material through a bath of molten solder. 34. The method of claim 31 or 33, comprising:
[0110] 34. A solder material according to any one of clauses 1 to 20 in the form of a preform.
[0111] 35. The preform is designed to reduce stress at the interface between the adjacent material and the solder. 35. The solder material of claim 34, wherein the solder material provides a CTE that increases from top to bottom.
[0112] 36. The preform is designed to reduce stress at the interface between the adjacent material and the solder. , a solder material as described in clause 34, which provides a CTE that decreases from top to bottom.
[0113] 37. The preform is used for Level I, Level II, or Level III interconnects 37. The solder material according to any one of clauses 34 to 36,
[0114] 38. Preforms are used for IGBTs, MOSFETs, LEDs, microprocessors, and Can be used for packaging and assembly of other electronic devices, Clause 34 37. A solder material according to any one of claims 1 to 37.
[0115] 39. The preform may be used to form components of different sizes and components with different heat release rates. The method of claim 34 to 38 can be used in the assembly of a multi-chip module having The solder material according to any one of claims 1 to 5.
[0116] 40. The preform is used to assemble a multi-chip module having components of different thicknesses. The thickness of the preform can be adjusted to the thickness of the component. 40. The solder material according to any one of clauses 34 to 39, selected so as to
[0117] The foregoing detailed description has been provided by way of illustration and description and is intended to provide a comprehensive understanding of the present invention as defined by the appended claims. It is not intended to limit the scope of the ranges. Many variations of the embodiments will be apparent to those skilled in the art and are within the scope of the appended claims and their equivalents. stay within the scope of the equivalent of
Claims
1. 1. A solder material for use in an electronic assembly, comprising: a solder layer; a core layer including a core material, the core layer being sandwiched between the solder layers; the thermal conductivity of the core material is greater than the thermal conductivity of the solder; the core layer includes two or more core sublayers separated by one or more additional solder layers, the two or more core sublayers being formed from the core material, the core material of one of the core sublayers having a different coefficient of thermal expansion than the core material of another of the core sublayers; The solder material, wherein each of the solder layers has a thickness of 25 to 150 μm.
2. The solder material of claim 1, wherein the thickness of each solder layer is greater than 50 to 99 μm.
3. A solder material as described in claim 1, wherein the thickness of each solder layer is 55 μm to 95 μm.
4. A solder material as described in claim 1, wherein the thickness of each solder layer is 60 μm to 90 μm.
5. 2. The solder material of claim 1, wherein the solder comprises one or both of a SnSb alloy or Sn—Ag3.7Cu0.65Bi3.0Sb1.43Ni0.
15.
6. A solder material as described in claim 5, wherein the SnSb alloy is 95% Sn 5% Sb.
7. The solder material of claim 1 , wherein the core material of one core sublayer is different from the core material of another core sublayer.
8. The solder material of claim 1 comprising two core sublayers.
9. A solder material as described in claim 8, wherein the core material of one core sublayer comprises copper and the core material of the other core sublayer comprises nickel.
10. The solder material of claim 1 comprising three core sublayers.
11. The solder material of claim 1 , wherein the coefficient of thermal expansion of the core material of the core sublayer increases through the thickness of the solder material.
12. comprising three core sublayers; 2. The solder material of claim 1, wherein the three core sublayers include an inner sublayer and two outer sublayers, the core material of one core sublayer includes copper, the core material of another core sublayer includes nickel, and the core material of yet another core sublayer includes a copper-tungsten alloy.
13. comprising three core sublayers; The solder material of claim 1 , wherein the core material of one core sublayer comprises silver, the core material of another core sublayer comprises nickel, and the core material of yet another core sublayer comprises molybdenum.
14. the solder material is not in the form of a rectangular parallelepiped having a length, a width, and a thickness, the thickness being perpendicular to the plane of the core layer, the length being 10 mm, and the width being 10 mm; and / or the solder layers do not have a thickness of 0.05 mm or 0.1 mm, respectively; and / or the solder material does not contain Sn20%In2%Ag, and / or the core material of the core layer does not contain copper; The solder material of claim 1 .
15. 1. A multi-layer structure for use in an electronic assembly, comprising: two outer solder layers, each outer solder layer comprising a solder material; a core layer sandwiched between the two outer solder layers; The core layer comprises two outer core sublayers and, optionally, one or more central core sublayers. the two outer core sublayers, and the central core sublayer, if present, are separated from one another by one or more solder layers; the outer core sub-layer and the central core sub-layer comprise a core material; the core material of one outer core sub-layer has a different coefficient of thermal expansion than the core material of the other outer core sub-layer; the thermal conductivity of the core material is greater than the thermal conductivity of the solder material; A multi-layer structure, wherein each of the solder layers has a thickness of 25 to 150 μm.
16. 16. The multi-layer structure of claim 15, wherein the core includes at least one central core sublayer, and the coefficient of thermal expansion of the core material of the outer core sublayer and the central core sublayer increases across the thickness of the core.
17. 1. A method of forming a solder joint, comprising: providing a solder material according to any one of claims 1 to 14 or a multilayer structure according to claim 15 or 16 adjacent to two or more workpieces to be joined; and heating the solder material or the multi-layer structure to form a soldered joint.
18. the two or more workpieces to be joined include at least three workpieces; the workpieces have different thicknesses; Different solder materials or different multilayer structures are used to join different workpieces; 18. The method of claim 17.
19. the core layer includes two or more core sublayers separated by one or more further solder layers, the two or more core sublayers being formed from a core material, the core material of one core sublayer having a different coefficient of thermal expansion than the core material of another core sublayer, the core sublayers being arranged such that the coefficient of thermal expansion of the core material of the core sublayers increases through a thickness of the solder material to provide a side with a higher coefficient of thermal expansion and a side with a lower coefficient of thermal expansion; the two or more workpieces to be joined have contact materials with different thermal expansion coefficients; the solder material is placed between the two or more workpieces, the workpieces having the contact material with the lower coefficient of thermal expansion in contact with the side with the lower coefficient of thermal expansion, and the workpieces having the contact material with the higher coefficient of thermal expansion in contact with the side with the higher coefficient of thermal expansion; 18. The method of claim 17.
20. providing an additional layer of core material; laminating said additional layer of core material onto the layer of solder; providing an additional layer of solder; laminating the additional layer of solder onto the additional layer of core material; 20. The method of claim 17, further comprising:
21. providing another additional layer of core material; laminating said further additional layer of core material onto the layer of solder or additional layer of solder; providing another additional layer of solder; laminating said further layer of solder onto said further layer of core material; 21. The method of claim 20, further comprising:
Citation Information
Patent Citations
Semiconductor integrated circuit device and preform bonding material used in the same
JP1991218031A
Joining material for electronic module, module type semiconductor device, and method of manufacturing the same
JP2001230351A
Semiconductor device and its manufacturing method, and member for semiconductor device
JP2007288001A
Junction structure of semiconductor element and manufacturing method of the same
JP2012119609A
Laminated high melting point soldering layer and fabrication method for the same, and semiconductor device
JP2013013933A