Thin film deposition method

Abstract

The present invention relates to a method for depositing a thin film, and more particularly to a method for depositing a thin film for forming a gate insulating film on a silicon carbide substrate. A method for depositing a thin film according to an embodiment of the present invention includes the steps of providing a silicon carbide substrate having a plurality of semiconductor regions, and forming a gate insulating film on the silicon carbide substrate by an atomic layer deposition process at a temperature of 100 to 400° C.

Description

[Technical Field]

[0001] The present invention relates to a method for depositing a thin film, and more particularly to a method for depositing a thin film for forming a gate insulating film on a silicon carbide substrate. [Background technology]

[0002] Silicon carbide (SiC) is a semiconductor with a higher band gap than conventional silicon, and while it has a higher breakdown voltage than silicon, it exhibits low loss and excellent heat dissipation. In particular, its breakdown field is about 10 times stronger than that of silicon, which is a major advantage in that it can reduce voltage drop to about 1 / 200th of that of semiconductor devices using silicon. For this reason, silicon carbide is considered a promising semiconductor material that can replace silicon in the fields of display devices and power semiconductor devices.

[0003] Transistors are used as switching circuits in display devices and semiconductor devices. These transistors have a gate insulating film to block current between the source and drain.

[0004] Conventionally, when manufacturing such thin film transistors, the gate insulating film formed on the silicon carbide substrate is vapor-deposited at a high temperature of about 1200°C.

[0005] However, forming a gate insulating film while the silicon carbide substrate is heated to a high temperature in this manner can cause damage to the substrate or the thin film formed on the substrate, which can degrade or cause defects in the transistors of display devices or power semiconductor devices, and can significantly reduce the quality and reliability of display devices and power semiconductor devices that use transistors as switching circuits. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Republic of Korea Publication Patent No. 10-2009-0055368 Summary of the Invention [Problem to be solved by the invention]

[0007] The present invention provides a thin film deposition method capable of forming a gate insulating film on a silicon carbide substrate at low temperatures. [Means for solving the problem]

[0008] A method for depositing a thin film according to an embodiment of the present invention includes the steps of providing a silicon carbide substrate having a plurality of semiconductor regions, and forming a gate insulating film on the silicon carbide substrate by atomic layer deposition at a temperature of 100 to 400°C.

[0009] The thin film deposition method may further include a step of treating the surface of the silicon carbide substrate using plasma before the step of forming the gate insulating film.

[0010] The step of forming the gate insulating film includes the step of forming the carbonized Kei supplying a source gas onto the substrate; Kei A step of pretreating a raw substrate using plasma; Kei supplying a reactive gas onto the raw substrate; Kei and post-treating the raw substrate using plasma, and the process cycle including the steps of supplying the source gas, pre-treating, supplying the reaction gas, and post-treating may be performed multiple times.

[0011] The pre-treatment step and the post-treatment step are performed by KeiInjecting hydrogen gas onto the substrate; discharging the hydrogen gas to form the carbonized layer; Kei generating a plasma above the raw substrate.

[0012] The gate insulating film may comprise a high-K dielectric layer.

[0013] The gate insulating film may further include a silicon oxide layer or a silicon nitride layer provided on at least one of the upper and lower sides of the high-K dielectric layer.

[0014] The carbonization Kei The step of providing a base substrate may include providing a silicon carbide substrate having a source region, a well region, and a drain region, and the step of forming a gate insulating film may include forming a gate insulating film on the well region. [Effects of the Invention]

[0015] According to an embodiment of the present invention, a gate insulating film can be formed on a silicon carbide substrate using a low-temperature process, and the time required to heat the substrate for forming the gate insulating film can be saved, thereby shortening the manufacturing time of a display device or a power semiconductor device.

[0016] Furthermore, according to the embodiment of the present invention, it is possible to manufacture a display device or a power semiconductor device that has a high breakdown voltage and excellent heat dissipation properties. [Brief explanation of the drawings]

[0017] [Figure 1] 1 is a diagram schematically illustrating a vapor deposition apparatus according to an embodiment of the present invention. [Figure 2] 1A-1C are schematic diagrams illustrating a method for depositing a thin film according to an embodiment of the present invention; [Figure 3] 1A to 1C are diagrams illustrating a process cycle for forming a gate insulating film according to an embodiment of the present invention. [Figure 4]1A and 1B illustrate an example of a thin film transistor manufactured in accordance with an embodiment of the present invention. [Figure 5] 1A and 1B are diagrams illustrating an example of a power semiconductor device manufactured according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0018] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and can be embodied in various different forms. The following embodiments are provided solely for the purpose of complete disclosure of the present invention and to fully convey the scope of the invention to those skilled in the art.

[0019] Throughout the specification, when a component, such as a layer, film, region, or substrate, is referred to as being "on" another component, it may be interpreted that the component may be directly "on" the other component or that there may be additional components interposed therebetween.

[0020] Additionally, relative terms such as "upper" or "lower" may be used herein to describe the relative relationship of one element to another element, as illustrated. It should be understood that the relative terms are intended to include other orientations of the elements in addition to the orientation depicted in the figures. The drawings may be exaggerated to illustrate the details of the invention, and like reference numerals throughout the drawings refer to like components.

[0021] FIG. 1 is a diagram schematically illustrating a vapor deposition apparatus according to an embodiment of the present invention.

[0022] 1, a deposition apparatus according to an embodiment of the present invention is an apparatus for depositing a thin film, i.e., a gate insulating film, on a silicon carbide substrate. The deposition apparatus includes a chamber 10, a substrate support unit 20 disposed within the chamber 10 to support a substrate disposed within the chamber 10, a gas injection unit 30 disposed within the chamber 10 facing the substrate support unit 20 to inject a process gas toward the substrate support unit 20, and an RF power supply 50 that supplies power to generate plasma within the chamber 10. The deposition apparatus may further include a gas supply unit 40 for supplying a gas to the gas injection unit 30, and may further include a control unit (not shown) that controls the RF power supply 50. Here, the gas injection unit 30 is provided with a first gas supply path for supplying a first gas, e.g., a source gas, and a second gas supply path for supplying a second gas, e.g., a reaction gas, which are separately formed.

[0023] The chamber 10 provides a predetermined process space and keeps it airtight. The chamber 10 may include a body 12 having a generally circular or square planar portion and sidewalls extending upward from the planar portion to define the predetermined process space, and a generally circular or square shaped cover 14 positioned on the body 12 to keep the chamber 10 airtight. However, the chamber 10 is not limited thereto and may be manufactured in various shapes corresponding to the shape of the substrate.

[0024] An exhaust port (not shown) may be formed in a predetermined region of the bottom surface of chamber 10, and an exhaust pipe (not shown) connected to the exhaust port may be provided on the outside of chamber 10. The exhaust pipe may also be connected to an exhaust device (not shown). A vacuum pump such as a turbomolecular pump can be used as the exhaust device. Therefore, the inside of chamber 10 can be evacuated to a predetermined reduced pressure atmosphere, for example, a predetermined pressure of 0.1 mTorr or less, using the exhaust device. The exhaust pipe may be provided not only on the bottom surface of chamber 10, but also on the side surface of chamber 10 below substrate support member 20, which will be described later. Needless to say, multiple exhaust pipes and associated exhaust devices may also be provided to shorten the evacuation time.

[0025] Meanwhile, a substrate provided in the chamber 10 for the thin film formation process may be placed on the substrate support 20. Examples of the substrate include a silicon carbide substrate containing silicon carbide (SiC) as a main component. The substrate may also include a silicon carbide single crystal wafer, or a silicon carbide single crystal wafer in which dopants are implanted to form multiple semiconductor regions within the wafer. In this case, the multiple semiconductor regions may include a source region, a drain region, and a well region. The substrate support 20 may be provided with, for example, an electrostatic chuck or the like to adsorb and hold the substrate by electrostatic force so that the substrate can be placed on and supported by the substrate support 20, or the substrate may be supported by vacuum adsorption or mechanical force.

[0026] The substrate support unit 20 may have a shape corresponding to the shape of the substrate, for example, a circular or rectangular shape. The substrate support unit 20 may include a substrate support stage on which the substrate is placed and an elevator 22 disposed below the substrate support stage to raise and lower the substrate support stage. Here, the substrate support stage may be larger than the substrate, and the elevator 22 may be disposed to support at least one region, for example, the center, of the substrate support stage. Once the substrate is placed on the substrate support stage, the elevator 22 may move the substrate support stage closer to the gas injection unit 30. A heater (not shown) may be disposed inside the substrate support stage. The heater generates heat at a predetermined temperature to heat the substrate support stage and the substrate placed on the substrate support stage, thereby ensuring uniform deposition of a thin film on the substrate.

[0027] The gas supply unit 40 may be disposed to penetrate the lid 14 of the chamber 10 and may include a first gas supplier 42 and a second gas supplier 44 to supply a first gas and a second gas, respectively, to the gas injection unit 30. Here, the first gas may include a source gas for forming a gate insulating film, and the second gas may include a reaction gas. However, the first gas supplier 42 and the second gas supplier 44 do not necessarily supply a single type of gas, and the first gas supplier 42 and the second gas supplier 44 may be configured to simultaneously supply multiple types of gases or to supply a gas selected from multiple types of gases.

[0028] For example, the first gas supplier 42 may supply a gas containing silicon (Si) as a raw material gas, or a gas containing hafnium (Hf), lanthanum (La), zirconium (Zr), or the like. The second gas supplier 44 may supply a gas containing at least one of Zr, tantalum (Ta), titanium (Ti), barium (Ba), strontium (Sr), and iridium (Ir). The second gas supplier 44 may supply a gas containing oxygen (O) or nitrogen (N) as a reactive gas.

[0029] The gas injection unit 30 is disposed inside the chamber 10, for example, on the underside of the chamber lid 12, and a first gas supply path for injecting and supplying a first gas onto the substrate and a second gas supply path for injecting and supplying a second gas onto the substrate are formed inside the gas injection unit 30. The first gas supply path and the second gas supply path are formed independent of and separated from each other, so that the first gas and the second gas can be supplied onto the substrate separately so as not to be mixed within the gas injection unit 30.

[0030] The gas injection unit 30 may include an upper frame 32 and a lower frame 34. The upper frame 32 is detachably coupled to the lower surface of the chamber lid 12, and a portion of its upper surface, for example, the center of the upper frame 32, is spaced a predetermined distance from the lower surface of the chamber lid 12. This allows a first gas to diffuse from a first gas supply unit 42 in the space between the upper surface of the upper frame 32 and the lower surface of the chamber lid 12. The lower frame 34 is disposed at a predetermined distance from the lower surface of the upper frame 32. This allows a second gas to diffuse from a second gas supply unit 44 in the space between the upper surface of the lower frame 34 and the lower surface of the upper frame 32. The upper frame 32 and the lower frame 34 may be integrally formed by being connected along their outer peripheries to form a separated space therein, or may have a structure in which the outer peripheries are sealed by a separate sealing member.

[0031] The first gas supply path may be formed such that a first gas from a first gas supply unit 42 diffuses in the space between the lower surface of the chamber lid 12 and the upper frame 32, passes through the upper frame 32 and the lower frame 34, and is supplied into the chamber 10. The second gas supply path may be formed such that a second gas from a second gas supply unit 44 diffuses in the space between the lower surface of the upper frame 32 and the upper surface of the lower frame 34, passes through the lower frame 34, and is supplied into the chamber 10. The first gas supply path and the second gas supply path do not need to be in communication with each other, thereby allowing the first gas and the second gas to be supplied separately from each other to the chamber 10 via the gas supply unit 40 and the gas injection unit 30.

[0032] A first electrode 38 may be disposed on the lower surface of the lower frame 34, and a second electrode 36 may be disposed at a predetermined distance below the lower frame 24 and outside the first electrode 28. In this case, it goes without saying that the lower frame 34 and the second electrode 36 may be connected along the outer periphery, or may have a structure in which the outer periphery is sealed by a separate sealing member.

[0033] In this manner, when the first electrode 38 and the second electrode 36 are arranged, the first gas may be injected onto the substrate through the first electrode 38, and the second gas may be injected onto the substrate through the separation space between the first electrode 38 and the second electrode 36.

[0034] RF power may be applied to either the lower frame 34 or the second electrode 36 from an RF power supply 50. FIG. 1 illustrates an example in which the lower frame 34 is grounded and RF power is applied to the second electrode 36. When the lower frame 34 is grounded, the first electrode 38 disposed on the lower surface of the lower frame 34 is also grounded. Therefore, when the RF power supply 50 is supplied to the second electrode 36, a first activation region, i.e., a first plasma region, can be formed between the gas injection unit 30 and the substrate support unit 20, and a second activation region, i.e., a second plasma region, can be formed between the first electrode 38 and the second electrode 36.

[0035] Therefore, when the second gas is injected through the space between the first electrode 38 and the second electrode 36, the second gas is activated over the area between the first electrode 38 and the second electrode 36, which corresponds to the inside of the gas injection unit 30, i.e., the area from the second plasma region to the first plasma region. Therefore, in the deposition apparatus according to the embodiment of the present invention, the second gas can be activated inside the gas injection unit 30 and injected onto the substrate. Furthermore, by separately forming the first gas supply path for supplying the first gas and the second gas supply path for supplying the second gas, for example, the source gas and the reactive gas can be distributed and injected to the optimal supply paths for depositing a thin film.

[0036] Hereinafter, the thin film deposition method of the present invention will be described in detail with reference to Figures 2 and 3. In describing the thin film deposition method according to an embodiment of the present invention, descriptions that overlap with the above-described description of the deposition apparatus will be omitted.

[0037] FIG. 2 is a diagram illustrating a thin film deposition method according to an embodiment of the present invention, and FIG. 3 is a diagram illustrating a process cycle for forming a gate insulating film according to an embodiment of the present invention.

[0038] Referring to FIGS. 2 and 3, a method for depositing a thin film according to an embodiment of the present invention includes the steps of providing a silicon carbide substrate having a plurality of semiconductor regions (S100) and forming a gate insulating film on the silicon carbide substrate by atomic layer deposition at a temperature of 100 to 400° C. (S200).

[0039] In the step of providing a silicon carbide substrate (S100), a silicon carbide substrate containing silicon carbide (SiC) as a main component is carried into the chamber 10 of the deposition apparatus and placed on the substrate support 20. Such a silicon carbide substrate may have multiple semiconductor regions formed therein. That is, the silicon carbide substrate may include a silicon carbide single crystal wafer, or multiple semiconductor regions may be formed in the silicon carbide substrate by implanting dopants into the silicon carbide single crystal wafer. Here, the multiple semiconductor regions may include a source region, a drain region, and a well region. A power semiconductor device manufactured using a silicon carbide substrate including a source region, a drain region, and a well region will be described later with reference to FIG. 5.

[0040] After the step (S100) of providing a silicon carbide substrate, a step (S200) of forming a gate insulating film on the silicon carbide substrate is performed. Here, the step (S200) of forming a gate insulating film is performed after the step (S100) of providing a silicon carbide substrate, and it goes without saying that other steps added for manufacturing a display device, a power semiconductor device, or the like may be performed between the step (S100) of providing a silicon carbide substrate and the step (S200) of forming a gate insulating film. That is, in the step (S100) of providing a silicon carbide substrate, a silicon carbide substrate on which a gate electrode has already been formed may be provided, but it goes without saying that a further step of, for example, forming a gate electrode on the silicon carbide substrate may be performed between the step (S100) of providing a silicon carbide substrate and the step (S200) of forming a gate insulating film.

[0041] Here, the thin film deposition method according to the embodiment of the present invention may further include a step of surface treating the silicon carbide substrate using plasma before forming the gate insulating film on the silicon carbide substrate.

[0042] The step of treating the surface of the silicon carbide substrate with plasma may be performed to remove a native oxide film formed on the silicon carbide substrate in the step of providing the silicon carbide substrate (S100).

[0043] In the step of surface-treating the silicon carbide substrate using plasma, a surface treatment gas may be sprayed onto the silicon carbide substrate through at least one of the first gas supply path and the second gas supply path of the deposition apparatus, and an RF power supply 50 may be supplied to the process space to activate the surface treatment gas and generate plasma. The surface treatment gas may be at least one gas selected from the group consisting of nitrous oxide (NO), nitric oxide (NO), nitrogen (N), hydrogen (H), oxygen (O), and argon gas. By surface-treating the silicon carbide substrate using plasma in this manner, a native oxide film formed on the surface of the silicon carbide substrate, including the deposition surface for depositing the gate insulating film, can be removed before forming the gate insulating film on the silicon carbide substrate.

[0044] In the step of forming a gate insulating film (S200), a gate insulating film is formed on a silicon carbide substrate at a temperature of 100 to 400° C. by an atomic layer deposition (ALD) process.

[0045] Conventionally, a gate insulating film has been formed on a silicon carbide substrate using a thermal deposition process at a high temperature of approximately 1200°C or higher. However, forming a gate insulating film while the silicon carbide substrate is heated to such a high temperature can damage the silicon carbide substrate and thin films already formed on the silicon carbide substrate, which can significantly reduce the quality and reliability of the display device or power semiconductor device to be manufactured. For this reason, in an embodiment of the present invention, a gate insulating film is formed on a silicon carbide substrate using an atomic layer deposition (ALD) process at a low temperature of 100 to 400°C. The step of forming the gate insulating film (S200) will be described in more detail below.

[0046] The step of forming the gate insulating film (S200) includes carbonization. Kei A step of supplying a raw material gas onto the raw substrate (S210) and carbonization Kei The process cycle of supplying the reaction gas onto the raw substrate (S230) in this order may be performed multiple times.

[0047] In the step of supplying the raw material gas (S210), Kei In the step of supplying the raw material gas (S210), the carbonized material gas is supplied through the first gas supply path of the deposition apparatus. KeiA source gas is supplied onto the substrate. At this time, the source gas may be a gas containing at least one of various source materials for forming a gate insulating film. For example, when a silicon oxide (SiO2) layer or a silicon nitride (SiN) layer is formed as the gate insulating film, a gas containing a silicon (Si) component can be used as the source gas. When a high-K dielectric layer is formed as the gate insulating film, the source gas may be a gas containing at least one of hafnium (Hf), lanthanum (La), zirconium (Zr), tantalum (Ta), titanium (Ti), barium (Ba), strontium (Sr), and iridium (Ir). In the source gas supplying step (S210), a carbonization Kei The source gas is sprayed onto the substrate and adsorbed thereon. At this time, the step of supplying the source gas (S210) may be performed without supplying power.

[0048] In this case, the gate insulating film may include a high-K dielectric layer. That is, the gate insulating film may be formed of a high-K dielectric layer, or may further include not only the high-K dielectric layer but also a silicon oxide (SiO2) layer or a silicon nitride (SiN) layer formed on at least one of the upper and lower sides of the high-K dielectric layer. Here, the gate insulating film may be formed by forming a silicon oxide (SiO2) layer on a silicon carbide substrate, forming a high-K dielectric layer on the silicon oxide (SiO2) layer, and then forming another silicon oxide (SiO2) layer on the high-K dielectric layer. When the gate insulating film is formed in such a stacked structure, the active layer of the thin film transistor or power semiconductor device can be protected from damage by the high-K material forming the high-K dielectric layer. In this case, it goes without saying that at least a portion of the silicon oxide (SiO2) layers provided on the upper and lower parts of the high-K dielectric layer may be replaced with a silicon nitride (SiN) layer.

[0049] After the step of supplying the source gas (S210), a step of purging the source gas may be performed. In the step of purging the source gas, the source gas remaining in the process space of the chamber 10 may be removed. The step of purging the source gas may be performed by supplying an inert gas, for example, argon (Ar) gas, to the process space, and the argon (Ar) gas may be supplied via at least one of the first gas supply path and the second gas supply path. In this case, the RF power source 50 does not need to be supplied during the purging of the source gas.

[0050] After the step of purging the raw material gas, Kei A step of pretreating the raw substrate using plasma (S220) may be performed. Kei In the step (S220) of pretreating the raw substrate using plasma, a pretreatment gas containing hydrogen, for example, hydrogen (H2) gas, is supplied onto the substrate, and the RF power supply 50 is supplied to carbonize the substrate. Kei A hydrogen plasma may be generated on the raw substrate. Here, hydrogen (H2) gas may be supplied via at least one of the first gas supply path and the second gas supply path. In this way, the raw material is carbonized. Kei After the substrate is adsorbed, the step of activating and supplying a pretreatment gas containing hydrogen (S230) is performed, and the carbonization is performed by hydrogen plasma. Kei Impurities contained in the raw material adsorbed on the substrate can be removed, and the raw material can be carbonized. Kei This allows the material to be more firmly attached to the substrate.

[0051] carbonization Kei After the step of pretreating the substrate using plasma (S220), a step of supplying a reactive gas (S230) is performed. The step of supplying a reactive gas (S230) is performed to obtain a carbonized film. KeiA reactive gas containing, for example, oxygen is supplied onto the raw substrate. Here, in the step of supplying the reactive gas (S230), the reactive gas containing oxygen is supplied onto the substrate via the second gas supply path of the deposition apparatus. When the reactive gas is supplied onto the substrate on which the precursor material is adsorbed, the precursor material reacts with the reactive material contained in the reactive gas.

[0052] In this case, in the step of supplying the reactive gas (S230), an RF power supply 50 may be supplied to the process space to activate the reactive gas and generate plasma so that the oxygen component contained in the reactive gas effectively reacts with the source material. By supplying the reactive gas in an activated state in the step of supplying the reactive gas (S230), the supplied oxygen-containing gas is activated with oxygen radicals to react with the source material, thereby enabling the gate insulating film to be formed on the substrate at a lower process temperature. That is, when the reactive gas is activated and supplied onto the substrate, the step of forming the gate insulating film (S200) may be performed by controlling the process space of the chamber 10 to a low temperature of 100°C or more and 400°C or less.

[0053] After the step of supplying the reaction gas (S230), a step of purging the reaction gas may be performed. In the step of purging the reaction gas, the reaction gas remaining in the process space of the chamber 10 may be removed. Similar to the step of purging the source gas, the step of purging the reaction gas may be performed by supplying an inert gas, for example, argon (Ar) gas, to the process space, and the argon (Ar) gas may be supplied via at least one of the first gas supply path and the second gas supply path.

[0054] After the step of purging the reaction gas, Kei A step of post-treating the raw substrate using plasma (S240) may be performed. Kei In the step (S240) of post-treating the substrate using plasma, a post-treatment gas containing hydrogen, for example, hydrogen (H2) gas, is used for carbonization. KeiThe hydrogen (H) gas may be supplied onto the bare substrate, and a hydrogen plasma may be generated on the substrate by supplying the RF power supply 50. Here, the hydrogen (H) gas may be supplied via at least one of a first gas supply path and a second gas supply path.

[0055] Raw material gas and reactive gas are injected and carbonized Kei After a gate insulating film is formed on a base substrate, by generating hydrogen plasma on the substrate, a gate insulating film, particularly a gate insulating film formed from a high-K dielectric layer, can be easily formed even when the temperature inside the chamber 10 or the silicon carbide substrate is low. That is, when the temperature inside the chamber 10 or the silicon carbide substrate is low, for example, at a low temperature of 100°C to 400°C, a gate insulating film formed from a high-K dielectric layer can be formed. Kei It goes without saying that the step of supplying activated post-treatment gas containing hydrogen onto the raw substrate (S240) can also effectively remove impurities remaining inside the chamber 10 and impurities contained in the gate insulating film.

[0056] In this way, the step of supplying the raw material gas (S210), the carbonization Kei A step of pretreating the substrate using plasma (S220), a step of supplying a reactive gas (S230), and a carbonization step Kei The process cycle including the step of post-treating the raw substrate using plasma (S240) may be performed multiple times. More specifically, the process including the step of supplying the raw material gas (S210), the step of purging the raw material gas, the step of carbonization, and the like may be performed multiple times. Kei A step of pretreating a raw substrate using plasma (S220), a step of supplying a reactive gas (S230), a step of purging the reactive gas, and a step of carbonization Kei The step of post-treating the raw substrate using plasma (S240) may constitute one process cycle, and the process cycle may be repeated until a gate insulating film having a desired thickness is formed on the substrate.

[0057] FIG. 4 is a diagram illustrating an example of a thin film transistor manufactured according to an embodiment of the present invention.

[0058] Referring to FIG. 4, a thin film transistor manufactured according to an embodiment of the present invention includes a gate electrode 200a, a source electrode 510a and a drain electrode 520a disposed above or below the gate electrode 200a and spaced apart from each other in the horizontal direction, an active layer 400a disposed between the gate electrode 200a and the source electrode 510a and the drain electrode 520a, and a gate insulating film 300a disposed between the gate electrode 200a and the active layer 400a.

[0059] Here, as shown in FIG. 4, a thin film transistor according to an embodiment of the present invention may be a bottom gate thin film transistor including a gate electrode 200a formed on a silicon carbide substrate 100a, a gate insulating film 300a formed on the gate electrode 200a, an active layer 400a formed on the gate insulating film 300a, and a source electrode 510a and a drain electrode 520a formed spaced apart from each other on the active layer 400a. However, it goes without saying that the thin film transistor may also be similarly applicable to a top gate thin film transistor in which the gate electrode 200a is disposed at the top.

[0060] Here, the silicon carbide substrate 100a may be a substrate containing silicon carbide (SiC) as a main component, and the substrate may comprise a silicon carbide single crystal wafer.

[0061] The gate electrode 200a may be formed using a conductive material, such as at least one metal selected from the group consisting of aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo), and copper (Cu), or an alloy containing any of these. The gate electrode 200a may be formed as a single layer or a multilayer structure including multiple metal layers. That is, the gate electrode 200a may be formed as a double layer structure including a metal layer such as chromium (Cr), titanium (Ti), tantalum (Ta), or molybdenum (Mo), which has excellent physicochemical properties, and an aluminum (Al), silver (Ag), or copper (Cu) metal layer, which has low resistivity.

[0062] The gate insulating film 300a is formed on the gate electrode 200a. That is, the gate insulating film 300a may be formed on the silicon carbide substrate 100a including the top and side portions of the gate electrode 200a. The gate insulating film 300a may be formed from a thin film using silicon oxide (SiO), which has excellent adhesion to metal substances and an outstanding dielectric strength voltage, or may be formed from a high-K dielectric having a higher dielectric constant than silicon oxide (SiO). That is, the gate insulating film 300a may include at least one high-K dielectric layer. In this case, the high-K dielectric may include at least one material selected from the group consisting of hafnium oxide (HfO2), hafnium silicon oxide (HfSiO4), lanthanum oxide (LaO2), lanthanum aluminum oxide (LaAlO3), zirconium oxide (ZrO2), zirconium silicon oxide (ZrSiO4), tantalum oxide (Ta2O5), titanium oxide (TiO2), barium strontium titanium oxide (BaSrTiO3), barium titanium oxide (BaTiO3), strontium titanium oxide (SrTiO3), and iridium oxide (IrO2).

[0063] The gate insulating film 300a may be formed by a thin film deposition method according to an embodiment of the present invention, which includes the steps of providing a silicon carbide substrate (S100) and forming a gate insulating film on the silicon carbide substrate by atomic layer deposition at a temperature of 100 to 400° C. (S200). That is, the gate insulating film 300a is formed by the steps of supplying a source gas (S210) and Kei A step of pretreating the substrate using plasma (S220), a step of supplying a reactive gas (S230), and a carbonization step Kei The thin film may be formed by a thin film deposition method in which a process cycle including the step of post-treating the raw substrate using plasma (S240) is performed multiple times.

[0064] The active layer 400a is formed on the gate insulating film 300a so that at least a portion of the active layer 400a overlaps with the gate electrode 200a. The active layer 400a may be formed, for example, from a metal oxide thin film, but may also be formed from a single metal oxide thin film or multiple metal oxide thin films. Such a metal oxide thin film may contain zinc oxide (ZnO) or a substance in which zinc oxide (ZnO) is doped with at least one of indium (In) and gallium (Ga).

[0065] The source electrode 510a and the drain electrode 520a may be formed on the active layer 400a and may partially overlap the gate electrode 200a, so that the source electrode 510a and the drain electrode 520a are spaced apart from each other with the gate electrode 200a sandwiched between them. The source electrode 510a and the drain electrode 520a may be formed using the same material and the same process. They may be formed using a conductive material, such as at least one metal selected from the group consisting of aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo), or an alloy containing any of these. That is, they may be formed using the same material as the gate electrode 200a or a different material from the gate electrode 200a. It goes without saying that the source electrode 510a and the drain electrode 520a may each be formed as a single layer or a multilayer structure of multiple metal layers.

[0066] FIG. 5 is a diagram illustrating an example of a power semiconductor device manufactured according to an embodiment of the present invention.

[0067] 5, a power semiconductor device, for example, a field effect transistor (FET), manufactured according to an embodiment of the present invention includes a silicon carbide substrate 100b, a gate insulating film 300b formed on the silicon carbide substrate 100b, a source electrode 510b and a drain electrode 520b disposed on the silicon carbide substrate 100b so as to be spaced apart in the horizontal direction with the gate insulating film 300b sandwiched therebetween, and a gate electrode 200b disposed on the gate insulating film 300b between the source electrode 510b and the drain electrode 520b. Here, the silicon carbide substrate 100b may be a substrate having a plurality of semiconductor regions formed therein by implanting dopants. The plurality of semiconductor regions may include a source region 110b that functions as a source of the field effect transistor, a drain region 120b that functions as a drain of the field effect transistor, and a well region 130b that functions as an active layer of the field effect transistor.

[0068] In this case, in an embodiment of the present invention, in manufacturing a power semiconductor device, in order to form a gate insulating film 200b on a silicon carbide substrate 100b, a thin film deposition method according to an embodiment of the present invention may be used, which includes the step (S100) of providing a silicon carbide substrate 100b as described above and the step (S200) of forming a gate insulating film on the silicon carbide substrate 100b by an atomic layer deposition process at a temperature of 100 to 400°C.

[0069] That is, in the power semiconductor element, a step of supplying a raw material gas to the gate insulating film 300b (S210), Kei A step of pretreating the substrate using plasma (S220), a step of supplying a reactive gas (S230), and a carbonization step Kei The thin film may be formed by a thin film deposition method in which a process cycle including the step of post-treating the raw substrate using plasma (S240) is performed multiple times.

[0070] In this case, the gate insulating film 300b may include at least one high-K dielectric layer, and the high-K dielectric may include at least one material selected from hafnium oxide (HfO2), hafnium silicon oxide (HfSiO4), lanthanum oxide (LaO2), lanthanum aluminum oxide (LaAlO3), zirconium oxide (ZrO2), zirconium silicon oxide (ZrSiO4), tantalum oxide (Ta2O5), titanium oxide (TiO2), barium strontium titanium oxide (BaSrTiO3), barium titanium oxide (BaTiO3), strontium titanium oxide (SrTiO3), and iridium oxide (IrO2). As this is the same as in the case of the thin film transistor described above, a redundant description thereof will be omitted.

[0071] As described above, according to the embodiment of the present invention, a gate insulating film can be formed on a silicon carbide substrate using a low-temperature process, and the time required to heat the substrate for forming the gate insulating film can be saved, thereby shortening the manufacturing time of a display device or a power semiconductor device.

[0072] Furthermore, according to the embodiment of the present invention, it is possible to manufacture a display device or a power semiconductor device that has a high breakdown voltage and excellent heat dissipation properties.

[0073] Although the preferred embodiments of the present invention have been described and illustrated using specific terms, these terms are merely for the purpose of clearly describing the present invention, and it is clear that various modifications and changes can be made to the embodiments of the present invention and the terms used without departing from the technical spirit and scope of the claims. These modified embodiments should not be understood separately from the spirit and scope of the present invention, but should be considered to belong to the scope of the claims of the present invention.

Claims

1. providing a silicon carbide substrate having a plurality of semiconductor regions; forming a gate insulating film on the silicon carbide substrate by atomic layer deposition at a temperature of 100 to 400°C; Including, The method further includes, before the step of forming the gate insulating film, performing a surface treatment on the silicon carbide substrate using plasma to remove a native oxide film formed on the silicon carbide substrate; In the step of performing surface treatment using plasma, at least one gas selected from nitrous oxide (N 2 O), nitric oxide (NO), and oxygen (O 2 ) is supplied onto the silicon carbide substrate and activated to form plasma.

2. The step of forming the gate insulating film includes: supplying a source gas onto the silicon carbide substrate; pre-treating the silicon carbide substrate with a plasma; providing a reactive gas onto the silicon carbide substrate; post-treating the silicon carbide substrate with a plasma; Including, 2. The method of claim 1, wherein a process cycle including the steps of supplying the source gas, the pre-treatment, the reaction gas, and the post-treatment is performed multiple times.

3. The pre-processing step and the post-processing step include: injecting hydrogen gas onto the silicon carbide substrate; discharging the hydrogen gas to generate a plasma above the silicon carbide substrate; 3. The method for depositing a thin film according to claim 2, comprising:

4. 2. The method of claim 1, wherein the gate insulating film comprises a high-K dielectric layer.

5. 5. The method of claim 4, wherein the gate insulating film further comprises a silicon oxide layer or a silicon nitride layer disposed on at least one of the upper and lower sides of the high-K dielectric layer.

6. the step of providing a silicon carbide substrate includes providing a silicon carbide substrate having a source region, a well region, and a drain region; the step of forming a gate insulating film includes forming a gate insulating film on the well region. The method for depositing a thin film according to claim 1.

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