Power conversion device and manufacturing method thereof

Abstract

To provide a power conversion device that can achieve the effect of impedance balance (equilibrium) over a wide bandwidth and effectively suppress noise due to common mode currents.SOLUTION: A resistor 33R is connected between a parasitic capacitance generation point P on a positive pole side and an enclosure 15, and a resistor 34R is connected between a parasitic capacitance generation point N on a negative pole side and the enclosure 15. When the impedance of an inductance of a positive pole side path 16 is denoted as Zv, the impedance of an inductance of a negative pole side path 17 is denoted as Zg, the impedance including the capacitance between the parasitic capacitance generation point P on the positive pole side and the enclosure 15 and the resistor 33R is denoted as Zt, and the impedance including the capacitance between the parasitic capacitance generation point N on the negative pole side and the enclosure 15 and the resistor 34R is denoted as Zb, Zt and Zb are set on the basis of the equilibrium conditions of a bridge circuit consisting of Zv, Zg, Zt and Zb.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a power conversion device that applies an output converted using a switching element to a load, and a method for manufacturing the same. [Background technology]

[0002] In power conversion devices such as inverters that generate three-phase AC output from a DC power supply by switching a switching element and apply it to a motor (load), and boost converters that generate boosted DC output and apply it to a load, sudden voltage fluctuations caused by switching operations increase the common mode current (noise) that flows into the housing (reference potential conductor) via parasitic capacitance (parasitic coupling) between the motor (load) and the housing. For this reason, a conventional measure to reduce noise has been taken, which is to mount a large EMI filter consisting of a common mode coil and a Y capacitor (common mode capacitor) on the power input section of a control board, and return the common mode current (noise) that flows into the housing via parasitic capacitance to the switching element (noise source) (see, for example, Patent Document 1).

[0003] However, such noise countermeasures inevitably result in an increase in the size of the noise countermeasure components and the product itself, including the control board. Therefore, measures have been developed that use a bridge circuit to balance the impedance around the switching element, which is the noise source, and reduce the potential difference between the noise source and the noise measurement point, thereby reducing the common mode current (noise) (see, for example, Patent Documents 2 to 4). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 5091521 [Patent Document 2] Japanese Patent Application Laid-Open No. 2010-73792 [Patent Document 3] Japanese Patent Application Laid-Open No. 2009-38961 [Patent Document 4] WO2018 / 021510 publication Summary of the Invention [Problem to be solved by the invention]

[0005] However, with conventional measures, the frequency characteristics of the capacitance (capacitor) and parasitic capacitance added to balance the impedance make it difficult to achieve a balance near the resonance point, resulting in a narrow frequency band where balance can be achieved (the band where the effect of impedance balancing can be obtained).

[0006] The present invention has been made to solve the above-mentioned conventional technical problems, and aims to provide a power conversion device and a manufacturing method thereof that can obtain the effect of impedance balance over a wide band and effectively suppress noise caused by common-mode current. [Means for solving the problem]

[0007] The power conversion device of the invention of claim 1 applies an output converted by switching of a switching element to a load, and is characterized in that it comprises a positive path from the positive side of a DC power supply to the switching element, a negative path from the negative side of the DC power supply to the switching element, a positive side additional resistor connected between a positive side parasitic capacitance generation point P and a reference potential conductor, and a negative side additional resistor connected between a negative side parasitic capacitance generation point N and the reference potential conductor, wherein the impedance of the inductance of the positive side path is Zv, the impedance of the inductance of the negative side path is Zg, the impedance including the capacitance between the positive side parasitic capacitance generation point P and the reference potential conductor and the positive side additional resistor is Zt, and the impedance including the capacitance between the negative side parasitic capacitance generation point N and the reference potential conductor and the negative side additional resistor is Zb, and the impedances Zt and Zb are set based on the equilibrium condition of a bridge circuit formed by the impedances Zv, Zg, Zt, and Zb.

[0008] The power conversion device of the invention of claim 2 is characterized in that the equilibrium condition in the above invention is that the relationship Zb×Zv=Zg×Zt holds, or the relationship Zb×Zv=Zg×Zt approximately holds.

[0009] The power conversion device of the invention of claim 3 is characterized in that it comprises either or both of a positive side additional capacitance connected in series to the positive side additional resistance and a negative side additional capacitance connected in series to the negative side additional resistance in each of the above inventions.

[0010] The power conversion device of the invention of claim 4 is characterized in that it comprises either or both of a positive side additional inductor connected in series to the positive side additional resistor and a negative side additional inductor connected in series to the negative side additional resistor in each of the above inventions.

[0011] The power converter of the invention of claim 5 is characterized in that in the above invention, a resistor is connected in parallel to the positive side additional inductor and / or the negative side additional inductor.

[0012] The power conversion device of the invention of claim 6 is characterized in that, in the invention of claim 4 or claim 5, a resistor is connected in parallel to the series circuit of the positive side additional resistor and the positive side additional inductor, and / or the series circuit of the negative side additional resistor and the negative side additional inductor.

[0013] The power conversion device of the invention of claim 7 is characterized in that it comprises an EMI filter connected between the DC power supply and the switching element in each of the above inventions, and this EMI filter comprises normal mode coils connected to both the positive path and the negative path, respectively.

[0014] The power conversion device of the invention of claim 8 is characterized in that in each of the above inventions, it has an upper arm switching element and a lower arm switching element, the positive side path connects the positive side of the DC power supply and the high potential side terminal of the upper arm switching element, the negative side path connects the negative side of the DC power supply and the low potential side terminal of the lower arm switching element, and it further comprises an intermediate additional impedance connected between the load and an intermediate path connecting the low potential side terminal of the upper arm switching element and the high potential side terminal of the lower arm switching element.

[0015] The power conversion device of the invention of claim 9 is characterized in that in the above invention, it has upper arm switching elements and lower arm switching elements for each phase and applies three-phase AC output to a motor as a load.

[0016] The power conversion device of the invention of claim 10 is characterized in that in the invention of claim 8 or claim 9, the intermediate additional impedance is composed of any one of a normal mode coil, a three-phase common mode coil, and a ferrite core, or a combination of two of them, or all of them.

[0017] A manufacturing method for a power converter according to the invention of claim 11 is characterized in that, in manufacturing a power converter that applies an output converted by switching of a switching element to a load, a positive-side additional resistor is connected between a parasitic capacitance generation point P on the positive side of the DC power supply and the reference potential conductor, and a negative-side additional resistor is connected between a parasitic capacitance generation point N on the negative side of the DC power supply and the reference potential conductor, and impedances Zt and Zb are set so that a balanced condition of a bridge circuit formed by impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied, where Zv is the impedance of the inductance of the positive side path from the positive side of the DC power supply to the switching element, Zg is the impedance of the inductance of the negative side path from the negative side of the DC power supply to the switching element, Zt is the impedance including the capacitance between the positive side parasitic capacitance generation point P and the reference potential conductor and the positive side additional resistor, and Zb is the impedance including the capacitance between the negative side parasitic capacitance generation point N and the reference potential conductor and the negative side additional resistor.

[0018] The method for manufacturing a power conversion device of the invention of claim 12 is characterized in that the equilibrium condition in the above invention, that is, the relationship Zb×Zv=Zg×Zt, is satisfied, or the relationship Zb×Zv=Zg×Zt is approximately satisfied.

[0019] The method for manufacturing a power converter of the invention of claim 13 is characterized in that in the invention of claim 11 or claim 12, a positive side additional capacitance is connected in series to the positive side additional resistance and / or a negative side additional capacitance is connected in series to the negative side additional resistance, and the resistance values ​​of the positive side additional resistance and the negative side additional resistance and the capacitances of the positive side additional capacitance and / or the negative side additional capacitance are selected so that a balanced condition of a bridge circuit formed by impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied.

[0020] The method for manufacturing a power conversion device of the invention of claim 14 is characterized in that, in the inventions of claims 11 to 13, a positive side additional inductor is connected in series to the positive side additional resistor and / or a negative side additional inductor is connected in series to the negative side additional resistor, and the resistance values ​​of the positive side additional resistor and the negative side additional resistor and the inductance of the positive side additional inductor and / or the negative side additional inductor are selected so that a balanced condition of a bridge circuit formed by impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied.

[0021] The method for manufacturing a power converter of the invention of claim 15 is characterized in that in the above invention, a resistor is connected in parallel to the positive side additional inductor and / or the negative side additional inductor.

[0022] The method for manufacturing a power converter of the invention of claim 16 is characterized in that, in the invention of claim 14 or claim 15, a resistor is connected in parallel to the series circuit of the positive side additional resistor and the positive side additional inductor, and / or the series circuit of the negative side additional resistor and the negative side additional inductor. [Effects of the Invention]

[0023] In the inventions of claims 1 and 11, in a power conversion device that applies an output converted by switching of a switching element to a load, a positive-side additional resistor is connected between a parasitic capacitance generation point P on the positive side of the DC power supply and a reference potential conductor, and a negative-side additional resistor is connected between a parasitic capacitance generation point N on the negative side of the DC power supply and the reference potential conductor, and the impedance of the inductance of the positive-side path from the positive side of the DC power supply to the switching element is Zv, the impedance of the inductance of the negative-side path from the negative side of the DC power supply to the switching element is Zg, the impedance including the capacitance between the parasitic capacitance generation point P on the positive side and the reference potential conductor and the positive-side additional resistor is Zt, and the impedance of the negative-side parasitic capacitance is Zt. When the impedance including the capacitance between the capacitance generation point N and the reference potential conductor and the negative side additional resistance is defined as Zb, the impedances Zt and Zb are set so that the balanced condition of the bridge circuit composed of the impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied. Therefore, the problem of the impedance Zt and the impedance Zb suddenly dropping near the resonance points of the capacitance between the positive side parasitic capacitance generation point P and the reference potential conductor and the capacitance between the negative side parasitic capacitance generation point N and the reference potential conductor is compensated for by the positive side additional resistance and the negative side additional resistance, and the ratio of the impedance Zt to the impedance Zb can be maintained.

[0024] This makes it possible to widen the band in which the effect of impedance balance can be obtained, and to effectively suppress noise due to common mode currents over a wide band.

[0025] The above equilibrium condition is that the relationship Zb×Zv=Zg×Zt holds, or the relationship Zb×Zv=Zg×Zt approximately holds, as in the inventions of claims 2 and 12.

[0026] Furthermore, as in the inventions of claims 3 and 13, by connecting a positive additional capacitance in series with the positive additional resistance and / or connecting a negative additional capacitance in series with the negative additional resistance, and setting the resistance values ​​of the positive additional resistance and the negative additional resistance and the capacitance of the positive additional capacitance and / or the negative additional capacitance so that a balanced condition of the bridge circuit formed by the impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied, impedance balance can be achieved without being affected by parasitic capacitance by making the capacitance of the positive additional capacitance and the negative additional capacitance sufficiently larger than the parasitic capacitance. In other words, by selecting the capacitance of the positive additional capacitance and the negative additional capacitance in consideration of the parasitic capacitance, impedance balance can be achieved more easily without adjusting the parasitic capacitance.

[0027] Furthermore, as in the inventions of claims 4 and 14, by connecting a positive-side additional inductor in series with the positive-side additional resistor and / or connecting a negative-side additional inductor in series with the negative-side additional resistor, and by setting the resistances of the positive-side additional resistor and the negative-side additional resistor and the inductances of the positive-side additional inductor and / or the negative-side additional inductor so that a balanced condition of the bridge circuit formed by the impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied, the ratio of the impedance Zt to the impedance Zb in the high-frequency band can be maintained by the ratio of the inductances of the positive-side additional inductor and the negative-side additional inductor, thereby further widening the band in which the effect of impedance balance can be obtained.

[0028] Furthermore, by connecting a resistor in parallel to the positive side additional inductor and / or the negative side additional inductor as in the inventions of claims 5 and 15, if resonance occurs in the high frequency range, it becomes possible to suppress the resonance by the resistor.

[0029] Note that this resistor may be connected in parallel to the series circuit of the positive side additional resistor and the positive side additional inductor, and / or to the series circuit of the negative side additional resistor and the negative side additional inductor, as in the inventions of claims 6 and 16.

[0030] Furthermore, by providing normal mode coils connected to both the positive and negative paths of an EMI filter connected between a DC power supply and a switching element, it is possible to prevent the normal mode current from flowing into the reference potential conductor as a common mode current. In particular, by connecting normal mode coils to both the positive and negative paths, the impedances on the positive and negative sides can be made equal, maintaining balance and maximizing the effect of impedance balance.

[0031] Furthermore, as in claim 8, in a power conversion device having upper-arm switching elements and lower-arm switching elements in addition to the above inventions, where the positive path connects the positive side of the DC power supply to the high-potential terminal of the upper-arm switching element and the negative path connects the negative side of the DC power supply to the low-potential terminal of the lower-arm switching element, if an intermediate additional impedance is connected between the load and the intermediate path connecting the low-potential terminal of the upper-arm switching element to the high-potential terminal of the lower-arm switching element, the impedance of the path passing through the parasitic capacitance between the load and the reference potential conductor can be increased and the common-mode current flowing out from this path can be reduced. This makes it possible to improve the effect of impedance balance even when the parasitic capacitance between the load and the reference potential conductor is large, and further suppress noise without the need for a large EMI filter.

[0032] In particular, by connecting an intermediate additional impedance between the intermediate path and the load and sufficiently increasing the impedance of the path passing through the parasitic capacitance between the load and the reference potential conductor, and setting the impedances Zt and Zb based on the balance conditions of the bridge circuit consisting of impedances Zv, Zg, Zt, and Zb, it becomes possible to make the value related to the intermediate impedance small enough to be ignored when achieving impedance balance, making it easier to achieve balance and enabling effective noise reduction.

[0033] In this case, in a power conversion device having upper arm switching elements and lower arm switching elements for each phase and applying three-phase AC output to a motor as a load as in claim 9, the parasitic capacitance between the arm midpoint and the reference potential conductor is large and the intermediate impedance is small, making it difficult to achieve balance. However, by connecting the intermediate additional impedance as described above, it becomes possible to effectively solve this problem.

[0034] Furthermore, as in claim 10, the intermediate additional impedance may be composed of any one of a normal mode coil, a three-phase common mode coil, and a ferrite core, or a combination of two or all of them. By providing a three-phase common mode coil and a ferrite core as the intermediate additional impedance, it is possible to increase the common mode impedance and reduce the outflow of common mode current. On the other hand, by providing a normal mode coil as the intermediate additional impedance, it is possible to effectively suppress switching surges, which results in suppression of mode conversion (from normal mode to common mode) between the three-phase lines, thereby making it less susceptible to the effects of parasitic capacitance between the load and the reference potential conductor.

[0035] Unlike common mode coils, normal mode coils do not require coupling of the three-phase wires, so they can be placed separately, there are fewer restrictions on placement, and they are easier to miniaturize than common mode coils.Furthermore, they have the advantage of being easy to use, as they can achieve noise reduction effects even if they are not placed in all three phases (for example, only two phases). [Brief explanation of the drawings]

[0036] [Figure 1] 1 is an electrical circuit diagram of a power conversion device according to an embodiment of the present invention; [Figure 2] 2 is an electric circuit diagram of an inverter circuit and a control board of the power conversion device of FIG. 1. [Figure 3] 2 is a diagram illustrating parasitic components of a control board (including a bus bar assembly) of the power converter of FIG. 1. FIG. [Figure 4] FIG. 2 is a diagram showing a modeled bridge circuit of the power converter of FIG. 1. [Figure 5] FIG. 5 is a diagram for explaining an example of the impedance Zt in FIGS. 3 and 4. [Figure 6] FIG. 5 is a diagram for explaining an example of impedance Zb in FIGS. 3 and 4. [Figure 7] FIG. 1 is a diagram illustrating the frequency characteristics of impedance of a typical capacitor. [Figure 8] FIG. 10 is a diagram illustrating frequency characteristics of impedances Zt and Zb when only a positive side additional capacitance and a negative side additional capacitance are connected. [Figure 9] 9 is a diagram illustrating a balance effect band due to impedances Zt and Zb in the case of FIG. 8. FIG. [Figure 10] 10 is a diagram illustrating the frequency characteristics of the impedance of a series circuit of a capacitor, a resistor, and an inductor. FIG. [Figure 11] FIG. 10 is a diagram illustrating the frequency characteristics of impedances Zt and Zb when a series circuit of a positive side additional capacitance, a positive side additional resistance, and a positive side additional inductor is connected to a series circuit of a negative side additional capacitance, a negative side additional resistance, and a negative side additional inductor. [Figure 12]12 is a diagram illustrating a balance effect band due to impedances Zt and Zb in the case of FIG. 11. FIG. [Figure 13] FIG. 1 is a diagram illustrating a noise path in a conventional power conversion device. [Figure 14] 2 is an electric circuit diagram for explaining a noise path of the power conversion device of FIG. 1. FIG. [Figure 15] FIG. 5 is a diagram illustrating yet another embodiment of the impedance Zt in FIGS. 3 and 4. [Figure 16] FIG. 5 is a diagram illustrating yet another example of the impedance Zb in FIGS. 3 and 4. DETAILED DESCRIPTION OF THE INVENTION

[0037] An embodiment of the present invention will be described in detail below with reference to the drawings. Fig. 1 is an electric circuit diagram of a power conversion device 1 according to an embodiment of the present invention, and Fig. 2 is an electric circuit diagram of an inverter circuit 2 and a control board 11.

[0038] (1) Power conversion device 1 The power conversion device 1 of the embodiment includes six switching elements 3 to 8 (FIG. 2) each consisting of IGBTs (or MOSFETs) constituting the upper and lower arms of each phase of a three-phase inverter circuit 2, a control board 11 (FIG. 2) on which a control circuit is mounted on printed wiring, a bus bar assembly 12 as a wiring member for wiring between a battery 14 (described later), the control board 11, each of the switching elements 3 to 8, and a motor M as a load, and a filter board 13, and converts DC power supplied from the vehicle battery 14 as a DC power source into three-phase AC power and applies it to a stator coil (not shown) of the motor M.

[0039] Motor M, which is an embodiment of the load in this invention, is composed of an IPMSM (Interior Permanent Magnet Synchronous Motor), and drives a compression mechanism (not shown) housed in a metal (e.g., aluminum) housing 15 of an electric compressor (not shown) mounted on a vehicle, compresses refrigerant, and discharges it into a refrigerant circuit of an air conditioner (not shown). Power conversion device 1 is provided integrally with housing 15 of the electric compressor.

[0040] (2) Electrical circuit of power conversion device 1 First, the electrical circuit of the power conversion device 1 of this embodiment will be described using Figure 1. Reference numeral 16 denotes a positive path connected to the positive side (+) of battery 14 via a LISN (lizer artificial network), and reference numeral 17 denotes a negative path connected to the negative side (-) of battery 14 via a LISN. An EMI filter 18 and a smoothing capacitor 19 are connected to these positive path 16 and negative path 17. The EMI filter 18 and smoothing capacitor 19 are connected between the battery 14 and the switching elements 3 to 8 of the inverter circuit 2.

[0041] The EMI filter 18 is composed of an X capacitor 21 connected between the positive path 16 and the negative path 17, normal mode coils 22 and 30 connected respectively to both the positive path 16 and the negative path 17 downstream of the X capacitor 21, a common mode coil 23 connected downstream of the normal mode coils 22 and 30, and a Y capacitor 26 and a Y capacitor 24 connected downstream of the common mode coil 23 between the positive path 16 and the negative path 17 and the housing 15, respectively.

[0042] The EMI filter 18 and smoothing capacitor 19 are mounted on the filter substrate 13. The X capacitor 21 is a capacitor for reducing normal mode noise, and the Y capacitors 24 and 26 are capacitors for reducing common mode noise. The smoothing capacitor 19 smoothes voltage ripples and also treats high frequencies as a short circuit, which is the starting point for impedance balance.

[0043] The housing 15 is connected to the vehicle body 27 (GND). In this embodiment, the housing 15 serves as the reference potential conductor of the power conversion device 1. Also, 25 denotes a shunt resistor connected to the negative electrode path 17 between the bus bar assembly 12 and the smoothing capacitor 19.

[0044] (2-1) Intermediate additional impedance Zm1 (normal mode coil 35, three-phase common mode coil 28 and ferrite core 29 Furthermore, an inverter circuit 2 is connected to the positive electrode path 16 and the negative electrode path 17 downstream of the smoothing capacitor 19. A normal mode coil 35, a three-phase common mode coil 28, and a ferrite core 29, which constitute an intermediate additive impedance Zm1 in this embodiment, are sequentially connected between the motor M and intermediate paths 31U to 31W (described later) of the inverter circuit 2. The normal mode coil 35 and the three-phase common mode coil 28 mainly increase the impedance at low frequencies, while the ferrite core 29 increases the impedance at high frequencies. The ferrite core 29 is arranged around the output paths 32U to 32W (described later), and this arrangement is also referred to as a connection in this application. Furthermore, in this embodiment, the normal mode coil 35 is connected to each of the output paths 32U to 32W.

[0045] (2-2) Impedances added to the positive electrode side (capacitor 33C, resistor 33R, inductor 33L) and impedances added to the negative electrode side (capacitor 34C, resistor 34R, inductor 34L) Furthermore, in this embodiment, a series circuit of an impedance balancing capacitor 33C, a resistor 33R, and an inductor 33L that constitutes the impedance Zt between the positive side parasitic capacitance generation point P of Figure 3 and the housing 15 is connected between the positive side path 16 between the inverter circuit 2 and the smoothing capacitor 19 and the housing 15 (reference potential conductor), and in this embodiment, a series circuit of an impedance balancing capacitor 34C, a resistor 34R, and an inductor 34L that constitutes the impedance Zb between the negative side parasitic capacitance generation point N of Figure 3 and the housing 15 is connected between the negative side path 17 between the inverter circuit 2 and the smoothing capacitor 19 and the housing 15 (reference potential conductor).

[0046] The capacitor 33C is the positive side additional capacitance of the present invention, the resistor 33R is the positive side additional resistance of the present invention, and the inductor 33L is the positive side additional inductor of the present invention, and these are included in the impedance Zt, while the capacitor 34C is the negative side additional capacitance of the present invention, the resistor 34R is the negative side additional resistance of the present invention, and the inductor 34L is the negative side additional inductor of the present invention, and these are included in the impedance Zb.

[0047] 1 shows the series circuit of capacitor 33C, resistor 33R, and inductor 33L and the series circuit of capacitor 34C, resistor 34R, and inductor 34L separated from parasitic capacitance generation points P and N, but in reality, as shown in Fig. 3, the series circuit of capacitor 33C, resistor 33R, and inductor 33L is connected between positive-side parasitic capacitance generation point P (the intersection of the collectors of upper-arm switching elements 3 to 5 and positive-side path 16) and housing 15, and in this embodiment, the series circuit of capacitor 34C, resistor 34R, and inductor 34L is connected via shunt resistor 25 between negative-side parasitic capacitance generation point N (the intersection of the emitters of lower-arm switching elements 6 to 8 and negative-side path 17) and housing 15. Furthermore, the position of shunt resistor 25 is also shown separated from negative-side parasitic capacitance generation point N in Fig. 1 for ease of understanding.

[0048] In this embodiment, the series circuit of capacitor 33C, resistor 33R, and inductor 33L, the series circuit of capacitor 34C, resistor 34R, and inductor 34L, the normal mode coil 35, the three-phase common mode coil 28, and the ferrite core 29 are arranged in the bus bar assembly 12. In addition, the capacitance indicated by 36 in FIG. 1 indicates the parasitic capacitance (parasitic coupling) between the inverter circuit 2 and the housing 15, and the capacitance indicated by 37 indicates the parasitic capacitance (parasitic coupling) between the motor M and the housing 15.

[0049] (2-3) Inverter circuit 2 2 shows the electrical circuit of inverter circuit 2 and control board 11. Inverter circuit 2 has U-phase inverter 38U, V-phase inverter 38V, and W-phase inverter 38W, and each of inverters 38U-38W for each phase has upper arm switching elements (referred to as upper arm switching elements) 3-5 and lower arm switching elements (referred to as lower arm switching elements) 6-8. Furthermore, a flywheel diode 39 is connected in anti-parallel to each of switching elements 3-8.

[0050] The high potential side terminals of the upper arm switching elements 3 to 5 of the inverter circuit 2 are connected to a positive side path 16, and the low potential side terminals of the lower arm switching elements 6 to 8 are connected to a negative side path 17. The low potential side terminal of the upper arm switching element 3 and the high potential side terminal of the lower arm switching element 6 of the U-phase inverter 38U are connected by an intermediate path 31U, and this intermediate path 31U is connected to the U-phase stator coil of the motor M (load) by an output path 32U.

[0051] Furthermore, the low potential side terminal of the upper arm switching element 4 and the high potential side terminal of the lower arm switching element 7 of the V-phase inverter 38V are connected by an intermediate path 31V, and this intermediate path 31V is connected to a V-phase stator coil of a motor M (load) by an output path 32V. Furthermore, the low potential side terminal of the upper arm switching element 5 and the high potential side terminal of the lower arm switching element 8 of the W-phase inverter 38W are connected by an intermediate path 31W, and this intermediate path 31W is connected to a W-phase stator coil of the motor M (load) by an output path 32W. The normal mode coil 35, three-phase common mode coil 28, and ferrite core 29 described above are provided in output paths 32U-32W located between the intermediate paths 31U-31W and the motor M. The ferrite cores 29 may be arranged around all of the output paths 32U to 32W at once, as shown by the large squares in FIG. 1, or may be arranged separately around the output paths 32U to 32W of each phase, as shown by the small squares in FIG. 1.

[0052] (2-4) Control board 11 Meanwhile, the control circuit of the control board 11 is made up of a microcomputer having a processor, and in this embodiment, receives a rotation speed command value from the vehicle's ECU, detects and calculates the phase currents of the motor M using shunt resistors 25, and controls the ON / OFF states of the upper and lower arm switching elements 3 to 8 of the inverter circuit 2 based on these values. Specifically, the control circuit controls gate voltages (drive signals) applied to the gate terminals of the upper and lower arm switching elements 3 to 8, and converts voltages (phase voltages) of intermediate paths 31U to 31W connecting the upper and lower arm switching elements 3 to 8 of each phase into three-phase AC outputs, which are applied to the stator coils of each phase of the motor M via output paths 32U to 32W, thereby driving the motor M.

[0053] (2-5) Busbar assembly 12 In addition, bus bar assembly 12 of the embodiment is configured by molding bus bars made of conductive metal with hard resin. Filter board 13, control board 11, each of the switching elements 3 to 8, and motor M are connected to the bus bars of bus bar assembly 12, thereby forming wiring between battery 14, control board 11, each of the switching elements 3 to 8, and motor M.

[0054] (2-6) Parasitic components (inductance and capacitance) of the control board 11 including the bus bar assembly 12 Next, the parasitic components of the control board 11 (including the busbar assembly 12) of the power conversion device 1 will be described with reference to Fig. 3. In the figure, Zv is the impedance of the inductance of the positive electrode side path 16 (wiring) including the busbar assembly 12, and Zg is the impedance of the inductance of the negative electrode side path 17 (wiring) including the busbar assembly 12. Although other parasitic components also exist in the positive electrode side path 16 and the negative electrode side path 17, the inductance of the wiring is dominant.

[0055] In addition, in the figure, Zt is the impedance between the parasitic capacitance generation point P (Figure 4) on the positive side including the busbar assembly 12 and the housing 15 (reference potential conductor), and Zb is the impedance between the parasitic capacitance generation point N (Figure 4) on the negative side including the busbar assembly 12 and the housing 15.

[0056] The impedance Zt in the embodiment includes the parasitic capacitance between the positive side parasitic capacitance generation point P and the housing 15, the capacitance of the aforementioned capacitor 33C (positive side additional capacitance for impedance balancing), the resistance value of resistor 33R (positive side additional resistor for impedance balancing), and the inductance of inductor 33L (positive side additional inductor for impedance balancing).

[0057] Furthermore, the impedance Zb in the embodiment includes the parasitic capacitance between the negative side parasitic capacitance generation point N and the housing 15, the capacitance of the aforementioned capacitor 34C (negative side additional capacitance for impedance balancing), the resistance value of resistor 34R (positive side additional resistor for impedance balancing), and the inductance of inductor 34L (positive side additional inductor for impedance balancing).

[0058] In the figure, the portion indicated by the dashed line 41 is a noise source composed of each of the switching elements 3 to 8 (indicated by switching symbols), 42 is the inductance of the positive-side path 16 branched into each phase (this also means that inductance is dominant), and 43 is the inductance of the PCB pattern (this also means that inductance is dominant). 44 is the parasitic capacitance between the collectors of the upper-arm switching elements 3 to 5 and the housing 15, and 46 is the parasitic capacitance between the collectors of the lower-arm switching elements 6 to 8 and the housing 15 (this also means that parasitic capacitance is dominant).

[0059] Reference numeral 48 denotes the parasitic capacitance between the emitters of upper-arm switching elements 3 to 5 and housing 15 plus the parasitic capacitance between the bus bar and housing 15 (this also means that parasitic capacitance is dominant). Reference numeral 49 denotes the parasitic capacitance between the emitters of lower-arm switching elements 6 to 8 and housing 15 (this also means that parasitic capacitance is dominant). Furthermore, reference numeral 47 denotes the parasitic inductance of output paths 32U to 32W (this also means that inductance is dominant).

[0060] In the figure, Zm indicates an intermediate impedance. This intermediate impedance Zm is a parasitic component between the collectors and emitters of the upper and lower arm switching elements 3 to 8, the bus bars of the bus bar assembly 12, the windings of the motor M, and intermediate paths 31U to 31W (the midpoints between the upper arm switching elements 3 to 5 and the lower arm switching elements 6 to 8) including parasitic capacitances 37, 43, 46, and 48 and parasitic inductance 47, and housing 15. A common mode current flows into housing 15 via this intermediate impedance Zm, generating common mode noise.

[0061] Although FIG. 3 does not show the aforementioned intermediate additional impedance Zm1, in the present invention, as shown in the embodiment of FIG. 1, an intermediate additional impedance Zm1 consisting of a normal mode coil 35, a three-phase common mode coil 28, and a ferrite core 29 is additionally connected to the output paths 32U to 32W between the intermediate paths 31U to 31W and the motor M, and the value of the intermediate impedance Zm is increased accordingly.

[0062] (3) Noise reduction by achieving impedance balance conditions (equilibrium conditions) Next, with reference to Fig. 4, a noise reduction measure by satisfying an impedance balance condition (equilibrium condition) will be described. The bridge circuit in Fig. 4 is a common-mode equivalent circuit (modeled bridge circuit) when, for example, U-phase inverter 38U in Fig. 2 serves as noise source V1 (when upper-arm switching element 3 serves as a noise source). In the figure, Zv is the impedance of the inductance of positive-side path 16 described above, Zg is the impedance of the inductance of negative-side path 17, Zt is the impedance between positive-side parasitic capacitance generation point P and housing 15 (reference potential conductor), including the capacitance of capacitor 33C, the resistance of resistor 33R, and the inductance of inductor 33L, Zb is the impedance between negative-side parasitic capacitance generation point N and housing 15, including the capacitance of capacitor 34C, resistor 34R, and the inductance of inductor 34L, and Zm is the intermediate impedance including the intermediate additional impedance Zm1. Here, when lower-arm switching element 6 serves as a noise source, the noise source is located below the intersection with intermediate impedance Zm.

[0063] 4, the positive-side parasitic capacitance generation point P in the present invention is the intersection of the collector of the upper-arm switching element 3 and the positive-side path 16, and the negative-side parasitic capacitance generation point N is the intersection of the emitter of the lower-arm switching element 6 and the negative-side path 17. In addition, in the case of FIG. 4, the impedance Zv of the positive-side path 16 in the present invention is the impedance of the inductance of the positive-side path 16 up to the intersection with the collector of the upper-arm switching element 3, and the impedance Zg of the negative-side path 17 is the impedance of the inductance of the negative-side path 17 up to the intersection with the emitter of the lower-arm switching element 6.

[0064] Similarly, when V-phase inverter 38V is noise source V1, the intersection of the collector of upper arm switching element 4 and positive electrode side path 16 becomes positive electrode side parasitic capacitance generation point P, and the intersection of the emitter of lower arm switching element 7 and negative electrode side path 17 becomes negative electrode side parasitic capacitance generation point N. In this case, the impedance of the inductance of positive electrode side path 16 up to the intersection with the collector of upper arm switching element 4 is Zv, and the impedance of the inductance of negative electrode side path 17 up to the intersection with the emitter of lower arm switching element 7 is Zg.

[0065] Furthermore, when W-phase inverter 38W is noise source V1, the intersection of the collector of upper arm switching element 5 and positive electrode side path 16 becomes positive electrode side parasitic capacitance generation point P, and the intersection of the emitter of lower arm switching element 8 and negative electrode side path 17 becomes negative electrode side parasitic capacitance generation point N. In this case, the impedance of the inductance of positive electrode side path 16 up to the intersection with the collector of upper arm switching element 5 is Zv, and the impedance of the inductance of negative electrode side path 17 up to the intersection with the emitter of lower arm switching element 8 is Zg.

[0066] 4, Z1 represents the internal impedance + inductance 42 (FIG. 3) of the upper arm of noise source V1, and Z2 represents the internal impedance + inductance 42 of the lower arm of noise source V1. Inductance 42 is minute, and the connection position of parasitic capacitance 44 is approximately the same as that of the series circuit of capacitor 33C, resistor 33R, and inductor 33L. Therefore, parasitic capacitance 44 is included in impedance Zt, not Z1. Furthermore, Zr represents the common mode impedance from the intersection of impedance Zv and impedance Zg (the starting point on the left side of the bridge circuit in FIG. 4) to housing 15. The intersection of impedance Zv and impedance Zg in FIG. 4 is the starting point on the battery 14 (DC power supply) side and is the high-frequency short-circuit point.

[0067] In Figure 4, Vc is the common mode voltage generated on the LISN side, which is the noise measurement point. The common mode voltage Vc generated by switching operation inside the circuit causes a common mode current to flow in the connected wiring, generating noise. By achieving a balance condition (impedance balance condition) that makes this common mode voltage Vc zero or extremely small, it is possible to eliminate or significantly reduce noise caused by the common mode current that flows out due to switching operation.

[0068] When calculated from this circuit equation, the common-mode voltage Vc can be expressed by the following equation (I).

[0069]

number

[0070] The impedance Z1 is ignored because the upper arm switching element 3 is in the ON state and its value is low compared to the other elements.

[0071] Furthermore, when Zm is sufficiently large, the second term of the numerator and the second term of the denominator in formula (I) can be ignored, and formula (I) can be expressed as formula (II) below.

[0072]

number

[0073] Here, the condition for making the numerator (ZgZt-ZbZv) of formula (II) zero, that is, the impedance balance condition (equilibrium condition), is given by the following formula (III). Zb×Zv=Zg×Zt (III) That is, formula (III) becomes formula (IV) below. (Zb×Zv) / (Zg×Zt)=1 (IV)

[0074] Therefore, in the embodiment, the impedance Zt between the parasitic capacitance generation point P on the positive side and the housing 15 (reference potential conductor) and the impedance Zb between the parasitic capacitance generation point N on the negative side and the housing 15 are set by selecting the capacitance of capacitor 33C, the resistance value of resistor 33R, the inductance of inductor 33L, the capacitance of capacitor 34C, the resistance value of resistor 34R, and the inductance of inductor 34L that are connected to achieve the impedance balance shown in Figure 1, and a power conversion device 1 is manufactured in which the above formula (III) is satisfied or approximately satisfied.

[0075] Note that "approximately true" does not mean that Zb x Zv = Zg x Zt, but that they are nearly equal (the difference between the two is extremely small, within a certain tolerance range A). This makes it possible to effectively reduce noise.

[0076] (3-1) Problems when balancing impedance using only capacitors 33C and 34C As described above, the impedance Zt between the positive side parasitic capacitance generation point P and the housing 15 (reference potential conductor) in this embodiment is composed of a series circuit of a capacitor 33C (positive side additional capacitance), a resistor 33R (positive side additional resistance), and an inductor 33L (positive side additional inductor), as shown in FIG. 5(a), and includes the capacitance of the capacitor 33C, the resistance value of the resistor 33R, the inductance of the inductor 33L, and the parasitic capacitance between the positive side parasitic capacitance generation point P and the housing 15.

[0077] In addition, the impedance Zb between the negative side parasitic capacitance generation point N and the housing 15 in the embodiment is composed of a series circuit of a capacitor 34C (negative side additional capacitance), a resistor 34R (negative side additional resistor), and an inductor 34L (negative side additional inductor), as shown in (a) of Figure 6, and includes the capacitance of the capacitor 34C, the resistance value of the resistor 34R, the inductance of the inductor 34L, and the parasitic capacitance between the negative side parasitic capacitance generation point N and the housing 15.

[0078] Here, we consider the problems that arise when balancing impedance by connecting only capacitor 33C (positive side additional capacitance) between the positive side parasitic capacitance generation point P and the housing 15 as the component of impedance Zt, and connecting only capacitor 34C (negative side additional capacitance) between the negative side parasitic capacitance generation point N and the housing 15 as the component of impedance Zb.

[0079] For example, if the ratio of impedance Zv to impedance Zg is 1:α (α is a value greater than 1), by selecting and connecting capacitor 33C (additional capacitance on the positive side) and capacitor 34C (additional capacitance on the negative side) with capacitances such that the ratio of impedance Zt to impedance Zb is 1:α, Zb×Zv=Zg×Zt (formula (III)), and impedance balance can be achieved as (Zb×Zv) / (Zg×Zt)=1 (formula (IV)).

[0080] However, since the impedance of a capacitor is generally determined by 1 / (ωC), it varies with frequency as shown by Q in Figure 7 and drops sharply near the resonance point. This is also the case when only capacitors 33C and 34C are connected, with impedance Zt varying with frequency as shown by Q2 in Figure 8, and impedance Zb also varying with frequency as shown by Q1. Therefore, even if the ratio of impedances Zt and Zb is maintained in the band before the sharp drop in impedance Zt, and it is possible to achieve impedance balance using the characteristics of capacitors 33C and 34C, it becomes difficult to achieve a balance near the resonance point and in bands higher than that.

[0081] The results are shown in Figure 9. In Figure 9, Q3 represents Zb x Zv, Q4 represents Zg x Zt, and Q5 represents (Zb x Zv) / (Zg x Zt) in formula (IV). In the low-frequency band (HZ1 in Figure 9), by selecting capacitors 33C and 34C so that Zb x Zv = Zg x Zt (formula (III)) as described above, (Zb x Zv) / (Zg x Zt) = 1 (formula (IV)), and impedance balance can be achieved.

[0082] However, according to the frequency characteristics of impedances Zt and Zb shown in Figure 8, when the frequency rises above band HZ1 and approaches the resonance point, first Zg×Zt(Q4) drops sharply, causing (Zb×Zv) / (Zg×Zt) to rise sharply. After that, Zg×Zt(Q4) begins to rise sharply, and then Zb×Zv(Q3) drops sharply, causing (Zb×Zv) / (Zg×Zt) to drop sharply. However, Zb×Zv(Q3) remains smaller than Zg×Zt(Q4), and as the impedances Zv and Zg increase with increasing frequency, Zg×Zt(Q4) and Zb×Zv(Q3) rise, so (Zb×Zv) / (Zg×Zt) becomes a value less than 1, making it extremely difficult to achieve impedance balance.

[0083] (3-2) Advantages of balancing impedance between the series circuit of capacitor 33C, resistor 33R, and inductor 33L and the series circuit of capacitor 34C, resistor 34R, and inductor 34L On the other hand, the impedance of a resistor does not depend on frequency, and the impedance of an inductor is determined by ωL. Therefore, in a series circuit of a capacitor, resistor, and inductor as in the above-mentioned embodiment, the impedance of the capacitor (1 / (ωC)) becomes dominant in the low frequency band, as shown by S in FIG. 10.

[0084] After that, as the frequency increases, the capacitor impedance gradually decreases, causing the overall impedance to gradually decrease.Then, when the frequency band approaches the capacitor's resonance point, the capacitor impedance drops sharply, so the impedance of the resistor, which is independent of frequency near the resonance point, becomes dominant, compensating for the overall impedance and preventing a sudden drop (Figure 10).

[0085] In other words, the sudden drop in impedance in the frequency band near the capacitor's resonance point, as shown in Figures 7 and 8, is compensated for by the impedance of the resistor. Furthermore, at higher frequency bands, the impedance of the inductor (ωL) becomes dominant.

[0086] This is also true for the series circuit of capacitor 33C, resistor 33R, and inductor 33L described above, and the series circuit of capacitor 34C, resistor 34R, and inductor 34L. For example, if the ratio of impedance Zv to impedance Zg is 1:α (α is a value greater than 1), and the capacitance of capacitor 33C (positive-side additional capacitance), the resistance of resistor 33R (positive-side additional resistance), the inductance of inductor 33L (positive-side additional inductor), the capacitance of capacitor 34C (positive-side additional capacitance), the resistance of resistor 34R (positive-side additional resistance), and the inductance of inductor 34L (positive-side additional inductor) are set so that the ratio of impedance Zt to impedance Zb is 1:α, and elements that satisfy each of these are selected and connected, then Zb×Zv=Zg×Zt (formula (III)), and impedance balance can be achieved as (Zb×Zv) / (Zg×Zt)=1 (formula (IV)).

[0087] In reality, the capacitance of capacitor 34C is smaller than that of capacitor 33C, the resistance of resistor 34R is larger than that of resistor 33R, and the inductor 33L and inductor 34L are elements whose inductance is larger than that of inductor 33L. In this case, impedance Zt changes as shown by S1 in FIG. 11, and impedance Zb changes as shown by S2.

[0088] That is, the relationship (ratio) between impedance Zt and impedance Zb is determined by the characteristics of capacitor 33C and capacitor 34C in the low frequency band, by the ratio of the resistance values ​​of resistor 33R and resistor 34R in the band near the capacitor's resonance point, and by the ratio of the inductances of inductors 33L and 34L in the higher frequency band, so that the ratio between impedance Zb (dashed line S2 in FIG. 11) and impedance Zt (solid line S1 in FIG. 11) is roughly maintained from the low frequency band to the high frequency band. Therefore, impedance balance can be achieved by the capacitor characteristics in the low frequency band, by the resistance ratio in the band near the capacitor's resonance point, and by the inductance ratio in the higher frequency band (each band is shown in FIG. 11).

[0089] FIG. 12 shows the results of impedance balancing when the capacitances of capacitors 33C and 34C, the resistances of resistors 33R and 34R, and the inductances of inductors 33L and 34L are selected as described above to set impedance Zt and impedance Zb. In FIG. 12, S3 represents Zb×Zv, S4 represents Zg×Zt, and S5 represents (Zb×Zv) / (Zg×Zt) in equation (IV). By selecting the capacitances of capacitors 33C and 34C, the resistances of resistors 33R and 34R, and the inductances of inductors 33L and 34L so that Zb×Zv=Zg×Zt (equation (III)), as described above, it is possible to achieve impedance balancing by making (Zb×Zv) / (Zg×Zt)=1 (equation (IV)) true or approximately true across a wide frequency band (HZ2 in FIG. 12) spanning from low to high frequencies.

[0090] (3-3) Another example of balancing impedance with impedance Zt and Zb In the embodiments described so far, as shown in FIG. 5(a), a series circuit of a capacitor 33C (positive-side additional capacitance), a resistor 33R (positive-side additional resistance), and an inductor 33L (positive-side additional inductor) is connected to configure the impedance Zt between the positive-side parasitic capacitance generation point P and the housing 15 (reference potential conductor). However, as shown in FIG. 5(b), a series circuit of only the capacitor 33C and the resistor 33R may be connected, and the inductance may be adjusted by adjusting the parasitic inductance of the wiring.

[0091] In the case of a low-voltage power conversion device 1, as shown in Fig. 5(c), a series circuit of only resistor 33R and inductor 33L may be connected, and the capacitance may be addressed by adjusting the parasitic capacitance between the casings 15. Furthermore, as shown in Fig. 5(d), only resistor 33R may be connected, and the capacitance and inductance may be addressed by adjusting the parasitic capacitance and parasitic inductance in the same way. In these cases, the parasitic capacitance is connected in parallel with resistor 33R and inductor 33L, forming an additional impedance.

[0092] Regarding the impedance Zb between the negative side parasitic capacitance generation point N and the housing 15, in the embodiment, as shown in FIG. 6(a), it is configured by connecting a series circuit of a capacitor 34C (negative side additional capacitance), a resistor 34R (negative side additional resistance), and an inductor 34L (negative side additional inductor). However, similarly, as shown in FIG. 6(b), it is also possible to connect a series circuit of only the capacitor 34C and the resistor 34R, and adjust the inductance by adjusting the parasitic inductance of the wiring.

[0093] In the case of a low-voltage power conversion device 1, as shown in Fig. 6(c), a series circuit of only resistor 34R and inductor 34L may be connected, and the capacitance may be addressed by adjusting the parasitic capacitance between the casings 15. Furthermore, as shown in Fig. 6(d), only resistor 34R may be connected, and the capacitance and inductance may be addressed by adjusting the parasitic capacitance and parasitic inductance in the same way. In these cases, the parasitic capacitance is connected in parallel with resistor 34R and inductor 34L, forming an additional capacitance.

[0094] That is, the configuration of impedance Zt and impedance Zb can be any combination of any of (a) to (d) in Figure 5 and any of (a) to (d) in Figure 6. However, in the present invention, it is essential to connect resistors 33R and 34R.

[0095] (3-4) Another example of balancing impedances Zt and Zb Furthermore, in the cases of (a) and (c) of Figure 5, a resistor may be connected in parallel to the inductor 33L (additional inductor on the positive side). An example of this case is shown in Figure 15. (a) of Figure 15 is an example in which a resistor 33Rs1 is connected in parallel only to the inductor 33L in the case of (a) of Figure 5, and (b) of Figure 15 is an example in which a resistor 33Rs2 is connected in parallel to the series circuit of the resistor 33R (additional resistor on the positive side) and the inductor 33L in the case of (a) of Figure 5.

[0096] Fig. 15(c) shows an example in which a resistor 33Rs1 is connected in parallel only to the inductor 33L in the case of Fig. 5(c), and Fig. 15(d) shows an example in which a resistor 33Rs2 is connected in parallel to the series circuit of the resistor 33R and inductor 33L in the case of Fig. 5(c). Note that in Fig. 15(b) and Fig. 15(d), a resistor 33Rs1 may be further connected in parallel only to the inductor 33L (shown by a dashed line in Fig. 15).

[0097] Similarly, in the cases of (a) and (c) of Figure 6, a resistor may be connected in parallel to inductor 34L (additional inductor on the positive side). An example of this case is shown in Figure 16. (a) of Figure 16 is an example in which resistor 34Rs1 is connected in parallel only to inductor 34L in the case of (a) of Figure 6, and (b) of Figure 16 is an example in which resistor 34Rs2 is connected in parallel to the series circuit of resistor 34R (additional resistor on the positive side) and inductor 34L in the case of (a) of Figure 6.

[0098] 16(c) shows an example in which a resistor 34Rs1 is connected in parallel only to the inductor 34L in the case of FIG. 6(c), and FIG. 16(d) shows an example in which a resistor 34Rs2 is connected in parallel to the series circuit of the resistor 34R and inductor 34L in the case of FIG. 6(c). In addition, in FIG. 16(b) and FIG. 16(d), a resistor 34Rs1 may be connected in parallel only to the inductor 34L (shown by a dashed line in FIG. 16).

[0099] In this way, by connecting resistors 33Rs1, 33Rs2, 34Rs1, and 34Rs2 to inductors 33L and 34L, to the series circuit of resistor 33R and inductor 33L, and to the series circuit of resistor 34R and inductor 34L, when resonance occurs in the high frequency range, the resonance can be suppressed by resistors 33Rs1, 33Rs2, 34Rs1, and 34Rs2.

[0100] As described above, in the present invention, resistor 33R (positive-side additional resistor) is connected between parasitic capacitance generating point P on the positive side and housing 15 (reference potential conductor), and resistor 34R (negative-side additional resistor) is connected between parasitic capacitance generating point N on the negative side and housing 15. When the impedance of the inductance of positive-side path 16 is Zv, the impedance of the inductance of negative-side path 17 is Zg, the impedance including the capacitance and resistor 33R between parasitic capacitance generating point P on the positive side and housing 15 is Zt, and the impedance including the capacitance and resistor 34R between parasitic capacitance generating point N on the negative side and housing 15 is Zb, then Impedances Zt and Zb are set so that the relationship Zb×Zv=Zg×Zt, which is the balance condition of the bridge circuit composed of impedances Zv, Zg, Zt, and Zb, is satisfied or approximately satisfied.Therefore, the problem of impedance Zt and impedance Zb suddenly dropping near the resonance points of the capacitance between parasitic capacitance generation point P on the positive side and housing 15, and the capacitance between parasitic capacitance generation point N on the negative side and housing 15, can be compensated for by resistors 33R and 34R, and the ratio of impedance Zt to impedance Zb can be maintained.

[0101] This makes it possible to widen the band in which the effect of impedance balance can be obtained, and to effectively suppress noise due to common mode currents over a wide band.

[0102] In this case, as in the embodiment, by connecting capacitor 33C (positive-side additional capacitance) in series with resistor 33R and / or connecting capacitor 34C (negative-side additional capacitance) in series with resistor 34R, and setting the resistance values ​​of resistors 33R and 34R and the capacitances of capacitors 33C and / or 34C so that the balance condition of the bridge circuit formed by impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied, impedance balance can be achieved without being affected by parasitic capacitance by making the capacitances of capacitors 33C and 34C sufficiently larger than the parasitic capacitance. In other words, by selecting the capacitances of capacitors 33C and 34C in consideration of the parasitic capacitance, impedance balance can be achieved more easily without adjusting the parasitic capacitance.

[0103] Furthermore, as in the embodiment, by connecting inductor 33L (additional positive inductor) in series with resistor 33R and / or connecting inductor 34L (additional negative inductor) in series with resistor 34R, and by setting the resistance values ​​of resistors 33R and 34R and the inductance of inductor 33L and / or inductor 34L so that a balanced condition of a bridge circuit formed by impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied, the ratio of impedance Zt to impedance Zb in a high frequency band can be maintained by the ratio of the inductances of inductor 33L and inductor 34L, etc. This makes it possible to further widen the band in which the effect of impedance balance can be obtained.

[0104] Furthermore, by connecting resistors Rs1 and Rs2 in parallel to inductor 33L (additional positive inductor) and / or inductor 34L (additional negative inductor) as in the embodiment, if resonance occurs in the high frequency range, the resonance can be suppressed by the resistors Rs1 and Rs2. Note that the resistors Rs1 and Rs2 may also be connected in parallel to the series circuit of resistor 33R and inductor 33L and / or the series circuit of resistor 34R and inductor 34L.

[0105] Furthermore, by providing the EMI filter 18 with normal mode coils 22 and 30 connected to the positive path 16 and the negative path 17, respectively, as in the embodiment, it is possible to prevent the normal mode current from flowing into the housing 15 as a common mode current. In particular, by connecting the normal mode coils 22 and 30 to both the positive path 16 and the negative path 17, it is possible to equalize the impedances on the positive and negative sides, maintain balance, and maximize the effect of the impedance balance.

[0106] In this embodiment, balance can be maintained even when a normal mode coil is not connected to either the positive path 16 or the negative path 17, but in that case, it becomes impossible to prevent the problem of normal mode current flowing out as common mode current.

[0107] (4) Advantages of connecting the intermediate additional impedance Zm1 Furthermore, in this embodiment, an intermediate additional impedance Zm1 (normal mode coil 35, three-phase common mode coil 28, ferrite core 29) is connected between intermediate paths 31U-31W and motor M. This makes the impedance of the path via parasitic capacitance 37 sufficiently large, even when the driven object is three-phase motor M as in this embodiment. As a result, when achieving impedance balance, the values ​​related to intermediate impedance Zm, i.e., the second numerator and second denominator terms of equation (I), become negligibly small. This makes it easier to achieve balance in the bridge circuit formed by impedance Zt between parasitic capacitance generation point P on the positive side and housing 15 (reference potential conductor) and impedance Zb between parasitic capacitance generation point N on the negative side and housing 15 (selection of the resistance values ​​of resistors 33R and 34R, the capacitances of capacitors 33C and 34C, and the inductances of inductors 33L and 34L in this embodiment), thereby enabling noise to be reduced easily and effectively.

[0108] Furthermore, by adding and connecting the intermediate additional impedance Zm1 (normal mode coil 35, three-phase common mode coil 28, ferrite core 29) between the intermediate paths 31U-31W and the motor M as in the embodiment, the impedance of the path passing through the parasitic capacitance 37 increases, making it possible to reduce the common mode current flowing out from this path. As a result, even when the parasitic capacitance 37 between the motor M and the housing 15 is large, it is possible to improve the effect of impedance balance, and it becomes possible to further suppress noise without installing a large EMI filter.

[0109] In addition, in this embodiment, the intermediate additional impedance Zm1 is composed of a normal mode coil 35, a three-phase common mode coil 28, and a ferrite core 29. By providing the three-phase common mode coil 28 and the ferrite core 29 as the intermediate additional impedance Zm1 in this way, it is possible to increase the common mode impedance and reduce the outflow of common mode current. On the other hand, by providing the normal mode coil 35 as the intermediate additional impedance Zm1, it is possible to effectively suppress switching surges, which results in suppression of mode conversion (from normal mode to common mode) between the three-phase lines, and as a result, it is possible to reduce the influence of the parasitic capacitance 37 between the motor M and the housing 15.

[0110] Furthermore, unlike common mode coils, normal mode coils 35 do not require coupling of three-phase lines, and so can be arranged separately. Even when arranged in the bus bar assembly 12 as in the embodiment, there are fewer restrictions on arrangement, and they are easier to miniaturize than common mode coils. Note that normal mode coils 35 do not have to be arranged in all of the output paths 32U to 32W (three phases) as in the embodiment, and they may be arranged in only two phases, for example. This also provides a noise reduction effect, which has the advantage of being easy to use.

[0111] (4-1) Noise reduction effect Next, the noise reduction effect of the present invention will be described with reference to Figures 13 and 14. Figure 13 shows an electrical circuit diagram of a power conversion device 100 that does not include the normal mode coil 35, the three-phase common mode coil 28, the ferrite core 29, and the capacitors 33 and 34. In this figure, components that are designated with the same reference numerals as those in Figure 1 have the same or similar functions.

[0112] In this diagram, the arrow indicated by N1 indicates the common mode current (noise) flowing from motor M to housing 15 via parasitic capacitance 37, the arrow indicated by N2 indicates the common mode current (noise) flowing from inverter circuit 2 to housing 15 via parasitic capacitance 36, the arrow indicated by N3 indicates the common mode current (noise) returning from housing 15 to upper and lower arm switching elements 3 to 8 of inverter circuit 2 via Y capacitors 24 and 26, and the arrow indicated by N9 indicates the common mode current (noise) flowing into LISNs 16 and 17 on the positive (+) and negative (-) sides through the shielded wire of the HV connector attached to housing 15. Furthermore, the arrow indicated by N4 indicates the common mode current (noise) flowing from housing 15 to vehicle body 27, and the arrows indicated by N5 to N8 indicate the common mode current (noise) flowing from vehicle body 27 to EMI filter 18 via LISNs 17 and 16. Although the arrows in the figure are shown in only one direction, in reality the flow of common mode current is not simple, and current flows in and out in both directions at each location.

[0113] 13, a large common mode current (N1) flows out from motor M via parasitic capacitance 37. Furthermore, this common mode current and a common mode current (N2) flowing out from inverter circuit 2 to housing 15 flow back (N3) to upper and lower arm switching elements 3 to 8 of inverter circuit 2, which are noise sources, via Y capacitors 24 and 26. However, because Y capacitors 24 and 26 are located far from motor M and inverter circuit 2, the return path becomes long, and the filtering effect of Y capacitors 24 and 26 (the effect of returning common mode current) cannot be fully obtained.

[0114] On the other hand, in the embodiment, as shown in FIGS. 1 and 14, capacitor 33C, resistor 33R, inductor 33L, capacitor 34C, resistor 34R, and inductor 34L are connected to achieve impedance balance, and the common-mode voltage Vc is set to zero or extremely small, thereby suppressing the common-mode current (N1) and making it possible to eliminate or significantly reduce noise.

[0115] In particular, in this embodiment, intermediate additional impedance Zm1 (normal mode coil 35, three-phase common mode coil 28, ferrite core 29) is connected between intermediate paths 31U-31W and motor M, so the impedance of the path via parasitic capacitance 37 is sufficiently large. As a result, when achieving impedance balance, the values ​​related to intermediate impedance Zm (the second term of the numerator and the second term of the denominator in equation (I)) become small enough to be ignored. This makes it easier to adjust impedance Zt between parasitic capacitance generation point P on the positive side and housing 15 (reference potential conductor) and impedance Zb between parasitic capacitance generation point N on the negative side and housing 15, i.e., to select the capacitance of capacitor 33C, the resistance value of resistor 33R, the inductance of inductor 33L, the capacitance of capacitor 34C, the resistance value of resistor 34R, and the inductance of inductor 34L in this embodiment, thereby making it possible to easily and effectively reduce noise.

[0116] Furthermore, by arranging capacitor 33C, resistor 33R, inductor 33L, capacitor 34C, resistor 34R, and inductor 34L in bus bar assembly 12 as shown in FIGS. 1 and 14, a portion of the common mode current (N1) flowing out from motor M via parasitic capacitance 37 and the common mode current (N2) flowing out from inverter circuit 2 to housing 15 is returned to the upper and lower arm switching elements 3 to 8 of inverter circuit 3, which are noise sources, via the series circuit of capacitor 33C, resistor 33R, and inductor 33L and the series circuit of capacitor 34C, resistor 34R, and inductor 34L, as shown by arrow N10 in FIG.

[0117] Since busbar assembly 12 is located closer to motor M and upper and lower arm switching elements 3 to 8 of inverter circuit 2 than filter board 13, arranging capacitor 33C, resistor 33R, inductor 33L, capacitor 34C, resistor 34R, and inductor 34L on busbar assembly 12 shortens the return path and provides an effective filtering effect. This makes it possible to suppress noise without inserting a large common mode coil in the power supply input section as in the past, and enables effective noise suppression while achieving compactness.

[0118] Furthermore, in this embodiment, the normal mode coil 35, three-phase common mode coil 28, and ferrite core 29 are arranged on the bus bar assembly 12 between the upper and lower arm switching elements 3 to 8 of the inverter circuit 2 and the motor M, which increases the impedance of the path passing through the parasitic capacitance 37 and reduces the common mode current (noise, indicated by arrow N1) flowing out via the parasitic capacitance 37. This also eliminates the need to insert a large common mode coil into the power supply input section, making it possible to effectively suppress noise while reducing the size of the inverter-integrated electric compressor 1.

[0119] The above-mentioned parasitic capacitance can be adjusted, for example, by changing the distance between the heat sink that dissipates heat from each of the switching elements 3 to 8 and the heat dissipation sheet, or by selecting switching elements with different parasitic couplings between the collector and the heat sink and between the emitter and the heat sink.

[0120] Changing the distance between the heat sink and the heat dissipation sheet adjusts the parasitic capacitance, which changes the value of parasitic capacitance 44 in Figure 3, and therefore changes (adjusts) impedance Zt. The switching element itself can be changed (adjusted) by changing the value and position of its internal impedance + parasitic capacitance. If the internal impedance changes, Z1 and Z2 in Figure 4 will change, but because Z1 and Z2 are not dominant factors in impedance balance, only parasitic capacitance 44 will change.

[0121] Furthermore, in the embodiment, the normal mode coil 35, the three-phase common mode coil 28, and the ferrite core 29 are connected to form the intermediate additional impedance Zm1, but this is not limiting, and the intermediate additional impedance Zm1 may be formed by connecting only one of them, or a combination of two of them (a combination of the normal mode coil 35 and the three-phase common mode coil 28, or a combination of the normal mode coil 35 and the ferrite core 29, or a combination of the three-phase common mode coil 28 and the ferrite core 29).

[0122] In addition, in the embodiment, normal mode coils 22 and 30 are connected to both the positive electrode side path 16 and the negative electrode side path 17, but in inventions other than claim 7, the normal mode coil (22 or 30) may be connected to only one of the positive electrode side path 16 and the negative electrode side path 17.

[0123] Furthermore, in the embodiments, the present invention has been described using a three-phase inverter that drives the motor M of an electric compressor using the power conversion device 1, but the invention is not limited to this except for claim 9. For example, the present invention is also effective in a power supply circuit (power conversion device) such as a boost converter that boosts voltage by switching a single switching element and applies the boosted DC voltage to a load. [Explanation of symbols]

[0124] 1 Power conversion device 2. Inverter circuit 3~8 Upper and lower arm switching elements 11 Control board 14 Battery (DC power supply) 15 Housing (reference potential conductor) 16 Positive side path 17 Negative side path 18 EMI filters 22, 30 Normal mode coil 28 Three-phase common mode coil (Zm1) 29 Ferrite core (Zm1) 31U~31W Intermediate route 32U~32W output path 33C capacitor (additional capacitance on the positive side) 33L inductor (additional inductor on the positive side) 33R resistor (additional resistor on the positive side) 33Rs1, 33Rs2, 34Rs1, 34Rs2 resistance 34C capacitor (negative side additional capacitance) 34L inductor (negative side additional inductor) 34R resistor (negative side additional resistor) 35 Normal mode coil (Zm1) M Motor (load) N: Parasitic capacitance generation point on the negative side P: Positive side parasitic capacitance generation point Zb Impedance between the negative side parasitic capacitance generation point N and the housing 15 Zg Impedance of the inductance of the negative path Zm Intermediate impedance Zm1 Intermediate additional impedance Zt Impedance between the positive side parasitic capacitance generation point P and the housing 15 Zv Impedance of the inductance of the positive path

Claims

1. 1. A power conversion device that applies an output converted by switching a switching element to a load, a positive-side path extending from a positive side of a DC power supply to the switching element; a negative-side path extending from a negative side of the DC power supply to the switching element; a positive side additional resistor connected between the positive side parasitic capacitance generating point P and the reference potential conductor; a negative-side additional resistor connected between a negative-side parasitic capacitance generating point N and the reference potential conductor; The impedance of the inductance of the positive electrode side path is Zv, The impedance of the inductance of the negative electrode side path is Zg, The impedance including the capacitance between the parasitic capacitance generating point P on the positive side and the reference potential conductor and the positive side additional resistance is Zt, When the impedance including the capacitance between the negative side parasitic capacitance generating point N and the reference potential conductor and the negative side additional resistance is Zb, A power conversion device, wherein the impedances Zt and Zb are set based on a balance condition of a bridge circuit formed by the impedances Zv, Zg, Zt, and Zb.

2. 2. The power conversion device according to claim 1, wherein the equilibrium condition is that the relationship Zb*Zv=Zg*Zt holds, or that the relationship Zb*Zv=Zg*Zt approximately holds.

3. 3. The power conversion device according to claim 1, further comprising: a positive-side additional capacitance connected in series to the positive-side additional resistance; and a negative-side additional capacitance connected in series to the negative-side additional resistance.

4. 4. The power conversion device according to claim 1, further comprising: a positive-side additional inductor connected in series to the positive-side additional resistor; or a negative-side additional inductor connected in series to the negative-side additional resistor.

5. 5. The power conversion device according to claim 4, wherein a resistor is connected in parallel to the positive-side additional inductor and / or the negative-side additional inductor.

6. 6. The power conversion device according to claim 4, wherein a resistor is connected in parallel to the series circuit of the positive side additional resistor and the positive side additional inductor and / or the series circuit of the negative side additional resistor and the negative side additional inductor.

7. an EMI filter connected between the DC power supply and the switching element; 7. The power conversion device according to claim 1, wherein the EMI filter includes normal mode coils connected to both the positive path and the negative path.

8. The switching element of the upper arm and the switching element of the lower arm are included, the positive electrode side path connects a positive electrode side of the DC power supply and a high potential side terminal of the upper arm switching element, and the negative electrode side path connects a negative electrode side of the DC power supply and a low potential side terminal of the lower arm switching element, 8. The power conversion device according to claim 1, further comprising an intermediate additional impedance connected between the load and an intermediate path connecting the low potential side terminal of the upper arm switching element and the high potential side terminal of the lower arm switching element.

9. 9. The power conversion device according to claim 8, wherein the power conversion device has the upper arm switching element and the lower arm switching element for each phase, and applies a three-phase AC output to a motor as the load.

10. 10. The power conversion device according to claim 8 or 9, wherein the intermediate additional impedance is configured by any one of a normal mode coil, a three-phase common mode coil, and a ferrite core, or a combination of two of them, or all of them.

11. A method for manufacturing a power conversion device that applies an output converted by switching a switching element to a load, comprising: a positive-side additional resistor is connected between a parasitic capacitance generating point P on the positive side of the DC power supply and a reference potential conductor, and a negative-side additional resistor is connected between a parasitic capacitance generating point N on the negative side of the DC power supply and the reference potential conductor; The impedance of the inductance of the positive side path from the positive side of the DC power supply to the switching element is Zv, The impedance of the inductance of the negative side path from the negative side of the DC power supply to the switching element is Zg, The impedance including the capacitance between the parasitic capacitance generating point P on the positive side and the reference potential conductor and the positive side additional resistance is Zt, When the impedance including the capacitance between the negative side parasitic capacitance generating point N and the reference potential conductor and the negative side additional resistance is Zb, A method for manufacturing a power conversion device, characterized in that the impedances Zt and Zb are set so that a balanced condition of a bridge circuit composed of the impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied.

12. The method for manufacturing a power conversion device according to claim 11, wherein the balance condition is satisfied such that Zb×Zv=Zg×Zt, or the balance condition is satisfied such that Zb×Zv=Zg×Zt is approximately satisfied.

13. a positive side additional capacitance is connected in series to the positive side additional resistance, and / or a negative side additional capacitance is connected in series to the negative side additional resistance, 13. The method for manufacturing a power conversion device according to claim 11 or 12, wherein the resistance values ​​of the positive side additional resistor and the negative side additional resistor and the capacitance of the positive side additional capacitance and / or the negative side additional capacitance are selected so that a balanced condition of a bridge circuit formed by the impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied.

14. a positive additional inductor is connected in series to the positive additional resistor, and / or a negative additional inductor is connected in series to the negative additional resistor, 14. The method for manufacturing a power conversion device according to claim 11, wherein the resistance values ​​of the positive side additional resistor and the negative side additional resistor and the inductance of the positive side additional inductor and / or the negative side additional inductor are selected so that a balanced condition of a bridge circuit formed by the impedances Zv, Zg, Zt, and Zb is satisfied or approximately satisfied.

15. 15. The method for manufacturing a power converter according to claim 14, further comprising connecting a resistor in parallel to the positive-side additional inductor and / or the negative-side additional inductor.

16. 16. The method for manufacturing a power conversion device according to claim 14 or 15, wherein a resistor is connected in parallel to the series circuit of the positive side additional resistor and the positive side additional inductor and / or the series circuit of the negative side additional resistor and the negative side additional inductor.

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