Oscilloscope and method for reproducing a signal under test

Abstract

A test and measurement instrument, such as an oscilloscope, having a Nyquist frequency lower than its analog bandwidth, the test and measurement instrument having an input configured to receive a signal under test having a repeating pattern, a single analog-to-digital converter configured to receive the signal under test and sample the signal under test over a plurality of repeating patterns at a particular sample rate, and one or more processors configured to determine the frequency of the signal under test and to recreate the signal under test without a trigger based on the determined frequency of the signal, the pattern length of the signal under test, and the sample rate.

Description

[Technical Field]

[0001] The present disclosure relates to systems and methods relating to test and measurement systems, and more particularly to real-time equivalent data acquisition in test and measurement instruments. [Background technology]

[0002] Traditional high-end equivalent-time oscilloscopes and traditional real-time oscilloscopes can be used for high-speed signal integrity measurements and debugging in production and R&D. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2007 / 0109159 [Patent Document 2] US Patent Application Publication No. 2009 / 0003502 [Patent Document 3] European Patent Application Publication No. 3754349

[0004] However, traditional high-end equivalent-time oscilloscopes have slow acquisition speeds due to hardware triggering and are expensive. Traditional real-time oscilloscopes have extremely fast acquisition speeds, but are expensive due to the large number of hardware components required to achieve such high acquisition speeds, such as multiple analog-to-digital converters. Furthermore, the multiple analog-to-digital converters can result in errors due to the multiple track-and-hold circuits and mismatches between the analog-to-digital converters.

[0005] Embodiments of the presently disclosed technology address these and other shortcomings of the prior art.

[0006] Aspects, features, and advantages of embodiments of the disclosed technology will become apparent from the following description of the embodiments, which proceeds with reference to the accompanying drawings. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a block diagram of a test and measurement instrument according to an embodiment of the disclosed technique. [Figure 2] FIG. 2 is an example of a signal under test sampled by the test and measurement instrument of FIG. 1 and resulting in aliasing. [Figure 3] FIG. 3 is an example of an eye diagram according to some embodiments of the disclosed technique. [Figure 4] FIG. 4 is an example of an eye diagram according to another embodiment of the disclosed technique. [Figure 5] FIG. 5 is an example of a reconstructed signal based on the alias signal of FIG. [Figure 6] FIG. 6 is a flowchart of an exemplary method for acquiring and reproducing a signal under test according to an embodiment of the disclosed technique. [Figure 7] Figure 7 is a block diagram of a test and measurement instrument operating in real-time mode. [Figure 8] FIG. 8 is another block diagram of a test and measurement instrument operating in real-time mode. [Figure 9] FIG. 9 is a block diagram of a test and measurement instrument operating in real equivalent time mode. [Figure 10] Figure 10 is a plot of the recovery waveform acquired during real-time mode of the test and measurement instrument of Figure 8. [Figure 11] FIG. 11 is a plot of a recovery waveform acquired during real equivalent time mode of the test and measurement instrument of FIG. [Figure 12] Figure 12 shows an example of how clock data is recovered and the sampled waveform is reproduced. [Figure 13] Figure 13 is an eye diagram generated based on the operation of Figure 12 with the spread-spectrum clock turned off. [Figure 14] Figure 14 is a plot of Figure 13 based on the operation of Figure 12 as a function of unit interval time. [Figure 15] FIG. 15 shows the waveforms reproduced based on the operation of FIG. 12 with the spread spectrum clock turned off. [Figure 16] Figure 16 is an eye diagram generated based on the operation of Figure 12 with spread spectrum clocking turned on. [Figure 17] Figure 17 is a plot of Figure 16 based on the operation of Figure 12 as a function of unit interval time. [Figure 18] FIG. 18 shows a waveform reproduced based on the operation of FIG. 12 with spread spectrum clocking turned on. DETAILED DESCRIPTION OF THE INVENTION

[0008] This application discloses a real equivalent time oscilloscope that has wide analog bandwidth and uses software clock recovery to extract a clock from a data signal and reconstruct the pattern of the acquired signal based on the extracted clock.

[0009] High-volume manufacturing environments require test and measurement instruments that meet production test requirements at a lower cost than traditional equivalent-time oscilloscopes and traditional real-time oscilloscopes. An embodiment of the disclosed technology, described in more detail below, includes a test and measurement instrument 100 that has wide bandwidth, low jitter, lower vertical noise, and clock recovery capabilities.

[0010] The speed of signals under test is constantly increasing, requiring test and measurement equipment 100 to have a sufficiently wide bandwidth to faithfully capture the signal components. As the bit rate or baud rate of the signal under test increases, the unit interval (UI) becomes smaller, reducing the tolerance for horizontal jitter. Furthermore, as the bit rate or baud rate of the signal under test increases, the signal under test is more susceptible to inter-symbol interference, reducing the vertical eye margin, even with equalizers in the transmitter and receiver. Low-power signaling schemes commonly used in devices under test also reduce the vertical eye margin. Many test and measurement equipment are used to monitor or capture signals under test that have repeating data patterns, such as pseudorandom binary sequence (PRBS) signals and short stress pattern random-quaternary (SSPRQ) signals. Test and measurement equipment 100 can recover (regenerate) the clock from the data signal, as described in more detail below.

[0011] Traditional real-time oscilloscopes can sample the entire input waveform in a single pass. That is, acquisition and display occur in the same time frame. To do this, traditional real-time oscilloscopes have a high enough sampling rate compared to their analog bandwidth to prevent aliasing when acquiring signals under test at high speeds. For example, a real-time oscilloscope may have an analog bandwidth of 70 GHz and a sample rate of 200 gigasamples per second (GS / s). Its Nyquist frequency of 100 GHz is higher than the analog bandwidth, so aliasing does not occur. Because the Nyquist rate is so high, traditional real-time oscilloscopes can acquire analog signals under test without triggering and without aliasing. All traditional real-time oscilloscopes have a sample rate that provides a Nyquist frequency higher than the analog bandwidth. However, traditional real-time oscilloscopes are expensive and may be cost-prohibitive for production test applications.

[0012] Traditional, high-end equivalent-time sampling oscilloscopes take advantage of the repetitive nature of a signal and digitally reconstruct the waveform using samples from multiple trigger events. A clock and data recovery unit can be used to allow the equivalent-time oscilloscope's hardware trigger to acquire samples. Because repetitive signals are sampled, the bandwidth of the equivalent-time scope can far exceed the sample rate. For example, equivalent-time sampling oscilloscopes can have very low sample rates, such as 200 kilosamples per second (kS / s), and high vertical resolution (typically 12 bits or more). Traditional equivalent-time oscilloscopes use equivalent-time sampling techniques to reconstruct the signal's pattern waveform based on a pattern trigger.

[0013] FIG. 1 illustrates an example block diagram of a real-time equivalent-time test and measurement instrument 100 in accordance with some embodiments of the disclosed technique. The test and measurement instrument 100 has one or more ports 102, which may be any electrical signal medium. The ports 102 may include a transmitter (receiving circuitry), a receiver (transmitting circuitry), or a transceiver. Each port 102 is a channel of the test and measurement instrument 100.

[0014] The signal from the port is then sent to a vertical offset 104, which can adjust the offset or baseline of the received signal. In some configurations or embodiments, the vertical offset 104 may also provide vertical gain adjustment. Without vertical gain adjustment, vertical noise can be reduced, but the dynamic range is also reduced. To address this, some examples may utilize external attenuation or amplification circuits to attenuate or amplify the incoming signal under test. The signal is sent from the vertical offset 104 to a sampler track and hold circuit 106. The track and hold circuit 106 holds each signal stable long enough for acquisition by a high-resolution analog-to-digital converter 108.

[0015] The analog-to-digital converter 108 converts the analog signal from the track-and-hold circuit 106 into a digital signal. The sampling rate of the analog-to-digital converter 108 is greater than that of an equivalent-time test and measurement instrument but less than that of a real-time test and measurement instrument. For example, the analog-to-digital converter 108 can sample signals from a few GS / s to tens of GS / s. In some embodiments, the analog-to-digital converter 108 can sample analog signals between 1 GS / s and 100 GS / s. In other embodiments, the analog-to-digital converter can sample analog signals between 2 GS / s and 25 GS / second. The digitized signal from the analog-to-digital converter 108 is then stored in the acquisition memory 110. That is, the sampling rate is set so that the Nyquist frequency, which is half the sampling rate, is lower than the analog bandwidth of the analog-to-digital converter 108. The analog-to-digital converter 108 can be a single high-resolution analog-to-digital converter, such as a 12-bit analog-to-digital converter.

[0016] One or more processors 112 may be configured to execute instructions from memory and may perform any method or associated steps indicated by such instructions, such as receiving a signal acquired from the acquisition memory 110 and reproducing the signal under test without using a hardware trigger or acquiring samples at a high acquisition rate.

[0017] Memory 110 and other memory on test and measurement instrument 100 may be implemented as processor cache, random access memory (RAM), read-only memory (ROM), solid state memory, a hard disk drive, or any other type of memory. Memory serves as a medium for storing data, computer program products, and other instructions.

[0018] A user input 114 is coupled to the one or more processors 112. The user input 114 may include a keyboard, mouse, trackball, touchscreen, or any other control device that can be used to interact with a GUI on the display 116. The display 116 may be a digital screen, a cathode ray tube-based display, or any other monitor for displaying waveforms, measurements, and other data to a user. While the converters of the test and measurement instrument 100 are depicted as being integrated within the test and measurement instrument 100, one skilled in the art will appreciate that any of these components may be external to the test and measurement instrument 100 and may be coupled to the test and measurement instrument 100 in any conventional manner, including wired or wireless communication media and mechanisms. For example, in some embodiments, the display 116 may be remote from the test and measurement instrument 100.

[0019] Figure 2 shows a plot 200 of a sampled waveform that can be acquired using the test and measurement instrument of Figure 1. The signal under test is a sine wave signal, but as can be seen in Figure 2, the signal sampled by the test and measurement instrument 100 appears to have aliases. This is because the Nyquist frequency is lower than the analog bandwidth of the test and measurement instrument 100, which is lower than the frequency of the sine signal. In the example waveform of Figure 2, a 13.28125 GHz sine signal was acquired at a sampling rate of 3.124 GS / s, resulting in the aliased waveform shown in plot 200 of Figure 2.

[0020] Once the signal under test is acquired, processor 112 can determine the signal's exact bit rate or baud rate and reconstruct the received signal samples in acquisition memory 110. In some embodiments, the bit rate may be determined by a user entering the frequency of the signal under test via user input 114. However, in other instances where the frequency of the signal under test is unknown, processor 112 may iteratively adjust the aliased waveform signal to generate an eye diagram until the eye diagram has the widest horizontal opening. That is, different bit rates or baud rates can be selected until the eye of the eye diagram is most open. In some embodiments, the user may configure how accurate the bit rate or baud rate detection should be via user input 114. For example, FIGS. 3 and 4 illustrate eye diagrams 300 and 400 derived from samples acquired in acquisition memory 110. Eye diagram 300 of Figure 3 is more open than eye diagram 400 of Figure 4 and therefore has a more accurate bit rate or baud rate than the eye diagram of Figure 4. From the eye diagram, the bit rate or baud rate can be determined based on the horizontal opening of the eye.

[0021] Once the bit rate or baud rate is determined, the processor 112 can then reconstruct the signal under test and place each received sample in the appropriate position within the signal, since the sampling rate of the test and measurement instrument 100 is known. The processor 112 can then output the reconstructed signal to a display or other device. For example, if the bit rate (i.e., how often each bit of the signal is received) is known and the frequency at which samples are taken is known, the processor 112 can use this information to properly place each sample in the reconstructed signal. That is, if the bit rate or baud rate and sample rate are known for all received samples, the processor 112 knows how many bits to skip before placing the sample in the reconstructed signal. The test and measurement instrument 100 does not use hardware triggers or hardware clock recovery to recover the clock.

[0022] Figure 5 is an example plot 500 showing a reconstructed signal of the captured signal of Figure 2. Once the processor 112 determines the correct position for each bit, the bits are placed in their appropriate positions and the reconstructed signal may be displayed on the display 116 of the test and measurement instrument 100.

[0023] In some embodiments, the test and measurement instrument 100 may include a phase-locked loop (PLL). A PLL is a control system that generates an output clock signal and relates its phase to the phase of an input signal. When a PLL is used in some instances to track low-frequency jitter, the processor 112 can adjust the bit rate or baud rate along sections of the reproduced waveform to mimic the effect of the PLL. The analog-to-digital converter 108 samples at several gigasamples per second, which is much higher than the typical PLL bandwidth of tens of megahertz. This allows the bit rate or baud rate to be adjusted to provide enough bits or symbols in local sections of the waveform to track low-frequency jitter.

[0024] The processor 112 can also detect the pattern length based on the fact that an eye diagram becomes a pattern waveform when the pattern length is correctly detected. The difference between an eye diagram and a pattern waveform is that for each horizontal position, an eye diagram can have multiple values ​​in the vertical direction, as shown in Figures 3 and 4, while a pattern waveform has only one value in the vertical direction, as shown in Figure 5. In the samples shown in Figures 2 to 5, the sine signal under test can be treated as a repeating pattern with a pattern length of 2. This is because there are two bits in each period of the sine wave. When the pattern length is set to 2, the pattern waveform becomes the reproduced waveform 500 shown in Figure 5. For example, for a PRBS15 pattern, the pattern length is 2^15-1. Each bit in the pattern is repeated after an integer number of pattern repetitions.

[0025] In some examples, the processor 112 may adjust the sample rate of the analog-to-digital converter 108 to avoid situations where the sample rate becomes synchronous with the signal bit rate or baud rate. Also, because the processor 112 can adjust the sample rate, the processor 112 can sample the same signal under test using a variety of different sample rates. The same frequency components in a signal may alias to different frequencies using different sample rates. The processor 112 can use each of these differently acquired signals to determine the most accurate clock recovery to reconstruct the signal under test.

[0026] 6 is a flowchart illustrating the operation of a test and measurement instrument 100 according to an embodiment described herein. In step 600, the test and measurement instrument 100 (having a Nyquist frequency lower than its analog bandwidth) receives a signal under test. The test and measurement instrument 100 has a sample rate of at least 2 GS / s.

[0027] In step 602, the processor 112 of the test and measurement instrument 100 determines the frequency of the signal under test based on the acquired signal acquired during step 600 and stored in the acquisition memory 110. To determine the frequency, in some examples, the processor 602 generates an eye diagram and iteratively adjusts the bit rate or baud rate until the eye diagram has the widest horizontal opening.

[0028] Once the bit rate or baud rate is determined, the processor 112 can reconstruct the signal under test based on the sampling rate of the test and measurement instrument 100 and the bit rate or baud rate of the signal under test determined in step 604. The processor 112 can determine the bit rate or baud rate and reconstruct the signal under test without using a hardware pattern trigger, which allows the test and measurement instrument 100 to sample data at a faster rate but at a lower cost than using a real-time sampling oscilloscope.

[0029] Embodiments of the disclosed technology offer advantages over conventional real-time and equivalent-time test and measurement instruments, such as lower vertical noise, less horizontal jitter, and faster acquisition speeds compared to real-time and equivalent-time test and measurement instruments, all at a lower cost.

[0030] Equivalent-time test and measurement instruments have a very low noise floor due to their straightforward analog, single-path sampling technology and high-resolution analog-to-digital converters. Real-time test and measurement instruments have higher noise levels due to the presence of gain stages in the analog signal path and the interleaving between multiple track-and-hold circuits and analog-to-digital converters, which cannot completely avoid mismatches between these interleaved pipes. While mismatches can be mitigated through calibration, there is still residual mismatch error, and environmental changes can affect the mismatch. However, the disclosed embodiment uses a single high-resolution analog-to-digital converter, which reduces quantization errors compared to the multiple 8-bit analog-to-digital converters used in real-time test and measurement instruments.

[0031] The disclosed embodiments have low horizontal jitter due to the fast acquisition times and lack of interleaving errors that real-time test and measurement instruments have. In equivalent-time test and measurement instruments, horizontal jitter can only be improved by using expensive additional hardware.

[0032] Examples of the present disclosure generally provide high-speed acquisition speeds, ranging from several GS / s to tens of GS / s (e.g., 1 GS / s to 100 GS / s in some embodiments, or 2 GS / s to 25 GS / s in other embodiments), which are much faster than equivalent-time test and measurement instruments, which operate at lower sample rates, such as 200 GS / s, to achieve low vertical noise. Real-time test and measurement instruments provide very fast acquisition speeds of 200 GS / s, but do so using the interleaving method described above, which introduces vertical noise and horizontal jitter and increases cost.

[0033] That is, real-time test and measurement instruments are expensive due to the hardware required to achieve very high sample rates. Equivalent-time test and measurement instruments are also expensive because they require a clock signal source to trigger the sampler. However, embodiments of the present disclosure provide a low-cost test and measurement instrument with high acquisition rates using a single analog-to-digital converter and no trigger circuitry.

[0034] In some embodiments of the present disclosure, a test and measurement instrument can include both real-time and real-equivalent-time modes. The real-time mode of a test and measurement instrument provides a complete picture of the signal, while the real-equivalent-time mode can provide higher bandwidth channels with the same number of analog-to-digital converters in the oscilloscope. In real-time mode, the test and measurement instrument uses multiple analog-to-digital converters per channel, resulting in a higher sample rate. In real-equivalent-time mode, the test and measurement instrument uses only one analog-to-digital converter per channel, resulting in a lower sample rate but a faster acquisition speed.

[0035] 7-9 illustrate example block diagrams of portions of a test and measurement instrument that include both real-time and real-equivalent time modes. As will be appreciated by those skilled in the art, the test and measurement instruments of FIGS. 7-9 may include components not shown, such as, but not limited to, user inputs, displays, and other hardware components as shown in FIG.

[0036] 7-9 show four channels for ease of explanation, but embodiments of the disclosed technology are not limited to four channels. Each channel includes a vertical gain / offset 702, a sampler track and hold circuit 704, and an analog-to-digital converter 706, similar to the vertical offset 104, sample track and hold circuit 106, and analog-to-digital converter 108 described above.

[0037] 7 and 8 illustrate a test and measurement instrument 700 operating in real-time mode. 97 shows a test and measurement instrument 700 operating in real equivalent time mode. In this example, during the real-time mode shown in FIG. 7, channels 2, 3, and 4 are each disconnected, and channel 1 operates as the real-time mode channel. A signal from the device under test is received on channel 1 and processed through a vertical gain / offset 702 and a sampler track and hold circuit 704. Switches 708 and relays may be provided to route the signal to a number of different analog-to-digital converters 706.

[0038] In this example, the switch is operated to route the signal from the sampler track and hold circuit 704 to each of the four analog-to-digital converters 706. In this example, the analog-to-digital converters 706 are each 50 GS / s, so routing the signal from the sampler track and hold circuit 704 to each of the four A / D converters 706 achieves a sampling rate of 200 GS / s. The switch 708 may be operated by either the processor 712 or another controller component within the test and measurement instrument based on the selected mode of the test and measurement instrument. As will be appreciated by those skilled in the art, the selected mode of the test and measurement instrument may be selected, for example, from a user interface such as that shown in FIG. 1.

[0039] The signal may be sampled by four analog-to-digital converters 706 and reconstructed by a processor 712 using any known method, such as time-interleaving the analog-to-digital converters 706 in real-time mode.

[0040] The test and measurement instrument 700 can be used in a number of different real-time mode configurations, depending on the operator's needs and the signal under test. For example, instead of activating a single channel in real-time mode as shown in Figure 7, two channels may be configured and activated as real-time channels.

[0041] In FIG. 8, channels 1 and 3 can be configured as two real-time 33 GHz channels, each at 100 GS / s. That is, each of the two channels, 1 and 3, utilizes two 50 GS / s analog-to-digital converters 706. Meanwhile, channels 2 and 4 are disconnected and unused during this mode. The sample rate for real-time mode may be selected, for example, via a user interface. A controller or processor within the test and measurement instrument may then operate a switch, and the user interface may inform the user which channel is currently operating in real-time mode.

[0042] 9 shows the test and measurement instrument in real equivalent time mode, with channels 1-4 each connected to their respective analog-to-digital converters 706. This mode is the same as that shown in FIGS. 6 Whether in real-time mode or real-equivalent time mode, the output of analog-to-digital converter 706 is sent to acquisition memory 710 for further processing by processor 712, as described in detail above with respect to FIG.

[0043] Although Figures 7-9 show only four channels and four analog-to-digital converters 706, one skilled in the art will appreciate that additional channels and additional analog-to-digital converters 706 may be provided in test and measurement instrument 700. The four channels shown in Figures 7-9 are for ease of illustration and explanation only.

[0044] A test and measurement instrument 700 that includes both a real-time mode and a real-equivalent-time mode can use the real-time mode to check all components of the signal under test because there is little or no aliasing in the signal's acquired data. The real-time mode can also be used to detect the symbol rate and pattern length. In the real-equivalent-time mode, the symbol rate and pattern length detected from the real-time mode may then be used in the real-equivalent-time mode in some instances. In the real-equivalent-time mode, the test and measurement instrument 700 can use wider bandwidth channels to measure multiple signals simultaneously, which may be used, for example, during compliance testing of a device under test.

[0045] As mentioned above, real-time mode increases the sample rate of the channel used for real-time acquisition. However, for some wide-bandwidth test and measurement instruments, the gap between the analog bandwidth and the Nyquist frequency may be small. For example, a real-time channel might have an analog bandwidth of 20 GHz and a Nyquist frequency of 25 GHz, using a 50 GS / s analog-to-digital converter 706. Even an analog front end with a minus 3 decibel (dB) gain at 20 GHz can pass some signal components above the 25 GHz analog bandwidth with some attenuation. These attenuated high-frequency components will alias after the track-and-hold sampler 704 and analog-to-digital converter 706. In such situations, real-time equivalent mode can be used to determine whether there are significant high-frequency components above the Nyquist frequency passing through the analog front end of the test and measurement instrument using software data clock recovery, as described in more detail below.

[0046] Additionally, in some embodiments, the real equivalent time mode of test and measurement instrument 700 may be used to measure signals that do not have a repetitive pattern. For non-repetitive data signals, the real equivalent time mode can be used to obtain an eye diagram and perform the eye diagram measurements described above.

[0047] In one example of the operation of the test and measurement instrument 700, a signal is acquired from a signal source generating a 32 GBaud four-level pulse amplitude modulation (PAM4) data pattern using a pseudorandom binary sequence (PRBS) such as PRBS13Q with spread spectrum clocking (SSC). In real-time mode, the signal is sampled at 200 GS / s with a 33 GHz analog bandwidth, and in real-time equivalent-time mode, the signal is sampled at 50 GS / s with a 33 GHz analog bandwidth.

[0048] Figure 10 shows a plot 1000 of a recovered waveform using the real-time mode of the test and measurement instrument 700. The sample rate in real-time mode is high enough for a 33 GHz bandwidth signal to see the PAM4 pattern in the recovered waveform. Figure 11 shows a plot 1100 of a recovered waveform using real-time equivalent time mode, where the sample rate is 50 GS / s. The Nyquist frequency is 25 GHz, which is lower than the analog bandwidth of 33 GHz. However, because the signal has significant energy above 25 GHz, aliases are visible in the recovered waveform, and the PAM4 pattern is not visible.

[0049] In high-speed signaling, non-return-to-zero or PAM4, there is a nominal UI, which is the inverse of the nominal bit rate or baud rate. For example, 32 gigabaud (GBaud) is the nominal baud rate for the PCIe (Peripheral Component Interconnect Express) 6.0 serial computer expansion bus standard. However, the actual baud rate constantly changes during data transmission. The UI / baud rate variation is partly due to the design. For example, the SSC method intentionally slows the system clock by 5000 ppm (i.e., 0.5%) of the nominal baud rate. Another factor that causes the UI or baud rate to vary is intrinsic system clock jitter, which is due to imperfect system clocks. A clock data recovery unit within a test and measurement instrument (which can be a function of a processor) is designed to eliminate or reduce the effects of low-frequency jitter, including SSC, by tracking the recovered clock to the low-frequency components of the system clock embedded in the data signal. There are various software clock data recoveries (SCDRs) developed for real-time oscilloscopes, provided the raw sampled waveform data is free of aliases. However, these SCDRs do not work when the raw sampled waveform is aliased.

[0050] Embodiments of the present disclosure relate to clock data recovery for a real equivalent time test and measurement instrument, or clock data recovery for a real equivalent time mode of a test and measurement instrument, wherein the real equivalent time mode or clock data recovery for a real equivalent time test and measurement instrument can track low frequency components of UI changes.

[0051] FIG. 12 is a flowchart illustrating software clock recovery and signal-under-test reconstruction in a real-equivalent-time mode or apparatus according to some examples of the disclosed technique. In step 1200, the apparatus samples or acquires a waveform in the form of a time vs. voltage pair (t, y) for an electrical signal or time vs. power for an optical signal. For simplicity, the following describes an electrical signal, but those skilled in the art will recognize that the signal may be an optical signal in some embodiments. The vector of sampling times t is uniformly spaced. For example, if the sample rate is 3.125 GS / s, the spacing of the vector t is the reciprocal of the uniform sample rate.

[0052] In step 1202, a first window of samples (t_i, y_i, i=1, 2, ..., w) is obtained. The window size w is set to be large enough to obtain enough samples to calculate a local average UI value, yet small enough to capture slow changes in the UI values.

[0053] To obtain the first window of samples, a set of estimated UI values ​​{period_1_j, j=1, 2,…, p} is defined around the nominal UI value. For the first window of samples, there are a large number of estimated UI values ​​in this set. For example, if SSC is turned on in a test and measurement instrument, the average UI value for the first window is any value within a range of 5000 ppm plus the uncertainty of the system clock, so the period value p is set to a very large value. The resolution of the estimated UI can be improved by an iterative search.

[0054] For each estimated UI value "period_1_j", a time vector as shown in Equation 1 is defined as the normalized time offset of the eye diagram.

[0055] t_eye_ij=mod(t_i, period_1_j) / period_1_j (1)

[0056] Since t_eye_ij has a one-to-one mapping with t_i, the tuple (t_eye_ij, y_i, i=1, 2, …, w) can be determined, from which an eye diagram can be generated. For each estimated UI value of period_1_j, an eye diagram can be generated. Various procedures can be used to select the optimal j value that results in the best eye opening.

[0057] For example, one process for selecting the optimal j value is to define a vertical range {y_low, y_high} that covers the range of the central portion of the samples obtained, e.g., around the mid-crossing level. For the set t_mid_crossing_j={t_eye_j} for each j, y_j is found to fall within the vertical range {y_low, y_high}.

[0058] Then, using equation 2, e_j_k can be found.

[0059] e_j_k=std(mod(t_mid_crossing_j + t_offset_1_k, 1)), k=1, 2, …, q (2)

[0060] where t_offset_1_k, k=1, 2, …, q is a set of offset values ​​between [0, 1].

[0061] Then, for each j value, an optimal k value is found, which is denoted as jkOptimal (Optimal).

[0062] e_jkOptimal=min({e_j_k}), k=1, 2, …, q (3)

[0063] The optimal j value, denoted as jOptimal, is obtained as follows:

[0064] e_jOptimal=min({e_jkOptimal}), j=1, 2, …, p (4)

[0065] The (jkOptimal, jOptimal) pair may be saved for later use, where jkOptimal corresponds to jOptimal. At this point, the average UI value of the first window is period_1_jOptimal, and the horizontal offset is t_offset_1_jkOptimal.

[0066] After obtaining the averaged UI for the first window of samples in step 1202, a second window of samples (t_i, y_i, i=w+1, w+2, …, 2w) having the same window size w is obtained in step 1204. The same process can be used to determine the period, “period_2_jOptimal,” and horizontal offset, “t_offset_2_jkOptimal,” of the averaged UI values ​​for the samples in the second window. The second window of samples has a narrower unit interval search range than the first window of samples.

[0067] The process for obtaining the second set of samples is slightly different in that the set of estimated UI values ​​{period_2_j} is set to be near period_1_jOptimal rather than near the nominal UI value, and the period value p is set to a much smaller value to ensure that the low-frequency changes in the UI values ​​are not too large or too rapid, in order to improve clock-data recovery speed.

[0068] In step 1206, the remaining waveform samples are iterated through in the same manner as in step 1204 to obtain an array of average UI values ​​{period_n_jOptimal, n=1, 2, …, N} and an array of horizontal offsets {t_offset_n_jkOptimal, n=1, 2, …, N}. The UI coverage of each subsequent window of samples is narrower than the unit interval coverage of the first window of samples.

[0069] In step 1208, the absolute sampling time t is converted from the format of the original waveform pair {t, y} to {t_normalized, y} based on the array of average UI values ​​{period_n_jOptimal, n=1, 2, ..., N} and the array of horizontal offsets {t_offset_n_jkOptimal, n=1, 2, ..., N}. This normalized sampling time t_normalized represents the sampling time in terms of UI units rather than the absolute time represented by the sampling time t. A variety of approaches known to those skilled in the art can be used to calculate the normalized sampling time t_normalized, including filtering the average UI values ​​{period_n_jOptimal, n=1, 2, ..., N}.

[0070] In step 1208, using the known pattern length "PatternLength", the pattern normalized sampling time can be derived as follows:

[0071] t_pattern_normalized=mod(t_normalized, PatternLength) (5)

[0072] Next, in step 1210, the set {t_pattern_normalized, y} can be permuted based on t_pattern_normalized to generate a set {t_pattern, y_pattern}. The set {t_pattern, y_pattern} represents a pattern waveform recovered or reconstructed from a real equivalent time acquisition. In some examples, the pattern waveform from a real equivalent time acquisition obtained using this process may not be uniformly spaced in time. However, in some examples, the pattern waveform may be resampled to be uniformly spaced in time.

[0073] In some examples, the clock data recovery operation shown in FIG. 12 may be used on samples of an unaliased signal captured by a real-time oscilloscope.

[0074] A numerical example can be taken from a signal source generating a 32 GBaud (Giga Baud) PAM4 PRBS13Q data pattern with or without SSC. A real-equivalent-time mode or device samples this signal at 3.125 GS / s. Because the sample rate in this example is much lower than the analog bandwidth required to capture a 32 GBaud signal, aliasing occurs in the sampled waveform.

[0075] Figures 13-15 show an eye diagram 1300 of a signal obtained with SSC off, a plot 1400 of a portion of the reconstructed pattern waveform, and a plot 1500 of UI as a function of time. With SSC off, the system clock remains relatively stable. Eye diagram 1300 plots each of the eye diagrams generated in steps 1202, 1204, and 1206. Plot 1400 shows the waveform reconstructed using step 1200. As shown, the pattern waveform represents a PRBS13Q signal. Plot 1500 in Figure 15 shows that with SSC off, the system clock and baud rate remain fairly stable.

[0076] Figures 16-18 show an eye diagram 1600 of a signal obtained with SSC turned on, a plot 1700 of a portion of the reproduced pattern waveform, and a plot 1800 of UI as a function of time. With SSC turned on, Figure 18 shows that SSC provides a broadening down to approximately 5000 ppm relative to the baud rate. Figures 16-18 demonstrate that the operation shown in Figure 12 and described above can remove most of the SSC, as the eye diagram 1600 in Figure 16 closely matches the eye diagram 1300 in Figure 13, demonstrating that the operation shown in Figure 12 removes most of the SSC. Varying the window size in the operation shown in Figure 12 emulates the effect of various phase-locked loop (PLL) settings, which allows for a more open eye diagram.

[0077] Aspects of the disclosed technology may operate on specially created hardware, firmware, digital signal processors, or specially programmed general-purpose computers, including processors that operate according to programmed instructions. The terms "controller" or "processor" herein contemplate microprocessors, microcomputers, ASICs, and dedicated hardware controllers, among others. Aspects of the disclosed technology may be implemented as computer-usable data and computer-executable instructions, such as one or more program modules, executed by one or more computers (including a monitoring module) or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc., which, when executed by a processor in a computer or other device, perform particular tasks or implement particular abstract data formats. Computer-executable instructions may be stored in computer-readable storage media, such as hard disks, optical disks, removable storage media, solid-state memory, RAM, etc. Those skilled in the art will appreciate that the functionality of the program modules may be combined or distributed as desired in various embodiments. Furthermore, such functionality may be embodied in whole or in part in firmware or hardware equivalents, such as integrated circuits, field programmable gate arrays (FPGAs), etc. Certain data structures may be used to more effectively implement one or more aspects of the disclosed technology, and such data structures are considered within the scope of the computer-executable instructions and computer-usable data described herein.

[0078] The disclosed aspects may, in some cases, be implemented in hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried by or stored on one or more computer-readable media, which may be read and executed by one or more processors. Such instructions may be referred to as a computer program product. As used herein, computer-readable media refers to any medium that can be accessed by a computing device. By way of example, and not limitation, computer-readable media may include computer storage media and communication media.

[0079] "Computer storage media" means any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory and other memory technologies, compact disc read-only memory (CD-ROM), digital video disc (DVD) and other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage and other magnetic storage devices, and any other volatile or nonvolatile, removable or non-removable medium implemented in any technology. "Computer storage media" excludes signals themselves and transitory forms of signal transmission.

[0080] A communication medium means any medium usable for communicating computer-readable information. By way of example, and not limitation, communication media may include coaxial cable, fiber optic cable, air, or any other medium suitable for communicating electrical, optical, radio frequency (RF), infrared, acoustic, or other types of signals. Example

[0081] The following examples are provided to aid in understanding the technology disclosed in this application. Embodiments of the technology may include one or more of the examples described below, and any combination thereof.

[0082] Example 1 is an oscilloscope having a Nyquist frequency lower than the analog bandwidth, comprising: an input configured to receive a signal under test having a repeating pattern; a single analog-to-digital converter configured to receive the signal under test and sample the signal under test at a particular sample rate over a plurality of repeating patterns; and one or more processors configured to determine the frequency of the signal under test and to recreate (reconstruct) the signal under test without a trigger based on the determined frequency of the signal under test and the sample rate.

[0083] Example 2 is the oscilloscope of Example 1, wherein the one or more processors are configured to automatically generate an eye diagram and determine a frequency of the signal under test by iteratively adjusting the selected frequency of the signal under test until the horizontal opening of the eye diagram is at its widest.

[0084] Example 3 is the oscilloscope of either example 1 or 2, further comprising a user input configured to receive a frequency of the signal under test from a user.

[0085] Example 4 is the oscilloscope of any of Examples 1 to 3, wherein the sample rate is between 1 giga-samples per second and 100 giga-samples per second.

[0086] Example 5 is the oscilloscope of example 4, wherein the sample rate is between 2 giga-samples per second and 25 giga-samples per second.

[0087] Example 6 is the oscilloscope of any of Examples 1 to 5, wherein the single analog-to-digital converter is at least a 12-bit analog-to-digital converter.

[0088] Example 7 is an oscilloscope according to any one of Examples 1 to 6, wherein the one or more processors are configured to recreate (reconstruct) the signal under test without a trigger based on the determined frequency and the sample rate of the signal under test by determining a corresponding position of each sampled component of the signal under test in the recreated signal under test based on the determined frequency and the sample rate.

[0089] Example 8 is the oscilloscope of any of Examples 1 to 7, wherein the one or more processors are further configured to adjust a sample rate of the analog-to-digital converter and cause the analog-to-digital converter to sample the signal under test at different sample rates.

[0090] Example 9 is the oscilloscope of Example 8, wherein the one or more processors are further configured to determine a frequency of the signal under test based on the signal under test sampled at different sample rates.

[0091] Example 10 is a method for reconstructing a signal under test in an oscilloscope having a Nyquist frequency lower than the analog bandwidth, comprising: receiving a signal under test having a repeating pattern; sampling the signal under test at a particular sample rate over a plurality of repeating patterns using a single analog-to-digital converter to digitize the signal; determining a frequency of the sampled signal under test; and reconstructing the signal under test without using a trigger based on the determined frequency and sampling rate.

[0092] Example 11 is the method of example 10, wherein the process of determining the frequency of the signal under test includes a process of automatically generating an eye diagram and iteratively adjusting the selected frequency of the signal under test until the horizontal opening of the eye diagram is at its widest.

[0093] Example 12 is the method of any of Examples 10 or 11, further comprising receiving a frequency of the signal under test from a user input.

[0094] Example 13 is the method of any of examples 10-12, wherein the sample rate is between 1 giga-samples per second and 100 giga-samples per second.

[0095] Example 14 is the method of example 13, wherein the sample rate is between 2 giga-samples per second and 25 giga-samples per second.

[0096] Example 15 is the method of any of examples 10-14, wherein the single analog-to-digital converter is at least a 12-bit analog-to-digital converter.

[0097] Example 16 is the method of any of Examples 10 to 15, further comprising adjusting a sample rate of an analog-to-digital converter to cause the analog-to-digital converter to sample the signal under test at different sample rates.

[0098] Example 17 is the method of example 16, wherein determining the frequency of the signal under test includes determining the frequency of the signal under test based on the signal under test sampled at different sample rates.

[0099] Example 18 is one or more computer-readable storage media including instructions that, when executed by one or more processors of a test and measurement instrument, cause the test and measurement instrument to receive a signal under test having a repeating pattern, sample the signal under test over multiple repeating patterns at a particular sample rate using a single analog-to-digital converter to digitize the signal, determine the frequency of the sampled signal under test, and recreate the signal under test without using a trigger based on the determined frequency and sampling rate.

[0100] Example 19 is the one or more computer-readable storage media of Example 18, further including instructions that cause the test and measurement instrument to automatically generate an eye diagram and determine the frequency of the signal under test by iteratively adjusting the selected frequency of the signal under test until the horizontal opening of the eye diagram is at its widest.

[0101] Example 20 is one or more computer-readable storage media of any of Examples 18 or 19, wherein the sample rate is between 1 giga-samples per second and 100 giga-samples per second.

[0102] Example 21 is an oscilloscope having a real-time mode and a real-equivalent-time mode, comprising first and second channels, first and second analog-to-digital converters, and one or more processors configured to electrically couple the first channel to both the first and second analog-to-digital converters and electrically decouple the second channel from the first and second analog-to-digital converters during the real-time mode, and electrically couple the first channel to the first analog-to-digital converter and electrically couple the second channel to the second analog-to-digital converter during the real-time mode.

[0103] Example 22 is the oscilloscope of Example 21, wherein during the real equivalent time mode, the one or more processors are further configured to determine a frequency of the signal under test received on the first channel and to recreate (reconstruct) the signal under test without a trigger based on the determined frequency of the signal under test and the sample rate of the first analog-to-digital converter.

[0104] Example 23 is the oscilloscope of Example 22, in which the signal under test includes a repetitive pattern.

[0105] Example 24 is the oscilloscope of Example 23, wherein the one or more processors are configured to automatically generate an eye diagram and determine the frequency of the signal under test by iteratively adjusting the selected frequency of the signal under test until the horizontal opening of the eye diagram reaches its widest state.

[0106] Example 25 is an oscilloscope of either Example 23 or 24, wherein the one or more processors are further configured to recreate (reconstruct) the signal under test without a trigger based on the determined frequency and sample rate of the signal under test by determining a corresponding position of each sampled component of the signal under test in the recreated signal under test based on the determined frequency and sample rate.

[0107] Example 26 is the oscilloscope of any of Examples 23 to 25, wherein the one or more processors are further configured to adjust a sample rate of the analog-to-digital converter and cause the analog-to-digital converter to sample the signal under test at different sample rates.

[0108] Example 27 is the oscilloscope of Example 26, wherein the one or more processors are further configured to determine a frequency of the signal under test based on the signal under test sampled at different sample rates.

[0109] Example 28 is the oscilloscope of any of Examples 22 to 26, further comprising a user input configured to receive a frequency of the signal under test from a user.

[0110] Example 29 is an oscilloscope of any of Examples 21 to 28, further comprising a plurality of switches, wherein the one or more processors are further configured to control each of the plurality of switches to electrically couple the first and second channels to the first and second analog-to-digital converters based on a mode of the test and measurement instrument.

[0111] Example 30 is an oscilloscope of any of Examples 21 to 29, wherein the one or more processors are further configured to sample the signal under test in either a real-time mode or a real-equivalent time mode and reproduce the signal under test by: acquiring a first window of samples, the process including a process of estimating a unit interval value close to a nominal unit interval value to obtain an average first unit interval value having a first period; acquiring a second window of samples, the process including a process of estimating a unit interval value close to the average first unit interval value to obtain an average second unit interval value; normalizing the sampling time based on the first window of samples and the second window of samples; and reproducing the signal under test based on the normalized sampling time.

[0112] Example 31 is a method for reproducing a signal under test in an oscilloscope, comprising: a process for sampling the signal under test; a process for determining a nominal unit interval value based on the signal under test; a process for obtaining a first window of samples, the process including a process for estimating a unit interval value close to the nominal unit interval value to obtain an average first unit interval value having a first period value; a process for obtaining a second window of samples, the second window of samples having a unit interval search range narrower than the unit interval search range for the first window of samples, the process including a process for estimating a unit interval value close to the average first unit interval to obtain an average second unit interval value; a process for normalizing the sampling time based on the first window of samples and the second window of samples; and a process for reproducing the signal under test based on the normalized sampling time.

[0113] Example 32 is the method of example 31, wherein the signal under test includes a repeating pattern.

[0114] Example 33 is the method of any of Examples 31 or 32, wherein the process of sampling the signal under test includes a process of acquiring the signal under test having an analog bandwidth greater than the Nyquist frequency of an analog-to-digital converter that samples the signal under test.

[0115] Example 34 is a method of any of Examples 31 to 33, wherein the unit interval investigation range for the second window of samples is narrower than the unit interval investigation range for the first window of samples, and further includes a process of obtaining a third window of samples, including a process of estimating a unit interval value close to the average second unit interval value to obtain an average third unit interval value, and a process of normalizing the sampling time based on the first window of samples, the second window of samples, and the third window of samples.

[0116] Example 35 is one or more computer-readable storage media including instructions that, when executed by one or more processors of a test and measurement instrument, cause the test and measurement instrument to electrically couple a first channel to both the first analog-to-digital converter and the second analog-to-digital converter and electrically decouple the second channel from the first analog-to-digital converter and the second analog-to-digital converter during a real-time mode to acquire a signal under test, and to electrically couple the first channel only to the first analog-to-digital converter and electrically couple the second channel only to the second analog-to-digital converter during a real-equivalent time mode to acquire a signal under test on either the first channel or the second channel.

[0117] Example 36 is one or more computer-readable storage media of claim 35, further including instructions for causing the test measurement to determine a frequency of the signal under test received on the first channel during the real equivalent time mode, and to reconstruct the signal under test without a trigger based on the determined frequency of the signal under test and the sample rate of the first analog-to-digital converter.

[0118] Example 37 is the one or more computer-readable storage media of example 36, wherein the signal under test includes a repeating pattern.

[0119] Example 38 is one or more computer-readable storage media of Example 38, wherein the one or more processors are configured to automatically generate an eye diagram and determine the frequency of the signal under test by iteratively adjusting the selected frequency of the signal under test until the horizontal opening of the eye diagram reaches its widest state.

[0120] Example 39 is one or more computer-readable storage media of any of Examples 35 to 38, including instructions to cause a test and measurement instrument in either a real-time mode or a real-equivalent time mode to perform the following processes: sampling the signal under test on either a first channel or a second channel; determining a nominal unit interval value based on the signal under test; obtaining a first window of samples including a process of estimating a unit interval value close to the nominal unit interval value to obtain an average first unit interval value having a first period value; obtaining a second window of samples having a unit interval interrogation range narrower than the unit interval interrogation range for the first window of samples including a process of estimating a unit interval value close to the average first unit interval value to obtain an average second unit interval value; normalizing a sampling time based on the first window of samples and the second window of samples; and reconstructing the signal under test based on the normalized sampling time.

[0121] Although the above-described versions of the disclosed subject matter have many advantages that have been described or that will be apparent to those skilled in the art, not all of these advantages or features are required in every version of the disclosed devices, systems, or methods.

[0122] Additionally, the description herein refers to specific features. It should be understood that the disclosure herein includes all possible combinations of these specific features. When a specific feature is disclosed in connection with a particular aspect or embodiment, that feature can also be used in connection with other aspects and embodiments, to the extent possible.

[0123] Furthermore, when this application refers to a method having two or more defined steps or processes, these defined steps or processes may be performed in any order or simultaneously, unless the circumstances do not preclude this possibility.

[0124] Although specific embodiments of the invention have been illustrated and described for purposes of illustration, it will be appreciated that various modifications can be made therein without departing from the spirit and scope of the invention. Accordingly, the invention should not be limited except as by the appended claims.

Claims

1. 1. An oscilloscope having a Nyquist frequency lower than the analog bandwidth, an input configured to receive a signal under test having a repeating pattern; a single analog-to-digital converter configured to receive the signal under test and sample the signal under test over a plurality of repeating patterns at a particular sample rate; one or more processors Equipped with the one or more processors: adjusting the sample rate of the analog-to-digital converter to cause the analog-to-digital converter to sample the signal under test at different sample rates; determining a frequency of the signal under test based on the signal under test sampled at the various sample rates; an oscilloscope configured to reproduce the signal under test without a trigger based on the determined frequency of the signal under test and the sample rate;

2. 2. The oscilloscope of claim 1, wherein the one or more processors are configured to automatically generate an eye diagram and determine the frequency of the signal under test by iteratively adjusting the selected frequency of the signal under test until the horizontal opening of the eye diagram is at its widest.

3. 2. The oscilloscope of claim 1, wherein the one or more processors are configured to reconstruct the signal under test without a trigger based on the determined frequency and sample rate of the signal under test by determining a corresponding position of each sampled component of the signal under test in the reconstructed signal under test based on the determined frequency and sample rate.

4. 1. A method for reproducing a signal under test in an oscilloscope having a Nyquist frequency lower than the analog bandwidth, comprising: receiving said signal under test having a repeating pattern; sampling the signal under test at different sample rates over a plurality of repeating patterns using a single analog-to-digital converter to digitize the signal under test; determining a frequency of the signal under test based on the signal under test sampled at various sample rates; reproducing the signal under test without using a trigger based on the determined frequency and the sampling rate; 1. A method for reproducing a signal under test comprising:

5. 5. The method of claim 4, wherein the step of determining the frequency of the signal under test includes the steps of automatically generating an eye diagram and iteratively adjusting the selected frequency of the signal under test until the horizontal opening of the eye diagram is at its widest.

6. A computer program comprising instructions which, when executed by one or more processors of an oscilloscope, cause the oscilloscope to perform the method of claim 4 or 5.

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