Semiconductor Devices

Abstract

To suppress surge voltage and to prevent destruction of a power semiconductor element.SOLUTION: A semiconductor device 1 comprises a main circuit 1a, a short-circuit current detection circuit 1b1, an abnormality detection circuit 1b2, a circuit for controlling output during abnormality 1b3 and a driver circuit 1b4. The main circuit 1a includes multi-phase high-side switch elements sw1 and sw2 and multi-phase low-side switch elements sw11 and sw12, and supplies power from wirings 3a and 3b to a load M such as a motor. The short-circuit current detection circuit 1b1 detects short-circuit current flowing in the main circuit 1a during short-circuit between the multi-phase wirings 3a and 3b. The abnormality detection circuit 1b2 detects an abnormal state in the semiconductor device 1. The circuit for controlling output during abnormality 1b3 continues an on-state of the high-side switch elements for prescribed time when occurrence of short-circuit current and occurrence of the abnormal state are recognized. The driver circuit 1b4 drives the main circuit 1a.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present technology relates to a semiconductor device that protects a power semiconductor element. [Background technology]

[0002] A power semiconductor module has a main circuit having power semiconductor elements (IGBTs: Insulated Gate Bipolar Transistors) required for power control such as switching, and a control circuit that controls the operation of the IGBTs, and is used, for example, in three-phase inverters that supply power to loads such as motors.

[0003] 17 is a diagram showing the configuration of a conventional power semiconductor module. The power semiconductor module 100 includes a main circuit 10 and a control circuit 200. The main circuit 10 includes IGBTs 11, . . . , 16, diodes D1, . . . , D6, capacitors C0, Cs, and a resistor Rs.

[0004] The control circuit 200 includes a high-side drive circuit 210 that drives and controls the IGBTs 11, 13, and 15 located on the high side of the main circuit 10, and a low-side drive circuit 220 that drives and controls the IGBTs 12, 14, and 16 located on the low side of the main circuit 10.

[0005] In main circuit 10, the U phase includes IGBTs 11 and 12 and diodes D1 and D2, the V phase includes IGBTs 13 and 14 and diodes D3 and D4, and the W phase includes IGBTs 15 and 16 and diodes D5 and D6.

[0006] The capacitor C0 functions as a smoothing capacitor, and the capacitor Cs functions as a snubber capacitor that absorbs surge voltages. The resistor Rs is a shunt resistor for current detection.

[0007] A load such as a motor M is connected to the output terminals out1, out2, and out3. The main circuit 10 converts the high DC voltage flowing through the line L1 into three-phase AC and supplies the AC to the motor M from AC wiring Lu (U-phase line), wiring Lv (V-phase line), and wiring Lw (W-phase line).

[0008] In addition, in the main circuit 10, an inductive load such as a motor M is driven by turning current on and off, so that in order to return the load current, diodes D1, ..., D6, which are FWDs (Free Wheel Diodes), are connected to the IGBTs 11, ..., 16, respectively.

[0009] That is, at the moment when IGBT11, ..., 16 are turned off, a back electromotive force is generated from the inductive load of motor M, so diodes D1, ..., D6 are connected in inverse parallel to IGBT11, ..., 16, respectively, to circulate the load current at this time.

[0010] The connections of the components will be described below. One end of the capacitors C0 and Cs, the collectors of IGBTs 11, 13, and 15, and the cathodes of diodes D1, D3, and D5 are connected via a line L1 that connects to the P terminal.

[0011] The other ends of the capacitors C0 and Cs and one end of the resistor Rs are connected through a line L2 that connects to the N terminal. The other end of the resistor Rs is connected to the emitters of the IGBTs 12, 14, and 16, the anodes of the diodes D2, D4, and D6, and the low-side drive circuit 220.

[0012] The emitter of IGBT11 is connected to the anode of diode D1, the collector of IGBT12, the cathode of diode D2, high-side drive circuit 210, and output terminal out1. The output terminal out1 is connected to motor M through U-phase line Lu. The connection point between the emitter of IGBT11 and the collector of IGBT12 forms a U-phase output end, and a U-phase current flowing through U-phase line Lu via this connection point is output from output terminal out1 to motor M.

[0013] The emitter of IGBT13 is connected to the anode of diode D3, the collector of IGBT14, the cathode of diode D4, high-side drive circuit 210, and output terminal out2. The output terminal out2 is connected to motor M through V-phase line Lv. The connection point between the emitter of IGBT13 and the collector of IGBT14 becomes the V-phase output end, and a V-phase current flowing through this connection point in V-phase line Lv is output from output terminal out2 to motor M.

[0014] The emitter of IGBT 15 is connected to the anode of diode D5, the collector of IGBT 16, the cathode of diode D6, high-side drive circuit 210, and output terminal out3. The output terminal out3 is connected to motor M through W-phase line Lw. The connection point between the emitter of IGBT 15 and the collector of IGBT 16 forms a W-phase output end, and a W-phase current flowing through this connection point in W-phase line Lw is output from output terminal out3 to motor M.

[0015] Meanwhile, high-side logic signals HIN(u), HIN(v), and HIN(w) for the U, V, and W phases are input to high-side drive circuit 210 from a host (hereinafter referred to as a host processor) such as a CPU (Central Processing Unit). Drive signals g1, g2, and g3 output from high-side drive circuit 210 are input to the gates of IGBTs 11, 13, and 15, respectively.

[0016] Low-side logic signals LIN(u), LIN(v), and LIN(w) for the U, V, and W phases are input from a host processor to the low-side drive circuit 220. Drive signals g4, g5, and g6 output from the low-side drive circuit 220 are input to the gates of IGBTs 12, 14, and 16, respectively.

[0017] Furthermore, when an abnormal state is detected, the low-side drive circuit 220 outputs an error signal er to the host processor and the high-side drive circuit 210. The output line of the error signal er is pulled up to 5 V by a resistor Rp, so the error signal er is at H level when there is no abnormal state, and at L level when there is an abnormal state.

[0018] A related technology has been proposed in which an integrated circuit that drives a high-side power semiconductor element turns off the high-side power semiconductor element when it receives an abnormality detection signal from an integrated circuit that drives a low-side power semiconductor element (Patent Document 1). [Prior art documents] [Patent documents]

[0019] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-055739 Summary of the Invention [Problem to be solved by the invention]

[0020] In the conventional power semiconductor module described above, if an output phase-to-phase short circuit occurs, the IGBT located on the high side may be destroyed by a surge voltage. The process leading to IGBT destruction will be explained using the example of a short circuit occurring between the U-phase line Lu and the V-phase line Lv.

[0021] 18 to 21 are diagrams for explaining the operation that leads to IGBT destruction when an output phase-to-phase short circuit occurs, and show states St1, . . . , and St4, respectively.

[0022] [State St1] Assume that a short circuit occurs between U-phase line Lu and V-phase line Lv (short-circuit location s1), IGBT 11 turns on (IGBTs 13 and 15 are off), and then IGBT 14 turns on (IGBTs 12 and 16 are off).

[0023] At this time, the short-circuit current flows as indicated by arrow ar1, that is, from the collector of IGBT11 to the emitter of IGBT11 to the short-circuited location s1 to the collector of IGBT14 to the emitter of IGBT14.

[0024] [State St2] When the short-circuit current shown in state St1 occurs, IGBT 14 switches from on to off. The flow of the short-circuit current at this time is shown by arrow ar2. That is, the short-circuit current flows from the collector of IGBT 11 to the emitter of IGBT 11 to the short-circuit point s1 to the anode of diode D3 to the cathode of diode D3, resulting in a freewheeling operation on the high side.

[0025] To explain the operation of switching the IGBT 14 from on to off, first, the short-circuit current flowing through the IGBT 14 is converted to a voltage by the shunt resistor Rs. The low-side drive circuit 220 compares the converted voltage with a preset threshold, and if the voltage exceeds the threshold, it detects the occurrence of a short-circuit current and turns the drive signal g5 to an L level, turning off the IGBT 14. In this manner, the IGBT 14 switches from on to off.

[0026] [State St3] IGBT 11 switches from on to off. At this time, the wiring inductance on the wiring through which the short-circuit current flows acts to continue the initial current flow, so the short-circuit current flows as indicated by arrow ar3.

[0027] That is, a short-circuit current flows in the following direction: anode of diode D2 → cathode of diode D2 → short-circuit point s1 → anode of diode D3 → cathode of diode D3. The switching operation of the IGBT 11 from on to off will be explained below. First, when the low-side drive circuit 220 detects a short-circuit current, it transmits an error signal er to the host processor. When the host processor recognizes the error signal er, it outputs an L-level high-side logic signal HIN(u) to the high-side drive circuit 210.

[0028] When the high side drive circuit 210 receives the L level high side logic signal HIN(u), it generates an L level drive signal g1 to turn off the IGBT 11. In this manner, the IGBT 11 switches from on to off.

[0029] In this way, in the operation of states St2 and St3, when a short circuit occurs between the U phase and the V phase, the low-side IGBT 14 is turned off, and then the high-side IGBT 11 is turned off to perform short-circuit current protection operation.

[0030] However, if an excessive short-circuit current occurs when an output phase-to-phase short circuit occurs, di / dt (the rate of change of current when the IGBT transitions from turn-on to turn-off (slope of the IGBT's cut-off current)) during regenerative operation becomes large. In this case, a surge voltage of (L × di / dt) is applied to IGBT 11 due to the influence of inductance L of the wiring, etc. where the short-circuited point s1 occurs, causing an avalanche breakdown in IGBT 11.

[0031] Avalanche breakdown in an IGBT refers to a state in which, when the IGBT is turned off, a voltage exceeding the breakdown voltage is momentarily applied between the collector and emitter of the IGBT due to a surge voltage caused by the load inductance, causing an avalanche current to flow.

[0032] [State St4] When avalanche breakdown occurs in IGBT11, a voltage (surge voltage) exceeding the breakdown voltage of IGBT11 is applied, causing avalanche breakdown of IGBT11. Then, immediately after power regeneration, the high-side U-phase IGBT11 is broken down and shorted out by the surge voltage, resulting in a reflux operation as shown in state St4. The flow of short-circuit current at this time is indicated by arrow ar2, which is the same as the flow shown in state St2 in Figure 19.

[0033] Figures 22 and 23 show simulated waveforms of IGBT breakdown when a short circuit occurs between the U and V phases. Figure 22 shows the operating waveforms in Figures 18 to 21, and Figure 23 shows an enlarged waveform for period T23 in Figure 22. The vertical axis represents voltage or current, and the horizontal axis represents time.

[0034] The waveform ch1 is the PU voltage between the node P and the node U, and is the collector-emitter voltage VCE of the IGBT 11. The waveform ch2 is the PN voltage between the node P and the node N, and the waveform ch3 is the U-phase current.

[0035] [Period T21] This shows the operating waveforms in state St1 in Fig. 18. The high-side IGBT 11 and the low-side IGBT 14 are turned on, causing an output phase-to-phase short circuit. [Period T22] This shows the operating waveforms in state St2 in Fig. 19. The occurrence of a short-circuit current activates the protection function, turning off the low-side IGBT 14, and causing the high-side to operate in a freewheeling mode.

[0036] [Period T23] This shows the operating waveforms in state St3 in Fig. 20. When the protection function issues an error signal er, the high-side IGBT 11 is turned off, leading to power regeneration.

[0037] [Period T24] This shows the operating waveforms in state St4 in Figure 21. Immediately after power regeneration, the high-side U-phase IGBT 11 is destroyed and shorted out by a surge voltage. Figure 23 also shows the peak of the PU voltage, the peak of the PN voltage, and the slope (-di / dt) of the interruption current.

[0038] The above describes IGBT destruction when a short circuit occurs between U-phase line Lu and V-phase line Lv, but similar IGBT destruction can also occur when a short circuit occurs between V-phase line Lv and W-phase line Lw, and when a short circuit occurs between U-phase line Lu and W-phase line Lw.

[0039] As described above, in the past, when an output phase-to-phase short circuit occurs, the IGBT located on the high side may be destroyed by a surge voltage. Therefore, there is a demand for technology that can effectively suppress the surge voltage and prevent IGBT destruction even when an output phase-to-phase short circuit occurs.

[0040] In one aspect, the present invention aims to provide a semiconductor device that suppresses surge voltages and prevents breakdown of IGBTs. [Means for solving the problem]

[0041] To solve the above problems, a semiconductor device is provided. The semiconductor device includes a main circuit, a driver circuit, a short-circuit current detection circuit, an abnormality detection circuit, and an abnormality output control circuit. The main circuit connects multiple series connections of high-side switch elements and low-side switch elements in parallel, and supplies power to a load from wiring connected to the connection points of the high-side switch elements and low-side switch elements. The driver circuit drives the main circuit. The short-circuit current detection circuit detects short-circuit current that flows in the main circuit when wiring between multiple phases is short-circuited. The abnormality detection circuit detects abnormal conditions within the device, including the occurrence of short-circuit current. The abnormality output control circuit is When the short-circuit current detection circuit detects the occurrence of a short-circuit current and the abnormality detection circuit detects the occurrence of an abnormal state, , the high-side switch element is kept in an on state for a predetermined time. Furthermore, when the abnormality output control circuit recognizes the occurrence of a short-circuit current and an abnormal state, it causes the high-side switch element to remain in the on state for a period of time equal to or longer than the on period within one period of the high-side logic signal that controls the switching operation of the high-side switch element. [Effects of the Invention]

[0042] It is possible to suppress surge voltage and prevent damage to power semiconductor elements. [Brief explanation of the drawings]

[0043] [Figure 1] 1A and 1B are diagrams illustrating a semiconductor device according to the present invention; [Figure 2] FIG. 1 is a diagram illustrating an example of the configuration of a power semiconductor module. [Figure 3] FIG. 2 is a diagram illustrating an example of the configuration of a low-side drive circuit. [Figure 4] FIG. 2 is a diagram illustrating an example of the configuration of a high-side drive circuit. [Figure 5] 10A and 10B are diagrams illustrating an example of detection of a short-circuit current by a short-circuit current detection circuit. [Figure 6] 10A and 10B are diagrams illustrating an example of detection of a short-circuit current by a short-circuit current detection circuit. [Figure 7] 10A and 10B are diagrams illustrating an example of detection of a short-circuit current by a short-circuit current detection circuit. [Figure 8] FIG. 2 is a diagram illustrating an example of the configuration of a short-circuit current detection circuit. [Figure 9] 4 is a time chart showing the operation of the short-circuit current detection circuit. [Figure 10] FIG. 2 is a diagram illustrating an example of the configuration of an abnormality output control circuit. [Figure 11] 10 is a diagram showing the input / output characteristics of an abnormality-time output control circuit and the operating state of a high-side IGBT. FIG. [Figure 12] 10 is a time chart for explaining an extension of the high-side return period when a short-circuit current occurs. [Figure 13] 10 is a time chart for explaining a suspension period of the high-side IGBT when an abnormality other than a short-circuit current is detected. [Figure 14] FIG. 10 is a diagram for explaining the flow of short-circuit current when an output phase-to-phase short circuit occurs in a case where the present invention is implemented. [Figure 15] FIG. 10 is a diagram for explaining the flow of short-circuit current when an output phase-to-phase short circuit occurs in a case where the present invention is implemented. [Figure 16] FIG. 10 is a diagram for explaining the flow of short-circuit current when an output phase-to-phase short circuit occurs in a case where the present invention is implemented. [Figure 17] FIG. 1 is a diagram showing the configuration of a conventional power semiconductor module. [Figure 18] 10 is a diagram for explaining the operation that leads to IGBT destruction when an output phase-to-phase short circuit occurs. FIG. [Figure 19] 10 is a diagram for explaining the operation that leads to IGBT destruction when an output phase-to-phase short circuit occurs. FIG. [Figure 20] 10 is a diagram for explaining the operation that leads to IGBT destruction when an output phase-to-phase short circuit occurs. FIG. [Figure 21] 10 is a diagram for explaining the operation that leads to IGBT destruction when an output phase-to-phase short circuit occurs. FIG. [Figure 22] FIG. 10 is a diagram showing a simulation waveform of IGBT breakdown when a short circuit occurs between the U phase and the V phase. [Figure 23] FIG. 10 is a diagram showing a simulation waveform of IGBT breakdown when a short circuit occurs between the U phase and the V phase. DETAILED DESCRIPTION OF THE INVENTION

[0044] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating a semiconductor device of the present invention. The semiconductor device 1 has a main circuit 1a and a control circuit 1b. The main circuit 1a includes high-side switch elements sw1, sw2, ... arranged in multiple phases, and low-side switch elements sw11, sw12, ... arranged in multiple phases. IGBTs, for example, are used as the high-side and low-side switch elements.

[0045] In addition, power is supplied to a load M such as a motor from a wiring 3a connected to the connection point between the high-side switch element sw1 and the low-side switch element sw11, and from a wiring 3b connected to the connection point between the high-side switch element sw2 and the low-side switch element sw12.

[0046] On the other hand, the control circuit 1b includes a short-circuit current detection circuit 1b1, an abnormality detection circuit 1b2, an abnormality output control circuit 1b3, and a driver circuit 1b4. The short-circuit current detection circuit 1b1 detects a short-circuit current that flows through the main circuit 1a when the wiring 3a, 3b between the multiple phases is short-circuited. The short-circuit current detection circuit 1b1 outputs a short-circuit current detection signal da0 when the short-circuit current is equal to or greater than a threshold value.

[0047] The abnormality detection circuit 1b2 detects an abnormal state within the semiconductor device 1. The abnormal states that can be detected include the occurrence of a short circuit current, the occurrence of an overcurrent, an overheating state, etc. If the abnormality detection circuit 1b2 detects an abnormal state, it outputs an error signal er.

[0048] When the abnormality-time output control circuit 1b3 recognizes the occurrence of a short-circuit current and an abnormal state, it causes the high-side switch element to continue to be in an on state for a predetermined time. In this case, the abnormality output control circuit 1b3 generates and outputs a control signal db0 for, for example, maintaining the on state of the high-side switch element for a period of time equal to or longer than one cycle of the high-side logic signal HIN. The driver circuit 1b4 drives the main circuit 1a based on the short-circuit current detection signal da0, the control signal db0, and the high-side logic signal HIN transmitted from the host processor.

[0049] With this configuration of semiconductor device 1, the on state of the high-side switch element through which a short-circuit current flows is maintained for at least one cycle of high-side logic signal HIN, thereby suppressing the surge voltage applied to the high-side switch element when an output phase-to-phase short circuit occurs. This suppresses avalanche breakdown caused by the surge voltage and prevents damage to the high-side switch element.

[0050] Next, as an application example of the semiconductor device 1 of the present invention, a case where the semiconductor device 1 is applied to a power semiconductor module will be described in detail below. Note that, hereinafter, the same reference numerals will be used to designate components that have already been described, and descriptions of the same components may be omitted.

[0051] <Configuration of power semiconductor module> 2 is a diagram showing an example of the configuration of a power semiconductor module. The power semiconductor module 1-1 includes a main circuit 10 and a control circuit 20. The control circuit 20 includes high-side drive circuits 21u, 21v, and 21w (collectively referred to as high-side drive circuit 21) and a low-side drive circuit 22.

[0052] The high-side drive circuit 21u receives a high-side logic signal HIN(u) from the host processor, and outputs a drive signal g1 to the gate of the IGBT 11 (high-side U-phase switch) in the main circuit 10 to drive and control the IGBT 11.

[0053] The high-side drive circuit 21v receives a high-side logic signal HIN(v) from the host processor, and outputs a drive signal g2 to the gate of the IGBT 13 (high-side V-phase switch) in the main circuit 10 to drive and control the IGBT 13.

[0054] The high-side drive circuit 21w receives a high-side logic signal HIN(w) from the host processor, and outputs a drive signal g3 to the gate of the IGBT 15 (high-side W-phase switch) in the main circuit 10 to drive and control the IGBT 15.

[0055] Based on low-side logic signals LIN(u), LIN(v), LIN(v) from the upper processor, low-side drive circuit 22 outputs drive signals g4, g5, g6 to IGBT 12 (low-side U-phase switch), IGBT 14 (low-side V-phase switch), and IGBT 16 (low-side W-phase switch) in main circuit 10, respectively, to perform drive control. Note that hereinafter, IGBTs 11, 13, and 15 located on the high side may be referred to as high-side IGBTs, and IGBTs 12, 14, and 16 located on the low side may be referred to as low-side IGBTs.

[0056] Control circuit 20 has a function of suppressing surge voltages generated in main circuit 10, and high-side drive circuits 21u, 21v, and 21w receive an error signal er from low-side drive circuit 22. Furthermore, emitters of IGBTs 12, 14, and 16, anodes of diodes D2, D4, and D6, and one terminal of resistor Rs are connected to high-side drive circuits 21u, 21v, and 21w to detect short-circuit currents that occur when an output phase-to-phase short circuit occurs.

[0057] <Low-side driver circuit configuration> 3 is a diagram showing an example of the configuration of the low-side drive circuit 22. The low-side drive circuit 22 includes a driver circuit 22a, an overcurrent detection circuit 22b, an overheat detection circuit 22c, and an abnormality detection circuit 22d.

[0058] As described above, the driver circuit 22a generates drive signals g4, g5, and g6 based on the levels of the low-side logic input signals LIN(u), LIN(v), and LIN(w), respectively, and drives the low-side IGBTs 12, 14, and 16 using the drive signals g4, g5, and g6, respectively.

[0059] The overcurrent detection circuit 22b detects an overcurrent flowing in the main circuit 10. In this case, the overcurrent detection circuit 22b converts the current flowing through the emitter of the low-side IGBT into a voltage by the shunt resistor Rs, compares the converted voltage with a preset threshold, and detects the occurrence of an overcurrent if the voltage is equal to or greater than the threshold (if the voltage converted from the short-circuit current is equal to or greater than the threshold, the short-circuit current is also detected as an overcurrent).

[0060] The detection result of the overcurrent state is sent to the abnormality detection circuit 22d as an overcurrent detection signal. Note that, hereinafter, the voltage converted from the current flowing through the emitter of the low-side IGBT is referred to as a low-side IGBT emitter signal Em.

[0061] When the overheat detection circuit 22c detects an overheat state of the power semiconductor module 1-1, it generates an overheat detection signal and transmits it to the abnormality detection circuit 22d. The abnormality detection circuit 22d generates an error signal er based on the detection result of the overcurrent state or the overheat state (when it receives an overcurrent detection signal or an overheat detection signal), and transmits the error signal er to the host processor and the high-side drive circuits 21u, 21v, and 21w.

[0062] <High-side driver circuit configuration> 4 shows an example of the configuration of the high-side drive circuit 21u. For driving the U-phase high-side IGBT, the high-side drive circuit 21u includes a driver circuit 21u-1, a short-circuit current detection circuit 21u-2, and an abnormality output control circuit 21u-3.

[0063] The short-circuit current detection circuit 21u-2 detects the occurrence of a short-circuit current when an output phase-to-output phase short circuit occurs based on the logic levels of the high-side logic signal HIN(u), the low-side IGBT emitter signal Em, and the error signal er, and outputs a short-circuit current detection signal da1.

[0064] The abnormality output control circuit 21u-3 generates an abnormality output control signal db1 based on the logic levels of the high-side logic signal HIN(u), the error signal er, and the short-circuit current detection signal da1, and outputs the signal to the driver circuit 21u-1.

[0065] The driver circuit 21u-1 generates a drive signal g1 based on the logic levels of the high-side logic signal HIN(u), the short-circuit current detection signal da1, and the abnormality output control signal db1, and drives the IGBT 11 with the drive signal g1.

[0066] The high-side drive circuit 21v and the high-side drive circuit 21w have similar functions. That is, for driving the V-phase high-side IGBT, the high-side drive circuit 21v includes a driver circuit 21v-1, a short-circuit current detection circuit 21v-2, and an abnormality output control circuit 21v-3.

[0067] The short-circuit current detection circuit 21v-2 detects the occurrence of a short-circuit current when an output phase-to-phase short circuit occurs based on the logic levels of the high-side logic signal HIN(v), the low-side IGBT emitter signal Em, and the error signal er, and outputs a short-circuit current detection signal da2.

[0068] The abnormality output control circuit 21v-3 generates an abnormality output control signal db2 based on the logic levels of the high-side logic signal HIN(v), the error signal er, and the short-circuit current detection signal da2, and outputs it to the driver circuit 21v-1.

[0069] The driver circuit 21v-1 generates a drive signal g2 based on the logic levels of the high-side logic signal HIN(v), the short-circuit current detection signal da2, and the abnormality output control signal db2, and drives the IGBT 13 with the drive signal g2.

[0070] Similarly, for driving the W-phase high-side IGBT, the high-side drive circuit 21w includes a driver circuit 21w-1, a short-circuit current detection circuit 21w-2, and an abnormality output control circuit 21w-3.

[0071] The short-circuit current detection circuit 21w-2 detects the occurrence of a short-circuit current when an output phase-to-phase short circuit occurs based on the logic levels of the high-side logic signal HIN(w), the low-side IGBT emitter signal Em, and the error signal er, and outputs a short-circuit current detection signal da3.

[0072] The abnormality output control circuit 21w-3 generates an abnormality output control signal db3 based on the logic levels of the high-side logic signal HIN(w), the error signal er, and the short-circuit current detection signal da3, and outputs it to the driver circuit 21w-1.

[0073] The driver circuit 21w-1 generates a drive signal g3 based on the logic levels of the high-side logic signal HIN(w), the short-circuit current detection signal da3, and the abnormality output control signal db3, and drives the IGBT 15 with the drive signal g3.

[0074] In the following description, the driver circuits 21u-1, 21v-1, and 21w-1 may be collectively referred to as driver circuit 21-1, the short-circuit current detection circuits 21u-2, 21v-2, and 21w-2 may be collectively referred to as short-circuit current detection circuit 21-2, and the abnormality-time output control circuits 21u-3, 21v-3, and 21w-3 may be collectively referred to as abnormality-time output control circuit 21-3. Furthermore, the short-circuit current detection signals da1, da2, and da3 may be collectively referred to as short-circuit current detection signal da, and the abnormality-time output control signals db1, db2, and db3 may be collectively referred to as abnormality-time output control signal db.

[0075] <Detection of short-circuit current> 5 to 7 are diagrams showing examples of short-circuit current detection by the short-circuit current detection circuit. In Fig. 5, when a short circuit occurs between U-phase line Lu and V-phase line Lv, a short-circuit current flows in the direction of arrow ar1. At this time, short-circuit current detection circuit 21-2 detects the short-circuit current output from the emitter of IGBT 14.

[0076] 6, when a short circuit occurs between V-phase line Lv and W-phase line Lw, a short-circuit current flows in the direction of arrow ar11. At this time, short-circuit current detection circuit 21-2 detects the short-circuit current output from the emitter of IGBT 16.

[0077] 7, when a short circuit occurs between U-phase line Lu and W-phase line Lw, a short-circuit current flows in the direction of arrow ar21. At this time, short-circuit current detection circuit 21-2 detects the short-circuit current output from the emitter of IGBT 12.

[0078] <Configuration of short-circuit current detection circuit> 8 is a diagram showing an example of the configuration of a short-circuit current detection circuit 21-2. The short-circuit current detection circuit 21-2 includes a comparator cmp, a reference power supply unit Vref, a resistor R1, a capacitor C1, a two-input, one-output AND element IC1, a buffer IC2, a two-input, one-output OR element IC3, a two-input, one-output OR element IC4 (a reset OR element), a two-input, one-output logic circuit element IC5, and an RS flip-flop IC6.

[0079] The one-shot pulse generating circuit 21a is configured with the resistor R1, the capacitor C1, the buffer IC2, the OR element IC3, and the logic circuit element IC5. The logic circuit element IC5 is an element that outputs an H level when the input level to its positive input terminal is an H level and the input level to its negative input terminal is an L level.

[0080] The connection relationship of each component will be explained below. The low-side IGBT emitter signal Em is input to the non-inverting input terminal of the comparator cmp, and the inverting input terminal of the comparator cmp is connected to the positive power supply terminal of the reference power supply unit Vref. The negative power supply terminal of the reference power supply unit Vref is connected to GND (reference power supply).

[0081] The output terminal of the comparator cmp is connected to one input terminal of an AND gate IC1. The other input terminal of the AND gate IC1 is connected to one end of a resistor R1 and one input terminal of an OR gate IC3. The high-side logic signal HIN is input to one end of the resistor R1.

[0082] The other end of resistor R1 is connected to one end of capacitor C1 and the input terminal of buffer IC2, and the other end of capacitor C1 is connected to GND. The output terminal of buffer IC2 is connected to the other input terminal of OR gate IC3 and the negative input terminal of logic circuit element IC5. The output terminal of OR gate IC3 is connected to the positive input terminal of logic circuit element IC5.

[0083] The output terminal of the logic circuit element IC5 is connected to one input terminal of an OR element IC4, the other input terminal of which receives an error signal er. The output terminal of the AND element IC1 is connected to a set terminal S of an RS flip-flop IC6, the set terminal S of which receives a set signal RS-S.

[0084] The output terminal of the OR gate IC4 is connected to the reset terminal R of the RS flip-flop IC6, which receives the reset signal RS-R (the RS flip-flop IC6 is reset by the high-level reset signal RS-R). The short-circuit current detection signal da is output from the output terminal Q of the RS flip-flop IC6.

[0085] <Operation of the short-circuit current detection circuit> 9 is a time chart showing the operation of the short-circuit current detection circuit. The high-side logic signal HIN is periodically input to the high-side drive circuit 21.

[0086] [Period T1 from time t1 to time t2] This is a period during which no output phase-to-phase short circuit occurs. Therefore, the level of the low-side IGBT emitter signal Em is less than the threshold voltage Vth output from the reference power supply Vref. Furthermore, since the abnormality detection circuit 22d does not detect an abnormal state, the error signal er is at H level, indicating a normal state.

[0087] On the other hand, because the threshold voltage Vth is higher than the level of the low-side IGBT emitter signal, the comparator cmp outputs an L level. Therefore, the AND gate IC1 outputs an L level, and the set signal RS-S input to the set terminal S of the RS flip-flop IC6 is an L level.

[0088] Furthermore, the one-shot pulse generating circuit 21a generates and outputs an H-level one-shot pulse in synchronization with the rising edge of the high-side logic signal HIN. Therefore, the logical sum element IC4 outputs an H-level one-shot pulse, and the RS flip-flop IC6 is reset by the reset signal RS-R of the H-level one-shot pulse.

[0089] Furthermore, because the set signal RS-S is at L level and is input to the RS flip-flop IC6, after the reset signal RS-R falls, the short-circuit current detection signal da output from the output terminal Q goes to L level. The L-level short-circuit current detection signal da indicates that no short-circuit current is occurring.

[0090] [Period T2 from time t2 to time t3] This is a period in which no short circuit occurs between the output phases, and the next cycle of the high-side logic signal HIN starts from time t2. [Period T3 from time t3 to time t4] This is the period during which an output phase-to-phase short circuit occurs. As a result, the level of the low-side IGBT emitter signal Em is equal to or higher than the threshold voltage Vth. Furthermore, since the abnormality detection circuit 22d detects an abnormal state, the error signal er is at the L level, indicating an abnormal state.

[0091] On the other hand, since the level of the low-side IGBT emitter signal Em is higher than the threshold voltage Vth, the comparator cmp outputs an H level. The high-side logic signal HIN is also at an H level. Therefore, the AND gate IC1 outputs an H level, and the set signal RS-S input to the set terminal S of the RS flip-flop IC6 becomes an H level.

[0092] In the one-shot pulse generating circuit 21a, after outputting the H-level one-shot pulse, an L-level pulse is output, and the error signal er also outputs an L-level abnormality notification, so the logical sum element IC4 outputs an L-level pulse, the reset signal RS-R becomes an L-level pulse, and the RS flip-flop IC6 enters a non-reset state.

[0093] Therefore, RS flip-flop IC6 outputs the H level input to its set terminal S from its output terminal Q, causing the short-circuit current detection signal da to go to H level. The H level short-circuit current detection signal da indicates that a short-circuit current is occurring.

[0094] [Period T4 from time t4 to time t5] The level of the low-side IGBT emitter signal Em is less than the threshold voltage Vth output from the reference power supply unit Vref, and the occurrence of short-circuit current has subsided.

[0095] Furthermore, the abnormality detection circuit 22d detects an abnormal state and outputs an L-level error signal er at time t3 (first time), and then detects that the abnormal state has been resolved. However, the L-level output of the error signal er is maintained from time t3 until time t5 (second time) when a time period equivalent to one or more cycles of the high-side logic signal HIN ends, and the L-level output of the error signal er is stopped at time t5.

[0096] On the other hand, because the threshold voltage Vth is higher than the level of the low-side IGBT emitter signal Em, the comparator cmp outputs an L level. Therefore, the AND gate IC1 outputs an L level, and the set signal RS-S input to the set terminal S of the RS flip-flop IC6 is at an L level.

[0097] Furthermore, the reset signal RS-R is maintained at L level, and the RS flip-flop IC6 is in the non-reset state. Therefore, the RS flip-flop IC6 continues to output a H level from its output terminal Q based on the H level set signal RS-S input during period T3, and the short-circuit current detection signal da becomes H level.

[0098] [Period T5 from time t5 to time t6] The level of the low-side IGBT emitter signal Em is less than the threshold voltage Vth output from the reference power supply Vref. Also, since the abnormality detection circuit 22d has not detected an abnormal state, the error signal er is at H level, which indicates a normal state.

[0099] On the other hand, because the threshold voltage Vth is higher than the level of the low-side IGBT emitter signal Em, the comparator cmp outputs an L level. Therefore, the AND gate IC1 outputs an L level, and the set signal RS-S input to the set terminal S of the RS flip-flop IC6 is at an L level.

[0100] Furthermore, since the error signal er is at H level, an H level is output from the OR gate IC4. Therefore, the reset signal RS-R becomes H level, and the RS flip-flop IC6 enters a reset state (it is reset by the error signal er at time t5). Therefore, an L level short-circuit current detection signal da is output from the output terminal Q of the RS flip-flop IC6.

[0101] In this way, the short-circuit current detection circuit 21-2 outputs the short-circuit current detection signal da when it detects that the low-side IGBT emitter signal Em corresponding to the short-circuit current has become equal to or greater than the threshold voltage Vth at time t3, and when it detects that the low-side IGBT emitter signal Em has become less than the threshold voltage Vth after outputting the short-circuit current detection signal da, it continues to output the short-circuit current detection signal da until time t5 when the output of the error signal er is stopped, and stops outputting the short-circuit current detection signal da at time t5.

[0102] <Configuration of abnormality output control circuit> 10 is a diagram showing an example of the configuration of the abnormality output control circuit. The abnormality output control circuit 21-3 includes a two-input, one-output logic circuit element IC11 (first logic circuit element), a two-input, one-output logic circuit element IC12 (second logic circuit element), an AND element IC13, a two-input, one-output OR element IC14 (first OR element), and a two-input, one-output OR element IC15 (second OR element). Note that the logic circuit elements IC11 and IC12 are elements that output an H level when the input level at their positive input terminals is H level and the input level at their negative input terminals is L level.

[0103] The connection relationship of each component element will be described below. The negative input terminal of logic circuit element IC11 is connected to the positive input terminal of logic circuit element IC12. An error signal er is input to the negative input terminal of logic circuit element IC11.

[0104] The positive input terminal of the logic circuit element IC11 is connected to the negative input terminal of the logic circuit element IC12 and one input terminal of the OR element IC15. The short-circuit current detection signal da is input to the positive input terminal of the logic circuit element IC11.

[0105] The output terminal of logic circuit element IC11 is connected to one input terminal of logical OR element IC14, and the output terminal of logic circuit element IC12 is connected to the other input terminal of logical OR element IC14. A high-side logic signal HIN is input to one input terminal of logical AND element IC13, and the other input terminal of logical AND element IC13 is connected to the output terminal of logical OR element IC14. The output terminal of logical AND element IC13 is connected to the other input terminal of logical OR element IC15. An abnormality output control signal db is output from the output terminal of logical OR element IC15.

[0106] <Input / output characteristics of the output control circuit and operating state of the high-side IGBT during abnormal conditions> 11 is a diagram showing the input / output characteristics of the abnormality output control circuit 21-3 and the operating state of the high-side IGBT. Table 4 shows the input / output characteristics of the abnormality output control circuit 21-3 and the operating state of the high-side IGBT, and has the columns input, output, and output state.

[0107] The input column shows the levels of the high-side logic signal HIN, error signal er, and short-circuit current detection signal da as input signals to the high-side drive circuit 21. The output column shows the level of the abnormality output control signal db. In the output state column, the explanation in the upper row shows the output state of the error signal er, and the explanation in the lower row shows the operating state of the high-side IGBT.

[0108] In the notation of Table 4, when the high-side logic signal HIN is H (H level), the high-side IGBT outputs on (turns on), and when the high-side logic signal HIN is L (L level), the high-side IGBT outputs off (turns off). Also, when the short-circuit current detection signal da is H, it indicates that there is a short circuit between the output phases (short-circuit current detected), and when the short-circuit current detection signal da is L, it indicates that there is no short circuit between the output phases (short-circuit current not detected). Furthermore, when the error signal er is H, it indicates that the main circuit 10 is normal, and when the error signal er is L, it indicates that the main circuit 10 is abnormal. The contents of Table 4 will be explained below.

[0109] When (No. 1: high-side logic signal HIN, error signal er, short-circuit current detection signal da) = (H, L, H), the abnormality output control signal db becomes H level. In this case, the output state is one in which a short circuit has occurred between the output phases and a short-circuit current has been detected, so an L-level error signal er is output and an abnormality notification is being made.

[0110] Furthermore, because a short-circuit current is detected and the abnormality output control signal db is at H level, an output-on command is issued to the high-side IGBT, i.e., the drive signal of the target high-side IGBT is maintained at H level, and the high-side freewheeling period is extended.

[0111] Upon receiving the abnormality notification of the error signal er, the host processor sets the high-side logic signal HIN to the L level as an instruction to turn off the high-side IGBT, thereby attempting to turn off the target high-side IGBT.

[0112] However, when the high-side logic signal HIN is at H level, if the driver circuit 21-1 in the high-side drive circuit 21 recognizes an H-level short-circuit current signal and an H-level abnormality output control signal db, as described above, even if the host processor issues an instruction to turn off the high-side IGBT, it outputs an H-level drive signal to the gate of the IGBT, turns on the high-side IGBT, and extends the high-side return period.

[0113] When (No. 2: high-side logic signal HIN, error signal er, short-circuit current detection signal da) = (H, L, L), the abnormality output control signal db goes to L level. In this case, the output state is one in which no short circuit has occurred between the output phases, but some other abnormality (overcurrent or overheating) has been detected, so an L-level error signal er is output and an abnormality notification is being made. Also, since no short-circuit current has been detected and the abnormality output control signal db is L level, an instruction is given to turn off the output of the high-side IGBT.

[0114] When the high-side logic signal HIN is at an H level, if the driver circuit 21-1 in the high-side drive circuit 21 recognizes an L-level short-circuit current signal and an L-level abnormality output control signal db, it outputs an L-level drive signal to the gate of the IGBT to turn off the target high-side IGBT.

[0115] When (No. 3: high-side logic signal HIN, error signal er, short-circuit current detection signal da) = (H, H, L), the abnormality output control signal db goes to H level. In this case, the output state is normal, so no abnormality notification is given by the error signal er. Also, since no short-circuit current is detected and the abnormality output control signal db is H level, an instruction to turn on the output of the high-side IGBT is issued.

[0116] When the high-side logic signal HIN is at H level, the driver circuit 21-1 in the high-side drive circuit 21 recognizes an L-level short-circuit current signal and an H-level abnormality output control signal db, and outputs a drive signal of the same logic as the high-side logic signal HIN to the gate of the IGBT, thereby performing switching based on the high-side logic signal HIN.

[0117] When (No. 4: high-side logic signal HIN, error signal er, short-circuit current detection signal da) = (L, L, H), the abnormality output control signal db becomes H level. In this case, the output state is one in which a short circuit has occurred between the output phases and a short-circuit current has been detected, so an L-level error signal er is output and an abnormality notification is being made. In addition, a short-circuit current has been detected and the abnormality output control signal db is H level, so an output-on command is issued to the high-side IGBT.

[0118] When the high-side logic signal HIN is at an L level, if the driver circuit 21-1 in the high-side drive circuit 21 recognizes an H-level short-circuit current signal and an H-level abnormality output control signal db, it outputs an H-level drive signal to the gate of the target high-side IGBT to turn on the high-side IGBT.

[0119] In other words, even if the host processor instructs the high-side IGBT to be turned off, an H-level drive signal is output to the gate of the target high-side IGBT to turn the high-side IGBT on and extend the high-side return period.

[0120] When (No. 5: high-side logic signal HIN, error signal er, short-circuit current detection signal da) = (L, L, L), the abnormality output control signal db goes to L level. In this case, the output state is one in which no short circuit has occurred between the output phases, but some other abnormality (overcurrent or overheating) has been detected, so an L-level error signal er is being output and an abnormality notification is being made. Also, since no short-circuit current has been detected and the abnormality output control signal db is L level, an instruction is given to turn off the output of the high-side IGBT.

[0121] When the high-side logic signal HIN is at an L level, if the driver circuit 21-1 in the high-side drive circuit 21 recognizes an L-level short-circuit current signal and an L-level abnormality output control signal db, it outputs an L-level drive signal to the gate of the IGBT to turn off the target high-side IGBT.

[0122] When (No. 6: high-side logic signal HIN, error signal er, short-circuit current detection signal da) = (L, H, L), the abnormality output control signal db goes to L level. In this case, the output state is normal, so no abnormality notification is being sent by the error signal er.

[0123] When the high-side logic signal HIN is at an L level, the driver circuit 21-1 in the high-side drive circuit 21, upon recognizing an L-level short-circuit current signal and an L-level abnormality output control signal db, outputs a drive signal of the same logic as the high-side logic signal HIN to the gate of the IGBT, thereby performing switching based on the high-side logic signal HIN.

[0124] Since no short-circuit current is detected and the abnormality output control signal db is at L level, an instruction is given to turn off the output of the high-side IGBT, but since the high-side logic signal HIN is at L level, a drive signal with the same logic as the L-level high-side logic signal HIN is output to the gate of the target high-side IGBT.

[0125] <Extending the high-side return period when a short circuit occurs> 12 is a time chart illustrating the extension of the high-side return period when a short-circuit current occurs. The waveforms of the high-side logic signal HIN, the error signal er, the short-circuit current detection signal da, the abnormality output control signal db, and the current (e.g., the U-phase current) are shown.

[0126] [Time t11] The high-side logic signal HIN goes high, turning on the high-side IGBT. The abnormality output control signal db is high. [Time t12] A short circuit between the output phases is detected, and the short circuit current detection signal da transitions from L level to H level. The error signal er transitions from H level to L level, indicating an abnormality. Then, due to the detection of the error signal er, the low-side drive circuit 22 turns off the low-side IGBT.

[0127] [Period Ta] This is the period in which the short-circuit current flows and increases. [Period Tb] The high-level abnormality output control signal db keeps the high-side IGBT on from time t12 to time t13, extending the high-side freewheeling period. The extended high-side freewheeling period also blocks the short-circuit current without causing avalanche breakdown of the high-side IGBT. The dotted waveform A represents a case in which the high-side IGBT output is turned off by an error signal in a conventional configuration, causing a current blockage (in this case, avalanche breakdown may occur).

[0128] The high-side return period shown in Figure 12 is extended by more than one cycle of the high-side logic signal HIN due to the function of the abnormality output control circuit. This reduces the short-circuit current flowing through the high-side IGBT, lowering the di / dt after regeneration immediately after turning it off. This suppresses the surge voltage generated by the wiring inductance and di / dt during regeneration, preventing IGBT destruction.

[0129] <High-side IGBT shutdown period when an abnormality other than short-circuit current is detected> 13 is a time chart for explaining the period during which the high-side IGBT is stopped when an abnormality other than a short-circuit current is detected. Assume that an overheating state is detected as an abnormality other than a short-circuit current.

[0130] [Time t21] An overheating state is detected as an abnormal state. The error signal er transitions from H level to L level, and an abnormality notification is issued. Since no short-circuit current is detected, the short-circuit current detection signal da is L level, and the abnormality output control signal db also becomes L level. The low-side IGBT is turned off by the low-side drive circuit 22 due to the L-level error signal er when an overheating state is detected.

[0131] [Time t22] When an overheating state is detected, the error signal er goes low, turning off the high-side IGBT and cutting off the current. [Period Tc] From time t22 to time t23, the high-side IGBT is in the off state, which is the high-side stopped period.

[0132] <Flow of short-circuit current when a short circuit occurs between the U phase and the V phase when the present invention is implemented> 14 to 16 are diagrams for explaining the flow of short-circuit current when an output phase-to-phase short circuit occurs in the case where the present invention is implemented. Figures 14 to 16 show states St1a, St2a, and St3a, respectively.

[0133] [State St1a] Assume that a short circuit occurs between U-phase line Lu and V-phase line Lv (short-circuit location s1), IGBT 11 turns on (IGBTs 13 and 15 are off), and then IGBT 14 turns on (IGBTs 12 and 16 are off).

[0134] At this time, the short-circuit current flows as indicated by arrow ar1, that is, from the collector of IGBT11 to the emitter of IGBT11 to the short-circuited location s1 to the collector of IGBT14 to the emitter of IGBT14.

[0135] [State St2a] When a short-circuit current occurs as shown in state St1a, IGBT 14 switches from on to off. The flow of the short-circuit current at this time is indicated by arrow ar2. That is, the short-circuit current flows from the collector of IGBT 11 to the emitter of IGBT 11 to the short-circuit point s1 to the anode of diode D3 to the cathode of diode D3, resulting in a freewheeling operation on the high side.

[0136] The high-side freewheeling operation continues for at least one cycle of the high-side logic signal HIN. In this case, the di / dt of the short-circuit current during regeneration gradually decreases over the extended high-side freewheeling period, thereby suppressing the surge voltage (L × di / dt) due to the wiring inductance L and preventing avalanche breakdown in IGBT 11.

[0137] [State St3a] IGBT11 switches from on to off. At this time, the wiring inductance in the wiring through which the short-circuit current flows acts to continue the initial current flow, so the short-circuit current flows as shown by arrow ar3. That is, the short-circuit current flows from the anode of diode D2 to the cathode of diode D2 to short-circuit point s1 to the anode of diode D3 to the cathode of diode D3.

[0138] Since the di / dt of the short-circuit current is sufficiently reduced, even if the IGBT 11 is switched from on to off, avalanche breakdown does not occur in the IGBT 11, and destruction of the IGBT can be prevented.

[0139] Although the embodiments have been described above, the configurations of the parts shown in the embodiments can be replaced with other parts having similar functions. In addition, other optional components or steps may be added. [Explanation of symbols]

[0140] 1. Semiconductor device 1a Main circuit sw1, sw2 high-side switch elements sw11, sw12 low-side switch elements 3a, 3b wiring 1b Control circuit 1b1 Short circuit current detection circuit 1b2 Abnormality detection circuit 1b3 Abnormal output control circuit 1b4 Driver circuit s0 Short circuit location HIN High-side logic signal da0 Short circuit current detection signal db0 control signal er error signal M load

Claims

1. a main circuit in which a plurality of series connections of high-side switch elements and low-side switch elements are connected in parallel and which supplies power to a load from wiring connected to a connection point between the high-side switch elements and the low-side switch elements; a driver circuit for driving the main circuit; a short-circuit current detection circuit that detects a short-circuit current that flows in the main circuit when a short circuit occurs in the wiring between multiple phases; an abnormality detection circuit that detects an abnormal state in the device, including the occurrence of the short circuit current; an abnormality-time output control circuit that keeps the high-side switch element in an on state for a predetermined time when the short-circuit current detection circuit detects the occurrence of the short-circuit current and the abnormality detection circuit detects the occurrence of the abnormal state, When the abnormality-time output control circuit recognizes the occurrence of the short-circuit current and the occurrence of the abnormal state, it causes the on-state of the high-side switch element to continue for a time equal to or longer than an on-period within one cycle of a high-side logic signal that controls the switching operation of the high-side switch element. Semiconductor device.

2. 2. The semiconductor device according to claim 1, wherein the abnormality output control circuit causes the high-side switch element to maintain an on-state for a period of time equivalent to one cycle or more of the high-side logic signal, thereby extending a high-side return period during which the short-circuit current returns through the high-side switch element, thereby reducing a current change rate of the short-circuit current.

3. when the abnormality detection circuit detects that the abnormal state has been resolved after outputting an error signal indicating that the abnormal state has been detected at a first time, it outputs the error signal until a second time at which a time period equivalent to at least one cycle of the high side logic signal has ended, and stops outputting the error signal at the second time; the short-circuit current detection circuit outputs a short-circuit current detection signal when it detects that the short-circuit current has become equal to or greater than a threshold value at the first time, and when it detects that the short-circuit current has become less than the threshold value after outputting the short-circuit current detection signal, outputs the short-circuit current detection signal until the second time at which output of the error signal is stopped, and stops outputting the short-circuit current detection signal at the second time; the abnormality output control circuit outputs a control signal for maintaining the on state of the high-side switch element for a time period equivalent to one cycle of the high-side logic signal or more, based on the logic levels of the high-side logic signal, the short-circuit current detection signal, and the error signal; the driver circuit performs switching driving of the high-side switch element based on the logic levels of the short-circuit current detection signal and the control signal. The semiconductor device according to claim 1.

4. the short-circuit current detection circuit comprises a comparator, a reference power supply unit, a two-input one-output logical product element, a two-input one-output reset logical sum element, a one-shot pulse generation circuit, and an RS flip-flop; a voltage signal converted from the short-circuit current is input to a non-inverting input terminal of the comparator, an inverting input terminal of the comparator is connected to a positive power supply terminal from which the threshold of the reference power supply unit is output, and a negative power supply terminal of the reference power supply unit is connected to a reference power supply; an output terminal of the comparator is connected to one input terminal of the AND element, and the high-side logic signal is input to the other input terminal of the AND element and an input terminal of the one-shot pulse generation circuit; an output terminal of the one-shot pulse generation circuit is connected to one input terminal of the reset OR element, and the error signal is input to the other input terminal of the reset OR element; an output terminal of the AND element is connected to a set terminal of the RS flip-flop, an output terminal of the reset OR element is connected to a reset terminal of the RS flip-flop, and the short-circuit current detection signal is output from an output terminal of the RS flip-flop; 4. The semiconductor device according to claim 3.

5. the one-shot pulse generating circuit comprises a resistor, a capacitor, a buffer, a two-input one-output logical OR element, and a two-input one-output logic circuit element; the logic circuit element outputs a high potential level when the input level of the positive input terminal is a high potential level and the input level of the negative input terminal is a low potential level; one end of the resistor serves as an input terminal of the one-shot pulse generating circuit and is connected to the other input terminal of the AND element and one input terminal of the OR element; the other end of the resistor is connected to one end of the capacitor and the input terminal of the buffer, and the other end of the capacitor is connected to a reference power supply; an output terminal of the buffer is connected to the other input terminal of the OR element and the negative input terminal of the logic circuit element, and an output terminal of the OR element is connected to the positive input terminal of the logic circuit element; an output terminal of the logic circuit element serves as an output terminal of the one-shot pulse generating circuit and is connected to one input terminal of the resetting OR element; 5. The semiconductor device according to claim 4.

6. the abnormality output control circuit comprises a first logic circuit element with two inputs and one output, a second logic circuit element with two inputs and one output, a logical AND element with two inputs and one output, a first logical OR element with two inputs and one output, and a second logical OR element with two inputs and one output; the first logic circuit element and the second logic circuit element are elements that output a high potential level when the input level of the positive input terminal is a high potential level and the input level of the negative input terminal is a low potential level, the negative input terminal of the first logic circuit element is connected to the positive input terminal of the second logic circuit element, and the error signal is input thereto; the positive input terminal of the first logic circuit element is connected to the negative input terminal of the second logic circuit element and one input terminal of the second OR element, and the short-circuit current detection signal is input thereto; an output terminal of the first logic circuit element is connected to one input terminal of the first logical sum element, and an output terminal of the second logic circuit element is connected to the other input terminal of the first logical sum element; the high-side logic signal is input to one input terminal of the AND element, and the other input terminal of the AND element is connected to the output terminal of the first OR element; The output terminal of the AND element is connected to the other input terminal of the second OR element, and the control signal is output from the output terminal of the second OR element.

4. The semiconductor device according to claim 3.

7. the short-circuit current detection circuit outputs the short-circuit current detection signal at a high potential level when the short-circuit current is equal to or greater than the threshold, and the abnormality-state output control circuit outputs the control signal at a high potential level to keep the high-side switch element in an on-state for a time period equal to or greater than one cycle of the high-side logic signal, The driver circuit regardless of whether the high-side logic signal is at a high potential level to instruct the high-side switch element to be on or at a low potential level to instruct the high-side switch element to be off, when the short-circuit current detection signal is at a high potential level and the control signal is at a high potential level, a drive signal is output to the high-side switch element based on the control signal to keep the high-side switch element in an on state for a time period equal to or longer than one cycle of the high-side logic signal.

4. The semiconductor device according to claim 3.

8. The main circuit includes: the high-side switch elements include a high-side U-phase switch, a high-side V-phase switch, and a high-side W-phase switch, and the low-side switch elements include a low-side U-phase switch, a low-side V-phase switch, and a low-side W-phase switch; power is supplied to the load from a U-phase line connected to a connection point between the emitter of the high-side U-phase switch and the collector of the low-side U-phase switch, a V-phase line connected to a connection point between the emitter of the high-side V-phase switch and the collector of the low-side V-phase switch, and a W-phase line connected to a connection point between the emitter of the high-side W-phase switch and the collector of the low-side W-phase switch; The semiconductor device according to claim 1.

9. 9. The semiconductor device according to claim 8, wherein the short-circuit current detection circuit detects the short-circuit current when at least one of a short circuit between the U-phase line and the V-phase line, a short circuit between the V-phase line and the W-phase line, and a short circuit between the U-phase line and the W-phase line occurs.

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