Bonding pad, integrated circuit element, and integrated circuit device

Abstract

To provide a bonding pad in which cracks are unlikely to occur in either a plug or an insulator, and in which bond between a conductive member and the bonding pad is unlikely to decrease.SOLUTION: A bonding pad 11 includes a surface electrode layer 1 having a first surface 10A, a resistive layer 2 spaced apart from the first surface in a first direction Z perpendicular to the first surface and having a second surface 10B facing an opposite side to the first surface, a stress buffer layer 3 disposed between the surface electrode layer and the resistive layer in the first direction, and a connection portion 4 connecting the surface electrode layer and the stress buffer layer and contacting each of the surface electrode layer and the stress buffer layer. The stress buffer layer extends over the entire bonding pad in a direction perpendicular to the first direction. The connection portion includes an insulator 41 contacting each of the surface electrode layer and the stress buffer layer, and a plurality of plugs 42 contacting the insulator and electrically connecting between the surface electrode layer and the stress buffer layer.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to bonding pads, integrated circuit elements, and integrated circuit devices. [Background technology]

[0002] In recent years, in order to realize circuit integration and miniaturization, integrated circuit elements included in integrated circuits have adopted a multilayer structure in which multiple wiring layers and insulating layers for electrically insulating the multiple wiring layers are stacked. Accordingly, the same multilayer structure as that of integrated circuits has been adopted for bonding pads of integrated circuit elements in order to simplify the manufacturing process and reduce the number of steps.

[0003] Japanese Patent Application Laid-Open No. 2000-195866 (Patent Document 1) discloses a bonding pad including an upper wiring, an intermediate wiring, a lower wiring, an integrated mesh-type tungsten plug that electrically connects the wirings, and a plurality of island-type insulators that are present within the integrated mesh-type tungsten plug and are surrounded by the integrated mesh-type tungsten plug. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-195866 Summary of the Invention [Problem to be solved by the invention]

[0005] Generally, a conductive member such as a wire is ultrasonically bonded to a bonding pad. In the bonding pad described in Patent Document 1, when the conductive member is ultrasonically bonded to the upper wiring, a load is applied to the bonding pad due to the weight being applied in the stacking direction of the upper wiring, intermediate wiring, and lower wiring. Furthermore, during ultrasonic bonding, a load due to ultrasonic vibration is applied to the bonding pad in a direction perpendicular to the stacking direction.

[0006] In the bonding pad described in Patent Document 1, the Young's modulus of the tungsten constituting the integrated mesh tungsten plug is higher than that of the insulating material constituting the island insulator, making it difficult for the structure consisting of the integrated mesh tungsten plug and the island insulator to buffer stress. Therefore, during ultrasonic bonding, where the load described above is applied, stress may concentrate in the integrated mesh tungsten plug, causing cracks. If a crack occurs in the integrated mesh tungsten plug, the bond between the conductive member and the bonding pad may be weakened, and the conductive member may peel off from the bonding pad, just as if a crack occurs in the island insulator formed within the plug.

[0007] The main object of the present disclosure is to provide a bonding pad that is less likely to develop cracks in the plug and insulator than conventional bonding pads, and is less likely to reduce the adhesion between the conductive member and the bonding pad, an integrated circuit element including the bonding pad, and an integrated circuit device including the integrated circuit element. [Means for solving the problem]

[0008] The bonding pad according to the present disclosure is a bonding pad for an integrated circuit element included in an integrated circuit device. The bonding pad includes a surface electrode layer having a first surface, a resistive layer spaced apart from the first surface in a first direction perpendicular to the first surface and having a second surface facing the opposite direction from the first surface, a stress buffer layer disposed between the surface electrode layer and the resistive layer in the first direction, and a connection portion connecting the surface electrode layer and the stress buffer layer in the first direction and in contact with each of the surface electrode layer and the stress buffer layer. The stress buffer layer extends across the entire bonding pad in the direction perpendicular to the first direction. The connection portion includes an insulator in contact with each of the surface electrode layer and the stress buffer layer in the first direction, and at least one plug in contact with the insulator in the direction perpendicular to the first direction and electrically connecting the surface electrode layer and the stress buffer layer. The thickness of the stress buffer layer in the first direction is greater than the thickness of the surface electrode layer in the first direction. [Effects of the Invention]

[0009] According to the present disclosure, it is possible to provide a bonding pad that is less likely to develop cracks in the plug and insulator compared to conventional bonding pads and is less likely to reduce the adhesion between the conductive member and the bonding pad, an integrated circuit element including the bonding pad, and an integrated circuit device including the integrated circuit element. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view for explaining an integrated circuit element and an integrated circuit device according to a first embodiment. [Figure 2] FIG. 2 is a partially enlarged perspective view of region II in FIG. [Figure 3] FIG. 2 is a cross-sectional view for explaining a bonding pad according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view taken along the arrows IV-IV in FIG. 3. [Figure 5] FIG. 10 is a cross-sectional view illustrating a bonding pad according to a second embodiment. [Figure 6] FIG. 10 is a cross-sectional view illustrating a bonding pad according to a third embodiment. [Figure 7] FIG. 10 is a cross-sectional view illustrating a bonding pad according to a fourth embodiment. [Figure 8] FIG. 8 is a cross-sectional view taken along the arrow VIII-VIII in FIG. 7. [Figure 9] FIG. 10 is a cross-sectional view illustrating a modified example of the bonding pad according to the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the following, the same or corresponding parts will be denoted by the same reference numerals, and redundant description will not be repeated.

[0012] <Configuration of integrated circuit device and integrated circuit element> 1, an integrated circuit device 100 according to an embodiment of the present disclosure is, for example, a power module. The integrated circuit device 100 includes an integrated circuit element 101, a power semiconductor element 102, a plurality of lead frames 103, a plurality of wires 104 (conductive members), and a sealing member 105. The integrated circuit element 101 is, for example, a control semiconductor element that controls the operation of the power semiconductor element 102.

[0013] 1 and 2, an integrated circuit element 101 is mounted on, for example, one lead frame 103 and is electrically connected to another lead frame 103 via wires 104. The integrated circuit element 101 has a plurality of bonding pads 11. Each of the plurality of bonding pads 11 is ultrasonically bonded to one end of each of a plurality of wires 104. The other end of each of the plurality of wires 104 is ultrasonically bonded to the lead frame 103.

[0014] The bonding pads 11 of the integrated circuit element 101 are any of the bonding pads according to the first to fourth embodiments described below.

[0015] The integrated circuit element 101 further includes a multilayer structure 20. The multilayer structure 20 includes a first wiring layer and a second wiring layer that are stacked with a gap between them and electrically connected to the bonding pad 11, an insulating layer that is sandwiched between the first wiring layer and the second wiring layer to electrically insulate them, and a plug that is embedded in the insulating layer and electrically connects the first wiring layer and the second wiring layer.

[0016] Embodiment 1 <Bonding pad configuration> The bonding pad 11 according to the first embodiment will be described with reference to Figures 3 and 4. Note that in Figure 3, configurations other than the bonding pad 11 are omitted from the illustration.

[0017] 3, the bonding pad 11 has a first surface 10A and a second surface 10B that is spaced apart from the first surface 10A in a first direction Z that is perpendicular to the first surface 10A and faces the opposite side to the first surface 10A. In this specification, the direction from the second surface 10B toward the first surface 10A in the first direction Z may be referred to as "upward." The first surface 10A and the second surface 10B are both end surfaces of the bonding pad 11 in the first direction Z. In the integrated circuit element 101, the first surface 10A is the surface bonded to the wire 104. In the integrated circuit element 101, the second surface 10B is the surface bonded to the interlayer insulating film 106. The maximum width of the first surface 10A is not particularly limited, but is, for example, 1 μm or more and 1 mm or less. The shape of the first surface 10A may be any shape, but is, for example, rectangular. The first surface 10A has, for example, a square shape with a side length of 100 μm.

[0018] The bonding pad 11 includes a surface electrode layer 1, a resistance layer 2, a stress buffer layer 3, and a connection portion 4. In the bonding pad 11, the resistance layer 2, the stress buffer layer 3, the connection portion 4, and the surface electrode layer 1 are stacked in this order upward in the first direction Z.

[0019] The surface electrode layer 1 has a first surface 10A. The material constituting the surface electrode layer 1 may be any material having electrical conductivity, including, for example, aluminum (Al). The material constituting the surface electrode layer 1 may also be an Al compound.

[0020] 3, the first surface 10A includes a first region R1 to which the wire 104 is bonded and a second region R2 located outside the first region R1. A resistance layer 2, a stress buffer layer 3, and a connection portion 4 are formed below each of the first region R1 and the second region R2.

[0021] The resistive layer 2 has a second surface 10B. The material constituting the resistive layer 2 may be any material having a higher resistivity than the material constituting the front electrode layer 1, and includes, for example, polysilicon.

[0022] The resistive layer 2 extends over the entire bonding pad 11 in each of the second direction X and the third direction Y, which are orthogonal to the first direction Z. When viewed from the first direction Z, the resistive layer 2 is arranged so as to overlap with each of the first region R1 and the second region R2 of the first surface 10A. When viewed from the first direction Z, the resistive layer 2 is arranged so as to overlap with, for example, the entire first surface 10A. The resistive layer 2 is a continuous body that is continuous in each of the second direction X and the third direction Y.

[0023] The stress buffer layer 3 is disposed between the surface electrode layer 1 and the resistance layer 2 in the first direction Z. The lower surface of the stress buffer layer 3 is in contact with the upper surface of the resistance layer 2. The material constituting the stress buffer layer 3 is conductive. The stress buffer layer 3 is electrically connected to the resistance layer 2.

[0024] The stress buffer layer 3 extends over the entire bonding pad 11 in each of the second direction X and the third direction Y. When viewed from the first direction Z, the stress buffer layer 3 is arranged so as to overlap with each of the first region R1 and the second region R2 of the first surface 10A. When viewed from the first direction Z, the stress buffer layer 3 is arranged so as to overlap with, for example, the entire first surface 10A. The stress buffer layer 3 is a continuous body that is continuous in each of the second direction X and the third direction Y. The stress buffer layer 3 is, for example, a single layer made of one continuous body that is continuous in each of the first direction Z, the second direction X, and the third direction Y.

[0025] The modulus of rigidity (shear modulus) of the material constituting the stress buffer layer 3 is lower than the modulus of rigidity (shear modulus) of the material constituting the plug 42, which will be described later. The Young's modulus of the material constituting the stress buffer layer 3 is lower than the Young's modulus of the material constituting the plug 42, which will be described later. The material constituting the stress buffer layer 3 may be the same as the material constituting the surface electrode layer 1.

[0026] 3, the thickness T1 of the stress buffer layer 3 in the first direction Z is thicker than the thickness T2 of the surface electrode layer 1 in the first direction Z. The thickness T1 of the stress buffer layer 3 in the first direction Z is thicker than the thickness of the resistance layer 2 in the first direction Z, for example. The thickness T1 of the stress buffer layer 3 in the first direction Z is thicker than the thickness of the connection portion 4 in the first direction Z, for example. The stress buffer layer 3 is the thickest of the multiple components that make up the bonding pad 11, for example.

[0027] The connection portion 4 is disposed between the surface electrode layer 1 and the stress buffer layer 3 in the first direction Z, and connects the surface electrode layer 1 and the stress buffer layer 3. The connection portion 4 is in contact with both the surface electrode layer 1 and the stress buffer layer 3.

[0028] The connection portion 4 includes an insulator 41 and a plurality of plugs 42. The insulator 41 and each of the plurality of plugs 42 are in contact with the surface electrode layer 1 and the stress buffer layer 3 in the first direction Z. Each of the plurality of plugs 42 electrically connects the surface electrode layer 1 and the stress buffer layer 3.

[0029] The multiple plugs 42 are arranged at intervals from one another in each of the second direction X and the third direction Y. Each of the multiple plugs 42 is embedded in the insulator 41. The insulator 41 has multiple through holes formed therein that penetrate the insulator 41 in the first direction Z. Each of the multiple plugs 42 is formed so as to fill the multiple through holes of the insulator 41.

[0030] The upper surfaces of the insulator 41 and each of the multiple plugs 42 are in contact with the lower surface of the front electrode layer 1. The lower surfaces of the insulator 41 and each of the multiple plugs 42 are in contact with the upper surface of the stress buffer layer 3. The inner circumferential surface of each of the multiple through holes of the insulator 41 is in contact with the side surface of each of the multiple plugs 42. From a different perspective, in the connection portion 4, the insulator 41 and each of the multiple plugs 42 are alternately stacked in a direction perpendicular to the first direction Z. The connection portion 4 is a stacked plug made up of the insulators 41 and each of the multiple plugs 42 alternately stacked in a direction perpendicular to the first direction Z.

[0031] The material constituting the insulator 41 may be any material having electrical insulation properties, such as an oxide film. The material constituting each of the plurality of plugs 42 is a conductive material. The material constituting each of the plurality of plugs 42 includes, for example, tungsten (W).

[0032] 4, the connection portion 4 includes a third region R3 and a fourth region R4 located outside the third region R3. The third region R3 is a region of the connection portion 4 that overlaps in the first direction Z with the first region R1 of the first surface 10A to which the wire 104 is joined. The fourth region R4 is a region of the connection portion 4 that overlaps in the first direction Z with the second region R2 of the first surface 10A. The multiple plugs 42 include a first group of plugs 42 arranged in the third region R3 and a second group of plugs 42 arranged in the fourth region R4.

[0033] 4, the spacing between each of the multiple plugs 42 in the second direction X is, for example, constant. The spacing between each of the multiple plugs 42 in the third direction Y is, for example, constant. The width in the second direction X of each of the multiple plugs 42 is, for example, narrower than the width in the second direction X of an insulator 41 sandwiched between two plugs 42 adjacent to each other in the second direction X. The width in the third direction Y of each of the multiple plugs 42 is, for example, narrower than the width in the second direction X of an insulator 41 sandwiched between two plugs 42 adjacent to each other in the third direction Y.

[0034] 4, the cross-sectional shape of each of the multiple plugs 42 taken orthogonal to the first direction Z is, for example, rectangular. The cross-sectional shape of each of the multiple plugs 42 taken orthogonal to the first direction Z may also be circular or the like.

[0035] Although not shown, the integrated circuit element 101 further includes a multilayer structure 20. The multilayer structure 20 includes a first wiring layer electrically connected to the surface electrode layer 1 of the bonding pad 11, a second wiring layer stacked at an interval from the first wiring layer in the first direction Z and electrically connected to the resistance layer 2 of the bonding pad 11, an insulating layer sandwiched between the first wiring layer and the second wiring layer to electrically insulate them, and a plug embedded in the insulating layer to electrically connect the first wiring layer and the second wiring layer.

[0036] In the manufacturing method of the integrated circuit element 101 described below, the resistance layer 2 and stress buffer layer 3 of the bonding pad 11 can be formed in the same process as the second wiring layer and insulating layer of the multilayer structure 20. The connection portion 4 of the bonding pad 11 can be formed in the same process as the insulating layer and plug of the multilayer structure 20. The surface electrode layer 1 of the bonding pad 11 can be formed in the same process as the first wiring layer of the multilayer structure 20.

[0037] <Method for manufacturing bonding pad 11> As described above, in the method for manufacturing the integrated circuit element 101, the bonding pad 11 can be formed simultaneously with the multi-layer structure 20. An example of a method for manufacturing the bonding pad 11 will be described below.

[0038] First, the resistive layer 2 and the stress buffer layer 3 are formed in this order on the interlayer insulating film 106. The stress buffer layer 3 is formed on the resistive layer 2. Each of the resistive layer 2 and the stress buffer layer 3 is formed on the entire area where the bonding pad 11 is to be formed. In the multilayer structure 20, each of the resistive layer 2 and the stress buffer layer 3 may have any shape as a lower wiring layer.

[0039] Second, the connection portion 4 is formed on the stress buffer layer 3. In the step of forming the connection portion 4, a plurality of plugs 42 may be formed first, and then the insulator 41 may be formed so as to embed the plurality of plugs 42. Alternatively, in the step of forming the connection portion 4, the insulator 41 may be formed first, a plurality of through holes may be formed in the insulator 41, and then the plurality of plugs 42 may be formed so as to embed the plurality of through holes. The connection portion 4 is formed over the entire area where the bonding pad 11 is to be formed. In the multilayer structure 20, the insulating layer and the plugs may have any shape.

[0040] Third, the surface electrode layer 1 is formed on the connection portion 4. The resistance layer 2 and the stress buffer layer 3 are each formed on the entire area where the bonding pad 11 is to be formed. In the multilayer structure 20, the surface electrode layer 1 may have any shape as an upper wiring layer.

[0041] In this way, the bonding pad 11 can be formed simultaneously with the multi-layer structure 20 .

[0042] <Effects of Bonding Pad 11> The bonding pad 11 includes a stress buffer layer 3 disposed between the surface electrode layer 1 and the resistive layer 2 in the first direction Z and in contact with the resistive layer 2. The stress buffer layer 3 extends across the entire bonding pad 11 in both the second direction X and the third direction Y. The stress buffer layer 3 disperses stress generated in the bonding pad 11 when the wire 104 is ultrasonically bonded to the first surface 10A, thereby preventing the stress from concentrating on the connection portion 4. Therefore, in the bonding pad 11 including the stress buffer layer 3, cracks are less likely to occur in the connection portion 4 and the bondability between the wire 104 and the bonding pad 11 is less likely to deteriorate compared to the conventional bonding pad described above.

[0043] Furthermore, in bonding pad 11, thickness T1 of stress buffer layer 3 in the first direction Z is greater than thickness T2 of surface electrode layer 1 in the first direction Z. The rigidity of bonding pad 11 including such stress buffer layer 3 can be easily increased compared to the rigidity of a bonding pad including a stress buffer layer whose thickness in the first direction Z is equal to or thinner than the thickness in the first direction Z of surface electrode layer 1. As a result, bonding pad 11 can easily achieve the rigidity required to withstand ultrasonic vibrations in a direction perpendicular to first direction Z, making it less likely that cracks will occur in connection portion 4 and reducing the bondability between wire 104 and bonding pad 11.

[0044] Embodiment 2 5 is a cross-sectional view illustrating bonding pad 12 according to the second embodiment. Note that interlayer insulating film 106 and the like are not shown in FIG. 5. As shown in FIG. 5, bonding pad 12 has basically the same configuration as bonding pad 11 according to the first embodiment and achieves the same effects, but differs from bonding pad 11 in that stress buffer layer 3 includes first metal layer 31 and second metal layer 32. The following mainly describes the differences between bonding pad 12 and bonding pad 11.

[0045] 5, the first metal layer 31 and the second metal layer 32 are stacked on top of each other in the first direction Z. The upper surface of the first metal layer 31 is in contact with the lower surface of the connection portion 4. The lower surface of the first metal layer 31 is in contact with the upper surface of the second metal layer 32. The lower surface of the second metal layer 32 is in contact with the upper surface of the resistive layer 2.

[0046] The first metal layer 31 and the second metal layer 32 each extend over the entire bonding pad 12 in the second direction X and the third direction Y. The first metal layer 31 and the second metal layer 32 each are continuous bodies that are continuous in each of the second direction X and the third direction Y. The first metal layer 31 and the second metal layer 32 each are a single layer made up of one continuous body that is continuous in each of the first direction Z, the second direction X, and the third direction Y, for example.

[0047] The second metal material constituting the second metal layer 32 has a higher rigidity than the first metal material constituting the first metal layer 31. The Young's modulus of the first metal material constituting the first metal layer 31 is lower than the Young's modulus of the second metal material constituting the second metal layer 32. The rigidity of the first metal material constituting the first metal layer 31 is lower than the rigidity of the second metal material constituting the second metal layer 32. The Young's modulus of the first metal material constituting the first metal layer 31 is lower than the Young's modulus of the material constituting each of the multiple plugs 42. The rigidity of the first metal material constituting the first metal layer 31 is lower than the rigidity of the material constituting each of the multiple plugs 42.

[0048] The second metal material constituting the second metal layer 32 is, for example, the same as the material constituting each of the multiple plugs 42. The Young's modulus of the second metal material constituting the second metal layer 32 may be lower than the Young's modulus of the material constituting each of the multiple plugs 42.

[0049] The sum T1 of the thicknesses in the first direction Z of the first metal layer 31 and the second metal layer 32 is thicker than the thickness T2 in the first direction Z of the surface electrode layer 1. The sum T1 of the thicknesses in the first direction Z of the first metal layer 31 and the second metal layer 32 is thicker than the thickness in the first direction Z of, for example, the resistive layer 2. The sum T1 of the thicknesses in the first direction Z of the first metal layer 31 and the second metal layer 32 is thicker than the thickness in the first direction Z of, for example, the connecting portion 4.

[0050] The thickness of the first metal layer 31 in the first direction Z is, for example, thicker than the thickness of the surface electrode layer 1 in the first direction Z. The thickness of the second metal layer 32 in the first direction Z is, for example, thicker than the thickness of the first metal layer 31 in the first direction Z. The thickness of the second metal layer 32 in the first direction Z may be equal to or thinner than the thickness of the first metal layer 31 in the first direction Z.

[0051] In bonding pad 12, first metal layer 31 disperses stress generated in bonding pad 12 when wire 104 is ultrasonically bonded to first surface 10A, thereby preventing the stress from concentrating on connection portion 4. Furthermore, second metal layer 32 prevents connection portion 4 from being excessively deformed by a load in first direction Z applied to bonding pad 12 during the ultrasonic bonding. Therefore, in bonding pad 12, cracks are less likely to occur in connection portion 4, and the bondability between wire 104 and bonding pad 12 is less likely to deteriorate, compared to the conventional bonding pad described above.

[0052] In the bonding pad 12, the second metal material constituting the second metal layer 32 may be the same as the material constituting each of the plurality of plugs 42. This reduces the number of types of metal materials contained in the bonding pad 12, facilitating measures against metal contamination and improving manufacturing efficiency. Furthermore, this makes it easier to control the amount of deformation of the bonding pad 12 due to the load applied in the first direction Z during the ultrasonic bonding, and more effectively suppresses deterioration in the bondability between the wire 104 and the bonding pad 12.

[0053] In bonding pad 12, the modulus of rigidity of the second metal material constituting second metal layer 32 may be lower than the modulus of rigidity of the material constituting multiple plugs 42. In this way, first metal layer 31 and second metal layer 32 can disperse the shear stress generated in bonding pad 12 when wire 104 is ultrasonically bonded to first surface 10A, thereby preventing the stress from concentrating on connection portion 4.

[0054] The multilayer structure 20 of the integrated circuit element 101 according to the second embodiment includes a second metal layer 32, similar to the bonding pad 12. In the method for manufacturing the integrated circuit element 101 according to the second embodiment, the bonding pad 12 can be formed simultaneously with the multilayer structure 20.

[0055] Embodiment 3 6 is a cross-sectional view illustrating bonding pad 13 according to the third embodiment. Note that interlayer insulating film 106 and the like are not shown in FIG. 6. As shown in FIG. 6, bonding pad 13 has basically the same configuration as bonding pad 11 according to the first embodiment and achieves the same effects, but differs from bonding pad 11 in that stress buffer layer 3 includes first metal layer 31 and insulating layer 33. The following mainly describes the differences between bonding pad 13 and bonding pad 11.

[0056] 6, the first metal layer 31 and the insulating layer 33 are stacked on top of each other in the first direction Z. The upper surface of the first metal layer 31 is in contact with the lower surface of the connection portion 4. The lower surface of the first metal layer 31 is in contact with the upper surface of the insulating layer 33. The lower surface of the insulating layer 33 is in contact with the upper surface of the resistive layer 2.

[0057] The first metal layer 31 and the insulating layer 33 each extend over the entire bonding pad 13 in the second direction X and the third direction Y. The first metal layer 31 and the insulating layer 33 each form a continuous body that continues in each of the second direction X and the third direction Y. The first metal layer 31 and the insulating layer 33 each form a single layer that is made up of one continuous body that continues in each of the first direction Z, the second direction X, and the third direction Y, for example.

[0058] The modulus of rigidity of the first metal material constituting the first metal layer 31 is lower than the modulus of rigidity of the material constituting each of the plurality of plugs 42. The Young's modulus of the first metal material constituting the first metal layer 31 is lower than the Young's modulus of the material constituting each of the plurality of plugs 42.

[0059] The material constituting the insulating layer 33 may be any material having electrical insulation properties, and may be, for example, the same as the material constituting the insulator 41 of the connection portion 4. The insulating layer 33 is, for example, an oxide film. The modulus of rigidity of the material constituting the insulating layer 33 is lower than the modulus of rigidity of the material constituting each of the multiple plugs 42. The Young's modulus of the material constituting the insulating layer 33 is lower than the Young's modulus of the material constituting each of the multiple plugs 42. The modulus of rigidity of the material constituting the insulating layer 33 may be lower than the modulus of rigidity of the material constituting the insulator 41.

[0060] The sum T1 of the thicknesses in the first direction Z of the first metal layer 31 and the insulating layer 33 is thicker than the thickness T2 in the first direction Z of the surface electrode layer 1. The sum T1 of the thicknesses in the first direction Z of the first metal layer 31 and the insulating layer 33 is thicker than the thickness in the first direction Z of, for example, the resistive layer 2. The sum T1 of the thicknesses in the first direction Z of the first metal layer 31 and the insulating layer 33 is thicker than the thickness in the first direction Z of, for example, the connecting portion 4.

[0061] The thickness of the first metal layer 31 in the first direction Z is greater than, for example, the thickness of the surface electrode layer 1 in the first direction Z. The thickness of the insulating layer 33 in the first direction Z is greater than, for example, the thickness of the first metal layer 31 in the first direction Z. The thickness of the insulating layer 33 in the first direction Z may be equal to or less than the thickness of the first metal layer 31 in the first direction Z.

[0062] In the bonding pad 13, the first metal layer 31 and the insulating layer 33 disperse the stress generated in the bonding pad 13 when the wire 104 is ultrasonically bonded to the first surface 10A, thereby preventing the stress from concentrating on the connection portion 4. Furthermore, the first metal layer 31 and the insulating layer 33 easily follow the ultrasonic vibrations in a direction perpendicular to the first direction Z, and therefore can prevent cracks from occurring in the connection portion 4 even when the energy of the ultrasonic vibrations is set high. As a result, in the bonding pad 13, cracks are less likely to occur in the connection portion 4 compared to the conventional bonding pad described above, and the bondability between the wire 104 and the bonding pad 13 is high.

[0063] The multilayer structure 20 of the integrated circuit element 101 according to the third embodiment includes an insulating layer 33, similar to the bonding pad 13. In the method for manufacturing the integrated circuit element 101 according to the third embodiment, the bonding pad 13 can be formed simultaneously with the multilayer structure 20.

[0064] Embodiment 4 7 and 8 are cross-sectional views illustrating bonding pad 14 according to the fourth embodiment. Note that interlayer insulating film 106 and the like are omitted from FIG. 7. As shown in FIGS. 7 and 8, bonding pad 14 has basically the same configuration and provides the same effects as bonding pad 11 according to the first embodiment, but differs from bonding pad 11 in that third region R3 of connecting portion 4 is formed only by insulator 41 and at least one plug 42 is disposed only in fourth region R4 of connecting portion 4. The following mainly describes the differences between bonding pad 14 and bonding pad 11.

[0065] 7 and 8, the connection portion 4 of the bonding pad 14 is composed of at least one plug 42 formed in the fourth region R4 and an insulator 41 formed in the entire third region R3 and the remaining portion of the fourth region R4. For example, only one plug 42 is formed in the fourth region R4. Note that multiple plugs 42 may be formed in the fourth region R4. The cross-sectional shape of the plug 42 perpendicular to the first direction Z is annular. The cross-sectional shape of the plug 42 perpendicular to the first direction Z is, for example, a rectangular ring. Note that the cross-sectional shape of the plug 42 perpendicular to the first direction Z may also be a circular ring.

[0066] The insulator 41 is composed of a first portion 41A that is disposed inside the plug 42 and a second portion 41B that is disposed outside the plug 42. The first portion 41A of the insulator 41 is a continuous body that is continuous in each of the second direction X and the third direction Y. The first portion 41A of the insulator 41 is, for example, a single layer made up of one continuous body that is continuous in each of the first direction Z, the second direction X, and the third direction Y.

[0067] The first portion 41A of the insulator 41 is composed of a third portion 41A1 disposed in the third region R3 and a fourth portion 41A2 disposed in the fourth region R4. The third portion 41A1 and the fourth portion 41A2 are configured as a continuum. The second portion 41B of the insulator 41 is disposed in the fourth region R4.

[0068] 8, when viewed from the first direction Z, the plug 42 is formed only in the fourth region R4. When viewed from the first direction Z, the plug 42 is disposed outside (on the fourth region R4 side) the boundary line between the third region R3 and the fourth region R4 and at a distance from the boundary line. From a different perspective, the bonding interface between the first portion 41A of the insulator 41 and the plug 42 and the bonding interface between the second portion 41B of the insulator 41 and the plug 42 are not formed in the third region R3 located directly below the first region R1 to which the wire 104 is bonded.

[0069] In the bonding pad 14, the bonding interface between the first portion 41A of the insulator 41 and the plug 42 and the bonding interface between the second portion 41B of the insulator 41 and the plug 42 are not formed in the third region R3, and therefore, compared to the bonding pad 11 in which the bonding interfaces are also formed in the third region R3, cracks are less likely to propagate from the bonding interfaces to the insulator 41. Therefore, the bondability between the wire 104 and the bonding pad 14 is higher than the bondability between the wire 104 and the bonding pad 11.

[0070] In the method for manufacturing the integrated circuit element 101 according to the fourth embodiment, the bonding pads 14 can be formed simultaneously with the multilayer structure 20 .

[0071] <Modification> 9, in the bonding pads 11 to 14 according to the first to fourth embodiments, the thickness T1 of the stress buffer layer 3 in the first direction Z may be equal to or greater than the sum T3 of the thickness of the surface electrode layer 1 in the first direction Z and the thickness of the connection portion 4 in the first direction Z. This enhances the effect of the stress buffer layer 3 dispersing the stress generated in the bonding pad 11 and suppressing the concentration of the stress on the connection portion 4.

[0072] The bonding pads 11 to 14 according to the first to fourth embodiments may include, instead of the resistive layer 2, a bottom electrode layer made of a material having a resistivity equivalent to that of the material constituting the surface electrode layer 1.

[0073] Various aspects of the present disclosure are summarized below as appendices. [Appendix 1] A bonding pad of an integrated circuit element included in an integrated circuit device, a surface electrode layer having a first surface; a resistive layer disposed at a distance from the first surface in a first direction perpendicular to the first surface and having a second surface facing the opposite side to the first surface; a stress buffer layer disposed between the surface electrode layer and the resistance layer in the first direction; a connection portion that connects the surface electrode layer and the stress buffer layer in the first direction and is in contact with each of the surface electrode layer and the stress buffer layer, the stress buffer layer extends across the entire bonding pad in a direction perpendicular to the first direction; the connection portion includes an insulator in contact with each of the surface electrode layer and the stress buffer layer in the first direction, and at least one plug in contact with the insulator in a direction perpendicular to the first direction and electrically connecting the surface electrode layer and the stress buffer layer; The thickness of the stress buffer layer in the first direction is greater than the thickness of the surface electrode layer in the first direction. [Appendix 2] the stress buffer layer includes a first metal layer and a second metal layer stacked on top of each other in the first direction; the first metal layer is in contact with the connection portion, the second metal layer is in contact with the resistive layer; each of the first metal layer and the second metal layer extends across the entire bonding pad in a direction perpendicular to the first direction; A bonding pad as described in Appendix 1, wherein the Young's modulus of the first metal material constituting the first metal layer is lower than the Young's modulus of the second metal material constituting the second metal layer and is also lower than the Young's modulus of the material constituting the at least one plug. [Appendix 3] 3. The bonding pad of claim 2, wherein the second metal material constituting the second metal layer is the same as the material constituting the at least one plug. [Appendix 4] 3. The bonding pad of claim 2, wherein the modulus of rigidity of the second metal material constituting the second metal layer is lower than the modulus of rigidity of the material constituting the at least one plug. [Appendix 5] the stress buffer layer includes a metal layer and an insulating layer stacked on top of each other in the first direction, the metal layer is in contact with the surface electrode layer; the insulating layer is in contact with the resistive layer, each of the metal layer and the insulating layer extending across the entire bonding pad in a direction perpendicular to the first direction; 2. The bonding pad of claim 1, wherein the modulus of rigidity of the material constituting the insulating layer is lower than the modulus of rigidity of the material constituting the at least one plug. [Appendix 6] the at least one plug includes a plurality of plugs spaced apart from one another in a direction perpendicular to the first direction; 6. The bonding pad according to claim 1, wherein the insulator fills spaces between the plugs. [Appendix 7] the first surface includes a first region to which a conductive member constituting a part of the integrated circuit device is bonded, and a second region located outside the first region; the connection portion includes a third region overlapping with the first region in the first direction and a fourth region overlapping with the second region in the first direction; the at least one plug is disposed only in the fourth region of the connection portion; 7. The bonding pad according to claim 1, wherein the third region of the connection portion is made of the insulator. [Appendix 8] A bonding pad of an integrated circuit element described in any one of Appendices 1 to 7, wherein the thickness of the stress buffer layer in the first direction is equal to or greater than the sum of the thickness of the surface electrode layer in the first direction and the thickness of the connection portion in the first direction. [Appendix 9] A bonding pad according to any one of appendices 1 to 8; an interlayer insulating film bonded to the second surface of the bonding pad; [Appendix 10] the integrated circuit element including the bonding pad according to any one of appendices 1 to 8 and an interlayer insulating film bonded to the second surface of the bonding pad; and a conductive member ultrasonically bonded to the first surface of the bonding pad.

[0074] Although the embodiments of the present disclosure have been described above, the above-described embodiments can be modified in various ways. Furthermore, the scope of the present disclosure is not limited to the above-described embodiments. The scope of the present disclosure is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0075] 1 surface electrode layer, 2 resistance layer, 3 stress buffer layer, 4 connection portion, 11, 12, 13, 14 bonding pad, 10A first surface, 10B second surface, 20 multilayer structure, 31 first metal layer, 32 second metal layer, 33 insulating layer, 41 insulator, 41A first portion, 41A1 third portion, 41A2 fourth portion, 41B second portion, 42 plug, 100 integrated circuit device, 101 integrated circuit element, 102 power semiconductor element, 103 lead frame, 104 wire, 105 sealing member, 106 interlayer insulating film.

Claims

1. A bonding pad of an integrated circuit element included in an integrated circuit device, a surface electrode layer having a first surface; a resistive layer disposed at a distance from the first surface in a first direction perpendicular to the first surface and having a second surface facing the opposite side to the first surface; a stress buffer layer disposed between the surface electrode layer and the resistance layer in the first direction; a connection portion that connects the surface electrode layer and the stress buffer layer in the first direction and is in contact with each of the surface electrode layer and the stress buffer layer, the stress buffer layer extends across the entire bonding pad in a direction perpendicular to the first direction; the connection portion includes an insulator in contact with each of the surface electrode layer and the stress buffer layer in the first direction, and at least one plug in contact with the insulator in a direction perpendicular to the first direction and electrically connecting the surface electrode layer and the stress buffer layer; a thickness of the stress buffer layer in the first direction is greater than a thickness of the surface electrode layer in the first direction; the stress buffer layer includes a first metal layer and a second metal layer stacked and in contact with each other in the first direction; the first metal layer is in contact with the connection portion, the second metal layer is in contact with the resistive layer; each of the first metal layer and the second metal layer extends across the entire bonding pad in a direction perpendicular to the first direction; A bonding pad, wherein the Young's modulus of the first metal material constituting the first metal layer is lower than the Young's modulus of the second metal material constituting the second metal layer and is also lower than the Young's modulus of the material constituting the at least one plug.

2. A bonding pad of an integrated circuit element included in an integrated circuit device, comprising: a surface electrode layer having a first surface; a resistive layer disposed at a distance from the first surface in a first direction perpendicular to the first surface and having a second surface facing the opposite side to the first surface; a stress buffer layer disposed between the surface electrode layer and the resistance layer in the first direction; a connection portion that connects the surface electrode layer and the stress buffer layer in the first direction and is in contact with each of the surface electrode layer and the stress buffer layer, the stress buffer layer extends across the entire bonding pad in a direction perpendicular to the first direction; the connection portion includes an insulator in contact with each of the surface electrode layer and the stress buffer layer in the first direction, and at least one plug in contact with the insulator in a direction perpendicular to the first direction and electrically connecting the surface electrode layer and the stress buffer layer; a thickness of the stress buffer layer in the first direction is greater than a thickness of the surface electrode layer in the first direction; the stress buffer layer includes a first metal layer and a second metal layer stacked on top of each other in the first direction; the first metal layer is in contact with the connection portion, the second metal layer is in contact with the resistive layer; each of the first metal layer and the second metal layer extends across the entire bonding pad in a direction perpendicular to the first direction; a Young's modulus of a first metal material constituting the first metal layer is lower than a Young's modulus of a second metal material constituting the second metal layer and is lower than a Young's modulus of a material constituting the at least one plug; A bonding pad, wherein the second metal material constituting the second metal layer is the same as the material constituting the at least one plug.

3. A bonding pad of an integrated circuit element included in an integrated circuit device, comprising: a surface electrode layer having a first surface; a resistive layer disposed at a distance from the first surface in a first direction perpendicular to the first surface and having a second surface facing the opposite side to the first surface; a stress buffer layer disposed between the surface electrode layer and the resistance layer in the first direction; a connection portion that connects the surface electrode layer and the stress buffer layer in the first direction and is in contact with each of the surface electrode layer and the stress buffer layer, the stress buffer layer extends across the entire bonding pad in a direction perpendicular to the first direction; the connection portion includes an insulator in contact with each of the surface electrode layer and the stress buffer layer in the first direction, and at least one plug in contact with the insulator in a direction perpendicular to the first direction and electrically connecting the surface electrode layer and the stress buffer layer; a thickness of the stress buffer layer in the first direction is greater than a thickness of the surface electrode layer in the first direction; the stress buffer layer includes a first metal layer and a second metal layer stacked on top of each other in the first direction; the first metal layer is in contact with the connection portion, the second metal layer is in contact with the resistive layer; each of the first metal layer and the second metal layer extends across the entire bonding pad in a direction perpendicular to the first direction; a Young's modulus of a first metal material constituting the first metal layer is lower than a Young's modulus of a second metal material constituting the second metal layer and is lower than a Young's modulus of a material constituting the at least one plug; A bonding pad, wherein the modulus of rigidity of the second metal material constituting the second metal layer is lower than the modulus of rigidity of the material constituting the at least one plug.

4. A bonding pad of an integrated circuit element included in an integrated circuit device, comprising: a surface electrode layer having a first surface; a resistive layer disposed at a distance from the first surface in a first direction perpendicular to the first surface and having a second surface facing the opposite side to the first surface; a stress buffer layer disposed between the surface electrode layer and the resistance layer in the first direction; a connection portion that connects the surface electrode layer and the stress buffer layer in the first direction and is in contact with each of the surface electrode layer and the stress buffer layer, the stress buffer layer extends across the entire bonding pad in a direction perpendicular to the first direction; the connection portion includes an insulator in contact with each of the surface electrode layer and the stress buffer layer in the first direction, and at least one plug in contact with the insulator in a direction perpendicular to the first direction and electrically connecting the surface electrode layer and the stress buffer layer; a thickness of the stress buffer layer in the first direction is greater than a thickness of the surface electrode layer in the first direction; the stress buffer layer includes a metal layer and an insulating layer stacked on top of each other in the first direction, the metal layer is in contact with the surface electrode layer; the insulating layer is in contact with the resistive layer; each of the metal layer and the insulating layer extending across the bonding pad in a direction perpendicular to the first direction; A bonding pad, wherein the modulus of rigidity of the material constituting the insulating layer is lower than the modulus of rigidity of the material constituting the at least one plug.

5. A bonding pad of an integrated circuit element included in an integrated circuit device, comprising: a surface electrode layer having a first surface; a resistive layer disposed at a distance from the first surface in a first direction perpendicular to the first surface and having a second surface facing the opposite side to the first surface; a stress buffer layer disposed between the surface electrode layer and the resistance layer in the first direction; a connection portion that connects the surface electrode layer and the stress buffer layer in the first direction and is in contact with each of the surface electrode layer and the stress buffer layer, the stress buffer layer extends across the entire bonding pad in a direction perpendicular to the first direction; the connection portion includes an insulator in contact with each of the surface electrode layer and the stress buffer layer in the first direction, and at least one plug in contact with the insulator in a direction perpendicular to the first direction and electrically connecting the surface electrode layer and the stress buffer layer; a thickness of the stress buffer layer in the first direction is greater than a thickness of the surface electrode layer in the first direction; A bonding pad, wherein the thickness of the stress buffer layer in the first direction is equal to or greater than the sum of the thickness of the surface electrode layer in the first direction and the thickness of the connection portion in the first direction.

6. the at least one plug includes a plurality of plugs spaced apart from one another in a direction perpendicular to the first direction; 6. The bonding pad according to claim 1, wherein the insulator fills spaces between the plurality of plugs.

7. the first surface has a first region to which a conductive member constituting a part of the integrated circuit device is bonded; a second region located outside the first region, the connection portion includes a third region overlapping with the first region in the first direction and a fourth region overlapping with the second region in the first direction; the at least one plug is disposed only in the fourth region of the connection portion; 6. The bonding pad according to claim 1, wherein the third region of the connection portion is made of the insulator.

8. A bonding pad according to any one of claims 1 to 5, an interlayer insulating film bonded to the second surface of the bonding pad;

9. the integrated circuit element including the bonding pad according to any one of claims 1 to 5 and an interlayer insulating film bonded to the second surface of the bonding pad; a conductive member bonded to the first surface of the bonding pad.

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