Electro-optical devices and electronic equipment

Abstract

To provide an electro-optical device that has reduced the influence of an electric potential transmitted from a gate relay electrode to an LDD region on a side of a drain region of a transistor.SOLUTION: An electro-optical device comprises: a substrate 21; a pixel electrode; a transistor that is arranged on a layer between the pixel electrode and the substrate 21; a gate relay electrode 254 that is arranged on a layer between the pixel electrode and the transistor; and a light blocking shield layer 253 that is arranged on a layer between the gate relay electrode 254 and the transistor. The gate relay electrode 254 is electrically connected with a gate electrode 232 of the transistor, and in plan view, has an opening 254a at a position overlapping a gap S formed between the gate electrode 232 and the light blocking shield layer 253 at least in plan view.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present invention relates to an electro-optical device and an electronic device. [Background technology]

[0002] 2. Description of the Related Art Electronic devices such as projectors use electro-optical devices such as liquid crystal display devices that can change optical characteristics for each pixel.

[0003] The electro-optical device described in Patent Document 1 includes a substrate, pixel electrodes provided for each pixel, transistors having an LDD (Lightly Doped Drain) structure as switching elements for the pixel electrodes, and a light-shielding film disposed between the substrate and the transistor. The transistor includes a semiconductor layer having a channel region, a source region, a drain region, a low-concentration source region, and a low-concentration drain region, and a gate electrode overlapping the channel region in a planar view. The light-shielding film is disposed in a lattice pattern surrounding the pixel electrodes in a planar view and overlaps the transistor in a planar view. The light-shielding film is also used as a scanning line that supplies a gate potential to the gate electrode. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-225034 Summary of the Invention [Problem to be solved by the invention]

[0005] It is known that the closer the light-shielding film is to the semiconductor layer of a transistor, the better the light-shielding effect. However, since the light-shielding film that can function as a scanning line described in Patent Document 1 overlaps the entire area of ​​the transistor in a planar view, there is a risk of an increase in off-leak current if the light-shielding film is placed near an area other than the channel region of the transistor. As a result, there is a risk of a decrease in display quality due to the occurrence of black spots, etc. [Means for solving the problem]

[0006] The electro-optical device comprises a substrate, a pixel electrode, a transistor disposed in a layer between the pixel electrode and the substrate, a gate relay electrode disposed in a layer between the pixel electrode and the transistor, and a light-shielding shield layer disposed in a layer between the gate relay electrode and the transistor, wherein the gate relay electrode is electrically connected to a gate electrode of the transistor and has an opening at a position that overlaps at least in a planar view with a gap formed between the gate electrode and the light-shielding shield layer.

[0007] The electronic device includes the electro-optical device described above. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing a schematic configuration of an electro-optical device according to a first embodiment. [Figure 2] 2 is a cross-sectional view taken along line A-A' in FIG. 1. [Figure 3] FIG. 2 is an equivalent circuit diagram showing the electrical configuration of the electro-optical device. [Figure 4] FIG. 2 is an explanatory diagram schematically showing the vertical structure of an element substrate. [Figure 5] FIG. [Figure 6] FIG. 6 is a cross-sectional view taken along line BB in FIG. 5 . [Figure 7] FIG. 10 is a schematic configuration diagram of a projection display device as an electronic device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following drawings, the scale of each component is different from the actual scale in order to make each component large enough to be recognizable. Also, some parts are shown schematically to facilitate understanding.

[0010] For ease of explanation, the drawings will be described using the mutually orthogonal X-axis, Y-axis, and Z-axis as appropriate. Furthermore, one direction along the X-axis will be referred to as the X1 direction, and the direction opposite to the X1 direction will be referred to as the X2 direction. One direction along the Y-axis will be referred to as the Y1 direction, and the direction opposite to the Y1 direction will be referred to as the Y2 direction. One direction along the Z-axis will be referred to as the Z1 direction, and the direction opposite to the Z1 direction will be referred to as the Z2 direction.

[0011] In the following, viewing in the Z1 or Z2 direction will be referred to as a "planar view" or "planar." Viewing from a direction perpendicular to a cross section including the Z axis will be referred to as a "cross-sectional view" or "cross-sectional."

[0012] Furthermore, in the following description, for example, the expression "on the substrate" in relation to a substrate means that the substrate is placed in contact with the substrate, that the substrate is placed via another structure, or that a portion of the substrate is placed in contact with the substrate and a portion of the substrate is placed via another structure.

[0013] 1. Embodiment 1 1.1. Overview of electro-optical devices FIG. 1 is a plan view showing a schematic configuration of an electro-optical device. In this embodiment, an active-drive liquid crystal device 100 having a TFT (Thin Film Transistor) as a pixel transistor for each pixel will be described as an example of an electro-optical device. This liquid crystal device 100 can be suitably used as a light modulation device in, for example, a projection display device 4000 as an electronic device, which will be described later.

[0014] As shown in Fig. 1, the liquid crystal device 100 has an element substrate 2 and an opposing substrate (not shown). The element substrate 2 has a display area A10 that displays an image and a peripheral area A20 that is located outside the display area A10 in a planar view. A plurality of pixels P arranged in a matrix are provided in the display area A10. A sealing member 4, a scanning line driving circuit 11, a data line driving circuit 12, a plurality of external terminals 13, etc. are arranged in the peripheral area A20 that surrounds the display area A10 in a planar view.

[0015] FIG. 2 is a cross-sectional view showing a schematic configuration of the liquid crystal device taken along line AA' in FIG. 2, in the liquid crystal device 100, an element substrate 2, a liquid crystal layer 5, and a counter substrate 3 are arranged in this order in the Z1 direction. The element substrate 2 and the counter substrate 3 are translucent. Note that translucency refers to transparency to visible light, and preferably refers to a visible light transmittance of 50% or more.

[0016] The element substrate 2 includes a first substrate 21, a laminate 22, a plurality of pixel electrodes 25, and a first alignment layer 29. The first substrate 21 is a flat plate having light-transmitting and insulating properties. The first substrate 21 includes, for example, a glass substrate or a quartz substrate. A TFT (described later) is disposed on the laminate 22. The laminate 22 will be described later. Each pixel electrode 25 is light-transmitting. Each pixel electrode 25 includes, for example, a transparent conductive material such as ITO (indium tin oxide), IZO (indium zinc oxide), or FTO (fluorine-doped tin oxide). The thickness direction of the pixel electrode 25 coincides with the Z1 direction or the Z2 direction. The first alignment layer 29 is light-transmitting and insulating. The first alignment layer 29 aligns liquid crystal molecules in the liquid crystal layer 5. Examples of materials for the first alignment layer 29 include silicon oxide (SiO2) and polyimide.

[0017] The counter substrate 3 has a second substrate 31, an insulating layer 32, a common electrode 33, and a second alignment layer . The second substrate 31 is a flat plate having light-transmitting and insulating properties, and includes, for example, a glass substrate or a quartz substrate. The insulating layer 32 is transparent and insulating, and is made of an inorganic material such as silicon oxide.

[0018] The common electrode 33 is an opposing electrode disposed across the liquid crystal layer 5 from the plurality of pixel electrodes 25. The common electrode 33 includes a transparent conductive material such as ITO, IZO, or FTO. The pixel electrode 25 and the common electrode 33 apply an electric field to the liquid crystal layer 5 . The second alignment layer 34 is light-transmitting and insulating. The second alignment layer 34 aligns the liquid crystal molecules of the liquid crystal layer 5. Examples of materials for the second alignment layer 34 include silicon oxide and polyimide.

[0019] The sealing member 4 is disposed between the element substrate 2 and the counter substrate 3 and bonds the element substrate 2 and the counter substrate 3. The sealing member 4 is formed using, for example, an adhesive containing various curable resins such as epoxy resin. The sealing member 4 may also contain a gap material made of an inorganic material such as glass.

[0020] The liquid crystal layer 5 is disposed within an area surrounded by the element substrate 2, the counter substrate 3, and the sealing member 4. The liquid crystal layer 5 is an electro-optical layer whose optical properties change in response to an electric field. The liquid crystal layer 5 contains liquid crystal molecules with positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to a voltage applied to the liquid crystal layer 5. The liquid crystal layer 5 can display grayscales by modulating light L incident on the liquid crystal layer 5 in response to the applied voltage.

[0021] 1.2. Pixel Circuit Overview FIG. 3 is an equivalent circuit diagram showing the electrical configuration of the display area of ​​the element substrate. The first base 21 of the element substrate 2 is provided with n scanning lines 241, m data lines 242, and k constant potential lines 243. n, m, and k are each an integer of 2 or more. A TFT 23 serving as a pixel transistor is provided at each intersection of the n scanning lines 241 and the m data lines 242 .

[0022] The scanning lines 241 extend in the X1 direction, and n scanning lines 241 are arranged at equal intervals in the Y1 direction. Scanning signals G1, G2, ..., and Gn are supplied line-sequentially to the n scanning lines 241 from the scanning line driving circuit 11 shown in FIG.

[0023] The data lines 242 extend in the Y1 direction, and the m data lines 242 are arranged at equal intervals in the X1 direction. Image signals S1, S2, ..., and Sm are supplied to the m data lines 242 from the data line driving circuit 12 shown in FIG.

[0024] A scanning line 241 is electrically connected to the gate of TFT23, a data line 242 is electrically connected to the source of TFT23, and a pixel electrode 25 and a first capacitance electrode 261 of a capacitance element 260 are electrically connected to the drain of TFT23.

[0025] The constant potential lines 243 extend in the Y1 direction and are arranged at equal intervals in the X1 direction. A fixed potential, such as a common potential supplied to the common electrode 33, is applied to each constant potential line 243. The constant potential lines 243 are capacitance lines electrically connected to the second capacitance electrode 262 of the capacitance element 260.

[0026] 1.3.Outline of the vertical structure of the element substrate FIG. 4 is an explanatory diagram that schematically shows the vertical structure of the element substrate. 4 shows the vertical structure of the element substrate 2 relating to the pixel P. The vertical structure schematically shows the arrangement and connection relationship between the laminate 22 provided on the first base 21, the circuit elements such as the TFT 23, the capacitive element 260, the scanning line 241, the data line 242, the constant potential line 243, the various relay electrodes such as the first relay electrode 251, and the pixel electrode 25 provided between or on the layers of the laminate 22, and a plurality of conductive parts such as the first conductive part 271 that electrically connect the circuit elements together.

[0027] The laminate 22 is composed of a plurality of insulating layers having light-transmitting and insulating properties. The insulating layers 221, 222, 223, 224, 225, 226, 227, 228, and 229 constituting the laminate 22 are stacked in this order from the first base 21 toward the plurality of pixel electrodes 25. The material of each layer of the laminate 22 is, for example, an inorganic material such as silicon oxide (SiO).

[0028] The scanning lines 241 are disposed between the first substrate 21 and the insulating layer 221. The TFTs 23 are disposed on the insulating layer 221. The TFTs 23 include a semiconductor layer 231 having an LDD (Lightly Doped Drain) structure, a gate electrode 232, and a gate insulating film 233.

[0029] The semiconductor layer 231 is disposed on the insulating layer 221. The semiconductor layer 231 has a source region 231a, a drain region 231b, a channel region 231c, a first LDD region 231d, and a second LDD region 231e. At least one of the first LDD region 231d and the second LDD region 231e, particularly the first LDD region 231d, may be omitted.

[0030] The scanning line 241 and the gate electrode 232 are electrically connected via a fifth conductive portion 275 , a fourth relay electrode 254 , and a sixth conductive portion 276 .

[0031] The pixel electrode 25 is provided on the insulating layer 229. The pixel electrode 25 and the drain region 231b of the TFT 23 are electrically connected via a first conductive portion 271, a first relay electrode 251, a second conductive portion 272, a second relay electrode 252, a third conductive portion 273, a third relay electrode 253, and a fourth conductive portion 274.

[0032] The capacitor element 260 has a first capacitor electrode 261, a second capacitor electrode 262, and a capacitor insulating layer 263. The first capacitor electrode 261 is electrically connected to the midpoint of the first conductive portion 271.

[0033] The data line 242 is provided between the insulating layer 226 and the insulating layer 227, which are the same layer as the first relay electrode 251. The data line 242 and the source region 231a of the TFT 23 are electrically connected via a seventh conductive portion 277, a fifth relay electrode 255, an eighth conductive portion 278, a sixth relay electrode 256, and a ninth conductive portion 279.

[0034] Examples of materials for the first conductive portion 271, the second conductive portion 272, the third conductive portion 273, the fourth conductive portion 274, the fifth conductive portion 275, the sixth conductive portion 276, the seventh conductive portion 277, the eighth conductive portion 278, and the ninth conductive portion 279 include metals such as tungsten (W), cobalt (Co), and copper (Cu), as well as metal materials such as metal nitrides and metal silicides. In this embodiment, the first conductive portion 271 is made of tungsten.

[0035] 1.4. Overview of openings Fig. 5 is a plan view showing the configuration of the opening, and Fig. 6 is a cross-sectional view taken along line BB in Fig. 5.

[0036] In this embodiment, the fourth relay electrode 254 is an example of a "gate relay electrode," the third relay electrode 253 is an example of a "light-shielding shield layer," the second relay electrode 252 is an example of a "drain region-side wiring layer," the sixth conductive portion 276 is an example of a "first contact hole," the fifth conductive portion 275 is an example of a "second contact hole," and the second LDD region 231e is an example of a "drain region-side LDD region." Therefore, in the following description, the gate relay electrode 254, the light-shielding shield layer 253, the drain region-side wiring layer 252, the first contact hole 276, the second contact hole 275, and the drain region-side LDD region 231e will be described.

[0037] As shown in Figures 5 and 6, the gate relay electrode 254 is electrically connected to the gate electrode 232 of the TFT 23, and has an opening 254a at a position that overlaps at least in plan view with the gap S formed between the gate electrode 232 and the light-shielding shield layer 253.

[0038] The gap S is provided at a position overlapping in plan view with at least the LDD region 231e on the drain region side of the TFT 23. The opening 254a is open at least in a range overlapping with the LDD region 231e in plan view. The opening 254a is open at least in a range larger than the range overlapping with the gap S in plan view.

[0039] The light-shielding shield layer 253 has a light-shielding function of preventing light from entering the TFT 23 and a shielding function of blocking application of a potential from the gate relay electrode 254 to the TFT 23. The light-shielding shield layer 253 is electrically connected to the drain region 231b of the TFT 23 via a fourth conductive portion 274 in the thickness direction shown in FIG.

[0040] The drain region side wiring layer 252 is electrically connected to the light-shielding shield layer 253 via the third conductive portion 273, and is provided so as to overlap at least the opening 254a in plan view.

[0041] The scanning line 241 not only has a light-shielding function of preventing light from entering the TFT 23 from the first base 21 (element substrate 2) side, but also functions as a back gate of the TFT 23. Therefore, in the thickness direction shown in Fig. 6, the gate relay electrode 254 and the gate electrode 232 are electrically connected via a first contact hole 276. Also, in the thickness direction shown in Fig. 6, the gate relay electrode 254 and the scanning line 241 are electrically connected via a second contact hole 275.

[0042] The first contact hole 276 and the second contact hole 275 are integrally provided so as to surround the periphery of the opening 254a in a U-shape in the plan view shown in FIG.

[0043] As described above, the liquid crystal device 100 of this embodiment can provide the following advantages. In the liquid crystal device 100 as an electro-optical device, the gate relay electrode 254 is electrically connected to the gate electrode 232 of the TFT 23, and has an opening 254a at a position that overlaps at least in plan view with the gap S formed between the gate electrode 232 and the light-shielding shield layer 253.

[0044] The opening 254a has a gap S at a position overlapping at least the LDD region 231e on the drain region side of the TFT 23 in plan view, and is larger than the gap S in at least the range overlapping with the LDD region 231e in plan view.

[0045] This configuration can reduce the influence of the potential transmitted from the gate relay electrode 254 to the LDD region 231e on the drain region side.

[0046] Furthermore, in the liquid crystal device 100 as an electro-optical device, the drain region side wiring layer 252 is electrically connected to the light-shielding shield layer 253 via the third conductive portion 273, and is arranged to overlap at least the opening 254a in a planar view.

[0047] According to this configuration, the drain region side wiring layer 252 can block light from entering the LDD region 231e on the drain region side through the opening 254a.

[0048] In addition, in the liquid crystal device 100 as an electro-optical device, a first contact hole 276 that electrically connects the gate relay electrode 254 and the gate electrode 232 in the thickness direction, and a second contact hole 275 that electrically connects the gate relay electrode 254 and the scanning line 241 in the thickness direction are integrally formed so as to surround the periphery of the opening 254a in a planar view.

[0049] According to this configuration, the first contact hole 276 and the second contact hole 275 can block light from entering the LDD region 231e on the drain region side from the opening 254a.

[0050] As described above, the liquid crystal device 100 as an electro-optical device can reduce the influence of the potential transmitted from the gate relay electrode 254 to the LDD region 231e on the drain region side, thereby preventing a decrease in the display quality of the liquid crystal device 100.

[0051] In the liquid crystal device 100 as an electro-optical device, a gap S is provided at a position overlapping the LDD region 231e on the drain region side of the TFT23 described above in a planar view, and an opening 254a is provided in the gate relay electrode 254 in the range overlapping with this LDD region 231e in a planar view. However, it is also possible to provide a gap at a position overlapping with the LDD region (first LDD region 231d) on the source region side of the TFT23 in a planar view, and an opening is provided in the gate relay electrode 254 in the range overlapping with this LDD region in a planar view.

[0052] 2. Embodiment 2 2.1. Overview of Electronic Devices FIG. 7 is a schematic diagram showing the configuration of a projection display device, which is an example of an electronic device according to this embodiment. The projection display device 4000 is, for example, a three-plate projector. The electro-optical device 1r is a liquid crystal device 100 corresponding to the display color of red, the electro-optical device 1g is a liquid crystal device 100 corresponding to the display color of green, and the electro-optical device 1b is a liquid crystal device 100 corresponding to the display color of blue. In other words, the projection display device 4000 has three electro-optical devices 1r, 1g, and 1b corresponding to the display colors of red, green, and blue, respectively. The control unit 4005 includes, for example, a processor and a memory, and controls the operation of the liquid crystal devices 100.

[0053] The illumination optical system 4001 supplies a red component r of light emitted from an illumination device 4002, which is a light source, to an electro-optical device 1r, a green component g to an electro-optical device 1g, and a blue component b to an electro-optical device 1b. Each of the electro-optical devices 1r, 1g, and 1b functions as a light modulation device such as a light valve that modulates each monochromatic light supplied from the illumination optical system 4001 in accordance with a display image. The projection optical system 4003 combines the light emitted from the electro-optical devices 1r, 1g, and 1b and projects the combined light onto a projection surface 4004.

[0054] The above electronic devices include the liquid crystal device 100. The liquid crystal device 100 may be the liquid crystal device 200. By including the liquid crystal device 100, which is highly manufacturable and compact, the projection display device 4000 can be made smaller.

[0055] Electronic devices to which the electro-optical device of the present invention can be applied are not limited to the devices exemplified above, and examples thereof include PDAs (Personal Digital Assistants), digital still cameras, televisions, video cameras, car navigation devices, in-vehicle displays, electronic organizers, electronic paper, calculators, word processors, workstations, videophones, POS (Point of Sale) terminals, 3D printers, and head-mounted displays.

[0056] Furthermore, in the above description, a liquid crystal device has been described as an example of the electro-optical device of the present invention, but the electro-optical device of the present invention is not limited to this. For example, the electro-optical device of the present invention can also be applied to an image sensor, etc. Furthermore, the present invention can be applied to a display panel using light-emitting elements such as organic electroluminescence (EL), inorganic electroluminescence, or light-emitting polymers, in the same manner as in the above-described embodiments. Furthermore, the present invention can be applied to an electrophoretic display panel using microcapsules containing a colored liquid and white particles dispersed in the liquid, in the same manner as in the above-described embodiments.

[0057] In the above-described embodiments, the transistors are TFTs, but they may also be, for example, metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0058] Although the present invention has been described above based on preferred embodiments, the present invention is not limited to the above-described embodiments. Furthermore, the configuration of each part of the present invention can be replaced with any configuration that exhibits the same function as the above-described embodiments, and any configuration can be added. [Explanation of symbols]

[0059] 2...element substrate, 3...opposite substrate, 4...sealing member, 5...liquid crystal layer, 11...scanning line driving circuit, 12...data line driving circuit, 13...external terminal, 21...first base, 22...laminated body, 23...TFT, 25...pixel electrode, 29...first alignment layer, 31...second base, 32...insulating layer, 33...common electrode, 34...second alignment layer, 100...liquid crystal device, 220...through hole, 221, 222, 223, 224, 225, 226, 227, 228, 229...insulating layer, 231...semiconductor layer, 231a...source region, 231b...drain region, 231c...channel region, 231d...first LDD region, 231e...second LDD region DD region (LDD region on the drain region side), 232...gate electrode, 241...scanning line, 242...data line, 243...constant potential line, 252...second relay electrode (wiring layer on the drain region side), 253...third relay electrode (light-shielding shield layer), 254...fourth relay electrode (gate relay electrode), 254a...opening, 275...fifth conductive portion (second contact hole), 276...sixth conductive portion (first contact hole), 260...capacitive element, 261...first capacitor electrode, 262...second capacitor electrode, 263...capacitive insulating layer, 4000...projection display device, A10...display area, A20...peripheral area, S...gap, L...light.

Claims

1. A substrate; A pixel electrode; a transistor disposed in a layer between the pixel electrode and the substrate; a gate relay electrode disposed in a layer between the pixel electrode and the transistor; a light-shielding shield layer disposed between the gate relay electrode and the transistor; The electro-optical device is characterized in that the gate relay electrode is electrically connected to the gate electrode of the transistor and has an opening at a position that overlaps at least in a planar view with a gap formed between the gate electrode and the light-shielding shield layer.

2. the gap is provided at a position overlapping with at least an LDD region on a drain region side of the transistor in a plan view, 2. The electro-optical device according to claim 1, wherein the opening is open in a range that overlaps at least with the LDD region on the drain region side in a plan view.

3. 3. The electro-optical device according to claim 1, wherein the opening is larger than at least an area overlapping with the gap in a plan view.

4. a drain region side wiring layer disposed between the pixel electrode and the gate relay electrode; the light-shielding shield layer is electrically connected to a drain region of the transistor; 4. The electro-optical device according to claim 1, wherein the drain region side wiring layer is electrically connected to the light-shielding shield layer and is arranged to overlap at least the opening in a planar view.

5. a scan line disposed in a layer between the transistor and the substrate; the scanning line is electrically connected to the gate relay electrode; the gate relay electrode and the gate electrode are electrically connected via a first contact hole, and the gate relay electrode and the scanning line are electrically connected via a second contact hole; 5. The electro-optical device according to claim 1, wherein the first contact hole and the second contact hole are integrally provided so as to surround the periphery of the opening in a plan view.

6. An electronic device comprising the electro-optical device according to any one of claims 1 to 5.

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