Semiconductor Devices

Abstract

To provide a structure that can reduce the size of a semiconductor device (bidirectional analog switch) in which two MOSFETs are connected in reverse.SOLUTION: A semiconductor device according to the present invention includes a first switching element 100a, and a second switching element 100b reversely connected to the first switching element 100a with a common source, wherein the first switching element 100a and the second switching element 100b are formed on a common SOI substrate, and a common trench gate electrode 6 of the first switching element 100a and the second switching element 100b is included in an element isolation region 4 formed between the first switching element 100a and the second switching element 100b.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device, and more particularly to a bidirectional analog switch in which two MOSFETs are reverse-connected. [Background technology]

[0002] A bidirectional analog switch is a semiconductor device that switches a circuit on / off depending on the state of an input signal. A specific configuration example is two MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) connected in reverse with a common drain. An example of a bidirectional analog switch with such a configuration is Patent Document 1. Patent Document 1 discloses a bidirectional switch including a first MOS switch M1, a second MOS switch M2, and an N-well region 2 that serves as the drains of M1 and M2. That is, M1 and M2 are connected in reverse with a common drain. The N-well region 2 is formed in a region between a first gate electrode 71a formed in a first trench 3 via a gate insulating film 6 and a second gate electrode 72a formed in a second trench 3 at a distance from the first trench 3 via the gate insulating film 6.

[0003] Another specific configuration example of a bidirectional analog switch is one in which two MOSFETs are reverse-connected with a common source. An example of a bidirectional analog switch having such a configuration is disclosed in Patent Document 2. Figure 1 of Patent Document 2 discloses a bidirectional switch in which a first MOS switch 16 and a second MOS switch 17 are reverse-connected with a common source. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-016221 [Patent Document 2] Patent No. 5485108 Summary of the Invention [Problem to be solved by the invention]

[0005] When a semiconductor device (bidirectional analog switch) is formed on an SOI (Silicon on Insulator) substrate, the configuration of Patent Document 1 does not require an isolation region between M1 and M2. However, the source and gate of each device must be arranged independently, and a circuit for driving the gate must be provided for each device, which increases the size of the semiconductor device.

[0006] On the other hand, in the configuration of Patent Document 2, the sources and gates of elements 16 and 17 are connected and it is possible to share a circuit for driving the gates, but it is necessary to provide an element isolation region for isolating elements 16 and 17, and there is a problem in that this element isolation region increases the size of the semiconductor device.

[0007] In view of the above circumstances, an object of the present invention is to provide a structure that can reduce the size of a semiconductor device (bidirectional analog switch) in which two MOSFETs are reverse-connected, compared to conventional devices. [Means for solving the problem]

[0008] One aspect of the present invention for solving the above problem is a semiconductor device including a first switching element formed on an SOI substrate and a second switching element formed on the SOI substrate and reverse-connected to the first switching element with a common source, characterized in that a trench gate electrode common to the first switching element and the second switching element is provided in an element isolation region formed between the first switching element and the second switching element. [Effects of the Invention]

[0009] According to the present invention, in a semiconductor device (bidirectional analog switch) in which two MOSFETs are reverse-connected, a trench gate structure is provided that shares the gates of the two MOSFETs, and this serves as an element isolation region. This eliminates the need to provide an additional element isolation region, and makes it possible to provide a structure that is smaller in size than conventional structures.

[0010] Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments. [Brief explanation of the drawings]

[0011] [Figure 1] A circuit diagram showing an example of a semiconductor device. [Figure 2] FIG. 1 is a plan view showing an example of the structure of a conventional semiconductor device; [Figure 3] Cross section of line EE' in Figure 2 [Figure 4] FIG. 1 is a plan view showing the structure of a semiconductor device according to a first embodiment; [Figure 5] Cross section of line AA' in Figure 4 [Figure 6] FIG. 10 is a plan view showing the structure of a semiconductor device according to a second embodiment; [Figure 7] Cross section of line BB' in Figure 6 [Figure 8] FIG. 10 is a plan view showing the structure of a semiconductor device according to a third embodiment; [Figure 9] Cross section of line CC' in Figure 7 [Figure 10] FIG. 10 is a plan view showing the structure of a semiconductor device according to a fourth embodiment; [Figure 11] Cross section of line DD' in Figure 8 [Figure 12] FIG. 10 is a plan view showing the structure of a semiconductor device according to a fifth embodiment; DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description of overlapping components will be omitted. [Example]

[0013] Fig. 1 is a circuit diagram showing an example of a semiconductor device (bidirectional analog switch). In the present invention, the term "semiconductor device" refers to a bidirectional analog switch in which two or more MOSFETs are reverse-connected. As shown in Fig. 1, the semiconductor device has a first switching element 100a and a second switching element 100b, which are reverse-connected in series with a common gate and source.

[0014] Here, the configuration of a conventional semiconductor device formed on an SOI substrate will be described. FIG. 2 is a plan view showing an example of the structure of a conventional semiconductor device, and FIG. 3 is a cross-sectional view taken along the line E-E' in FIG. 2. The general configuration of a switching element constituting a conventional bidirectional analog switch is shown in FIGS. 2 and 3, in which a support substrate 1, a buried oxide film 2, and a semiconductor substrate 3 are stacked, with layers serving as the source and drain regions of the switching elements being provided on top of the semiconductor substrate 3. The semiconductor device shown in FIGS. 2 and 3 has a first switching element 100a and a second switching element 100b as switching elements, and each of the first switching element 100a and the second switching element 100b has an element isolation region 4. The element isolation region 4 is composed of an insulating film 10 and polysilicon 11 sandwiched between the insulating films 10.

[0015] Each of first switching element 100a and second switching element 100b has drain n+ layer (drain layer) 9 and drain wiring 13a, 13b connected thereto near the center thereof, source p layer (source layer) 7 is located in an area a predetermined distance L1 away from drain n+ layer 9, and gate oxide film 5 and gate electrode 6 are disposed on top of source p layer 7. Respective source n+ layers 8 and source p+ layers 7a formed in source p layer 7 are connected by common source wiring 12, and respective gate electrodes 6 are connected by common gate wiring 14.

[0016] The configuration of the conventional bidirectional analog switch described above has the problem that the element size becomes large because it is necessary to provide a gap between the element isolation regions 4 of the first switching element 100a and the second switching element 100b and because it is necessary to form the gate electrode 6 in the lateral direction across the drain electrode and the source electrode.

[0017] Furthermore, in order to connect the elements outside the element, it is necessary to route source wiring and gate wiring, which increases the wiring area, and there are also problems in that a multi-layer wiring structure is required, which increases the process cost.

[0018] Next, the configuration of a semiconductor device of the present invention that solves the above-mentioned conventional problems will be described. Fig. 4 is a plan view showing the structure of a semiconductor device of Example 1, and Fig. 5 is a cross-sectional view taken along line AA' in Fig. 4. The semiconductor device of Example 1 has switching elements 100a and 100b connected in reverse in series surrounded by a common element isolation region 4, and further has the oxide film of the element isolation region 4 as the gate oxide film 5, and buried polysilicon sandwiched between the oxide films 5 of the element isolation region 4 as the gate electrode 6. That is, in this example, the gate electrode of the first switching element 100a and the gate electrode of the second switching element 100b have a common trench gate structure.

[0019] This reduces the area between the isolation regions of each switching element, which was necessary in conventional bidirectional analog switch structures. Furthermore, the gate electrodes formed in each element in conventional structures can be shared, and the channel region can be formed in the depth direction of the element, thereby reducing the element size. For example, the distance between the source p layer 7 and the drain n+ layer 9 shown in FIG. 3 is L1, and the distance from the isolation region 4 to the end of the source p layer 7 is L2. In conventional structures, an area for forming a gate electrode (or channel region) between the drain electrode and the source electrode is required. On the other hand, in the structure of Example 1 shown in FIG. 5, assuming the same breakdown voltage as the structure of FIG. 3, the distance between the source p layer 7 and the drain n+ layer 9 is L1. However, because the gate electrode is formed in the isolation region 4 and the channel region is formed along the isolation region 4, the distance L3 from the isolation region 4 to the end of the source p layer 7 can be shorter than L2. This allows for a reduction in element size.

[0020] Furthermore, in the configuration of Example 1 shown in FIG. 4, it is not necessary to route the gate wiring 14 outside the element as in the conventional configuration shown in FIG. 2, so it is possible to reduce the wiring area outside the element compared to the conventional structure, and a multi-layer wiring structure is also not required. [Example]

[0021] FIG. 6 is a plan view showing the structure of a semiconductor device of Example 2, and FIG. 7 is a cross-sectional view taken along line BB′ in FIG. 6 . The source p layer 7 of Example 1 described above is formed in regions at both ends of the first switching element 100a and the second switching element 100b, facing the drain n+ region 8 of each of the first switching element 100a and the second switching element 100b in the longitudinal direction, with the drain n+ region 8 sandwiched between them. The semiconductor device of this example is characterized in that the source p layer 7 is provided only in one region facing the drain n+ layer 9 in the longitudinal direction. With this structure, although the on-resistance is higher than that of Example 1, the distance from the drain n+ layer 9 to the other element isolation region 4 where the source p layer 7 is not formed (L4 shown in FIG. 7 ) can be further reduced compared to the distance from the drain n+ layer 9 to the element isolation region 4 (L1 + L3) of the semiconductor device of Example 1, thereby enabling further reduction in element size.

[0022] Furthermore, as shown in FIG. 6, there is no need to route the source wiring 12 outside the device, so it is possible to reduce the wiring area compared to the structure of Example 1. [Example]

[0023] Fig. 8 is a plan view showing the structure of the semiconductor device of Example 3, and Fig. 9 is a cross-sectional view taken along line CC' in Fig. 8. As shown in Figs. 8 and 9, the structure of the semiconductor device of Example 3 is characterized in that the source p layers 7 of the first switching element 100a and the second switching element 100b are formed in regions surrounding the respective drain n+ layers 9 on three sides. This structure makes it possible to reduce the on-resistance compared to the structure of Example 1, and also makes it possible to reduce the wiring area because there is no need to route the source wiring 12 outside the element. [Example]

[0024] FIG. 10 is a plan view showing the structure of a semiconductor device of Example 4, and FIG. 11 is a cross-sectional view taken along line DD′ in FIG. 10 . The semiconductor device of this Example has four connected switching elements. From the left in the figure, the first and third switching elements share a common drain electrode, and the second and fourth switching elements share a common drain electrode. The source p layers 7 of the first and fourth switching elements 100 are formed in one region spaced apart from the drain n+ layer 9, and the source p layers 7 of the second and third switching elements are formed in both regions spaced apart from the drain n+ layer 9. This structure makes it possible to realize a bidirectional analog switch with low on-resistance using a small element size.

[0025] The structures shown in FIGS. 10 and 11 show an example in which a bidirectional analog switch is formed by a switching element 100a in which two switching elements are connected and a switching element 100b in which two switching elements are connected in parallel, but it is clear that the number of elements connected in parallel does not need to be limited to two. [Example]

[0026] Fig. 12 is a plan view showing the structure of a semiconductor device according to Example 5. The configuration of the semiconductor device shown in Fig. 12 is such that a plurality of switching elements according to Example 3 shown in Fig. 8 are connected in parallel to form a bidirectional analog switch. Even in this configuration, the effects of the present invention can be obtained.

[0027] As described above, it has been shown that the present invention can provide a structure that can reduce the size of a semiconductor device (bidirectional analog switch) in which two MOSFETs are reverse-connected compared to conventional devices.

[0028] The present invention is not limited to the above-described embodiments and includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations. [Explanation of symbols]

[0029] 1...support (SOI) substrate, 2...buried oxide film, 3...semiconductor substrate, 4...element isolation region, 5...gate oxide film, 6...gate electrode, 7...source p layer, 9...drain n+ layer, 10...insulating film, 11...polysilicon, 12...source wiring, 13a...first drain wiring, 13b...second drain wiring, 14...gate wiring, 100a...first switching element, 100b...second switching element.

Claims

1. A semiconductor device including a first switching element and a second switching element reversely connected to the first switching element, the first switching element and the second switching element are formed on a common SOI substrate; a trench gate electrode common to the first switching element and the second switching element, the trench gate electrode being located in an element isolation region formed between the first switching element and the second switching element;

2. 2. The semiconductor device according to claim 1, wherein the source layers of the first switching element and the second switching element are provided only in one region opposing each other in the longitudinal direction of the drain layer.

3. 2. The semiconductor device according to claim 1, wherein the source layers of said first switching element and said second switching element are formed in regions surrounding the respective drain layers on three sides.

4. 4. The semiconductor device according to claim 1, wherein the first switching element and the second switching element are each configured by connecting two or more switching elements in parallel.

5. 5. The semiconductor device according to claim 4, wherein one of the first switching elements connected in parallel and one of the second switching elements connected in parallel are alternately arranged.

6. 6. The semiconductor device according to claim 5, wherein the first switching element and the second switching element arranged at both ends are provided only in one region where the source layer faces the drain layer in the longitudinal direction.

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