RC oscillator circuit

Abstract

To provide an RC oscillation circuit with increased reliability and stability.SOLUTION: An Rc oscillation circuit includes: a first current source unit that outputs a first current Iref; a second current source unit that generates second currents Icharge1,2; an oscillation resistor Rref; a first oscillation capacitor Cint1; a second oscillation capacitor Cint2; two oscillation MOS tube Mn1,2; two comparators COMP1,2; and an RS latch. Input terminals of the first and second current source unit are connected to an external power supply VDD. An output terminal of the first current source unit is connected to one end of the oscillation resistor and positive-phase input terminals of the two comparators. Another end of the oscillation resistor is grounded. One output terminal of the second current source unit is connected to one end of the first oscillation capacitor and an inverse-phase input terminal of one of the comparators. Another end of the first oscillation capacitor is grounded. Another output terminal of the second current source unit is connected to one end of the second oscillation capacitor and an inverse-phase input terminal of the other of the comparators.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to the field of integrated circuits, and more particularly to RC oscillator circuits. [Background technology]

[0002] The RC oscillator is a common electronic oscillator for generating stable AC signals. It consists of a resistor (R) and a capacitor (C) and realizes oscillation function by utilizing the characteristics of the RC network. Therefore, RC oscillators are widely used in fields such as communications, computers, and audio.

[0003] The core element of an RC oscillator is an RC network consisting of resistors and capacitors, which generates self-oscillation in the circuit through the positive feedback effect of the continuous charge and discharge process. The circuit structure is shown in Figure 1. In the operation process of the RC oscillator shown in Figure 1, current Icharge1 charges capacitor Cint1. When it charges to Vref within time Tint, comparator COMP1 reverses. After the charge on capacitor Cint1 is reset, comparator COMP1 reverses again. It then charges capacitor Cint2. When it charges to Vref within time Tint, comparator COMP2 reverses. After the charge on capacitor Cint2 is reset, comparator COMP2 reverses again. This causes the RC oscillator circuit to begin oscillating, with an oscillation period of 2Tint.

[0004] In the RC oscillator circuit, if we ignore the delay in the logic part of the comparator and path, and the parasitic capacitance at the negative terminal of the comparator, and assume that the current Icharge and the current Iref come from the same bias circuit and the ratio of the current values ​​is K, then: JPEG0007819277000001.jpg11170 and Icharge1=Icharge2=Icharge, Cint1=Cint2=Cint. Additionally, the charge calculation formula: JPEG0007819277000002.jpg5170 Charge and discharge time: The result is JPEG0007819277000003.jpg8170. Output frequency according to formula (2): The result is JPEG0007819277000004.jpg8170. As can be seen above, Icharge and Iref come from the same bias circuit and have a ratio of K, and the output frequency: The result is JPEG0007819277000005.jpg8170.

[0005] As can be seen from the above, the frequency F of the RC oscillator is inversely proportional to the values ​​of the resistor Rref and capacitor Cint. In addition, there are process variations in the resistors and capacitors, and the resistance increases especially when the process temperature increases, and the substrate bias effect when generating the current Icharge and current Iref is also ignored, so the output frequency F becomes very unstable and the reliability of the product decreases.

[0006] Therefore, there is a need to provide an improved RC oscillator circuit to overcome the above deficiencies. Summary of the Invention

[0007] The object of the present invention is to provide an RC oscillator circuit, the frequency of which is not affected by the substrate bias effect and resistance change of the MOS tube, and the frequency of the output clock signal is stable with little variation, thereby significantly improving the reliability and stability of the RC oscillator circuit.

[0008] In order to achieve the above object, according to the present invention, there is provided an RC oscillator circuit including a first current source unit, a second current source unit, an oscillation resistor, a first oscillation capacitor, a second oscillation capacitor, two oscillation MOS tubes, two comparators, and an RS latch, wherein input terminals of the first current source unit and the second current source unit are both connected to an external power supply, the first current source unit generates a first current, and its output terminal is connected to one end of the oscillation resistor and positive-phase input terminals of two comparators, and the other end of the oscillation resistor is grounded, the second current source unit generates a second current and has two output terminals, one output terminal of the second current source unit is connected to one end of the first oscillation capacitor and a negative-phase input terminal of one of the comparators, and the other end of the first oscillation capacitor is grounded, and the other output terminal of the second current source unit is connected to one end of the second oscillation capacitor and a negative-phase input terminal of one of the comparators, and the other end of the first oscillation capacitor is grounded One of the comparators is connected to the negative input terminal of the comparator, the other end of the second oscillation capacitor is grounded, the sources of the two oscillation MOS tubes are both grounded, the drains of the two oscillation MOS tubes are connected to one end of the corresponding oscillation capacitors, the gates of the two oscillation MOS tubes are connected to the output of an RS latch, the output terminals of the two comparators are respectively connected to the input terminals of the RS latch, and the latch outputs a clock signal, the first current source unit includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a first resistor, the sources of the first MOS tube and the second MOS tube are all grounded, the drain of the first MOS tube and the gate of the second MOS tube are commonly connected and connected to one end of the first resistor, the other end of the first resistor is respectively connected to the gate of the first MOS tube and the drain of the third MOS tube, and the gates of the third MOS tube and the fourth MOS tube sauce are all connected to an external power supply, and the drain and gate of the fourth MOS tube are commonly connected, and are also connected to the gate of the third MOS tube and the drain of the second MOS tube. The second current source unit includes a fifth MOS tube and a sixth MOS tube, and the sources of the fifth MOS tube and the sixth MOS tube are both grounded. An RC oscillator circuit is provided.

[0009] Preferably, the second current source unit comprises: moreover , a seventh MOS tube, an eighth MOS tube and a second resistor; before The drain of the fifth MOS tube and the drain of the seventh MOS tube are connected together and are also connected to the gates of the seventh MOS tube and the eighth MOS tube; the source of the seventh MOS tube and one end of the second resistor are both connected to an external power supply; the other end of the second resistor is connected to the source of the eighth MOS tube; and the drain and gate of the sixth MOS tube are connected together and are also connected to the gate of the fifth MOS tube and the drain of the eighth MOS tube.

[0010] Preferably, the third MOS tube and the fourth MOS tube have the same aspect ratio.

[0011] Preferably, the gate-source voltage of the first MOS tube is V GS1 The current generated by the first current source unit is I ref The resistance value of the first resistor is Rs, and the gate-source voltage of the second MOS tube is V GS2 The drain current of the second MOS tube is I out Then, by the KVL formula, The result is JPEG0007819277000006.jpg41170, During the ceremony, JPEG0007819277000007.jpg11170 is the aspect ratio of the second MOS tube and the first MOS tube, and the value of the ratio is N1, and V TH1 and V TH2 are the threshold voltages of the first and second MOS tubes, and μ n is the channel mobility, and C ox is the gate oxide capacitor per unit area, and I out =I ref , the current I generated by the first current source unit is ref : JPEG0007819277000008.jpg18170

[0012] Preferably, the aspect ratio value between the eighth MOS tube and the seventh MOS tube is N2, the current generated by the second current source unit is Icharge, and the resistance value of the second resistor is Rr: JPEG0007819277000009.jpg11170, where V T is the thermal voltage.

[0013] Preferably, the current generated by the first current source unit and the current generated by the second current source unit are duplicated in equal proportions, the current generated by the second current source unit has two identical duplicated currents, and the duplicated currents are input to corresponding devices.

[0014] Preferably, by combining equations (1) and (2), the frequency F of the output clock signal of the RC oscillator is JPEG0007819277000010.jpg26170, where R ref is the resistance value of the oscillation resistor.

[0015] Compared with the prior art, the RC oscillator circuit of the present invention has the following advantages: No. 6 Since the sources of the MOS tubes are all grounded, the substrates of these MOS tubes are also directly grounded, so that the currents generated by these MOS tubes do not cause a substrate bias effect. Furthermore, process temperature variations due to resistance are also offset when calculating the frequency of the output clock signal. Therefore, the frequency of the output clock signal of the RC oscillator circuit of the present invention is not affected by the substrate bias effect and changes in resistance of the MOS tubes, making the frequency of the output clock signal stable with very little variation, greatly improving the reliability and stability of the RC oscillator circuit.

[0016] The invention will become clearer from the following description and drawings, which are intended to illustrate embodiments of the invention. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 1 is a structural schematic diagram of an RC oscillator circuit according to the prior art. [Figure 2]1 is a structural schematic diagram of an RC oscillator circuit according to the present invention; [Figure 3] 2 is a structural schematic diagram of a first current source unit of the RC oscillator circuit of the present invention; FIG. [Figure 4] 1 is a structural schematic diagram of a second current source unit of an RC oscillator circuit of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0018] The present invention will now be described in detail with reference to the drawings and embodiments thereof. Similar reference numerals in the drawings refer to similar elements. As described above, the present invention provides an RC oscillator circuit. The frequency of the output clock signal of the RC oscillator circuit of the present invention is not affected by the substrate bias effect and resistance changes of the MOS tube, and the frequency of the output clock signal is stable with very little variation, thereby greatly improving the reliability and stability of the RC oscillator circuit.

[0019] As shown in FIG. 2, the RC oscillator circuit of the present invention includes a first current source unit, a second current source unit, an oscillation resistor Rref, a first oscillation capacitor Cint1, a second oscillation capacitor Cint2, two oscillation MOS tubes (Mn1, Mn2), two comparators (COMP1, COMP2), and an RS latch D1. The input terminals of the first current source unit and the second current source unit are both connected to an external power supply VDD. The first current source unit outputs a first current Iref, and its output terminal is connected to one end of the oscillation resistor Rref and the positive-phase input terminals of the two comparators (COMP1, COMP2), thereby outputting the first current Iref to the oscillation resistor Rref and the positive-phase input terminals of the two comparators (COMP1, COMP2). The other end of the oscillation resistor Rref is grounded. The second current source unit generates a second current Icharge and has two output terminals, thereby outputting two identical currents Icharge1 and Icharge2. One output terminal of the second current source unit is connected to one end of the first oscillation capacitor Cint1 and the inverting input terminal of one of the comparators COMP1, thereby inputting the second current Icharge1 to the first oscillation capacitor Cint1 and the inverting input terminal of the comparator COMP1. The other end of the first oscillation capacitor Cint1 is grounded, and the other output terminal of the second current source unit is connected to one end of the second oscillation capacitor Cint2 and the inverting input terminal of the other comparator COMP2. The other end of the second oscillation capacitor is grounded, thereby inputting the second current Icharge2 to the second oscillation capacitor Cint2 and the inverting input terminal of the comparator COMP2. The sources of the two oscillation MOS tubes (Mn1, Mn2) are both grounded. The drains of the two oscillation MOS tubes (Mn1, Mn2) are connected to one end of the corresponding oscillation capacitor.Specifically, the drain of the oscillation MOS tube Mn1 is connected to one end of the first oscillation capacitor Cint1, the drain of the oscillation MOS tube Mn2 is connected to one end of the second oscillation capacitor Cint2, the gates of the two oscillation MOS tubes (Mn1, Mn2) are both connected to the RS latch output, and the output terminals of the two comparators (COMP1, COMP2) are respectively connected to the input terminals of the RS latch. The latch outputs a clock signal OUT1. The clock signal OUT1 is shaped by two inverters INV1, INV2 and then output as the final clock signal OUT0. 2, in the RC oscillator circuit of the present invention, the second current Icharge1 charges the first oscillation capacitor Cint1, and after charging it to a predetermined reference voltage Vref within the time Tint, the comparator COMP1 inverts. After the charge on the first oscillation capacitor Cint1 is reset, the comparator COMP1 inverts again. Then, the second oscillation capacitor Cint2 is charged, and after charging it to a voltage Vref within the time Tint, the comparator COMP2 inverts. After the charge on the second oscillation capacitor Cint2 is reset, the comparator COMP2 inverts again. In this way, the entire RC oscillator circuit begins to oscillate, with an oscillation period of 2Tint, and finally outputs the clock signal OUT0.

[0020] Specifically, as shown in Figures 3 and 4, in the present invention, the first current source unit includes a first MOS tube M1, a second MOS tube M2, a third MOS tube M3, a fourth MOS tube M4, and a first resistor Rs. The sources of the first MOS tube M1 and the second MOS tube M2 are both grounded, and thus the substrates of the first MOS tube M1 and the second MOS tube M2 are also grounded. The drain of the first MOS tube M1 and the gate of the second MOS tube M2 are commonly connected and also connected to one end of the first resistor Rs. The ends of the first resistor Rs are respectively connected to the gate of the first MOS tube M1 and the drain of the third MOS tube M3. sauceare all connected to an external power supply VDD. The drain and gate of the fourth MOS tube M4 are commonly connected, and are also connected to the gate of the third MOS tube M3 and the drain of the second MOS tube M2. In a preferred embodiment of the present invention, the third MOS tube M3 and the fourth MOS tube M4 have the same aspect ratio. For example, the aspect ratio of the third MOS tube M3 is JPEG0007819277000011.jpg10170, and the aspect ratio of the 4th MOS tube M4 is If you set it to JPEG0007819277000012.jpg10170, JPEG0007819277000013.jpg10170. Also, by setting the voltage value of the external power supply VDD, the first MOS tube M1, the second MOS tube M2, the third MOS tube M3, and the fourth MOS tube M4 all operate in the saturation region. As shown in FIG. 3, when calculating the current generated by the first current source unit, the gate-source voltage of the first MOS tube is set to VGS1, and the current generated by the first current source unit is set to the first current I ref The resistance value of the first resistor is Rs, the gate-source voltage of the second MOS tube is VGS2, and the drain current of the second MOS tube is I out Then, JPEG0007819277000014.jpg10170, so I out =I ref Furthermore, by the KVL (Kirchhoff's Voltage Law) formula, JPEG0007819277000015.jpg5170 is obtained. This results in The result is JPEG0007819277000016.jpg40170, where JPEG0007819277000017.jpg10170 is the aspect ratio of the second MOS tube M2 and the first MOS tube M1, and the ratio between the aspect ratio of the second MOS tube M2 and the aspect ratio of the first MOS tube M1 is N1, that is, JPEG0007819277000018.jpg20170. V TH1 and V TH2 is the threshold voltage of the first MOS tube M1 and the second MOS tube M2, and μn is the channel mobility, and C ox is the gate oxide capacitor per unit area, and μ n and C ox are all process-related parameters and constants, which vary depending on the process but are not related to the device. out =I ref Therefore, the first current I generated by the first current source unit ref teeth, JPEG0007819277000019.jpg18170.

[0021] As can be seen from the above, the substrates of the first MOS tube M1 and the second MOS tube M2 are grounded, and the substrates of the third MOS tube M3 and the fourth MOS tube M4 are connected to the power supply, so that the first current I generated by the first current source unit ref There is no substrate bias effect.

[0022] 4, the second current source unit includes a fifth MOS tube M5, a sixth MOS tube M6, a seventh MOS tube M7, an eighth MOS tube M8, and a second resistor Rr. The sources of the fifth MOS tube M5 and the sixth MOS tube M6 are both grounded, and thus the substrates of the fifth MOS tube M5 and the sixth MOS tube M6 are also grounded. The drain of the fifth MOS tube M5 and the drain of the seventh MOS tube M7 are connected together and to the gates of the seventh MOS tube M7 and the eighth MOS tube M8. The source of the seventh MOS tube M7 and one end of the second resistor Rr are both connected to the external power supply VDD, and the other end of the second resistor Rr is connected to the source of the eighth MOS tube M8. The drain and gate of the sixth MOS tube M6 are connected together and to the gate of the fifth MOS tube M5 and the drain of the eighth MOS tube M8. As shown in FIG. 4, when calculating the current generated by the second current source unit, the ratio between the aspect ratio of the eighth MOS tube M8 and the aspect ratio of the seventh MOS tube M7 is N2, i.e., JPEG0007819277000020.jpg20170, where JPEG0007819277000021.jpg12170 are the aspect ratios of the eighth MOS tube M8 and the seventh MOS tube M7, respectively, and the current generated by the second current source unit is the second current I charge and the resistance value of the second resistor is Rr, JPEG0007819277000022.jpg11170. Here, V T is a thermal voltage, which is a process-related parameter and a constant that varies depending on the process but is not related to the device. As can be seen from the above, the substrates of the fifth MOS tube M5 and the sixth MOS tube M6 are grounded, the substrate of the seventh MOS tube M7 is connected to the power supply, and the substrate of the eighth MOS tube M8 is connected to the power supply terminal of M8, so the second current Icharge generated by the second current source unit also has no substrate bias effect.

[0023] As can be seen from the above, the first current I ref and the second current I charge are generated by the first current source unit and the second current source unit, respectively, and these two currents must be input to the RC oscillator circuit. Therefore, in the present invention, the first current I generated by the first current source unit is ref and the second current I generated by the second current source unit. charge in equal proportions, and the current generated by the second current source unit is divided into two identical replica currents I charge1 , I charge2The replicated current is input to the corresponding device. Specifically, as shown in Figure 2, MOS tube M0 mirrors the current on the fourth MOS tube M4. Simply by making the aspect ratios of the fourth MOS tube M4 and MOS tube M0 the same, the current on the fourth MOS tube M4 can be mirrored at an equal rate. MOS tube M9 mirrors the current on the sixth MOS tube M6. By making the aspect ratios of the sixth MOS tube M6 and MOS tube M9 the same, the current on the sixth MOS tube M6 can be mirrored at an equal rate. By setting the aspect ratios of MOS tubes M9 and M10, the currents on MOS tubes M9 and M10 can be made the same, i.e., the current on MOS tube M10 is the same as the current on the sixth MOS tube M6. MOS tubes M11 and M12 mirror the current on MOS tube M10. By making the aspect ratios of MOS tube M10, MOS tube M11, and MOS tube M12 the same, the current on MOS tube M10 can be mirrored at an equal ratio. How to duplicate an existing current at an equal ratio is well known to those skilled in the art, and will not be described here. When MOS tube M0 mirrors the current on the fourth MOS tube M4 (first current I ref ) is mirrored, the first current I ref is input to the positive input terminals of the two comparators, and the MOS tubes M11 and M12 respectively receive the current of the MOS tube M10 (the second current I charge ) are mirrored to generate the second current I charge1 and the second current I charge2 That is, the sources of the MOS tube M11 and the MOS tube M12 respectively form two output terminals of the second current unit, and form the second current I charge1 are input to the first oscillation capacitor Cint1, the oscillation MOS tube Mn1, and the inverting input terminal of the comparator COMP1, respectively, and the second current I charge2 are input to the second oscillation capacitor Cint2, the oscillation MOS tube Mn2, and the inverting input terminal of the comparator COMP2, respectively.

[0024] As shown above, the first current I after duplication ref and the second current I charge After inputting the above into the corresponding device, the following equations are used: (1) and (2) and the following equations are used: JPEG0007819277000023.jpg12170 (where R ref is the resistance value of the oscillation resistor Rref. By combining The result is JPEG0007819277000024.jpg27170.

[0025] As can be seen from the above, the clock signal OUT1 is shaped by two inverters INV1 and INV2 before being output as the final clock signal OUT0, so the frequency F0 of the clock signal OUT0 and the frequency F of the clock signal OUT1 are completely the same. Furthermore, as can be seen from the calculation formula (3), the frequency F of the clock signal OUT1 (i.e., the frequency F0 of the clock signal OUT0) finally obtained by the present invention not only eliminates the substrate bias effect, but also cancels out the resistances (oscillation resistor Rref, first resistor Rs, second resistor Rr), so that the variation in process temperature due to each resistor is also canceled out. Here, V T is a positive temperature coefficient, and μ n is a negative temperature coefficient, and the temperature characteristics are also compensated. Therefore, the output frequency F0 of the RC oscillator circuit of the present invention is not affected by the substrate bias effect and changes in resistance, and the frequency of the output clock signal is stable and has very little variation, which greatly improves the reliability and stability of the RC oscillator circuit.

[0026] Although the present invention has been described above with reference to the preferred embodiments, the present invention is not limited to the above embodiments and should include modifications and equivalent combinations based on the essence of the present invention.

Claims

1. An RC oscillation circuit including a first current source unit, a second current source unit, an oscillation resistor, a first oscillation capacitor, a second oscillation capacitor, two oscillation MOS tubes, two comparators, and an RS latch, The input terminals of the first current source unit and the second current source unit are both connected to an external power supply, the first current source unit generates a first current, the output terminal of the first current source unit is connected to one end of the oscillation resistor and the positive-phase input terminals of two comparators, and the other end of the oscillation resistor is grounded, the second current source unit generates a second current and has two output terminals, one output terminal of the second current source unit is connected to one end of the first oscillation capacitor and the negative-phase input terminal of one of the comparators, and the other end of the first oscillation capacitor is grounded is grounded, another output terminal of the second current source unit is connected to one end of the second oscillation capacitor and the inverting input terminal of the other comparator, the other end of the second oscillation capacitor is grounded, the sources of the two oscillation MOS tubes are both grounded, the drains of the two oscillation MOS tubes are connected to one end of the corresponding oscillation capacitors, the gates of the two oscillation MOS tubes are connected to the output of the RS latch, the output terminals of the two comparators are respectively connected to the input terminals of the RS latch, and the latch outputs a clock signal; the first current source unit includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, and a first resistor; the sources of the first MOS tube and the second MOS tube are all grounded; the drain of the first MOS tube and the gate of the second MOS tube are connected together and to one end of the first resistor; the other end of the first resistor is connected to the gate of the first MOS tube and the drain of the third MOS tube, respectively; the sources of the third MOS tube and the fourth MOS tube are all connected to an external power supply; and the drain and gate of the fourth MOS tube are connected together and to the gate of the third MOS tube and the drain of the second MOS tube; The RC oscillator circuit, characterized in that the second current source unit includes a fifth MOS tube and a sixth MOS tube, and the sources of the fifth MOS tube and the sixth MOS tube are both grounded.

2. 2. The RC oscillator circuit according to claim 1, wherein the second current source unit further includes a seventh MOS tube, an eighth MOS tube, and a second resistor, wherein the drain of the fifth MOS tube and the drain of the seventh MOS tube are connected together and are connected to the gates of the seventh MOS tube and the eighth MOS tube, the source of the seventh MOS tube and one end of the second resistor are both connected to an external power supply, the other end of the second resistor is connected to the source of the eighth MOS tube, and the drain and gate of the sixth MOS tube are connected together and are connected to the gate of the fifth MOS tube and the drain of the eighth MOS tube.

3. 3. The RC oscillator circuit according to claim 2, wherein the third MOS tube and the fourth MOS tube have the same aspect ratio.

4. The gate-source voltage of the first MOS tube is V ＧＳ１ and the current generated by the first current source unit is I ｒｅｆ The resistance value of the first resistor is Rs, and the gate-source voltage of the second MOS tube is V ＧＳ２ and the drain current of the second MOS tube is I ｏｕｔ Then, by the KVL formula, is obtained, During the ceremony, is the aspect ratio of the second MOS tube and the first MOS tube, and the value of the aspect ratio of the second MOS tube and the aspect ratio of the first MOS tube is N1, and V ＴＨ１ and V ＴＨ２ are the threshold voltages of the first and second MOS tubes, and μ ｎ is the channel mobility, and C ｏｘ is the gate oxide capacitor per unit area, and I ｏｕｔ =I ｒｅｆ , the current I generated by the first current source unit ｒｅｆ :

4. The RC oscillator circuit according to claim 3, wherein:

5. Let N2 be the aspect ratio between the eighth MOS tube and the seventh MOS tube, Icharge be the current generated by the second current source unit, and Rr be the resistance value of the second resistor. where V Ｔ 5. The RC oscillator circuit of claim 4, wherein: is a thermal voltage.

6. 6. The RC oscillator circuit according to claim 5, wherein the current generated by the first current source unit and the current generated by the second current source unit are duplicated at equal ratios, the current generated by the second current source unit has two identical duplicated currents, and the duplicated currents are input to corresponding devices.

7. Combining equations (1) and (2), the frequency F of the output clock signal of the RC oscillator is where R ｒｅｆ 7. The RC oscillator circuit according to claim 6, wherein is the resistance value of the oscillation resistor.

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