Semiconductor device manufacturing method, semiconductor manufacturing apparatus, and semiconductor device

Abstract

To provide a method of manufacturing a semiconductor device, a semiconductor manufacturing device, and a semiconductor device which are applicable to a high temperature treatment process and can prevent a wafer from warping and from being cracked and chipped.SOLUTION: In a method of manufacturing a semiconductor device of the present disclosure, a ring-shaped frame is bonded to an outer peripheral portion of a wafer. The method includes the steps of: installing one of the wafer and the frame on a stage; holding the other of the wafer and the frame in a chuck part in a pressure-bonding mechanism; activating a surface layer of the outer peripheral portion of the wafer and a surface layer of the frame by atom irradiation; and sandwiching the wafer and the frame between the stage and the chuck part and pressure-bonding the activated surface layers of the wafer and the frame using the pressure-bonding mechanism. An amorphous layer is formed on a bonding interface between the wafer and the frame pressure-bonded to each other.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device, a semiconductor manufacturing apparatus, and a semiconductor device. [Background technology]

[0002] There are known techniques for thickening the outer periphery of a wafer to maintain its strength, suppress warping of the wafer, and prevent cracks and chips at the edge during processing. For example, a technique has been disclosed in which the backside of the device region of the wafer is thinned by grinding to relatively thicken the outer periphery.

[0003] However, when using wafers made of a hard material such as SiC, it is technically difficult to grind only the backside of the device area of ​​the wafer, which means that the above-mentioned method cannot be applied to wafers that are difficult to grind.

[0004] To solve the above-mentioned problems, Patent Document 1 discloses a technique for fixing a silicon reinforcing ring to a semiconductor substrate using an adhesive member, which maintains the strength of the semiconductor substrate, suppresses warping of the semiconductor substrate, and prevents cracks and chips at the edge during processing. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Republished Publication No. 2004 / 001819 Summary of the Invention [Problem to be solved by the invention]

[0006] However, the adhesive materials used in the above-mentioned methods may not be resistant to high-temperature environments, which poses a new problem in that the above-mentioned methods cannot be applied to high-temperature processing processes that a single wafer can withstand.

[0007] In order to solve the above-mentioned problems, the present disclosure aims to provide a semiconductor device manufacturing method, a semiconductor manufacturing apparatus, and a semiconductor device that can be applied to high-temperature processing processes and can prevent warping, cracking, and chipping of wafers. [Means for solving the problem]

[0008] A first aspect of the present disclosure is a method for manufacturing a semiconductor device in which a ring-shaped frame body is bonded to the outer periphery of a wafer, the method comprising the steps of placing one of the wafer and the front body on a stage, holding the other of the wafer and the frame body with a chuck portion of a bonding mechanism, activating the outer surface layer of the wafer and the outer surface layer of the frame body by atomic irradiation, and sandwiching the wafer and the frame body between the stage and the chuck portion and bonding the activated outer surface layer of the wafer to the outer surface layer of the frame body with the bonding mechanism, and preferably the method for manufacturing a semiconductor device in which an amorphous layer is formed at the bonding interface between the bonded wafer and the frame body.

[0009] A second aspect of the present disclosure is a semiconductor manufacturing apparatus that bonds a ring-shaped frame to the outer periphery of a wafer, and preferably includes a stage having a first cavity whose upper diameter is smaller than the inner diameter of the frame, a bonding mechanism having a chuck portion having a second cavity whose lower diameter is smaller than the inner diameter of the frame, and an atomic irradiation portion that activates the surface layers of the wafer and the frame by atomic irradiation, wherein the stage and chuck portion sandwich the wafer and the frame, and the bonding mechanism bonds the surface layer of the activated wafer to the surface layer of the frame.

[0010] A third aspect of the present disclosure is a wafer wafer, a ring-shaped frame body pressure-bonded to the outer periphery of the wafer, and an amorphous layer formed at the bonding interface between the wafer and the frame body. The frame has a tapered shape on the inner side surface. It is preferably a semiconductor device. A fourth aspect of the present disclosure is preferably a semiconductor device comprising a wafer and a ring-shaped frame body pressure-bonded to the outer periphery of the wafer, wherein an amorphous layer is formed at the bonding interface between the wafer and the frame body, and further comprising an intermediate layer made of an inorganic compound formed at the bonding interface between the wafer and the frame body. [Effects of the Invention]

[0011] First to second aspects of the present disclosure fourAccording to this aspect, by joining a frame to the wafer and making the outer periphery of the wafer relatively thick, it is possible to maintain the strength of the wafer, suppress warping of the wafer, and prevent cracks and chips at the edges during processing. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a perspective view showing a semiconductor manufacturing apparatus according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a perspective view illustrating a separation process of the semiconductor device according to the first embodiment of the present disclosure. [Figure 3] 5A to 5C are cross-sectional views illustrating a recycling process for the frame according to the first embodiment of the present disclosure. [Figure 4] 1 is a cross-sectional view showing a bonding portion of a semiconductor device according to a first embodiment of the present disclosure. [Figure 5] 10 is an enlarged cross-sectional view showing a bonding portion of a semiconductor device according to a first modification of the first embodiment of the present disclosure. FIG. [Figure 6] 1 is an enlarged cross-sectional view showing a bonding portion of a semiconductor device according to a first embodiment of the present disclosure. [Figure 7] FIG. 10 is a cross-sectional view showing a bonding portion of a semiconductor device according to a first modification of the first embodiment of the present disclosure. [Figure 8] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0013] Embodiment 1 [Configuration of semiconductor manufacturing apparatus according to first embodiment of the present disclosure] 1 is a perspective view showing a semiconductor manufacturing apparatus according to a first embodiment of the present disclosure. The semiconductor manufacturing apparatus 100 is an apparatus for manufacturing the semiconductor device according to the first embodiment of the present disclosure by bonding a ring-shaped frame 5 to a wafer 4.

[0014] The semiconductor manufacturing apparatus 100 includes a stage 3. The stage 3 has a first cavity. The first cavity is a cylindrical region located in the center of the stage 3. The first cavity may be a region that penetrates the stage 3, or may be a concave region. Furthermore, the diameter of the circle that forms the upper surface of the first cavity is smaller than the inner diameter of the frame 5.

[0015] During bonding, the wafer 4 is placed on the stage 3. The wafer 4 has a plurality of semiconductor elements formed thereon. Examples of the semiconductor elements include MOSFETs and IGBTs. The wafer diameter of the wafer 4 is, for example, 6 inches or more. The larger the wafer diameter, the greater the wafer warpage, making this embodiment of the present disclosure particularly useful.

[0016] The semiconductor manufacturing apparatus 100 also includes a crimping mechanism. The crimping mechanism includes a crimping device 1 and a chuck unit 2. The chuck unit 2 has a second cavity. The second cavity is a cylindrical region located in the center of the chuck unit 2. The second cavity may be a region that penetrates the stage 3, or may be a concave region. Furthermore, the diameter of the circle that is the bottom surface of the second cavity may be greater than or equal to the diameter of the circle that is the bottom surface of the first cavity.

[0017] Furthermore, the chuck portion 2 holds a frame body 5 during bonding. The frame body 5 has a ring-like shape. For example, when viewed from above, the frame body 5 may be a ring-shaped member that faces the center of the wafer 4 and has a width of 1 to 5 mm from the outer periphery.

[0018] Furthermore, the diameter of the circle that is the lower surface of the second hollow portion is smaller than the inner diameter of the frame body 5. Therefore, the frame body 5 can be held on the chuck portion 2.

[0019] Although an example in which the wafer 4 is a silicon carbide wafer will be described here, the material of the wafer 4 is not limited to this. The material of the wafer 4 may be, for example, silicon, or a wide band gap semiconductor such as a gallium nitride-based material, a gallium oxide-based material, or diamond.

[0020] Furthermore, the wafer 4 and the frame 5 may be made of the same material or different materials. An example of the same material is when both the wafer 4 and the frame 5 are made of silicon carbide. When the wafer 4 and the frame 5 are made of the same material, the thermal expansion coefficients of the wafer 4 and the frame 5 match, which reduces warping and cracking during heat treatment.

[0021] An example of a case where the wafer 4 and the frame 5 are made of different materials is when the wafer 4 is made of silicon carbide and the frame 5 is made of an inexpensive material such as Si or SiO2. Using an inexpensive material for the frame 5 can reduce manufacturing costs. Furthermore, if the cost of the frame 5 itself is cheaper than the cost required for the frame 5 recycling process described below, the frame 5 can be made disposable. This can reduce the number of steps and costs required for the recycling process.

[0022] [Semiconductor manufacturing method according to the first embodiment of the present disclosure] A method for manufacturing a semiconductor device according to the first embodiment of the present disclosure will be described. First, the bonding step will be described. The semiconductor manufacturing apparatus 100 is installed in a sealed vacuum chamber. That is, the bonding of the wafer 4 and the frame 5 is performed in a vacuum atmosphere.

[0023] First, the wafer 4 is placed on the stage 3, and the frame 5 is held by the chuck 2. Next, the bonding surfaces of the wafer 4 and the frame 5 are activated by atomic irradiation. That is, the native oxide film and impurities present on the outer periphery of the upper surface of the wafer 4 facing the frame 5 and on the lower surface of the frame 5 facing the wafer 4 are removed.

[0024] The activated surfaces of the wafer 4 and the frame 5 are then brought into contact with each other, and the wafer 4 and the frame 5 are sandwiched between the stage 3 and the chuck 2 and pressed together by a pressing mechanism.

[0025] During bonding, semiconductor manufacturing apparatus 100 uses a stage 3 having a first cavity and a chuck unit 2 having a second cavity. The outer diameters of stage 3 and chuck unit 2 are larger than the outer diameters of wafer 4 and frame 5. The diameters of the first cavity and second cavity are smaller than the inner diameter of frame 5. This reduces stress at locations other than the bonding point when bonding wafer 4 and frame 5, thereby suppressing wafer cracking during bonding.

[0026] In the above-described method, the wafer 4 is placed on the stage 3 and the frame 5 is held by the chuck 2, but the positions of the wafer 4 and the frame 5 may be reversed. That is, the frame 5 may be placed on the stage 3 and the wafer 4 may be held by the chuck 2. As described above, the diameter of the circle that is the upper surface of the first cavity is smaller than the inner diameter of the frame 5. Therefore, the frame 5 may be held on the stage 3.

[0027] Next, a description will be given of a separation process of the semiconductor device according to the first embodiment of the present disclosure. The separation process is a process that is carried out after carrying out any semiconductor device manufacturing process, such as transportation, after joining the frame body.

[0028] 2 is a perspective view illustrating a separation process of the semiconductor device according to the first embodiment of the present disclosure. After forming a plurality of devices on the wafer 4, the wafer 4 is diced in a dicing process to separate the wafer 4 into individual devices. The separation process is a process of separating the frame 5 from the wafer 4 prior to the dicing process. Specifically, the wafer 4 is cut along the inner edge of the frame 5 bonded to the wafer 4.

[0029] The left diagram in Fig. 2 shows the frame-bonded wafer 6 before separation. The frame-bonded wafer 6 is a wafer in which the wafer 4 and the frame 5 are bonded together. For this frame-bonded wafer 6, the wafer 4 is cut along the inner periphery of the frame 5.

[0030] The right diagram in Figure 2 shows the frame-bonded wafer 6 after separation. That is, it shows the state after the wafer 4 has been cut along the inner periphery of the frame 5. As a result, the frame-bonded wafer 6 is separated into the wafer 10 and the frame 11.

[0031] The diameter of the wafer 10 after cutting is smaller than that of the wafer 4 before bonding to the frame body by a length equal to or greater than the width of the frame body 5. Moreover, the frame body 11 after cutting is thicker than the frame body 5 before bonding to the frame body by the thickness of the wafer 4.

[0032] In this way, by separating the frame body and the wafer before dicing, it becomes possible to reuse the frame body 5, thereby reducing costs.

[0033] Next, a process for recycling the separated frame body 11 to the same specifications as the frame body 5 before joining will be described. Fig. 3 is a cross-sectional view showing the recycling process of the frame body according to the first embodiment of the present disclosure. The recycling process is a process for recycling the frame body 11 so that it can be reused as the frame body 5.

[0034] The left diagram in Fig. 3 shows the frame 11 before recycling. The frame 11 before recycling is in a state where a part of the wafer 4 is bonded to the frame 5 by the separation process described above. As will be described later, an amorphous layer 7 is formed at the bonding interface between the frame 5 and the wafer 4. In addition, a metal film 8 formed during device manufacturing adheres to the surface layer of the frame 11 before recycling.

[0035] Therefore, first, the metal film 8 is removed from the frame 11 by etching, and then the part of the wafer 4 bonded to the frame 5 and the amorphous layer 7 are removed by grinding.

[0036] The right diagram in Figure 3 shows the frame 5 after recycling. Through the recycling process described above, the frame 11 is recycled into a frame 5 that is free of unnecessary metal film 8 and has the same thickness as before the frame was joined. In this way, recycling the frame to the same specifications as the original frame makes it easier to handle the frame when it is reused.

[0037] [Configuration of the semiconductor device according to the first embodiment of the present disclosure] 4 is a cross-sectional view showing a bonding portion of the semiconductor device according to the first embodiment of the present disclosure. Semiconductor device 200 is formed by bonding frame 5 to the outer periphery of wafer 4 by the manufacturing method described above.

[0038] An amorphous layer 7 is formed at the bonding interface between the wafer 4 and the frame 5. The amorphous layer 7 will be described in detail later.

[0039] The thickness of the frame 5 is preferably equal to or greater than the thickness of the wafer 4. For example, the thickness of the wafer 4 may be 100 μm to 350 μm, and the thickness of the frame 5 may be 100 μm to 500 μm. By making the thickness of the frame 5 equal to or greater than the thickness of the wafer 4, warping of the wafer 4 can be suppressed in the structure after bonding.

[0040] Furthermore, the width of the frame 5 is preferably 1 to 5 mm. If the width of the frame 5 is narrower than 1 mm, problems may occur, such as difficulty in handling the frame 5 alone before bonding or insufficient strength. If the width of the frame 5 is wider than 5 mm, there is a high possibility that the frame 5 will overlap with the semiconductor element region formed on the surface of the wafer 4 when bonded to the wafer 4. Therefore, when cutting the frame 5 from the wafer 4, the semiconductor element region may also be cut at the same time.

[0041] Furthermore, it is preferable that the frame 5 has the same outer diameter as the wafer 4 and that its outer end face is continuous with the outer end face of the wafer 4. This makes the end of the wafer 4 thicker together with the frame 5, thereby preventing cracks and chips at the end of the wafer 4.

[0042] The frame 5 may be bonded to the surface of the wafer 4 on which semiconductor elements are formed, or to the surface on which no semiconductor elements are mounted. The surface of the wafer 4 to which the frame 5 is not bonded can be left unprocessed before starting the manufacture of semiconductor elements.

[0043] A more detailed description will be given of the amorphous layer 7 formed at the bonding interface between the wafer 4 and the frame 5. Fig. 5 is an enlarged cross-sectional view showing atomic irradiation of the wafer according to the first embodiment of the present disclosure.

[0044] The left diagram in Figure 5 shows atomic irradiation of wafer 4. A native oxide film 12 and impurities (not shown) are present on the surface of wafer 4. The presence of native oxide film 12 and impurities reduces the reactivity of the surface layer of wafer 4. Therefore, in order to increase the reactivity of the surface layer of wafer 4, atomic irradiation 13 is performed on the area where frame 5 is to be bonded.

[0045] The right diagram in Figure 5 shows the wafer 4 after atomic irradiation 13. The native oxide film 12 and impurities are removed from the area where atomic irradiation 13 was performed. During this process, the atomic arrangement is disturbed. When the frame 5 and the wafer 4 are directly bonded in this state, an amorphous layer 7 is formed at the bonding interface.

[0046] 6 is an enlarged cross-sectional view showing atomic irradiation of a frame body according to the first embodiment of the present disclosure. The left diagram in FIG. 6 shows atomic irradiation of frame body 5. A native oxide film 12 and impurities (not shown) are present on the surface of frame body 5. The presence of native oxide film 12 and impurities reduces the reactivity of the surface layer of frame body 5. Therefore, in order to increase the reactivity of the surface layer of frame body 5, atomic irradiation 13 is performed on the portion to be bonded to wafer 4.

[0047] The right diagram in Figure 6 shows the frame 5 after atomic irradiation 13 has been performed. The native oxide film and impurities are removed from the area where atomic irradiation 13 has been performed. During this process, the atomic arrangement is disturbed. If the frame 5 is directly bonded to the wafer 4 in this state, an amorphous layer 7 is formed at the bonding interface.

[0048] As described above, atomic irradiation is performed on the surface layers of either or both of the wafer 4 and the frame 5, forming an amorphous layer 7 at the bonding interface. This allows the semiconductor device 200 to be directly bonded atoms together without using an intermediate material such as an adhesive. In other words, the wafer 4 and the frame 5 are bonded more firmly, allowing the strength of the wafer 4 to be maintained at its outer periphery. This reduces wafer warpage. Furthermore, separation of the wafer 4 and the frame 5 during the manufacturing process of the semiconductor device 200 can be suppressed.

[0049] Furthermore, since the semiconductor device 200 does not use an intermediate material such as an adhesive, it can also be applied to high-temperature processing. Examples of high-temperature processing include active annealing and thermal oxidation film processing. Since adhesives are primarily made of organic materials, they can only withstand heat treatments of about 300°C, which limits the processes in which they can be used. However, since the semiconductor device 200 of this embodiment does not use an intermediate material, it can be subjected to high-temperature processing at the same level as a wafer. In other words, since frame bonding to the wafer 4 can be performed from the early stages of the semiconductor element formation process, versatility is enhanced.

[0050] Furthermore, when directly bonding the wafer 4 and the frame 5, there is no need to grind the wafer into a ribbed shape. That is, it is sufficient to grind the wafer 4, including its outer peripheral surface, and then bond the frame 5. This makes it possible to increase the strength of the wafer's outer periphery without requiring a complex grinding process, and therefore makes it possible to easily reduce wafer warpage.

[0051] 7 is a cross-sectional view showing a bonding portion of a semiconductor device according to a modification of the first embodiment of the present disclosure. Semiconductor device 200a differs from semiconductor device 200 in that it includes frame body 5a having a tapered shape on the inner side surface. The tapered shape of frame body 5a is processed before bonding to wafer 4.

[0052] The semiconductor device 200 includes a frame 5 that does not have a tapered shape. Therefore, after a processing step using an etching solution or a resist solution, a step of discharging the chemical solution must be carried out. On the other hand, the semiconductor device 200a includes a frame 5a that has a tapered shape. Therefore, when a processing step using an etching solution or a resist solution is carried out, the chemical solution after processing is naturally discharged along the taper.

[0053] As described above, in the semiconductor device 200a, the step of discharging the chemical solution can be omitted by using the frame 5a having a tapered shape.

[0054] Embodiment 2 8 is a diagram illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present disclosure. The second embodiment differs from the first embodiment in that an intermediate layer 9 is used and etching is performed in the process of separating the wafer 4 from the frame 5.

[0055] The left diagram in Figure 8 is a cross-sectional view showing the semiconductor device before separation. The semiconductor device according to the second embodiment of the present disclosure includes an intermediate layer 9 at the interface between the wafer 4 and the frame 5. The intermediate layer 9 is made of an inorganic compound. Examples of inorganic materials that can be used include SiO2, Si, Ti, and Ni.

[0056] The intermediate layer 9 is formed by, for example, a CVD method at the bonding portion between the wafer 4 and the frame 5. Subsequently, atomic irradiation is performed on the surface layers of the wafer 4 and the frame 5, and then the wafer 4 and the frame 5 are pressure-bonded together via the intermediate layer 9, thereby forming a semiconductor device.

[0057] Although the embodiment in which the intermediate layer 9 is formed only at the bonding portion of the wafer 4 has been shown, this film formation may be performed on only one of the wafer 4 and the frame 5, or on both.

[0058] The right diagram in Figure 8 is an enlarged cross-sectional view showing the semiconductor device after separation. In the separation process according to the second embodiment of the present disclosure, first, etching is performed using a chemical solution that selectively etches only the metal film 8 relative to the wafer 4, frame 5, and intermediate layer 9. Then, etching is performed using a chemical solution that selectively etches only the intermediate layer 9 relative to the wafer 4 and frame 5. For example, if the intermediate layer 9 is made of SiO2, hydrofluoric acid can be used as the chemical solution.

[0059] Unlike the first embodiment, the frame 5 separated by the above-described separation process does not have any part of the wafer 4 remaining. That is, since grinding after separation is not required, it is possible to easily reuse the frame 5. The other configurations and processes are the same as those of the first embodiment.

[0060] Below, the aspects of the present disclosure will be summarized as appendices.

[0061] (Appendix 1) A method for manufacturing a semiconductor device in which a ring-shaped frame is bonded to an outer periphery of a wafer, comprising: placing one of the wafer and the frame on a stage; a step of holding the other of the wafer and the frame by a chuck portion of a pressure bonding mechanism; activating a surface layer of the outer periphery of the wafer and a surface layer of the frame by atomic irradiation; a step of clamping the wafer and the frame between the stage and the chuck portion, and pressing the activated surface layer of the wafer and the surface layer of the frame by the pressing mechanism; Equipped with A method for manufacturing a semiconductor device in which an amorphous layer is formed at the bonding interface between the wafer and the frame body that are pressure-bonded. (Appendix 2) 2. A method for manufacturing a semiconductor device according to claim 1, wherein the frame has an outer diameter equal to the outer diameter of the wafer and an outer end surface that is continuous with the outer end surface of the wafer. (Appendix 3) 3. The method for manufacturing a semiconductor device according to claim 1, wherein the frame has a tapered shape on an inner side surface. (Appendix 4) 4. The method for manufacturing a semiconductor device according to claim 1, wherein the wafer and the frame are made of the same material. (Appendix 5) 4. The method for manufacturing a semiconductor device according to claim 1, wherein the wafer and the frame are made of different materials. (Appendix 6) 6. The method for manufacturing a semiconductor device according to any one of claims 1 to 5, further comprising the step of cutting the wafer along an inner edge face of the frame to obtain a frame-bonded wafer. (Appendix 7) 7. The method for manufacturing a semiconductor device according to claim 6, further comprising the step of grinding off portions other than the frame from the frame-bonded wafer. (Appendix 8) The activated surface layer of the wafer and the surface layer of the frame are pressure-bonded via an intermediate layer made of an inorganic compound; 6. The method for manufacturing a semiconductor device according to claim 1, wherein the intermediate layer is etched to remove the frame from the wafer. (Appendix 9) 9. The method for manufacturing a semiconductor device according to any one of claims 1 to 8, wherein the wafer is formed of a wide bandgap semiconductor. (Appendix 10) 10. The method for manufacturing a semiconductor device according to claim 9, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond. (Appendix 11) A semiconductor manufacturing apparatus that bonds a ring-shaped frame to an outer periphery of a wafer, a stage having a first cavity portion whose upper surface diameter is smaller than the inner diameter of the frame; a crimping mechanism having a chuck portion having a second hollow portion whose diameter on the lower surface side is smaller than the inner diameter of the frame body; an atomic irradiation unit that activates the surface layers of the wafer and the frame by atomic irradiation; The stage and the chuck portion sandwich the wafer and the frame, and the pressure bonding mechanism presses the activated surface layer of the wafer against the surface layer of the frame. (Appendix 12) a wafer and a ring-shaped frame that is pressure-bonded to the outer periphery of the wafer; The semiconductor device has an amorphous layer formed at the bonding interface between the wafer and the frame. (Appendix 13) The frame has a thickness equal to or greater than the thickness of the wafer and a width of 1 to 5 mm. 13. The semiconductor device according to claim 12. (Appendix 14) 14. The semiconductor device according to claim 12, wherein the frame has an outer diameter equal to the outer diameter of the wafer and an outer end face thereof is continuous with the outer end face of the wafer. (Appendix 15) 15. The semiconductor device according to any one of claims 12 to 14, wherein the frame has a tapered shape on an inner side surface. (Appendix 16) 16. The semiconductor device according to any one of claims 12 to 15, wherein the wafer and the frame are made of the same material. (Appendix 17) 16. The semiconductor device according to any one of claims 12 to 15, wherein the wafer and the frame are made of different materials. (Appendix 18) 18. The semiconductor device according to any one of claims 12 to 17, further comprising an intermediate layer made of an inorganic compound and formed at a bonding interface between the wafer and the frame. (Appendix 19) 19. The semiconductor device according to any one of claims 12 to 18, wherein the wafer is formed of a wide bandgap semiconductor. (Appendix 20) 20. The semiconductor device according to claim 19, wherein the wide bandgap semiconductor is silicon carbide, a gallium nitride-based material, or diamond. [Explanation of symbols]

[0062] 2 Chuck part 3 Stages 4 wafers 5 Frame 5a Frame 6 Frame-bonded wafer 7. Amorphous layer 9. Middle Class 10 wafers 11 Frame 13 Atomic bombardment 100 Semiconductor manufacturing equipment 200 Semiconductor device 200a Semiconductor device

Claims

1. A method for manufacturing a semiconductor device in which a ring-shaped frame is bonded to an outer periphery of a wafer, comprising: placing one of the wafer and the frame on a stage; a step of holding the other of the wafer and the frame by a chuck portion of a pressure bonding mechanism; activating a surface layer of the outer periphery of the wafer and a surface layer of the frame by atomic irradiation; a step of clamping the wafer and the frame between the stage and the chuck portion, and pressing the activated surface layer of the wafer and the surface layer of the frame by the pressing mechanism; Equipped with A method for manufacturing a semiconductor device in which an amorphous layer is formed at the bonding interface between the wafer and the frame body that are pressure-bonded.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the frame has an outer diameter equal to that of the wafer, and an outer end face of the frame is provided so as to be continuous with the outer end face of the wafer.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein the frame has a tapered inner side surface.

4. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the wafer and the frame are made of the same material.

5. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the wafer and the frame are made of different materials.

6. The method for manufacturing a semiconductor device according to claim 1 , further comprising the step of cutting the wafer along an inner edge face of the frame to obtain a frame-bonded wafer.

7. 7. The method for manufacturing a semiconductor device according to claim 6, further comprising the step of grinding away portions other than the frame from the frame-bonded wafer.

8. The activated surface layer of the wafer and the surface layer of the frame are pressure-bonded via an intermediate layer made of an inorganic compound; The method for manufacturing a semiconductor device according to claim 1 , wherein the intermediate layer is etched to remove the frame from the wafer.

9. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the wafer is made of a wide bandgap semiconductor.

10. 10. The method for manufacturing a semiconductor device according to claim 9, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.

11. A semiconductor manufacturing apparatus that bonds a ring-shaped frame to an outer periphery of a wafer, a stage having a first cavity portion whose upper surface diameter is smaller than the inner diameter of the frame; a crimping mechanism having a chuck portion having a second hollow portion whose diameter on the lower surface side is smaller than the inner diameter of the frame body; an atomic irradiation unit that activates the surface layers of the wafer and the frame by atomic irradiation; The stage and the chuck portion sandwich the wafer and the frame, and the pressure bonding mechanism presses the activated surface layer of the wafer against the surface layer of the frame.

12. a wafer and a ring-shaped frame that is pressure-bonded to the outer periphery of the wafer; an amorphous layer is formed at the bonding interface between the wafer and the frame; The frame has a tapered shape on the inner side surface. Semiconductor device.

13. A wafer and a ring-shaped frame body press-fitted to the outer periphery of the wafer, an amorphous layer is formed at the bonding interface between the wafer and the frame; an intermediate layer made of an inorganic compound and formed at the bonding interface between the wafer and the frame; Semiconductor device.

14. The frame has a thickness equal to or greater than the thickness of the wafer and a width of 1 to 5 mm. The semiconductor device according to claim 12 or 13.

15. 14. The semiconductor device according to claim 12, wherein the frame has an outer diameter equal to that of the wafer, and an outer end face of the frame is continuous with the outer end face of the wafer.

16. 14. The semiconductor device according to claim 12, wherein the wafer and the frame are made of the same material.

17. 14. The semiconductor device according to claim 12, wherein the wafer and the frame are made of different materials.

18. 14. The semiconductor device according to claim 12, wherein the wafer is made of a wide bandgap semiconductor.

19. 19. The semiconductor device according to claim 18, wherein the wide bandgap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.

Images