Silicon carbide vertical conduction MOSFET device and manufacturing method thereof

Abstract

To provide a silicon carbide vertical conduction MOSFET device and a manufacturing process thereof.SOLUTION: A vertical conduction MOSFET device 100 includes: a body 105 of silicon carbide of a first conductivity type which has a face 105A; and a superficial body region of a second conductivity type which has a first doping level, extends from the face of the body to a first depth (dsb) along a first direction, and has a first width (Wsb) along a second direction transversal to the first direction. The MOSFET device also comprises a source region 120 and a deep body region 110. The source region is of the first conductivity type, extends into the superficial body region from the face of the body to a second depth (db) along the first direction, and has a second width (Ws) along the second direction. The second depth is smaller than the first depth, and the second width is smaller than the first width.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to silicon carbide vertical conduction MOSFET devices and methods for fabricating the same. [Background technology]

[0002] As is known, semiconductor materials having a wide band gap, for example greater than 1.1 eV, a low on-state resistance, a high thermal conductivity, a high operating frequency, and a high saturation velocity of charge carriers, make it possible to obtain electronic devices such as diodes and transistors with better performance compared to silicon electronic devices, especially for power applications operating at voltages between 600 V and 1,300 V or in certain operating conditions, such as high temperatures.

[0003] In particular, it is known to obtain such electronic devices from silicon carbide wafers in one of the polytypes, such as 3C-SiC, 4H-SiC and 6H-SiC, which are distinguished by the properties mentioned above.

[0004] For example, FIG. 1 shows a known vertical conduction MOSFET device 1 in a Cartesian coordinate system consisting of a first axis X, a second axis Y, and a third axis Z.

[0005] MOSFET device 1 is comprised of a plurality of elementary cells, only a few of which are shown here, which are identical to one another and arranged in parallel on the same die, sharing a source terminal S and a drain terminal D.

[0006] The MOSFET device 1 is formed in a silicon carbide body 5 having a first surface 5A and a second surface 5B.

[0007] The body 5 contains a drain region 7 , a plurality of body regions 10 , and a plurality of source regions 15 .

[0008] The drain region 7 is here of N type and extends between the first surface 5A and the second surface 5B of the body 5 .

[0009] A drain contact region 9 of a conductive material, for example a metal or silicide, extends on the second surface 5B of the body 5 in direct electrical contact with the drain region 7 and forms the drain terminal D of the MOSFET device 1.

[0010] The body regions 10 are P-type and extend from the first surface 5A into the body 5. Each body region 10 has a 1×10 17 atoms / cm 3 and 1×10 20 atoms / cm 3 , a depth along the third axis Z of between 0.3 μm and 2 μm, and a width W1 along the second axis Y.

[0011] A surface portion 22 of the drain region 7 having a width W2 along the second axis Y protrudes between two adjacent body regions 10.

[0012] The sum of width W1 and width W2 defines the pitch of the MOSFET device 1, which in current devices is greater than 4 μm.

[0013] The body region 10 also extends along a first axis X and has, in plan view, for example the shape of a strip or a ring, not shown here.

[0014] Each of the source regions 15 extends from the first surface 5A of the body 5 to the inside of the respective body region 10 and is N-type. 18 atoms / cm 3 and 1×10 20 atoms / cm 3 Each source region 15 has a width W3 along the second axis Y that is less than the width W2 of the respective body region 10, and a depth along the third axis Z that is less than the depth of the respective body region 10.

[0015] Each surface portion 22 of each source region 15 and drain region 7 laterally bounds a channel region 25 in the respective body region 10 .

[0016] The MOSFET device 1 further includes a plurality of insulated gate regions 20. Each insulated gate region 20 is formed by a gate insulating layer 20A in contact with the first surface 5A of the body 5, a gate conductive layer 20B immediately above the gate insulating layer 20A, and a passivation layer 28 covering the gate conductive layer 20B and encapsulating the gate insulating layer 20A and the gate conductive layer 20B. Specifically, the gate insulating layer 20A of each insulated gate region 20 extends over a respective surface portion 22 of the drain region 7, over two channel regions 25 adjacent to the respective surface portions 22, and partially over the source region 15 adjacent to the respective channel regions 25.

[0017] The gate conductive layers 20B of the insulated gate regions 20 are electrically connected in parallel, in a manner not shown here, to form the gate terminal G of the MOSFET device 1.

[0018] The MOSFET device 1 further includes a plurality of body contact regions 30 and a front metallization region 33 .

[0019] The body contact region 30 is P + 1, each of which extends from the first surface 5A of the body 5 inside a respective source region 15 in contact with a respective body region 10. Typically, in present-day MOSFET devices, every source region 15 contains more than one body contact region 30, which are positioned at a mutual distance along the first axis X of FIG. 1. Furthermore, as can be seen in FIG. 1, the body contact regions 30 of adjacent source regions 15 are staggered, such that no body contact region 30 is visible in the central source region 15 along the second axis Y.

[0020] A front metallization region 33, for example of metal and / or metal silicide, forms the source terminal S of the MOSFET device 1 and extends over the first surface 5A of the body 5 in direct electrical contact with the source region 15 and the body contact region 30.

[0021] Each basic cell of the MOSFET device 1 has its own switch-on threshold voltage V th In use, the voltage V between the gate terminal G and the source terminal S GS is the threshold voltage V th MOSFET device 1 is in an on-state, in which case respective channel regions 25 are conductive and current can flow between source terminal S and drain terminal D along conduction path 18, shown for clarity in FIG. 1 by dashed arrows.

[0022] To obtain higher currents in the on-state, it is desirable to increase the density of elementary cells obtained within the same die, i.e., to decrease the pitch W4. However, decreasing the pitch W4 can result in drawbacks to the MOSFET device 1. For example, the body region 10 is obtained by implanting high-energy dopant ions at a maximum energy of, for example, up to 500 keV to obtain the desired depth for the body region 10, e.g., a maximum depth of 0.7 μm. The implantation of high-energy dopant ions generates defects in the crystal lattice of the body region 10 and, therefore, also in the channel region 25. Furthermore, high implantation energy also generates high lateral scattering of the dopant ions, e.g., along the second axis Y. This high lateral scattering therefore results in a less controllable concentration of dopant ions in the channel region 25, which has a high process variability, and therefore a lower switch-on threshold voltage V of the elementary cell. th This will cause high fluctuations in the current and cause performance degradation of the MOSFET device 1.

[0023] Voltage V GS is the switch-on threshold voltage Vth If the voltage V between the source terminal S and the drain terminal D is lower than DS is applied to a PN junction formed by the body region 10 (for example, P-type) and the drain region 7 (for example, N-type).

[0024] These PN junctions are in a reverse bias condition and the voltage V GS When V is high, e.g., greater than 100 V, as in power applications, a high electric field is generated in the body 5, especially in the surface portion 22 of the drain region 7 adjacent to the insulated gate region 20. This high electric field can cause undesirable high leakage currents to flow in the conductive path 18 between the source terminal S and the drain terminal D. Thus, the MOSFET device 1 will conduct current even in the off-state.

[0025] Furthermore, in the off-state of MOSFET device 1, the highest electric field values, even higher than 1 MV / cm, are obtained at the interface between surface portion 22 of drain region 7 and gate insulating layer 20A of insulated gate region 20. This determines the short lifetime of MOSFET device 1. Indeed, high electric field values ​​near the insulating material forming gate insulating layer 20A of insulated gate region 20, typically silicon oxide, cause its rapid degradation, which in turn causes a rapid deterioration of the performance of MOSFET device 1, ultimately leading to failure. Summary of the Invention [Problem to be solved by the invention]

[0026] SUMMARY OF THE INVENTION It is an object of the present invention to overcome the drawbacks of the prior art. [Means for solving the problem]

[0027] According to the present invention, there is provided a MOSFET device and method for its manufacture, as defined in the claims.

[0028] For a better understanding of the invention, an embodiment thereof will now be described, purely by way of non-limiting example, with reference to the accompanying drawings, in which: [Brief explanation of the drawings]

[0029] [Figure 1] 1 is a cross-sectional view of a known silicon carbide vertical conduction MOSFET device. [Figure 2] 1 is a cross-sectional view of a silicon carbide vertical conduction MOSFET device according to one embodiment of the present invention. [Figure 3] 3 is a plan view of the MOSFET device of FIG. 2; [Figure 4] 4A-4D are cross-sectional views of the MOSFET device of FIGS. 2 and 3 at various stages in the fabrication of the device according to one embodiment of the present invention. [Figure 5] 4A-4C are cross-sectional views of the MOSFET device of FIGS. 2 and 3 at subsequent stages in fabrication, respectively, according to another embodiment of the present invention. [Figure 6] 1A-1C are cross-sectional views of silicon carbide vertical conduction MOSFET devices according to different embodiments of the present invention. [Figure 7] 1A-1C are cross-sectional views of silicon carbide vertical conduction MOSFET devices according to different embodiments of the present invention. [Figure 7A] FIG. 8 is a plan view of the MOSFET device of FIG. 7; [Figure 8] 1A-1C are cross-sectional views of silicon carbide vertical conduction MOSFET devices according to different embodiments of the present invention. [Figure 9] 1A-1C are cross-sectional views of silicon carbide vertical conduction MOSFET devices according to different embodiments of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0030] 2 and 3 show the vertical conduction MOSFET device 100 in a Cartesian coordinate system XYZ having a first axis X, a second axis Y and a third axis Z. FIG.

[0031] MOSFET device 100 is formed from a plurality of basic cells, only a few of which are shown in FIGS. 2 and 3, which are identical to one another and located on the same die and share drain, gate, and source terminals D, G, and S, i.e., the basic cells are connected in parallel with one another.

[0032] MOSFET device 100 is formed in a body 105 of semiconductor material having a first surface 105A and a second surface 105B.

[0033] Body 105 may be formed by a substrate or a substrate having one or more epitaxial layers thereon, and is composed of silicon carbide, here of the 4H—SiC polytype, of which there are several polytypes.

[0034] The body 105 contains a drain region 7 , a plurality of deep body regions 110 , a plurality of surface body regions 115 , and a plurality of surface regions 120 .

[0035] The drain region 107, here N-type, extends between the first surface 105A and the second surface 105B of the body 105.

[0036] A drain contact region 109, made of a conductive material, for example a metal or a silicide, extends over the second surface 105B of the body 105 in direct electrical contact, particularly an ohmic contact, with the drain region 107. The drain contact region 109 forms the drain terminal D of the MOSFET device 100.

[0037] The deep body region 100, here of P type, is located at a distance from the first surface 105A of the body 105, in particular, at a body depth d between, for example, 0.2 μm and 1 μm. b Each of the deep body regions 110 extends into the body 105 for, for example, 1×10 18 atoms / cm 3 and 1×10 20atoms / cm 3 and a depth d along the third axis Z between 0.2 μm and 1 μm to have a maximum depth in the body 105 between 0.4 μm and 2 μm, in particular 0.7 μm. db and the width W along the second axis Y db It has the following features.

[0038] The surface body regions 115, here P-type, are in direct electrical contact with the respective deep body regions 110 and have a body depth d b 105A and 105B, extending into body 105 from first surface 105A of body 105 to a greater depth than

[0039] The surface body regions 115 each have a size of, for example, 5×10 16 atoms / cm 3 and 5×10 17 atoms / cm 3 , and has a doping level lower than the doping level of the deep body region 110 between them.

[0040] The superficial body regions 115 are each at a depth d db , which can be larger or smaller than, but is smaller here, and has a depth d along the third axis Z, for example between 0.3 μm and 1.5 μm, in particular 0.3 μm. sb It has the following characteristics.

[0041] In this embodiment, the depth d of the surface body region 115 sb is such that each deep body region 110 extends partially inside a respective superficial body region 115.

[0042] Furthermore, each surface body region 115 has a width W db a width W along the second axis Y that is greater than or equal to, but here greater than, sb It has the following characteristics.

[0043] Each surface body region 115 has a channel portion 127 that extends beneath the first surface 105A of the body 105 and is bounded along the second axis Y by a respective surface portion 130 of the drain region 107 and a respective source region 120. Each surface portion 130 has a width W along the second axis Y. sp and extends between two adjacent surface body regions 115.

[0044] Width W of surface portion 130 of drain region 107 sp and the width W of the surface body area 115 sb The sum of defines the pitch of the MOSFET device 100.

[0045] The source regions 120 are here N-type and each extend from the first surface 105 A of the body 105 inside a respective surface body region 115 .

[0046] In particular, each of the source regions 120 has a size of, for example, 1×10 18 atoms / cm 3 and 1×10 20 atoms / cm 3 The doping level is between 0.01 and 0.1.

[0047] Each source region 120 has a width W of a respective surface body region 115. sb Width W along the second axis Y is smaller than s It has the following characteristics.

[0048] In this embodiment, the width W of each source region 120 s is the width W of each deep body region 110 db Even bigger than that.

[0049] The source regions 120 each extend along a third axis Z to a depth that is smaller than the depth of the respective surface body region 115. Here, each source region 120 has a body depth d b , that is, the source regions 120 are each adjacent to a respective deep body region 110 .

[0050] As shown in FIG. 3 in a plan view of the body 105, the surface body region 115, the source region 120, and the deep body region 110 (the latter not shown) extend in the shape of a strip along a first axis X.

[0051] However, the deep body region 110, the surface body region 115, and the source region 120 can have different shapes in plan view, for example, they can be ring-shaped, or they can form rectangles or other polygons that are spaced apart from each other in the body 105.

[0052] The MOSFET device 100 further includes a plurality of insulated gate regions 125 .

[0053] Referring again to FIG. 2, the insulated gate region 125 is formed by gate insulating layers 125A, e.g., silicon oxide, extending over the first surface 105A of the body 105 and each in contact with the first surface 105A of the body 105, gate conductive layers 125B, e.g., polysilicon, directly on each gate insulating layer 125A, and a passivation layer 135 covering the top and sides of each gate insulating layer 125A and each gate conductive layer 125B.

[0054] The gate conductive layers 125B of the insulated gate regions 125 are electrically connected in parallel in a manner not shown here to form the gate terminal G of the MOSFET device 100.

[0055] Each insulated gate region 125 extends over a respective surface portion 130 of the drain region 107 , over two adjacent channel portions 127 , and partially over two adjacent source regions 120 .

[0056] In this embodiment, the insulated gate regions 125 are each strip-shaped along a first axis X and extend at a mutual distance along a second axis Y to form elongated openings 138 oriented parallel to the first axis X. In particular, the elongated openings 138 have first and second contact zones 138A, 138B that extend alternately and adjacent to each other along the first axis X.

[0057] The MOSFET device 100 further includes a plurality of body contact regions 145 and a front metallization region 140 .

[0058] The body contact regions 145 are P-type and each have a thickness of, for example, 1×10 19 atoms / cm 3 and 1×10 20 atoms / cm 3 , and each extends from the first surface 105A of the body 105 at a first contact zone 138A inside a respective source region 120 in direct electrical contact with the deep body region 110.

[0059] The front metallization region 140 is made of, for example, metal (possibly with a metal silicide bottom layer) and extends within the elongated opening 138 and over the passivation layer 135 of the insulated gate region 125. The front metallization region 140 is in direct electrical contact, in particular ohmic contact, with the source region 120 in the second contact zone 138B and with the body contact region 145 in the first contact zone 138A. The front metallization region 140 thus forms the source terminal S of the MOSFET device 100.

[0060] The body contact region 145 allows the front metallization region 140 to short-circuit the source region 120 and the deep body region 110 .

[0061] The MOSFET device 100 can achieve high reliability. Indeed, because the surface body regions 115 have a reduced depth, they can be formed through implantation of dopant ions with low implantation energy, as will be described in more detail below with reference to Figures 4(A)-(D) and 5(A)-(C). Due to the use of low implantation energy, reduced lateral scattering of the dopant ions is obtained, and thus the concentration distribution of the dopant ions in the body 105 is controllable and consistent with that established in the design phase.

[0062] As a result, the switch-on threshold voltage V of the MOSFET device 100 th is exposed to less processing variability.

[0063] Furthermore, even if the deep body region 110 is formed by implanting dopant ions at a higher implant energy compared to the surface body region 115, the switch-on threshold voltage V th 2, deep body regions 110 now have a smaller width than surface body regions 115. Therefore, even if the dopant ions in deep body regions 110 are exposed to greater lateral dispersion, that greater lateral dispersion does not affect the doping levels of channel portion 127 of surface body region 115 and surface portion 130 of drain region 107.

[0064] As will be described below with reference to Figures 4(A)-(D) and 5(A)-(C), the fact that the surface body region 115 is formed at a lower implant energy allows for the use of a thinner mask, and therefore it is easier to obtain higher lateral definition.

[0065] The above means that the pitch of the MOSFET device 100 can be designed to be low, e.g., less than 4 μm, and especially between 2.5 μm and 4 μm. For example, the width W of the surface portion 130 of the drain region 107 can be sp can be reduced without bringing two adjacent surface body regions 115 too close together undesirably, which would cause malfunction of the MOSFET device 100.

[0066] Reducing the pitch of MOSFET device 100 offers the possibility of designing a higher density of base cells in parallel on the same die, and therefore lowering the on-state resistance of MOSFET device 100.

[0067] Furthermore, low implantation energies suggest a low likelihood of defect formation in the silicon carbide crystal lattice portion of body 105 in which channel portion 127 is formed.

[0068] Therefore, the charge carriers in the channel portion 127 have a higher mobility, thus ensuring good performance of the MOSFET device 100 .

[0069] Furthermore, the presence of the deep body region 110 prevents the MOSFET device 100 from turning off when the voltage V between the source terminal S and the drain terminal D is low. DS is high, for example higher than 400V, causing the highest electric field values ​​to be obtained deep within the body 105, ie at a large distance from the first surface 105A of the body 105.

[0070] This causes the electric field to have a lower value at the surface portion 130 of the drain region 107, especially near the gate insulating layer 125A, and therefore allows the MOSFET device 100 to have a long life.

[0071] The fabrication steps for MOSFET device 100, particularly those relating to the formation of deep body region 110 and surface body region 115, are described below.

[0072] 4A shows a silicon carbide wafer 200, here having N-type doping, and having first and second surfaces 200A and 200B. A deep body mask is formed on first surface 200A of wafer 200, e.g., via known lithography steps. The deep body mask includes a plurality of deep body mask portions 205, each having a thickness of less than 1.5 μm, e.g., between 0.5 μm and 1.5 μm, spaced apart to expose portions of wafer 200 where deep body regions 110 are intended to be formed. Using the deep body mask, a first implantation (here indicated by first arrow 210) of P-type dopant ions, e.g., aluminum or boron ions, is performed, having an implantation energy between 30 keV and 200 keV.

[0073] According to one embodiment, deep body region 110 is formed through a series of sequential implants of P-type dopant ions, each having an implant energy between 30 keV and 200 keV.

[0074] According to one embodiment, wafer 200 is then exposed to an annealing step, which is useful for activating the dopant ions and reducing defects in the crystal lattice that may be generated by the implantation.

[0075] 4(B), deep body mask 205 is removed and epitaxial layer 215 is grown on first surface 200A of wafer 200. First epitaxial layer 215 is bounded by surface 215A, has the same doping as wafer 200, and has a thickness of between 0.3 μm and 1 μm. Wafer 200 and epitaxial layer 215 form working wafer 218, which corresponds to body 105, and has a first surface (and therefore still designated 215A) corresponding to surface 215A of epitaxial layer 215 and a second surface (and therefore still designated 200B) corresponding to second surface 200B of wafer 200.

[0076] In FIG. 4(C), a surface body mask is formed on surface 215A of working wafer 218, for example, via known lithography steps.

[0077] The surface body mask has a plurality of surface body mask portions 220, each having a thickness of less than 1.5 μm, e.g., between 0.5 μm and 1.5 μm, spaced apart from one another to expose portions of the working wafer 218 where the surface body regions 115 are intended to be formed.

[0078] Thus, superficial body mask portion 220 has a smaller width along second axis Y compared to the width of deep body mask portion 205 .

[0079] Using the surface body mask, a second implantation (now indicated by second arrow 225) of P-type dopant ions, such as aluminum or boron ions, is performed with an implant energy below 200 keV, for example between 30 keV and 200 keV.

[0080] The second implant forms the surface body region 115 and defines the surface portion 130 of the drain region 107 .

[0081] According to one embodiment, surface body region 115 is formed through a series of sequential implants of P-type dopant ions, each having an implant energy between 30 keV and 200 keV.

[0082] According to one embodiment, after the second implant, the working wafer 218 is exposed to an annealing step, which is useful for activating the dopant ions and reducing defects in the crystal lattice that may be generated by the second implant.

[0083] 4(D), a source mask is then formed on the first surface 215A of the working wafer 218, for example, via known lithography steps. For example, the source mask can be formed from the surface body mask 220 of FIG. 4(C) for better alignment with previous fabrication steps.

[0084] The source mask has a plurality of source mask portions 230, each having a thickness less than 1.5 μm, e.g., between 0.2 μm and 1.5 μm, and spaced apart to expose portions of the work wafer 218 where source regions 120 are intended to be formed. Using the source mask, a third implantation (here indicated by third arrow 235) of N-type dopant ions, e.g., nitrogen or phosphorus ions, having an implantation energy between 20 keV and 200 keV is performed.

[0085] The third implant forms source region 120 and defines channel portion 127 .

[0086] According to one embodiment, source region 120 is formed through a series of sequential implants of N-type dopant ions, each having an implant energy between 20 keV and 200 keV.

[0087] According to one embodiment, after the third implant, the working wafer 218 is exposed to an annealing step, which is useful for activating the dopant ions and reducing defects in the crystal lattice that may be generated by the third implant.

[0088] Thereafter, insulated gate region 125 is formed on surface 215A of working wafer 218, and body contact region 145, front metallization region 140, and drain contact region 109 are formed in a known manner, not shown here.

[0089] Other known manufacturing steps, such as dicing and electrical connections, of working wafer 218 are then performed to form MOSFET device 100.

[0090] Therefore, as already mentioned above, it is clear that the surface body region 115 is formed using a low implant energy. This reduces the lateral scattering of the dopant ions and allows the use of a thin implant mask, i.e., the surface body mask 220. Thus, the surface body mask portion 220 has good lateral resolution, e.g., along the second axis Y. In this manner, the pitch of the MOSFET device 100 can be designed to be, e.g., less than 4 μm.

[0091] Furthermore, the deep body regions 110 are also formed here via a low implant energy, which allows for reduced lateral scattering of the respective dopant ions. Thus, the deep body regions 110 can also be formed to have widths W 1 , W 2 , W 3 , W 4 , W 5 , W 6 , W 7 , W 8 , W 9 , W 10 , W 11 , W 21 , W 32 , W 12 , W 13 , W 22 , W 33 , W 41 , W 52 , W 14 , W 15 , W 25 , W 34 , W 16 , W 26 , W 27 , W 35 , W 28 , W 36 , W 29 , W 37 , W 40 , W 41 , W 52 , W 42 , W 43 , W 44 , W 45 , W 56 , W 57 , W 58 , W 59 , W 60 , W 61 , W 62 , W 63 , W 64 , W 65 , W 66 , W 67 , W 68 , W 69 , W 70 , W 71 , W 72 , W 73 , W 74 , W 75 , W 76 , W 77 , W 78 , W 79 , W 80 , W 81 , W 82 , W 83 , W 84 , W 85 , W 86 , W 87 , W 88 , W 89 , W 90 , W 91 , W 92 , W 93 , W 94 , W 95 db is the width W of the surface body area 115 sb , thus ensuring good performance of the MOSFET device 100 for the reasons previously mentioned.

[0092] Referring now to FIGS. 5(A)-(C), a method for fabricating a different embodiment of the MOSFET device 100 of FIGS. 2 and 3 will be described, with parts in common with the process of FIGS. 4(A)-(D) being given the same reference numerals.

[0093] FIG. 5A shows a silicon carbide working wafer 300 having first and second surfaces 300A, 300B and intended to form the body 105.

[0094] A surface body mask consisting of respective surface body mask portions 220 is formed on the first surface 300A of the working wafer 300, and the surface body regions 115 are formed via implantation of dopant ions, similar to that described with reference to FIG. 4(C).

[0095] Next, referring to FIG. 5(B), a source mask consisting of respective source mask portions 230 is formed on the first surface 300A of the working wafer 300, and the source regions 120 are formed via implantation of dopant ions, similar to what was described with reference to FIG. 4(D).

[0096] Next, referring to FIG. 5(C), a deep body mask, consisting of individual deep body mask portions, here designated 305, is formed on the first surface 300A of the working wafer 300, for example, via known lithography steps, and shaped to expose portions of the working wafer 300 where the deep body regions 110 are intended to be formed.

[0097] In this embodiment, each of the deep body mask segments 305 has a greater thickness than the deep body mask segments 205 of FIG. 4C, for example, between 1.6 μm and 2 μm.

[0098] Also here, deep body mask portion 305 has a greater width along second axis Y than superficial body mask portion 220.

[0099] Deep body regions 110 are formed using the deep body mask via implantation of P-type dopant ions (shown here at 310), such as aluminum or boron ions, with an implant energy between 100 keV and 1 MeV.

[0100] According to one embodiment, deep body region 110 is formed through a series of sequential implants of P-type dopant ions, each having an implant energy between 100 keV and 1 MeV.

[0101] According to one embodiment, the deep body mask is removed and the working wafer 300 is exposed to an annealing step, which is useful for activating the dopant ions and reducing defects in the crystal lattice that may be generated by the implantation of the dopant ions.

[0102] After removing the deep body mask, the insulated gate region 125, body contact region 145, front metallization region 140, and drain contact region 109 are formed in known manner.

[0103] Other known manufacturing steps of working wafer 300 , such as dicing and electrical connections, are then performed to form MOSFET device 100 .

[0104] Because the width of deep body mask portion 305 is greater than the width of surface body mask portion 220, deep body mask portion 305 does not contribute to the definition of the pitch of MOSFET device 100. Therefore, the definition of deep body mask portion 305 does not require high lateral resolution, and the fact that deep body mask portion 305 has a greater thickness than deep body mask portion 205 of FIG. 4A does not compromise the advantages of MOSFET device 100 described above.

[0105] Furthermore, the greater thickness of deep body mask portion 305 and the absence of the growth step of epitaxial layer 215 shown in FIG. 4B simplify the manufacturing process of MOSFET device 100.

[0106] Figure 6 shows a MOSFET device 400 according to another embodiment of the present invention. The MOSFET device 400 has a similar general structure to the MOSFET device 100 of Figures 2 and 3. Therefore, common elements are given the same reference numerals and will not be described further.

[0107] In particular, MOSFET device 400 is formed in body 105 and includes drain region 107, deep body region 110, surface body region 115, source region 120, insulated gate region 125, front metallization region 140, and drain contact region 109. Furthermore, in this embodiment, insulated gate regions 125 are each strip-shaped and extend along first axis X and extend a distance apart along second axis Y to form elongated openings 405.

[0108] The MOSFET device 400 further includes a plurality of conductive regions 410 formed by the front metallization region 140. The conductive regions 410 extend inwardly into the body 105 at the elongated openings 405 through the depth of the respective source regions 120 and partially through the respective deep body regions 110.

[0109] Conductive region 410 may extend, in a manner not shown, the entire length (along first axis X) of MOSFET device 400. Thus, in this embodiment, body contact region 145 is not present.

[0110] Therefore, in the MOSFET device 400, the front metallization region 140 is in ohmic contact with both the source region 120 and the deep body region 110. Therefore, the contact resistance between the source region 120 and the deep body region 110 is low. Therefore, the MOSFET device 400 can avoid an undesired voltage drop between the source region 120 and the deep body region 110 during use, thereby improving the electrical performance of the MOSFET device 400.

[0111] Figure 7 shows a MOSFET device 450 according to another embodiment of the present invention. The MOSFET device 450 has a similar general structure to the MOSFET device 100 of Figures 2 and 3. Therefore, common elements are given the same reference numerals and will not be described further.

[0112] In particular, MOSFET device 450 is formed within body 105 and includes drain region 107, deep body region 110, surface body region 115, insulated gate region 125, body contact region 145, front metallization region 140, and drain contact region 109. As described for MOSFET device 100 of Figure 2, insulated gate region 125 now also defines elongated opening 138, which has first and second contact zones 138A, 138B. Body contact region 145 extends into body 105 at first contact zone 138A.

[0113] In this embodiment, the source region 460 is now N-type and has a first portion 460A and a second portion 460B, the first portion 460A having a density of, for example, 1×10 18 atoms / cm 3 and 1×10 20 atoms / cm 3 and the second portion 460B has a lower doping level than the first portion 460A.

[0114] In particular, in FIG. 7, each first portion 460A of source region 460 extends from a first surface 105A of body 105 into body 105 inside a respective surface body region 115, making direct electrical contact with a respective deep body region 110 at a respective second contact zone 138B.

[0115] In FIG. 7A, for clarity, the second portion 460B of the source region 460 is separated from the first portion 460A by a dotted line, and as shown therein, the first portion 460A of the source region 460 extends along the first axis X between two adjacent body contact regions 145.

[0116] The second portions 460B of the source regions 460 extend along the first axis X under the insulated gate region 125 on two sides along the second axis Y of each first portion 460A of the source regions 460 and of each body contact region 145.

[0117] The second portions 460B of the source regions 460 also extend from the first surface 105A of the body 105 into the body 105 inside the respective surface body regions 115 and are therefore positioned adjacent to and in direct electrical contact with the respective first portions 460A.

[0118] In other words, the channel portion 127 is laterally bounded along the second axis Y by the second portion 460 B of each source region 460 and by the surface portion 130 of each drain region 107 .

[0119] In this embodiment, second portion 460B of source region 460 has a smaller depth along third axis Z than first portion 460A of source region 460.

[0120] During use, in the on-state, the conduction path of MOSFET device 450 between source terminal S and drain terminal D, comprising source region 460, channel portion 127, and drain region 107, has a higher electrical resistance compared to the conduction path of MOSFET device 100 of Figures 2 and 3 in the on-state. Indeed, second portion 460B of source region 460 has a lower doping level than first portion 460A, and therefore a higher electrical resistance.

[0121] This higher electrical resistance implies a lower saturation current and therefore lower heat generation, which, if excessive, may cause the MOSFET device to malfunction or fail. MOSFET device 450 may therefore be incorporated into electronic devices usable in power applications, where it is desirable to obtain long-term usability of the electronic device even in the event of an unwanted short circuit, i.e., MOSFET device 450 has a high short-circuit withstand time (SCWT).

[0122] Furthermore, the second portion 460B of the source region 460 is formed at a smaller depth in the body 105 compared to the first portion 460A. Therefore, the second portion 460B can be formed via a dopant ion implantation step having a lower implant energy, for example, between 10 keV and 200 keV. This lower implant energy exposes the dopant ions forming the second portion 460B of the source region 460 to less lateral dispersion in the body 105. Therefore, the doping level of the channel portion 127, which is laterally disposed adjacent to the second portion 460B of the source region 460 along the second axis Y, is less affected by the step of forming the second portion 460B of the source region 460.

[0123] Figure 8 illustrates a MOSFET device 500 in accordance with a further embodiment of the present invention. MOSFET device 500 has a similar general structure to the combination of MOSFET device 400 of Figure 6 and MOSFET device 450 of Figure 7. Accordingly, common elements are designated by the same reference numerals and will not be described further.

[0124] MOSFET device 500 is formed in body 105 and includes drain region 107 , deep body region 110 , surface body region 115 , insulated gate region 125 , front metallization region 140 , and drain contact region 109 .

[0125] The insulated gate region 125 again forms an elongated opening 405 .

[0126] In this embodiment, source region 510 also has a first portion 510A and a second portion 510B, with second portion 510B having a lower doping level than first portion 510A.

[0127] Additionally, the front metallization region 140 includes a plurality of conductive portions 515, similar to the conductive portions 410 of the MOSFET device 400 of Figure 6. The conductive portions 515 extend into the body 105 at the elongated openings 405, through the first portions 510A of the respective source regions 510 and partially through the respective deep body regions 110.

[0128] Again, the body contact region 145 is absent.

[0129] Thus, second portions 510B of source regions 510 extend along first axis X underneath insulated gate region 125 on two sides and in direct electrical contact with first portions 510A of source regions 510. Thus, again, each second portion 510B of source region 510 defines, on one side, the boundary of a respective channel portion 127.

[0130] As a result, in use, MOSFET device 500 has both a higher short-circuit withstand time, as described above with respect to MOSFET device 450 of FIG. 7, and a lower contact resistance between front metallization region 140 and deep body region 110, as described above with respect to MOSFET device 400 of FIG. 6, compared to MOSFET device 100 of FIGS. 2-3.

[0131] Figure 9 illustrates a MOSFET device 550 according to another embodiment of the present invention. The MOSFET device 550 has a similar general structure to the MOSFET device 100 of Figures 2 and 3. Therefore, common elements are given the same reference numerals and will not be described further.

[0132] In particular, MOSFET device 550 is formed in body 105 and includes drain region 107, surface body region 115, source region 120, insulated gate region 125, body contact region 145, front metallization region 140, and drain contact region 109.

[0133] In this embodiment, each deep body region 560 includes a first portion 560A and a second portion 560B.

[0134] Each of the first portions 560A extends directly below the source region 120 to a body depth d b The first portion 560A extends into the body 105 from, for example, 1×10 18 atoms / cm 3 and 1×10 19 atoms / cm 3 The doping level is between 0.01 and 0.1.

[0135] Each second portion 560B extends at the bottom and adjacent to a respective first portion 560A, i.e., at a greater depth along the third axis Z. The second portions 560B have a lower doping level compared to the first portions 560A, e.g., 1×10 17 atoms / cm 3 and 1×10 18 atoms / cm 3 Between.

[0136] In use, in the off state, the MOSFET device 550 has a high voltage V between its source terminal S and drain terminal D. DS In fact, since the second portion 560B of the deep body region 560 has a lower doping level compared to the first portion 560A of the deep body region 560, the voltage V DS form a depletion region that extends both into second portion 560B and into drain region 107. Thus, each N+ / P+ / P / N structure formed by each source region 120, by first and second portions 560A, 560B of each deep body region 560, and by drain region 107, respectively, has a higher breakdown voltage compared to MOSFET device 100 of FIGS.

[0137] Those skilled in the art will appreciate that MOSFET devices 400, 450, 500, and 550 may be fabricated in a manner similar to that already described for MOSFET device 100 with reference to FIGS. 4(A)-(D) and / or 5(A)-(C), and therefore will not be described further herein.

[0138] Finally, it will be understood that modifications and variations can be made in the MOSFET devices 100, 400, 450, 500, 550 and the manufacturing processes therefor described and illustrated herein without departing from the scope of the present invention as defined in the claims.

[0139] For example, the different embodiments described may be combined to provide further solutions.

[0140] Additionally, the conductivity types of the drain region 107, source regions 120, 460, 510, deep body regions 110, 560, and surface body region 115 can be reversed.

[0141] For example, in the manufacturing processes described with reference to Figures 4(A)-(D) and 5(A)-(C), after the implantation of dopant ions resulting in the formation of the deep body region, surface body region, and source region, a single annealing step can be performed, which can reduce the manufacturing cost of the corresponding MOSFET device and ensure accurate activation of the dopant ions and reduction of crystal lattice defects caused by the implantation.

Claims

1. In vertical conduction MOSFET devices (100; 400; 450; 500; 550), a body (105) of silicon carbide having a first conductivity type and a surface (105A); A first depth (d) from the surface of the body along a first direction (Z) ｓｂ ) into the body and along a second direction (Y) transverse to the first direction, ｓｂ a surface body region (115) of a second conductivity type having a first doping level; A second depth (d ｂ ) extending inwardly of the surface body region and having a second width (W ｓ a source region (120) of the first conductivity type having a second depth less than the second depth and a second width less than the first width; and a deep body region (110) of a second conductivity type extending into the body at a distance from the surface of the body and in direct electrical contact with the surface body region, the deep body region having a second doping level higher than the first doping level; It has A vertical conduction MOSFET device, wherein the first doping level is between 5×10 16 atoms / cm 3 and 5×10 17 atoms / cm 3 and the second doping level is between 1×10 18 atoms / cm 3 and 1×10 20 atoms / cm 3 .

2. A vertical conduction MOSFET device (100; 400; 450; 500; 550), comprising: a body (105) of silicon carbide having a first conductivity type and a surface (105A); a surface body region (115) of a second conductivity type extending into the body along a first direction (Z) from the surface of the body to a first depth (d sb ) and having a first width (W sb ) along a second direction (Y) transverse to the first direction, the surface body region (115) having a first doping level; a source region (120) of the first conductivity type extending inwardly of the surface body region from the surface of the body along the first direction to a second depth (d b ) and having a second width (W s ) along the second direction, the second depth being smaller than the second depth and the second width being smaller than the first width; and a deep body region (110) of a second conductivity type extending into the body at a distance from the surface of the body and in direct electrical contact with the surface body region, the deep body region having a second doping level higher than the first doping level; It has A vertical conduction MOSFET device, wherein the deep body region extends from the second depth to a third depth greater than the second depth.

3. 3. The vertical conduction MOSFET device of claim 2, wherein said third depth is greater than said first depth.

4. 4. The vertical conduction MOSFET device of claim 1, wherein the source region laterally defines a channel portion (127) of the surface body region (115) and includes a terminal contact portion (460A; 510A) and a channel contact portion (460B; 510B), the terminal contact portion having a third doping level and extending from the surface of the body into the surface body region along the first direction to the second depth; and the channel contact portion having a fourth doping level lower than the third doping level and extending from the surface of the body into the surface body region adjacent to and in direct electrical contact with the respective terminal contact portion on a first side and the channel portion on a second side.

5. 4. The vertical conduction MOSFET device of claim 1, further comprising a body contact region (145) of the second conductivity type, the body contact region extending from the surface of the body within the source region along the first direction to the second depth in direct electrical contact with the deep body region, the source region laterally surrounding the body contact region.

6. A vertical conduction MOSFET device (100; 400; 450; 500; 550), comprising: a body (105) of silicon carbide having a first conductivity type and a surface (105A); a surface body region (115) of a second conductivity type extending into the body along a first direction (Z) from the surface of the body to a first depth (d sb ) and having a first width (W sb ) along a second direction (Y) transverse to the first direction, the surface body region (115) having a first doping level; a source region (120) of the first conductivity type extending inwardly of the surface body region from the surface of the body along the first direction to a second depth (d b ) and having a second width (W s ) along the second direction, the second depth being smaller than the second depth and the second width being smaller than the first width; a deep body region (110) of a second conductivity type extending into the body at a distance from the surface of the body and in direct electrical contact with the surface body region, the deep body region having a second doping level higher than the first doping level; and a body contact region (145) having a second conductivity type; It has the body contact region extends from the surface of the body along the first direction into the source region to the second depth in direct electrical contact with the deep body region, the source region laterally surrounding the body contact region; a vertical conduction MOSFET device, wherein the source region laterally defines a channel portion (127) of the surface body region (115) and has a channel contact portion (460B; 510B) extending from the surface of the body into the surface body region in direct electrical contact with the body contact region on a first side and with the channel portion on a second side.

7. A vertical conduction MOSFET device (100; 400; 450; 500; 550), comprising: a body (105) of silicon carbide having a first conductivity type and a surface (105A); a surface body region (115) of a second conductivity type extending into the body along a first direction (Z) from the surface of the body to a first depth (d sb ) and having a first width (W sb ) along a second direction (Y) transverse to the first direction, the surface body region (115) having a first doping level; a source region (120) of the first conductivity type extending inwardly of the surface body region from the surface of the body along the first direction to a second depth (d b ) and having a second width (W s ) along the second direction, the second depth being smaller than the second depth and the second width being smaller than the first width; a deep body region (110) of a second conductivity type extending into the body at a distance from the surface of the body and in direct electrical contact with the surface body region, the deep body region having a second doping level higher than the first doping level; and a metallization region extending over the surface of the body and having a body contact portion (410; 515) extending through the source region and partially into the body (105) toward the interior of the deep body region; wherein the source region laterally surrounds the body contact portion, and the body contact portion is in ohmic contact with the deep body region and with the source region.

8. 7. The vertical conduction MOSFET device of claim 4 or 6, wherein the channel contact portion of the source region extends along the first direction into the surface body region (115) to a fourth depth that is less than the second depth.

9. A vertical conduction MOSFET device (100; 400; 450; 500; 550), comprising: a body (105) of silicon carbide having a first conductivity type and a surface (105A); a surface body region (115) of a second conductivity type extending into the body along a first direction (Z) from the surface of the body to a first depth (d sb ) and having a first width (W sb ) along a second direction (Y) transverse to the first direction, the surface body region (115) having a first doping level; a source region (120) of the first conductivity type extending inwardly of the surface body region from the surface of the body along the first direction to a second depth (d b ) and having a second width (W s ) along the second direction, the second depth being smaller than the second depth and the second width being smaller than the first width; and a deep body region (110) of a second conductivity type extending into the body at a distance from the surface of the body and in direct electrical contact with the surface body region, the deep body region having a second doping level higher than the first doping level; It has a vertical conduction MOSFET device, the deep body region (560) having a first portion (560A) and a second portion (560B), the first portion having the second doping level and extending into the body at a distance from the surface of the body, and the second portion having a fifth doping level lower than the second doping level, the second portion of the deep body region extending into the body (105) at a greater depth along a second direction (Z) than the first portion of the deep body region and in direct electrical contact with the first portion of the deep body region.

10. The surface body region is a first surface body region, the source region is a first source region, and the deep body region is a first deep body region, and further includes a second surface body region, a second source region, and a second deep body region, and the second surface body region and the first surface body region have a fourth width (W) along the second direction (Y). ｓｐ 10. The vertical conduction MOSFET device of claim 1, further comprising a surface portion (130) of said body (105) laterally bounded by said surface portion (130) having a thickness of 100 .mu.m.sup.- ...

11. 1. A method for fabricating a vertical conduction MOSFET device from a silicon carbide work body (218; 300) having a first conductivity type and a surface (215A; 300A), comprising: A first depth (d) from the surface of the work body along a first direction (Z). ｓｂ ) and has a first width (W) along a second direction (Y) transverse to the first direction. ｓｂ forming a surface body region (115) of a second conductivity type in the work body having a first doping level; A second depth (d ｂ ) and extends along the second direction to a second width (W ｓ forming a source region (120) of a first conductivity type in the surface body region, the second depth being smaller than the first depth and the second width being smaller than the first width; and forming a deep body region (110) of a second conductivity type in the work body in direct electrical contact with the superficial body region (115) at a distance from the surface of the work body and having a second doping level higher than the first doping level; It encompasses the following:

1. The method of claim 1, wherein forming the deep body region includes starting with a silicon carbide wafer (200) having a first conductivity type and a face (200A), implanting first dopant ions onto the face of the wafer using a first mask (205), and growing an epitaxial layer (215) on the face of the silicon carbide wafer to form the work body (218), and forming the superficial body region includes implanting second dopant ions onto the face of the work body using a second mask (220).

12. 12. The method of claim 11, wherein the first dopant ions and the second dopant ions are implanted using an implant energy between 30 keV and 200 keV.

13. A method for manufacturing a vertical conduction MOSFET device from a silicon carbide work body (218; 300) having a first conductivity type and a surface (215A; 300A), comprising: forming a surface body region (115) of a second conductivity type in the work body, the surface body region (115) extending from the surface of the work body along a first direction (Z) to a first depth (d sb ) and having a first width (W sb ) along a second direction (Y) transverse to the first direction, the surface body region (115) having a first doping level; forming a source region (120) of a first conductivity type in the surface body region, the source region (120) extending from the surface of the work body along the first direction to a second depth (d b ) and having a second width (W s ) along the second direction, the second depth being smaller than the first depth and the second width being smaller than the first width; forming a deep body region (110) of a second conductivity type in the work body in direct electrical contact with the superficial body region (115) at a distance from the surface of the work body and having a second doping level higher than the first doping level; It encompasses the following: forming the deep body region includes implanting first dopant ions onto the face (300A) of the work body (300) using a first mask (305) and an implant energy between 100 keV and 1 MeV, and forming the surface body region includes implanting second dopant ions onto the face (300A) of the work body (300) using a second mask (220) and an implant energy between 30 keV and 200 keV.

14. 14. The method of any one of claims 11 to 13, wherein the first mask and the second mask each have a respective portion, the portion of the first mask having a greater width along the second direction (Y) compared to the portion of the second mask.

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