Exposure mask, pattern formation method, and method for manufacturing a semiconductor device

Abstract

To focus a photoresist layer formed on a film having a local step.SOLUTION: An exposure mask includes: a substrate having first and second main surfaces; a reflective layer provided on the side of the first main surface and for reflecting exposure light; and an absorption layer provided to have a predetermined pattern on the side of the first main surface through the reflective layer and for absorbing the exposure light. The reflective layer includes a first area having a surface height from the second main surface being a first height and a second area adjacent to the first area through a first step formed on the surface of the reflective layer and having a surface height from the second main surface being a second height higher than the first height; and the first and second areas have the absorption layers, respectively.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] Embodiments of the present invention relate to an exposure mask, a patterning method, and a method of manufacturing a semiconductor device.

Background Art

[0002] In a method of manufacturing a semiconductor device, a pattern may be formed by an exposure process using a reflective exposure mask. In this case, since a pattern is formed on a photoresist layer on a wafer by the exposure light reflected by the exposure mask, by adjusting the distance from the surface of the exposure mask to the surface of the wafer so as to be the best focus position of the pattern, the photoresist layer can be uniformly focused over the entire exposure region.

[0003] However, a wafer that has undergone various processes may have a film with a local film thickness difference called a local step. When a photoresist layer is formed on such a film and exposure is performed using the above exposure mask, there are regions where the distance from the surface of the exposure mask to the surface of the wafer is locally different, and it may be difficult to focus the entire area of the photoresist layer.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0005] One embodiment aims to provide an exposure mask capable of focusing on a photoresist layer formed on a film having local steps, a pattern forming method, and a method for manufacturing a semiconductor device. [Means for solving the problem]

[0006] The exposure mask of the embodiment comprises a substrate having a first main surface and a second main surface, a reflective layer provided on the first main surface side that reflects exposure light, and an absorbing layer provided on the first main surface side via the reflective layer with a predetermined pattern that absorbs the exposure light, wherein the reflective layer has a first region whose surface height from the second main surface is a first height, and a second region adjacent to the first region via a first step on the surface of the reflective layer, whose surface height from the second main surface is a second height that is higher than the first height, and the absorbing layer is provided in the first region and the second region respectively. Furthermore, the first step is also provided so as to cover the entire first step. . [Brief explanation of the drawing]

[0007] [Figure 1] A cross-sectional view showing an example of the configuration of a semiconductor device according to an embodiment. [Figure 2] A cross-sectional view showing an example of the configuration of an exposure mask according to an embodiment. [Figure 3] A cross-sectional view illustrating a part of the procedure for manufacturing a semiconductor device according to an embodiment. [Figure 4] A cross-sectional view illustrating a part of the procedure for manufacturing a semiconductor device according to an embodiment. [Figure 5] A cross-sectional view showing an example of the exposure procedure using an exposure mask in a comparative example. [Figure 6] A cross-sectional view showing an example of the exposure procedure using an exposure mask in a comparative example. [Figure 7] A cross-sectional view showing an example of the configuration of an exposure mask according to a modified example 1 of the embodiment. [Figure 8] A cross-sectional view showing an example of the configuration of a semiconductor device according to a modified example 2 of the embodiment. [Figure 9]A cross-sectional view showing an example of the configuration of an exposure mask according to a modified example 2 of the embodiment. [Figure 10] A cross-sectional view illustrating a part of the procedure for manufacturing a semiconductor device according to a modified example 2 of the embodiment. [Modes for carrying out the invention]

[0008] Embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is not limited to the embodiments described below. Furthermore, the components in the embodiments described below include those that are readily conceivable or substantially identical to those that are easily understood by those skilled in the art. In this specification, "equal" or "uniform" means, for example, "equal" or "uniform" to the extent that manufacturing tolerances are acceptable.

[0009] (Example of semiconductor device configuration) Figure 1 is a cross-sectional view showing an example of the configuration of a semiconductor device 10 according to an embodiment. More specifically, Figure 1 is a schematic diagram of a part of the semiconductor device 10 during the manufacturing process, for example, showing the state before exposure and development processing.

[0010] As shown in Figure 1, for example, the semiconductor device 10 at a predetermined timing in the manufacturing process comprises a substrate 11 made of silicon or the like, and a film 12 formed on the substrate 11. In other words, the substrate 11 is the main body of the wafer 1. The film 12 includes at least a workpiece layer 12t in its surface layer portion and is a multilayer film in which multiple types of insulating layers and multiple types of conductive layers are laminated.

[0011] Through various processes, these insulating and conductive layers may already have various structures forming the semiconductor device 10. Furthermore, through such various processes, these insulating and conductive layers may have different thicknesses in predetermined regions. As a result, the film 12 has a sixth region AW1 with a predetermined film thickness, and a fifth region AW2 with a thinner film thickness than region AW1. Regions AW1 and AW2 are adjacent to each other and are connected in a continuous manner, for example, by a local step LS having an inclined surface on the surface of the film 12.

[0012] These regions AW1 and AW2 can have various shapes including a rectangular shape when viewed from above. The minimum width of each of the regions AW1 and AW2 may be, for example, at least about several μm. Also, the film thickness difference of the film 12 in these regions AW1 and AW2 is, for example, 50 nm or more and 100 nm or less. However, these numerical values are merely examples, and the sizes of the regions AW1 and AW2 and the film thickness difference between the regions AW1 and AW2 can vary depending on the processes that the semiconductor device 10 has gone through and the stage of the manufacturing process.

[0013] (Configuration Example of Exposure Mask) FIG. 2 is a cross-sectional view showing an example of the configuration of an exposure mask 20 according to an embodiment. The exposure mask 20 shown in FIG. 2 is an example of an exposure mask used for the exposure process of the semiconductor device 10 having the above-described local step LS. The exposure process using the exposure mask 20 is performed using, for example, extreme ultraviolet light (EUV: Extreme Ultra Violet) as the exposure light, and the exposure mask 20 is configured as, for example, a reflective exposure mask. Extreme ultraviolet light is light with a wavelength of 13.5 nm.

[0014] FIG. 2 shows a partial region of the exposure mask 20 corresponding to the semiconductor device 10 shown in FIG. 1 above. The exposure mask 20 shown in FIG. has an area that is about four times the area of the corresponding region of the semiconductor device 10 described above. As will be described later, the exposure process of the semiconductor device 10 is performed by reducing and transferring the patterns 231p and 232p of the exposure mask 20 onto the wafer 1.

[0015] More specifically, the exposure mask 20 includes a substrate 21 made of a material such as glass with a small coefficient of thermal expansion, a reflective layer 22 formed on the substrate 21, and an absorption layer 23 formed on the reflective layer 22.

[0016] The substrate 21 has a substantially flat plate shape having a main surface as the first main surface on the side where the reflective layer 22 and the absorption layer 23 are provided, and a main surface as the second main surface on the opposite side. The average thickness of the substrate 21 can be, for example, about several mm.

[0017] However, the substrate 21 has a region AG1 as a fourth region having a predetermined thickness as the second thickness, and a region AG2 as a third region having a thickness as the first thickness that is thinner than the region AG1. The regions AG1 and AG2 are adjacent to each other, and are continuously connected, for example, by a step STg having a gentle inclined surface on the main surface on the side of the reflective layer 22 and the absorption layer 23.

[0018] Here, the region AG1 is provided at a position corresponding to the region AW2 of the semiconductor device 10 described above, and the region AG2 is provided at a position corresponding to the region AW1 of the semiconductor device 10 described above. Further, the step STg may be provided at a position substantially corresponding to the local step LS of the semiconductor device 10 described above.

[0019] That the regions AG1 and AG2 respectively correspond to the regions AW2 and AW1 means that, during the exposure process described later, a pattern 231p described later provided at a position overlapping in the height direction with the region AG1 is transferred to the region AW2 of the semiconductor device 10, and a pattern 232p described later provided at a position overlapping in the height direction with the region AG2 is transferred to the region AW1 of the semiconductor device 10.

[0020] However, the step STg only needs to be at a position substantially corresponding to the local step LT of the semiconductor device 10, and does not necessarily have to have a similar shape to the local step LT.

[0021] The reflective layer 22 has a multilayer structure in which layers made of different materials that reflect exposure light are alternately laminated. As these layers, as different layers having significantly different refractive indices of exposure light, for example, a combination in which Mo layers and Si layers are alternately laminated can be used. Thereby, the reflection efficiency of the reflective layer 22 can be increased.

[0022] The reflective layer 22 has a uniform thickness throughout. The reflective layer 22 can have an average layer thickness of, for example, 250 nm or more and 300 nm or less.

[0023] Furthermore, since the reflective layer 22 is provided on a substrate 21 having regions AG1, AG2 and steps STg of different thicknesses, the surface height of the reflective layer 22 from the back surface of the substrate 21 will differ in accordance with these regions AG1, AG2 and steps STg.

[0024] In other words, the reflective layer 22 has a second region AR1 that overlaps with region AG1 of the substrate 21 in the height direction. In region AR1, the reflective layer 22 has a predetermined height as a second height, which is the surface height from the back surface of the substrate 21. The reflective layer 22 also has a first region AR2 that overlaps with region AG2 of the substrate 21 in the height direction. In region AR2, the reflective layer 22 has a predetermined height as a first height, which is lower than the surface height in region AR1, as the surface height from the back surface of the substrate 21.

[0025] The difference in surface height of the reflective layer 22 in these regions AR1 and AR2 is, for example, between 2 and 10 times the difference in film thickness of the film 12 of the semiconductor device 10 described above. As described above, for example, if the difference in film thickness of the film 12 is between 50 nm and 100 nm, the difference in surface height of the reflective layer 22 in regions AR1 and AR2 can be set to between 120 nm and 1000 nm. Such a difference in surface height of the reflective layer 22 can be obtained, for example, by adjusting the difference in thickness of the substrate 21 in regions AG1 and AG2.

[0026] Furthermore, these regions AR1 and AR2 can take on various shapes, including rectangular shapes, depending on the shape of regions AG1 and AG2 on the substrate 21, which are similar in shape to regions AW1 and AW2 on the film 12 of the semiconductor device 10. If these regions AR1 and AR2 are rectangular, for example, the length of one side of each region AR1 and AR2 is, for example, several hundred nanometers to several millimeters.

[0027] Furthermore, the reflective layer 22 has a first step STr at a position that overlaps in the height direction with the step STg of the substrate 21. The step STr is a gently sloping surface with a predetermined inclination angle so as to follow the step STg of the substrate 21.

[0028] Specifically, the step STr is preferably a gently sloping surface with an inclination angle of, for example, 0.01° to 5°. In other words, the size of the step STg provided between regions AG1 and AG2 is preferably adjusted so that the step STr of the reflective layer 22 has the inclination angle described above. As a result, the step STr of the reflective layer 22 will also have a size corresponding to the size of the step STg of the substrate 21.

[0029] The absorption layer 23 is composed of a material that absorbs exposure light. For example, a TaN layer, a TaBN layer, or a TaGeN layer can be used as the absorption layer 23. The absorption layer 23 is provided in positions that overlap the height of regions AR1 and AR2 of the reflection layer 22. The thickness of the absorption layer 23 is equal throughout each region. The absorption layer 23 can have an average thickness of, for example, 50 nm to 70 nm.

[0030] Furthermore, the absorption layer 23 has a pattern 231p at a position that overlaps in the height direction with region AR1 of the reflection layer 22. Also, the absorption layer 23 has a pattern 232p at a position that overlaps in the height direction with region AR2 of the reflection layer 22. These patterns 231p and 232p may be any patterns such as lines and spaces, holes, or dots. Through the exposure process described later, patterns 231p and 232p are transferred to the semiconductor device 10, becoming patterns of, for example, several tens of nanometers to several micrometers in size.

[0031] The exposure mask 20 configured as described above can be manufactured, for example, as follows.

[0032] First, a substrate 21, such as a glass substrate, is prepared, having a uniform thickness throughout and an average thickness of, for example, several millimeters. Then, the aforementioned step STg is formed on this substrate 21. Such a step STg can be formed, for example, using a focused ion beam (FIB).

[0033] Alternatively, the above-mentioned step STg may be formed by photolithography and etching techniques. In this case, for example, a photoresist layer having a tapered shape is formed on the substrate 21, covering the portion of the substrate 21 that will become region AG1 and the portion that will become the step STg. The above-mentioned step STg is then formed by etching the surface of the substrate 21 exposed from this photoresist layer. As the etching process, for example, anisotropic etching such as reactive ion etching (RIE) can be used.

[0034] Through the process described above, a substrate 21 having regions AG1 and AG2 with different thicknesses, and a step STg is formed.

[0035] Furthermore, a reflective layer 22 is formed on the substrate 21 on which the step STg is formed by alternately stacking, for example, a Mo layer and an ASi layer. At this time, the Mo layer and the ASi layer are formed so that they each have a uniform thickness across the entire surface of the substrate 21. This results in the formation of a reflective layer 22 having a step STr on its surface.

[0036] Furthermore, a TaN layer, TaBN layer, or TaGeN layer, etc., is formed to cover the entire surface of the reflective layer 22. At this time, one of these layers is made to have a uniform thickness across the entire surface of the reflective layer 22. In addition, patterns 231p and 232p are formed on the layer formed on the reflective layer 22. Patterns 231p and 232p can be formed using, for example, photolithography and etching techniques, as described above. This forms the absorption layer 23.

[0037] The exposure mask 20 of the embodiment is manufactured as described above.

[0038] (Method of manufacturing semiconductor devices) Next, a method for manufacturing the semiconductor device 10 according to the embodiment will be described using Figures 3 and 4. Figures 3 and 4 are cross-sectional views illustrating a part of the procedure for manufacturing the semiconductor device 10 according to the embodiment.

[0039] In the example shown in Figure 3, the semiconductor device 10, which is in the process of being manufactured, undergoes various processes and reaches the state shown in Figure 1(b) above. The exposure process is then performed on the semiconductor device 10 using the exposure mask 20 of the embodiment.

[0040] In other words, the semiconductor device 10 has a film 12 formed on the substrate 11, with the surface layer including the workpiece layer 12t already formed. Furthermore, local steps LS are present in the film 12, and the film thickness of the film 12 differs in regions AW1 and AW2.

[0041] As shown in Figure 3, a negative-type photoresist layer 13 is formed on the film 12 of the semiconductor device 10. The photoresist layer 13 is formed using, for example, spin coating technology. This makes it possible to form a photoresist layer 13 with a uniform thickness across the entire surface of the film 12 where local step differences LS have occurred due to differences in film thickness.

[0042] Furthermore, the side of the exposure mask 20 on which the reflective layer 22 and the absorption layer 23 are provided is placed opposite the side of the semiconductor device 10 on which the photoresist layer 13 is formed, so that the semiconductor device 10 and the exposure mask 20 are positioned at a predetermined distance from each other. At this time, the horizontal position of the semiconductor device 10 and the exposure mask 20 is adjusted so that, as described above, the pattern 231p of the absorption layer 23 is transferred to the photoresist layer 13 on region AW2 of the semiconductor device 10, and the pattern 232p is transferred to the photoresist layer 13 on region AW1 of the semiconductor device 10.

[0043] In Figure 3, the size of the semiconductor device 10 and the corresponding size of the exposure mask 20 are shown to be the same in order to make the positional relationship between the patterns 231p and 232p of the absorption layer 23 and the regions AW1 and AW2 of the semiconductor device 10 easier to understand. However, as described above, the exposure mask 20 is, for example, about four times the size of the semiconductor device 10, and the patterns 231P and 232p of the exposure mask 20 are reduced in size and transferred to the photoresist layer 13.

[0044] With the semiconductor device 10 and the exposure mask 20 facing each other as described above, exposure light LTe is irradiated onto the exposure mask 20 from below the surface of the exposure mask 20 on which the reflective layer 22 and the absorbing layer 23 are provided.

[0045] Exposure light LTe that reaches the reflective layer 22 of the exposure mask 20 is reflected by the reflective layer 22 toward the semiconductor device 10, and the photoresist layer 13 on the film 12 is exposed by the reflected light LTr. Exposure light LTe that reaches the absorption layer 23 of the exposure mask 20 is absorbed by the absorption layer 23 and does not reach the semiconductor device 10, and therefore does not expose the photoresist layer 13 on the film 12.

[0046] As a result, the pattern 231p of the absorption layer 23 is transferred to the photoresist layer 13 formed on region AW2 of the film 12. In addition, the pattern 232p of the absorption layer 23 is transferred to the photoresist layer 13 formed on region AW1 of the film 12.

[0047] Here, the film 12 has different thicknesses in regions AW1 and AW2. Therefore, the photoresist layer 13 on region AW1 and the photoresist layer 13 on region AW2 have different depths of focus, or focal points, with respect to the reflected light LTr.

[0048] At this time, the region AP1 of the substrate 21 that overlaps with the pattern 231p of the absorption layer 23 in the height direction and the region AW2 of the film 12 are positioned in corresponding locations. Also, the region AP2 of the substrate 21 that overlaps with the pattern 232p of the absorption layer 23 in the height direction and the region AW1 of the film 12 are positioned in corresponding locations.

[0049] This makes it possible to align the focal point of the reflected light LTr from the reflective layer 22 located in a position that overlaps the height of region AP1 of the substrate 21 to the photoresist layer 13 located in a position that overlaps the height of region AW2 of the film 12, and the focal point of the reflected light LTr from the reflective layer 22 located in a position that overlaps the height of region AP2 of the substrate 21 to the photoresist layer 13 located in a position that overlaps the height of region AW1 of the film 12, with respect to the respective photoresist layers 13 located at different heights.

[0050] In other words, the surface height of the reflective layer 22 of the exposure mask 20 is adjusted so that the photoresist layer 13 is focused in each region AW1 and AW2 of the semiconductor device 10, according to the difference in film thickness 12 of the semiconductor device 10.

[0051] Therefore, the reflected light LTr is focused on both the photoresist layer 13 on region AW1 and the photoresist layer 13 on region AW2, and both patterns 231p and 232p are transferred to the photoresist layer 13 with high precision.

[0052] As shown in Figure 4(a), the photoresist layer 13 exposed as described above is developed using the exposure mask 20 to form patterns 131p and 132p on the photoresist layer 13. Pattern 131p is a pattern onto which pattern 232p of the exposure mask 20 has been transferred, and pattern 132p is a pattern onto which pattern 231p of the exposure mask 20 has been transferred.

[0053] More specifically, the photoresist layer 13 is, for example, a negative-type photoresist layer. Therefore, the portion exposed by reflected light LTr reflected by the reflective layer 22 of the exposure mask 20 remains after development. In addition, the portion of the photoresist layer 13 that was not exposed because the exposure light LTe was absorbed by the absorption layer 23 of the exposure mask 20 is removed. As a result, patterns 131p and 132p are formed on the photoresist layer 13.

[0054] However, the photoresist layer 13 may be a positive-type photoresist layer. In this case, the portion of the exposure mask 20 that exposes the reflective layer 22 and the portion that is covered by the absorption layer 23 should be reversed compared to the example described above. This allows the patterns 131p and 132p shown in Figure 4(a) to be formed on the photoresist layer 13 in the same manner.

[0055] As shown in Figure 4(b), the surface layer 12t of the film 12 is etched via the patterns 131p and 132p of the photoresist layer 13. As a result, patterns 121p and 122p, onto which the patterns 131p and 132p of the photoresist layer 13 have been transferred, are formed on the layer 12t. The patterns 121p and 122p may have shapes such as lines and spaces, holes, or dots of several tens of nanometers in size.

[0056] As shown in Figure 4(c), the photoresist layer 13 is removed by ashing treatment using oxygen plasma or the like.

[0057] With the above steps, the exposure development process and etching process for the semiconductor device 10 of the embodiment are completed.

[0058] From this point onward, the semiconductor device 10 is manufactured by repeatedly forming various layers on the semiconductor device 10 and processing these formed layers as appropriate using photolithography and etching techniques.

[0059] (Comparative example) In the manufacturing process of semiconductor devices, EUV lithography is sometimes used to form patterns of several tens of nanometers in size on the workpiece layer. In EUV lithography, instead of conventional transmission-type exposure masks, reflective-type exposure masks are used, for example, which reflect exposure light to expose the photoresist layer. Figures 5 and 6 show examples of the configuration of a comparative example reflective-type exposure mask 20x.

[0060] Figures 5 and 6 are cross-sectional views showing an example of the exposure procedure using exposure mask 20x according to the comparative example.

[0061] As shown in Figures 5 and 6, the comparative exposure mask 20x comprises a flat substrate 21x having a uniform thickness throughout, a reflective layer 22x provided on the substrate 21x with a uniform thickness throughout, and an absorbing layer 23x provided on the reflective layer 22x having patterns A and B.

[0062] In the example shown in Figure 5, an exposure mask 20x is used to perform an exposure procedure on the semiconductor device 10x.

[0063] As shown in Figure 5(a), the semiconductor device 10x has a substrate 11x and a film 12x formed on the substrate 11x with a uniform thickness throughout, and a photoresist layer 13x is further formed on the film 12x.

[0064] The side of the exposure mask 20x on which the reflective layer 22x and the absorption layer 23x are formed is positioned opposite the side of the semiconductor device 10x on which the film 12x and the photoresist layer 13x are formed. Exposure light is then shone onto the exposure mask 20x from the side of the reflective layer 22x and the absorption layer 23x, and the photoresist layer 13x of the semiconductor device 10x is exposed by the reflected light reflected by the reflective layer 22x, thereby forming patterns A and B on the photoresist layer 13x.

[0065] As shown in Figure 5(b), in this case, the best focus positions of patterns A and B are the same in the area where pattern A is formed and the area where pattern B is formed in the photoresist layer 13x. Therefore, both patterns A and B are formed with high precision.

[0066] In the example shown in Figure 6, an exposure mask 20x is used to perform an exposure procedure on the semiconductor device 10y.

[0067] As shown in Figure 6(a), the semiconductor device 10y has a substrate 11y and a film 12y formed on the substrate 11y, each having a different film thickness in different regions, and a photoresist layer 13y is further formed on the film 12y.

[0068] Furthermore, similar to Figure 5(a), the exposure mask 20x and the semiconductor device 10y are placed opposite each other, and exposure light is shone onto the exposure mask 20x. The reflected light from the reflective layer 22x exposes the photoresist layer 13y of the semiconductor device 10y, thereby forming patterns A and B on the photoresist layer 13y. Here, pattern A is formed on the thicker portion of the film 12y, and pattern B is formed on the thinner portion of the film 12y.

[0069] As shown in Figure 6(b), in this case, the area where pattern A is formed on the photoresist layer 13y is closer to the pattern surface of the exposure mask 20x than the area where pattern B is formed, resulting in different best focus positions. Therefore, for example, if the focus of the reflected light is set to pattern A, the focus on pattern B will not be set, making it difficult to focus the reflected light on both patterns A and B.

[0070] According to the exposure mask 20 of the embodiment, the reflective layer 22 has a region AR2 whose surface height from the back surface of the substrate 21 is a predetermined height, and a region AR1 adjacent to region AR2 via a step STr on the surface of the reflective layer 22, whose surface height from the back surface of the substrate 21 is higher than the predetermined height. This improves the focus margin during exposure processing, making it possible to focus over the entire area of ​​the photoresist layer 13 formed on the film 12 having a local step LS.

[0071] According to the exposure mask 20 of the embodiment, the substrate 21 has a predetermined thickness and a region AG2 that overlaps in the height direction with region AR2 of the reflective layer 22, and a region AG1 adjacent to region AG2 via a step STg on the main surface of the substrate 21 on the side where the reflective layer 22 etc. is provided, which is thicker than the predetermined thickness and overlaps in the height direction with region AR1 of the reflective layer 22. This makes it possible to make the surface height of the reflective layer 22 different in each region AR1 and AR2, and to focus on the photoresist layer 13 formed on the film 12 having a local step LS.

[0072] According to the exposure mask 20 of the embodiment, the step STr on the surface of the reflective layer 22 is an inclined surface having an inclination angle of, for example, 0.01° to 5°. An inclined surface having such an inclination angle can be obtained by adjusting the step STg on the surface of the substrate 21 to have a gentle inclination angle. By making the step STg of the substrate 21 gentle in this way, when forming the reflective layer 22 on the surface of the substrate 21, the influence of the step STg of the substrate 21 is reduced, suppressing the occurrence of strain etc. in the reflective layer 22, and enabling the formation of a reflective layer 22 with an overall uniform layer thickness. Therefore, the reflection efficiency and refractive index of the reflective layer 22 with respect to exposure light can be made uniform throughout the entire reflective layer 22.

[0073] According to the manufacturing method of the semiconductor device 10 of this embodiment, the wafer 1 and the exposure mask 20 are arranged such that regions AR1 and AR2 of the exposure mask 20 correspond to multiple regions AW1 and AW2 of the film 12. More specifically, the wafer 1 and the exposure mask 20 are arranged such that region AR2 of the exposure mask 20 corresponds to region AW1 of the wafer 1, and region AR1 of the exposure mask 20 corresponds to region AR2 of the wafer 1.

[0074] This improves the focus margin during exposure processing, allowing the entire area of ​​the photoresist layer 13 formed on the film 12 having a local step LS to be in focus.

[0075] According to the manufacturing method of the semiconductor device 10 of the embodiment, the difference in surface height of the reflective layer 22 in regions AR1 and AR2 is between 2 and 10 times the difference in film thickness of the film 12 in regions AW1 and AW2 of the wafer 1.

[0076] As described above, the film 12 formed on the semiconductor device 10 during manufacturing may have a local step LS that causes a film thickness difference of, for example, 50 nm to 100 nm. In contrast, by adjusting the difference in surface height of the reflective layer 22 of the exposure mask 20 to, for example, 120 nm to 1000 nm, and creating a difference of 2 to 10 times the film thickness difference of the film 12 formed on the wafer 1, it is possible to focus over the entire area of ​​the photoresist layer 13 formed on the film 12 having the local step LS.

[0077] (Variation 1) Next, the exposure mask 320 of the first modified embodiment will be described with reference to Figure 7. The exposure mask 320 of the first modified embodiment differs from the above-described embodiment in that the absorption layer 323 is also formed in the portion of the reflective layer 22 where the step STr is formed.

[0078] In the following drawings, components similar to those in the embodiments described above are denoted by the same reference numerals, and their descriptions are omitted.

[0079] Figure 7 is a cross-sectional view showing an example of the configuration of an exposure mask 320 according to Modification 1 of the embodiment. As shown in Figure 7, the exposure mask 320 of Modification 1 comprises a substrate 21 such as a glass substrate, a reflective layer 22 formed on the substrate 21, and an absorption layer 323 formed on the reflective layer 22.

[0080] In the exposure mask 320 of the modified example 1, the substrate 21 and the reflective layer 22 are configured in the same manner as in the embodiment described above.

[0081] The absorption layer 323 is constructed by having patterns 231p and 232p on regions AR1 and AR2 of the reflection layer 22, respectively, and a pattern 233p on the step STr of the reflection layer 22. Pattern 233p covers, for example, the entire step STr of the reflection layer 22.

[0082] Furthermore, the absorption layer 323 may have the same thickness in regions AR1 and AR2. On the other hand, the absorption layer 323 may have the same thickness as regions AR1 and AR2 at step STt, or it may have a different thickness than regions AR1 and AR2. Also, the thickness of the absorption layer 323 may change at step STt.

[0083] The exposure mask 320 configured as described above can be manufactured, for example, as follows.

[0084] The substrate 21 and the reflective layer 22 are formed, for example, in the same manner as in the embodiments described above. The absorption layer 323 is also formed, for example, in the same manner as in the embodiments described above, except that the pattern 233p is formed on the step STr. In this case, the thickness of the absorption layer 323 on the step STt can vary in various ways, as described above, depending on the formation method and conditions of the absorption layer 323.

[0085] Based on the above, the exposure mask 320 of the modified example 1 is manufactured.

[0086] In the exposure mask 320 of Modified Example 1, the absorption layer 323 is also provided on the step STr of the reflective layer 22. This makes it possible to suppress the exposure light irradiated onto the step STr of the reflective layer 22 from being diffusely reflected by the step STr and affecting the exposure process.

[0087] The exposure mask 320 of the modified example 1 also provides the same effects as the embodiments described above.

[0088] In addition, the exposure mask 320 in the above-described modified example 1 is provided with the same substrate 21 and reflective layer 22 as in the above-described embodiment, but it is also possible to apply the configuration of the absorption layer 323 in modified example 1 to the exposure masks 120 and 220 of modified example 1 or modified example 2 described above.

[0089] Furthermore, while the exposure mask 320 in the above-described modified example 1 has an absorption layer 323 with equal thickness in regions AR1 and AR2, the exposure mask 320 in modified example 1 may have an absorption layer 323 with different thicknesses in regions AR1 and AR2, similar to the absorption layer 223 in modified example 2 described above.

[0090] (Modification 2) Next, the exposure mask 420 of the modified embodiment 2 will be described with reference to Figures 8 to 9. The exposure mask 420 of the modified embodiment 2 differs from the above-described embodiment in that it is used for exposure processing of a semiconductor device 410 having a plurality of local steps LS1 to LS3.

[0091] In the following drawings, components similar to those in the embodiments described above are denoted by the same reference numerals, and their descriptions are omitted.

[0092] In the embodiment described above, the film 12 includes one local step LS. However, a film that has undergone multiple processes to include various different layers may have multiple local steps due to the processes that have been carried out so far. Figure 8 shows an example of such a semiconductor device 410.

[0093] Figure 8 is a cross-sectional view showing an example of the configuration of a semiconductor device 410 according to a modified example of the embodiment 2. Figure 8 is a schematic diagram of a part of the semiconductor device 410 during the manufacturing process, showing, for example, the state before exposure and development processing.

[0094] As shown in Figure 8, the semiconductor device 410 of the modified example 2 has a substrate 11 such as a silicon substrate, a multilayer film structure in which multiple different layers are stacked, and a film 412 formed on the substrate 11 with a workpiece layer 412t on the surface layer.

[0095] The film 412 has a region AW41 having a predetermined film thickness, a sixth region AW42 having a thinner film thickness than region AW41, a fifth region AW43 having an even thinner film thickness than region AW42, and a region AW44 having a thicker film thickness than region AW43.

[0096] Regions AW41 and AW42 are adjacent to each other and are connected by a local step LS1 having a gently sloping surface on the surface of film 412, for example. Regions AW42 and AW43 are adjacent to each other and are connected by a local step LS2 having a gently sloping surface on the surface of film 412, for example. Regions AW43 and AW44 are adjacent to each other and are connected by a local step LS4 having a gently sloping surface on the surface of film 412, for example.

[0097] These regions AW41 to AW44 can take on various shapes, including rectangular. The minimum width of each region AW41 to AW44 may be, for example, at least a few micrometers. Also, the difference in film thickness of film 412 in these regions AW41 to AW44 is, for example, between 50 nm and 100 nm. However, these values ​​are merely examples.

[0098] It should be noted that the number of local steps LS1 to LS3 included in the semiconductor device 410 is merely an example, and can vary considerably depending on the processes the semiconductor device 410 has gone through and each stage of the manufacturing process. Furthermore, the above-mentioned film thickness and arrangement of regions AW41 to AW44 are also merely examples, and the semiconductor device 410 may have regions with various film thicknesses arranged in various arrangements depending on the processes the semiconductor device 410 has gone through and each stage of the manufacturing process.

[0099] Figure 9 is a cross-sectional view showing an example of the configuration of an exposure mask 420 according to a modified example 2 of the embodiment. The exposure mask 420 of modified example 2 is designed to correspond to the semiconductor device 410 described above and is used for exposure processing of the semiconductor device 410.

[0100] As shown in Figure 9, the exposure mask 420 comprises a substrate 421 such as a glass substrate, a reflective layer 422 formed on the substrate 421, and an absorbing layer 423 formed on the reflective layer 422.

[0101] The substrate 421 has a region AG41 having a predetermined thickness, a region AG42 having a predetermined thickness that is thicker than the thickness of the substrate 421 in region AG41, a region AG43 having a predetermined thickness that is thinner than the thickness of region AG42, and a region AG44 having a predetermined thickness that is thinner than the thickness of the substrate 421 in region AG43.

[0102] Regions AG41 and AG42 are adjacent to each other and are connected in a continuous manner by a step ST4g having a gently sloping surface on the main surface of the substrate 421 on the reflective layer 422 and absorption layer 423 side. Regions AG42 and AG43 are adjacent to each other and are connected in a continuous manner by a step ST5g having a gently sloping surface on the main surface of the substrate 421 on the reflective layer 422 and absorption layer 423 side. Regions AG43 and AG44 are adjacent to each other and are connected in a continuous manner by a step ST6g having a gently sloping surface on the main surface of the substrate 421 on the reflective layer 422 and absorption layer 423 side.

[0103] The reflective layer 422 has, for example, a uniform thickness throughout. As a result, the surface height of the reflective layer 422 from the back surface of the substrate 421 differs in the areas AG41 to AG44 and the steps ST4g to ST6g of the substrate 421.

[0104] In other words, the reflective layer 422 has a third region AR41 that overlaps with region AG41 of the substrate 421 in the height direction. In region AR41, the reflective layer 422 has a predetermined height as the surface height from the back surface of the substrate 421, which is the third height.

[0105] Furthermore, the reflective layer 422 has a second region AR42 that overlaps with region AG42 of the substrate 421 in the height direction. In region AR42, the reflective layer 422 has a predetermined height as a second height, which is higher than the surface height in region AR41, as the surface height from the back surface of the substrate 421.

[0106] Furthermore, the reflective layer 422 has a region AR43 as a first region that overlaps with region AG43 of the substrate 421 in the height direction. In region AR43, the reflective layer 422 has a predetermined height as a first height, which is lower than the surface height in region AR42, as the surface height from the back surface of the substrate 421.

[0107] Furthermore, the reflective layer 422 has a region AR44 that overlaps with region AG44 of the substrate 421 in the height direction. In region AR44, the reflective layer 422 has a predetermined height, which is even lower than the surface height in region AR43, as the surface height from the back surface of the substrate 421.

[0108] The difference in surface height of the reflective layer 422 in these regions AR41 to AR44 is, for example, between 2 and 10 times the difference in film thickness of the film 412 on the semiconductor device 410 described above. Furthermore, these regions AR41 to AR44 are similar in shape to regions AW41 to AW44 on the film 412 of the semiconductor device 410, and if these regions AR41 to AR44 are, for example, rectangular, the length of one side of each region AR41 to AR44 is, for example, several hundred nanometers to several millimeters.

[0109] Furthermore, the reflective layer 422 has a second step ST4r at a position that overlaps in the height direction with the step ST4g of the substrate 421. Furthermore, the reflective layer 422 has a first step ST5r at a position that overlaps in the height direction with the step ST5g of the substrate 421. Furthermore, the reflective layer 422 has a step ST6r at a position that overlaps in the height direction with the step ST6g of the substrate 421.

[0110] Each of these steps ST4r to ST6r is a gently sloping surface having a predetermined inclination angle, so as to follow the steps ST4g to ST6g of the substrate 421. Specifically, it is preferable that each of the steps ST4r to ST6r is a gently sloping surface with, for example, an inclination angle of 0.01° or more and 5° or less.

[0111] Furthermore, as an example of the size of these steps ST4r to ST6r, the width of the steps ST4r to ST6r sandwiched between regions AR41 to AR44 can be, for example, between 1 μm and several millimeters.

[0112] The absorption layer 423 is constructed by having patterns 431p to 434p on regions AR41 to AR44 of the reflection layer 422. The absorption layer 423 may have a uniform thickness throughout regions AR41 to AR44.

[0113] Furthermore, the configuration of the exposure mask 420 of Modified Example 2, which has multiple steps ST4r to ST6r, can also be applied to any of the configurations of Modified Examples 1 to 3 described above. That is, an exposure mask having multiple steps ST4r to ST6r can be configured such that at least one of the substrate and the reflective layer has different thicknesses. In addition, an exposure mask having multiple steps ST4r to ST6r may include an absorption layer with different layer thicknesses in multiple regions.

[0114] Furthermore, the various configurations of the substrate 421, the reflective layer 422, and the absorption layer 423, as well as the various numerical values ​​relating to the substrate 421, the reflective layer 422, and the absorption layer 423, can be the same as those of the substrate, reflective layer, and absorption layer in any of the embodiments and modifications 1 to 3 described above.

[0115] The exposure mask 420 configured as described above can also be manufactured, for example, in the same way as the exposure mask 20 in the embodiment described above.

[0116] Figure 10 is a cross-sectional view illustrating a part of the procedure for manufacturing a semiconductor device 410 according to a modified example 2 of the embodiment. Figure 10 shows the exposure process of the semiconductor device 410 using an exposure mask 420.

[0117] As shown in Figure 10, the exposure mask 420 and the semiconductor device 410 are positioned with the side of the exposure mask 420 with the reflective layer 422 and the absorption layer 423 facing the photoresist layer 413 formed on the film 412 of the semiconductor device 410. Furthermore, exposure light LTe is irradiated onto the exposure mask 420 from the side with the reflective layer 422 and the absorption layer 423, and the photoresist layer 413 of the semiconductor device 410 is exposed by the reflected light LTr reflected by the reflective layer 422.

[0118] In this configuration, the exposure mask 420 and the semiconductor device 410 are positioned such that the region AR44, where the surface height of the reflective layer 422 of the exposure mask 420 is lowest, corresponds to the region AW41, where the film 412 formed on the semiconductor device 410 is thickest. Additionally, the region AR42, where the surface height of the reflective layer 422 of the exposure mask 420 is highest, corresponds to the region AW43, where the film 412 formed on the semiconductor device 410 is thinnest.

[0119] Furthermore, this ensures that the surface height of the reflective layer 422 on the exposure mask 420 is positioned in region AR43, which is between regions AR41 and AR44, and region AW42, where the film thickness of the film 412 formed on the semiconductor device 410 is between regions AW41 and AW44, at corresponding positions.

[0120] By performing the exposure process described above in this state, the reflected light LTr is focused on any portion of the photoresist layer 413 formed in regions AW41 to AW44 of the semiconductor device 410, and all of the patterns 431p to 434p of the exposure mask 420 are transferred to the photoresist layer 413 with high precision.

[0121] According to the exposure mask 420 of the modified example 2, the reflective layer 422 further has a region AR41 adjacent to region AR42 via a step ST4r on the surface of the reflective layer 422, where the surface height from the back surface of the substrate 421 is different from the surface height in region AR42.

[0122] Thus, the exposure mask 420 can take on various configurations depending on the number of local steps LS1 to LS3 on the semiconductor device 410, as well as the number and arrangement of multiple regions AW41 to AW44 having different film thicknesses. This makes it possible to further improve the focus margin during the exposure process.

[0123] The exposure mask 420 of the modified example 2 also provides the same effects as the embodiment described above.

[0124] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0125] 1,2...wafer, 10,410...semiconductor equipment, 12,412...film, 12t,412t...workpiece layer, 13,413...photoresist layer, 20,320,420...exposure mask, 21,421...substrate, 22,422...reflective layer, 23,323,423...absorption layer, 231p,232p,233p,431p~434p...pattern, AR1,AR2,AR41~AR44...region, AW1,AW2,AW41~AW44...region, STr,ST4r~ST6r...step, LS,LS1~LS3...local step.

Claims

1. A substrate having a first main surface and a second main surface, A reflective layer provided on the first main surface side that reflects exposure light, The first main surface side, via the reflective layer, is provided with an absorbing layer having a predetermined pattern, which absorbs the exposure light, The aforementioned reflective layer is A first region whose surface height from the second main surface is the first height, The reflective layer has a second region adjacent to the first region via a first step on its surface, the second region having a surface height from the second main surface that is higher than the first height, The aforementioned absorption layer is They are provided in the first region and the second region, respectively. The first step is also provided so as to cover the entire first step. Exposure mask.

2. The aforementioned substrate is A third region having a first thickness and overlapping the first region in the height direction, The first main surface has a step that is adjacent to the third region, and has a second thickness that is greater than the first thickness, and has a fourth region that overlaps the second region in the height direction, The exposure mask according to claim 1.

3. The aforementioned reflective layer is Having equal thickness in the first region and the second region, The exposure mask according to claim 2.

4. A pattern forming method using an exposure mask according to any one of claims 1 to 3, The photoresist layer of a wafer in which a film containing the workpiece layer and a photoresist layer are formed in this order is placed opposite the surface of the exposure mask on which the reflective layer and the absorbing layer are provided. The exposure light is irradiated onto the exposure mask from the side on which the reflective layer and the absorption layer are provided, and the photoresist layer is exposed by the exposure light reflected by the reflective layer, thereby forming the pattern of the absorption layer on the photoresist layer. The aforementioned film is The exposure area where a single exposure takes place has multiple regions with different film thicknesses. When the wafer and the exposure mask are placed facing each other, The wafer and the exposure mask are arranged such that the first and second regions of the exposure mask correspond to each of the plurality of regions of the film. Pattern formation method.

5. A method for manufacturing a semiconductor device using an exposure mask according to any one of claims 1 to 3, The photoresist layer of a wafer in which a film containing the workpiece layer and a photoresist layer are formed in this order is placed opposite the surface of the exposure mask on which the reflective layer and the absorbing layer are provided. The exposure light is irradiated onto the exposure mask from the side on which the reflective layer and the absorption layer are provided, and the photoresist layer is exposed by the exposure light reflected by the reflective layer, thereby forming the pattern of the absorption layer on the photoresist layer. The aforementioned film is The exposure area where a single exposure takes place has multiple regions with different film thicknesses. When the wafer and the exposure mask are placed facing each other, The wafer and the exposure mask are arranged such that the first and second regions of the exposure mask correspond to each of the plurality of regions of the film. A method for manufacturing a semiconductor device.

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