Semiconductor device and method for manufacturing a semiconductor device

Polysilicon-based identification marks on a flat SiO2 membrane address corrosion issues in semiconductor devices, ensuring accurate image recognition and miniaturization by preventing surface irregularities.

JP7831199B2Active Publication Date: 2026-03-17DENSO CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-08-31
Publication Date
2026-03-17

AI Technical Summary

Technical Problem

The use of metal-based alignment marks in semiconductor devices leads to corrosion-induced surface irregularities, causing light diffuse reflection and reduced recognition accuracy during image recognition.

Method used

Formation of polysilicon-based identification marks on a flat SiO2 membrane to prevent corrosion and maintain recognition accuracy, using a manufacturing method that includes forming these marks after element formation and before inspection in a high-temperature environment.

Benefits of technology

Prevents unevenness in identification marks due to corrosion, maintaining recognition accuracy and enabling miniaturization of the marks, thus reducing recognition errors and device size.

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Abstract

To provide a semiconductor device capable of suppressing reduction in recognition accuracy.SOLUTION: A semiconductor device comprises: a semiconductor substrate 10 that contains silicon and the like as a main component, being formed with a transistor structure part; and an identification mark 40 that is an image recognition pattern. The identification mark 40 is formed so as to include: a polysilicon 41 formed on the semiconductor substrate 10; and a region sandwiched by the polysilicon 41. For the identification mark 40, a pattern indicating information on the semiconductor device 100 is formed by partially providing the polysilicon 41. The pattern represented by the identification mark 40 can be converted into electronic data indicating information on the semiconductor device 100.SELECTED DRAWING: Figure 3
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Description

[Technical Field]

[0001] This disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background Art]

[0002] As disclosed in Patent Document 1, there is a configuration in which an alignment mark for image recognition is provided on a semiconductor substrate. In Patent Document 1, as an alignment mark, a cross-shaped mark main body made of aluminum and a stripe-shaped fine pattern made of aluminum are formed in a peripheral region of the mark main body on a silicon substrate. [Prior Art Documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-182914 [Summary of the Invention] [Problems to be Solved by the Invention]

[0004] By the way, when a discrimination mark is formed of a metal such as aluminum, an etching process may be considered. However, in the discrimination mark, the etchant used in the etching process may remain on the surface, and the surface may be corroded to form irregularities. The discrimination mark has a problem that irregularities formed by corrosion cause irregular diffuse reflection of light, causing variation in contrast during image recognition and reducing recognition accuracy.

[0005] One object of the disclosure is to provide a semiconductor device capable of suppressing a decrease in recognition accuracy. Another object of the disclosure is to provide a method for manufacturing a semiconductor device capable of manufacturing a semiconductor device in which a decrease in recognition accuracy is suppressed. [Means for Solving the Problems]

[0006] The semiconductor device disclosed herein is A semiconductor substrate (10) on which semiconductor elements are formed, This is a pattern for image recognition, and it is on a semiconductor substrate. Flat SiO 2 membrane(11) It is characterized by having polysilicon identification marks (40, 40a) formed thereon.

[0007] According to the semiconductor device disclosed herein, the identification mark is formed of polysilicon. Therefore, the semiconductor device can prevent the identification mark from becoming uneven due to corrosion. Thus, the semiconductor device can suppress a decrease in recognition accuracy when recognizing the identification mark as an image.

[0008] Furthermore, the method for manufacturing a semiconductor device disclosed herein is A device formation step (S10) in which a semiconductor device is formed on a semiconductor substrate (10), After the element formation process, an inspection process (S40) is performed to inspect the semiconductor substrate on which the semiconductor elements have been formed in a high-temperature environment. After the element formation process and before the inspection process, the semiconductor substrate Flat SiO 2 membrane(11) The device is characterized by comprising a marking step (S20) in which an identification mark, which is a pattern for image recognition of polysilicon, is formed.

[0009] The semiconductor device manufacturing method disclosed herein includes a marking step in which an identification mark is formed using polysilicon. Therefore, the semiconductor device manufacturing method can prevent the identification mark from becoming uneven due to corrosion. Thus, the semiconductor device manufacturing method can produce a semiconductor device in which the reduction in recognition accuracy when recognizing the identification mark as an image is suppressed.

[0010] The various embodiments disclosed in this specification employ different technical means to achieve their respective objectives. The claims and the reference numerals in parentheses in this section are illustrative in their correspondence with the embodiments described later and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings. [Brief explanation of the drawing]

[0011] [Figure 1] This is a plan view showing the schematic configuration of a semiconductor device in an embodiment. [Figure 2] This is a plan view showing the schematic configuration of the identification mark in the embodiment. [Figure 3] This is a cross-sectional view along line III-III in Figure 2. [Figure 4] This is a flowchart showing the method for manufacturing a semiconductor device according to the embodiment. [Figure 5] This is a plan view showing the schematic configuration of the identification mark in a modified example. [Modes for carrying out the invention]

[0012] In the following, the embodiments for implementing this disclosure will be described with reference to the drawings.

[0013] <Semiconductor device> The semiconductor device 100 comprises at least a semiconductor substrate 10 and an identification mark 40. The semiconductor device 100 has a transistor structure formed on a semiconductor substrate 10, primarily composed of silicon, by a well-known semiconductor process. The semiconductor device 100 is an IC chip (bare chip) in which, for example, a power MOSFET or an IGBT (insulated-gate bipolar transistor) is configured as the transistor structure. In addition to the transistor structure, the semiconductor device 100 may also include a signal processing circuit section (large-scale integrated circuit) which integrates other elements such as diodes, resistors, capacitors, CMOS, and bipolar transistors. Furthermore, the semiconductor substrate 10 can also be said to have semiconductor elements formed on it.

[0014] The semiconductor device 100 has electrodes for external connection on both surfaces (both sides perpendicular to the thickness direction) of the semiconductor substrate 10. The electrodes for external connection are electrodes for electrically connecting to devices provided outside the semiconductor device 100.

[0015] More specifically, the semiconductor substrate 10 is provided with electrodes for external connection: a high-current electrode through which a large current flows, and a low-current electrode through which a current smaller than that of the high-current electrode flows. The semiconductor substrate 10 is provided with a source pad 20 as a source electrode and a drain pad as a drain electrode for the high-current electrode. As shown in Figure 1, the source pad 20 is provided on one side of the semiconductor substrate 10. The drain pad is provided on the opposite side (opposite side) of the semiconductor substrate 10.

[0016] Further, on the semiconductor substrate 10, gate pads 31 and sensor pads 32 are provided as electrodes for small currents. The gate pad 31 is electrically connected to the gate of, for example, a power MOSFET via a wiring. The sensor pad 32 is electrically connected to a temperature detection diode via a wiring. Note that the electrodes for small currents are not limited to these. The gate pad 31 and the sensor pad 32 are provided on one surface of the same semiconductor substrate 10 as the source pad 20. The gate and the temperature detection diode can be formed mainly of, for example, polysilicon.

[0017] Note that in the semiconductor device 100, for example, a terminal or a block body having a function as a heat dissipation member may be electrically connected to the source pad 20 and the drain pad. Further, the semiconductor device 100 may be covered with a sealing resin. The semiconductor device 100 can be applied, for example, as a device for PWM - controlling a load (such as a motor, etc.) incorporated in an inverter circuit of a vehicle.

[0018] Furthermore, as shown in FIGS. 1, 2, and 3, the semiconductor device 100 includes an identification mark 40 which is a pattern for image recognition. The identification mark 40 is provided, for example, on one surface side of the same semiconductor substrate 10 as the source pad 20. The identification mark 40 is formed of polysilicon 41. In other words, in the semiconductor device 100, the polysilicon 41 is formed as a step constituting the identification mark 40. Also, it can be said that in a plan view, the identification mark 40 is formed including the polysilicon 41 and the region sandwiched by the polysilicon 41. The region sandwiched by the polysilicon 41 can also be said to be a gap between the polysilicon 41.

[0019] Polysilicon 41 is provided on the SiO2 film 11 of the semiconductor substrate 10. The identification mark 40 is for image recognition based on the difference in reflectivity between the SiO2 film 11 and the polysilicon 41. Also, it can be said that the identification mark 40 is for image recognition by the shadow (edge) due to the step between the SiO2 film 11 and the polysilicon 41. Therefore, the SiO2 film 11 is preferably a flat surface in order to suppress a decrease in image recognition accuracy. Note that the polysilicon 41 can also be referred to as a polysilicon film or a polysilicon portion. Furthermore, the polysilicon 41 can also be said to be a stepped portion or a protruding portion.

[0020] Also, the polysilicon 41 is provided partially with respect to the SiO2 film 11. The identification mark 40 forms a pattern (image information) indicating information regarding the semiconductor device 100 due to the partial provision of the polysilicon 41. The image information represented by the identification mark 40 is a pattern that can be converted into electronic data indicating information regarding the semiconductor device 100. The identification mark 40 is image-recognized and read by an image recognition device or the like. And the identification mark 40 is converted into electronic data indicating information regarding the semiconductor device 100 by an image recognition device.

[0021] Information regarding the semiconductor device 100 can adopt traceability information such as the manufacturing date, lot number, element number, etc. Note that the manufacturing date is the date when the semiconductor device 100 was manufactured. The semiconductor device 100 is divided from a semiconductor wafer on which a large number of regions corresponding to the semiconductor device 100 are formed. And the lot number is an administrative number given to the semiconductor wafer on which the semiconductor device 100 was formed. The element number is a unique administrative number given to the semiconductor device 100.

[0022] In the present embodiment, as an example, an identification mark 40 in which the polysilicon 41 is formed in a two-dimensional code shape is adopted. However, the identification mark 40 is not limited to this. The recognition mark 40a can also be adopted in the shape as shown in FIG. 5. Also, the identification mark 40 can be adopted in a barcode shape.

[0023] As shown in Figure 3, the semiconductor device 100 has an SiO2 film 42 formed on a polysilicon 41. The identification mark 40 is located on the outermost surface of the polysilicon 41, excluding the SiO2 film 42. The SiO2 film 42 may also be formed on the SiO2 film 11. In other words, the SiO2 film 42 may be provided in a region sandwiched between the polysilicon 41 layers.

[0024] The identification mark 40 is provided in a region of the semiconductor substrate 10 where no transistor structure is formed. In particular, it is preferable that the identification mark 40 be provided at a position away from the corners on one surface of the semiconductor substrate 10. This is to suppress the recognition of the identification mark 40 by the corners of the semiconductor substrate 10 when performing image recognition of the identification mark 40.

[0025] <Manufacturing method for semiconductor devices> Here, the method for manufacturing the semiconductor device 100 will be explained using Figure 4. This manufacturing method involves manufacturing the semiconductor device 100 using semiconductor manufacturing equipment and inspection equipment. In this manufacturing method, steps S10 to S60 shown in Figure 4 are performed in order. Note that this manufacturing method only needs to include steps S10, S20, and S40.

[0026] First, wafer processing S10 is performed. In wafer processing S10, transistor structures are formed on the semiconductor substrate 10 by a well-known semiconductor process (device formation process). In wafer processing S10, a large number of transistor structures are formed on the semiconductor wafer. In addition, in wafer processing S10, polysilicon is formed to form gates, diodes, and identification marks 40.

[0027] A marking process S20 is performed. The marking process S20 is performed after the coating process S10 and before the chip inspection process S40. In the marking process S20, identification marks 40 are formed by partially removing the polysilicon formed on the semiconductor substrate 10 using a laser or the like. In addition, in the marking process S20, identification marks 40 are formed in each region of the semiconductor wafer that will become the semiconductor device 10.

[0028] Furthermore, this manufacturing method may include a step of varying the thickness of the polysilicon used to form the gate and diode and the polysilicon used to form the identification mark 40. In this step, for example, the thickness of the polysilicon used to form the gate and diode is made thinner than the thickness of the polysilicon used to form the identification mark 40.

[0029] A dicing and die-picking process S30 is performed. In the dicing and die-picking process S30, the semiconductor wafer is diced to divide it into regions where transistor structures and identification marks 40 are formed. In other words, in the dicing and die-picking process S30, the semiconductor wafer is divided into chip (die) shaped semiconductor devices 100. Then, in the dicing and die-picking process S30, each divided semiconductor device 100 is picked up.

[0030] In the chip inspection process S40, the semiconductor substrate 10 on which the transistor structure has been formed is inspected in a high-temperature environment after the element formation process (inspection process). In this embodiment, as an example, the chip inspection process S40 is performed after the dicing and die picking process S30. This manufacturing method allows for the formation of identification marks 40 without increasing the lead time by performing the marking process S20 during the waiting period until the temperature stabilizes before the chip inspection process S40. In the packaging process S50, the semiconductor device 100 that passed the chip inspection process S40 is subjected to processes such as connecting terminals and block bodies, and resin molding of the sealing resin. Through this process, a semiconductor package containing the semiconductor device 100 is manufactured. In the final inspection process S60, the semiconductor package undergoes a final inspection.

[0031] By the manufacturing method described above, a semiconductor device 100 and a semiconductor package containing the semiconductor device 100 can be manufactured.

[0032] <Effects> In the semiconductor device 100 with the above configuration, the identification mark 40 is formed of polysilicon 41. Therefore, the semiconductor device 100 can prevent the identification mark 40 from becoming uneven due to corrosion. Thus, the semiconductor device 100 can suppress a decrease in recognition accuracy when performing image recognition. In other words, the semiconductor device 100 can suppress the contrast variation caused by the corrosion of the surface of polysilicon 41 and resolve recognition errors of the identification mark 40.

[0033] Furthermore, the polysilicon 41 used for the identification mark 40 exhibits less conversion difference than aluminum. Therefore, the identification mark 40 can have a finer pattern than when aluminum is used for the stepped portion, enabling miniaturization. In this way, the area of ​​the identification mark 40 can be reduced, thus preventing the semiconductor device 100 from becoming larger.

[0034] The identification mark 40, as an example, uses one that includes traceability information. Therefore, if a malfunction occurs in the semiconductor device 100, its production history can be traced.

[0035] Furthermore, the above-described method for manufacturing a semiconductor device includes a marking step S20 in which an identification mark 40 is formed with polysilicon 41. Therefore, the method for manufacturing a semiconductor device can prevent the identification mark 40 from becoming uneven due to corrosion. Thus, the method for manufacturing a semiconductor device can produce a semiconductor device 100 in which a decrease in recognition accuracy when recognizing the identification mark 40 is suppressed.

[0036] This disclosure is described in accordance with embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the scope of equivalents. In addition, while various combinations and forms are shown in this disclosure, other combinations and forms that include one, more, or fewer of those elements also fall within the scope and idea of ​​this disclosure. [Explanation of Symbols]

[0037] 10...Semiconductor substrate, 11...SiO2 film, 20...Source pad, 31...Gate pad, 32...Sensor pad, 40, 40a...Identification mark, 41...Polysilicon, 42...SiO2 film, 100...Semiconductor device

Claims

1. A semiconductor substrate (10) on which semiconductor elements are formed, A semiconductor device comprising an image recognition pattern, which includes polysilicon identification marks (40, 40a) formed on a flat SiO2 film (11) of the semiconductor substrate.

2. The semiconductor device according to claim 1, wherein the identification mark is in the shape of a barcode.

3. The semiconductor device according to claim 1, wherein the identification mark is in the shape of a two-dimensional code.

4. The semiconductor device according to claim 2 or 3, wherein the identification mark is associated with traceability information.

5. The semiconductor device according to any one of claims 1 to 3, wherein an SiO2 film (42) is formed on the identification mark of the polysilicon.

6. A device formation step (S10) in which a semiconductor device is formed on a semiconductor substrate (10), After the element formation process, an inspection process (S40) is performed in which the semiconductor substrate on which the semiconductor element is formed is inspected in a high-temperature environment. A method for manufacturing a semiconductor device, comprising a marking step (S20) which, after the element formation step and before the inspection step, forms an identification mark, which is a pattern for polysilicon image recognition, on a flat SiO2 film (11) of the semiconductor substrate.

Citation Information

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