Semiconductor equipment

Abstract

To provide a semiconductor device in which switching loss can be reduced by fast switching.SOLUTION: A semiconductor device includes a transistor part including a drain electrode, a source electrode, and a gate electrode and provided on a semiconductor substrate, a gate electrode pad provided on the semiconductor substrate, a gate connection member electrically connecting between a gate terminal and the gate electrode pad, a gate circuit part electrically connecting between the gate electrode pad and the gate electrode, and a case that accommodates the transistor part, the gate electrode pad, and the gate circuit part. The gate circuit part includes a parallel circuit of a capacitor and a resistor element, a first connection member electrically connecting the capacitor to the gate electrode pad, and a second connection member electrically connecting the capacitor to the gate electrode.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to semiconductor devices.

Background Art

[0002] As a semiconductor device for power that enables high-speed switching, there is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). By reducing the output impedance of the circuit that drives the gate, the MOSFET can switch at higher speed.

[0003] On the other hand, the wiring connected to each electrode of the MOSFET has finite inductance, and due to this inductance, when high-speed switching is performed, ringing due to surge voltage or device breakdown may occur.

[0004] There is a strong demand to reduce switching losses by high-speed switching of the MOSFET.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] Embodiments provide a semiconductor device that can perform high-speed switching and reduce switching losses.

Means for Solving the Problems

[0007] The semiconductor device according to this embodiment includes a transistor section comprising: a source electrode provided on a first surface of a semiconductor substrate and electrically connected to a source terminal; a drain electrode provided on a second surface of the semiconductor substrate opposite to the first surface and electrically connected to a drain terminal; and a gate electrode provided between the source electrode and the drain electrode; a gate electrode pad provided on the first surface; a gate connecting member electrically connecting the gate electrode pad and the gate terminal; a gate circuit section provided on the first surface and electrically connected between the gate electrode pad and the gate electrode; and a case housing the transistor section, the gate electrode pad, and the gate circuit section. The gate circuit section includes a capacitor; a resistive element connected in parallel with the capacitor; a first connecting member electrically connecting one electrode of the capacitor to the gate electrode pad; and a second connecting member electrically connecting the other electrode of the capacitor to the gate electrode. [Brief explanation of the drawing]

[0008] [Figure 1] This is a schematic plan view illustrating a semiconductor device according to the first embodiment. [Figure 2] This is a schematic circuit diagram illustrating the equivalent circuit of a semiconductor device according to the first embodiment. [Figure 3] This is a schematic cross-sectional view along line AA in Figure 1. [Figure 4] This is a schematic cross-sectional view along the BB line in Figure 1. [Figure 5] Figures 5(a) to 5(c) are schematic cross-sectional views illustrating a capacitor, which is part of a semiconductor device according to a modified example of the first embodiment. [Figure 6] This is a circuit diagram for simulating the switching characteristics of a semiconductor device according to the first embodiment. [Figure 7] Figure 6 is a graph illustrating an example of the switching characteristics when the inductance value of the gate circuit is used as a parameter. [Figure 8]Figures 8(a) to 8(c) are schematic plan views illustrating a semiconductor device according to a modified example of the first embodiment. [Figure 9] Figures 9(a) to 9(c) are schematic plan views illustrating a semiconductor device according to a modified example of the first embodiment. [Figure 10] This is a schematic perspective view illustrating a semiconductor device according to the second embodiment. [Figure 11] This is a schematic cross-sectional view of a capacitor, which is part of the semiconductor device shown in Figure 10. [Figure 12] Figures 12(a) and 12(b) are schematic perspective views illustrating a semiconductor device according to a modified example of the second embodiment. [Modes for carrying out the invention]

[0009] Each embodiment of the present invention will be described below with reference to the drawings. Drawings are schematic or conceptual, and the relationships between the thickness and width of each part, as well as the ratios of the sizes of different parts, are not necessarily identical to those of reality. Even when representing the same part, the dimensions and ratios may be depicted differently in different drawings. In this specification and in each figure, elements similar to those already described are denoted by the same reference numerals, and detailed explanations are omitted as appropriate.

[0010] (First Embodiment) Figure 1 is a schematic plan view illustrating a semiconductor device according to the first embodiment. As shown in Figure 1, the semiconductor device 100 according to this embodiment comprises a transistor unit 10, a gate electrode pad 20, and a gate circuit unit 30. In this embodiment, the transistor unit 10, the gate electrode pad 20, and the gate circuit unit 30 are provided on a semiconductor substrate 1. The semiconductor substrate 1 includes, for example, Si.

[0011] As will be described later in relation to FIG. 3, on the surface side of the semiconductor substrate 1, a source electrode 112 of the transistor portion 10 is provided. A drain electrode 111 of the transistor portion 10 is provided on the back surface of the semiconductor substrate 1. The transistor portion 10 is, for example, a MOSFET.

[0012] Hereinafter, the XYZ coordinate system may be used for the description. The surface of the semiconductor substrate 1 shown in FIG. 3 is the first surface 1a, and the back surface is the second surface 1b. The XY plane is parallel to the first surface 1a. The positive direction of the Z axis is the direction from the second surface 1b toward the first surface 1a.

[0013] In the specific example of FIG. 1, the semiconductor device 100 includes a mount bed 101a, a source terminal 101b, and a gate terminal 101c. The semiconductor substrate 1 is provided on the conductive mount bed 101a. The drain electrode 111 provided on the second surface 1b of the semiconductor substrate 1 is electrically connected to the mount bed 101a via a bonding member such as solder. The mount bed 101a functions as a drain terminal of the transistor portion 10.

[0014] The source terminal 101b is provided at an interval adjacent to the mount bed 101a in the Y-axis direction. A source connection wire 102b is provided between the source terminal 101b and the source electrode 112. The source connection wire 102b electrically connects the source terminal 101b and the source electrode 112.

[0015] The length of the source connection wire 102b is sufficiently short. Preferably, a plurality of source connection wires 102b are provided. By providing a plurality of source connection wires 102b having a short length, the inductance value from the source electrode 112 to the source terminal 101b can be reduced. Instead of the source connection wire 102b, a wide ribbon-shaped connection member may be used. Since the inductance value of the connection member is smaller as the width of the connection member is wider, the inductance value of the connection member can be further reduced by making the connection member into a wide ribbon shape.

[0016] A gate terminal 101c is provided at an interval adjacent to the mounting bed 101a in the X-axis direction. A gate connection wire (gate connection member) 102c is provided between the gate terminal 101c and the gate electrode pad 20, and the gate connection wire 102c electrically connects the gate terminal 101c and the gate electrode pad 20.

[0017] The length of the gate connection wire 102c is sufficiently short. Preferably, a plurality of gate connection wires 102c are provided. By providing a plurality of gate connection wires 102c with a short length, the inductance value from the gate electrode pad 20 to the gate terminal 101c can be reduced. Instead of the gate connection wire 102c, a ribbon-shaped wide connection member may be used. Since the gate connection wire 102c is connected in series to the gate wiring 60, by reducing the inductance value of the gate connection wire 102c, the inductance value of the series circuit of the gate connection wire 102c and the gate wiring 60 can be reduced.

[0018] The mounting bed 101a on which the semiconductor substrate 1 is mounted, the source terminal 101b, the source connection wire 102b, the gate terminal 101c, and the gate connection wire 102c are housed in the case 101. The case 101 contains, for example, an epoxy resin or the like. In FIG. 1, the case 101 is represented by a two-dot chain line in order to clearly illustrate the semiconductor substrate 1, the mounting bed 101a, the source terminal 101b, the source connection wire 102b, the gate terminal 101c, and the gate connection wire 102c.

[0019] The gate circuit section 30 includes a capacitor 40, a resistance element 50, and a gate wiring 60. The gate wiring 60 includes wirings 61, 62, and 63.

[0020] In a plan view, the transistor section 10, the gate electrode pad 20, the capacitor 40, and the resistance element 50 are arranged on the semiconductor substrate 1 so as not to overlap each other. The non-overlapping arrangement of these circuit components means that the circuit components are arranged apart from each other in the plane direction (plan view) of the semiconductor substrate 1.

[0021] The capacitor 40 is positioned adjacent to the gate electrode pad 20. The resistor 50 is positioned adjacent to the gate electrode pad 20. The resistor 50 is also positioned adjacent to the transistor section 10. In the specific example shown in Figure 1, the gate electrode pad 20 and the resistor 50 are positioned on the positive Y-axis side of the capacitor 40. The gate electrode pad 20 and the resistor 50 are positioned side by side in the X-direction. The transistor section 10 is positioned on the positive Y-axis side of the gate electrode pad 20 and the resistor 50.

[0022] The wiring 63 surrounds the outer periphery of the transistor section 10. As will be described later in Figures 3 and 4, the wiring 63 is electrically connected to the gate electrode 5 of the transistor section 10, and leads the gate electrode 5 out of the transistor section 10.

[0023] The wiring (first wiring member) 61 is provided between the gate electrode pad 20 and the capacitor 40, and electrically connects the gate electrode pad 20 and the capacitor 40.

[0024] The wiring (second wiring member) 62 is provided between the transistor unit 10 and the capacitor 40, and electrically connects the wiring 63 connected to the gate electrode of the transistor unit 10 to the capacitor 40.

[0025] Wires 61, 62, and 63 have sufficiently small inductance values. Therefore, the inductance value of gate wire 60 is also sufficiently small.

[0026] The resistive element 50 is placed between the wires 61 and 62, electrically connected to the wires 61 and 62 at both ends of the resistive element 50, and connected in parallel to the capacitor 40.

[0027] The circuit configuration of the semiconductor device 100 will be described below. Figure 2 is a schematic circuit diagram illustrating the equivalent circuit of a semiconductor device according to the first embodiment. As shown in Figure 2, the equivalent circuit EC corresponding to the semiconductor device 100 in Figure 1 has a transistor section 10a, a gate electrode pad G1, and a gate circuit section 30a.

[0028] The gate circuit section 30a is connected between the gate electrode G0 and the gate electrode pad G1 of the transistor section 10a. The gate circuit section 30a includes a capacitor 40a, a resistor 50a, and gate wiring 60a. The capacitor 40a and the resistor 50a are connected in parallel. The parallel circuit of the capacitor 40a and the resistor 50a is connected in series with the gate wiring 60a.

[0029] The correspondence between the components of the semiconductor device 100 in Figure 1 and the equivalent circuit EC is as follows: Transistor section 10a corresponds to transistor section 10 in Figure 1, gate electrode pad G1 corresponds to gate electrode pad 20 in Figure 1, and gate circuit section 30a corresponds to gate circuit section 30 in Figure 1. In gate circuit sections 30 and 30a, resistor element 50a corresponds to resistor element 50 in Figure 1, capacitor 40a corresponds to capacitor 40 in Figure 1, and gate wiring 60a corresponds to gate wiring 60 in Figure 1.

[0030] The gate wiring 60a includes impedance elements 61a, 62a, and 63a. The impedance elements 61a, 62a, and 63a are connected in series. Each impedance element 61a, 62a, and 63a has an inductance value corresponding to the impedance elements 61a, 62a, and 63a.

[0031] The impedance elements 61a, 62a, and 63a correspond to the wiring 61, 62, and 63 in Figure 1, respectively. The inductance values ​​of the impedance elements 61a, 62a, and 63a correspond to the inductance values ​​of the wiring 61, 62, and 63, respectively.

[0032] The inductance value of a wire depends on its length, width, and thickness. Specifically, the shorter the wire, the smaller its inductance. The wider the wire, the smaller its inductance. The thicker the wire, the smaller its inductance. In other words, by shortening the length, widening the width, and increasing the thickness of wires 61, 62, and 63, the inductance values ​​of wires 61, 62, and 63 can be reduced, respectively.

[0033] In this embodiment, the semiconductor device 100 has a capacitor 40 connected between the gate electrode pad 20 and the gate electrode of the transistor unit 10. Since the capacitor 40 is connected in series with the gate electrode of the transistor unit 10, the capacitance value as seen from the gate electrode pad 20 is approximately the combined capacitance value of the capacitance value of the capacitor 40 and the input capacitance value of the transistor unit 10.

[0034] For example, if the capacitance value of capacitor 40 is set to be approximately the same as the input capacitance value of transistor 10, the combined capacitance value will be approximately half the input capacitance value. If the transistor 10 is driven with the same impedance as when capacitor 40 is not connected, it becomes possible to raise the gate electrode voltage to the gate threshold and then lower it from the gate threshold in about half the time compared to when capacitor 40 is not connected.

[0035] By connecting a capacitor 40 with a sufficient capacitance value in series with the gate electrode of the transistor unit 10, the switching speed of the transistor unit 10 can be increased. The resistor 50 connected in parallel with the capacitor 40 has the function of suppressing surge voltage by adjusting the switching speed after the capacitance of the capacitor 40 has been charged and discharged. The resistor 50 has a resistance value of, for example, several ohms to about 100 ohms.

[0036] In this way, when the switching speed of the transistor 10 is increased by connecting the capacitor 40 in series with the gate electrode of the transistor 10, in the operation of the semiconductor device 100 according to this embodiment, where the charging and discharging of the capacitor 40 is completed during gate driving, the rapid change in the charging and discharging current and the parasitic inductance of the gate current path cause false off or false on when the gate voltage passes a threshold, increasing switching losses.

[0037] Such erroneous off-off or on-off behavior can cause gate current and ringing in the main circuit, raising concerns about increased noise and potential device damage.

[0038] In the semiconductor device 100 according to this embodiment, the capacitor 40 and the resistor 50 are provided on the same semiconductor substrate 1 as the transistor section 10 and the gate electrode pad 20. Furthermore, the capacitor 40 and the gate electrode pad 20 are arranged adjacent to each other, and the capacitor 40 and the transistor section 10 are arranged as close together as possible to reduce the inductance value of the gate wiring 60. In addition, within the case 101, the inductance value of the gate connection wire 102c that electrically connects the gate electrode pad 20 and the gate terminal 101c is kept low to sufficiently raise the resonant frequency of the gate side of the transistor section 10 and suppress vibrations on the gate side due to resonance.

[0039] In this way, even when a capacitor 40 is connected in series with the gate electrode of the semiconductor device 100, gate-side vibrations can be suppressed, preventing an increase in surge voltage due to ringing on the drain side. Therefore, the switching speed of the transistor section 10 can be increased while reducing switching losses.

[0040] Figure 3 is a schematic cross-sectional view along line AA in Figure 1. Figure 3 shows the configuration of capacitor 40. In the following explanation, the transistor section 10 is assumed to be an n-channel MOSFET. By swapping the n-type and p-type impurities, the transistor section 10 can be made into a p-channel MOSFET.

[0041] As shown in Figure 3, the capacitor 40 includes a first capacitor electrode 42, a dielectric film 43, and a second capacitor electrode 44. The capacitor 40 is provided on an n-type drift layer 2 via an insulating layer 41. The insulating layer 41 includes, for example, a Si oxide or Si nitride. The n-type drift layer 2 is provided on a semiconductor substrate 1. The semiconductor substrate 1 contains n-type impurities. The impurity concentration of the n-type drift layer 2 is lower than the impurity concentration of the semiconductor substrate 1. The semiconductor substrate 1 is provided on a drain electrode 111.

[0042] The first capacitor electrode 42 is provided on the insulating layer 41. The first capacitor electrode 42 includes, for example, polycrystalline Si. The first capacitor electrode 42 may also include metallic materials such as Al, Cu, and Ti.

[0043] A dielectric film 43 is provided on the first capacitor electrode 42. The dielectric film 43 is also provided on the insulating layer 41. The dielectric film 43 includes, for example, Si oxide or Si nitride. The dielectric film 43 may be an insulating material having a high dielectric constant, such as Hf oxide. The materials forming the insulating layer 41 and the dielectric film 43 may be the same or different.

[0044] The second capacitor electrode 44 is provided on the dielectric film 43. The second capacitor electrode 44 is provided on the first capacitor electrode 42 via the dielectric film 43. The second capacitor electrode 44 includes, for example, polycrystalline Si. The second capacitor electrode 44 may also include metallic materials such as Al, Cu, and Ti. The materials forming the first capacitor electrode 42 and the second capacitor electrode 44 may be the same or different.

[0045] The first capacitor electrode 42 is connected to the wiring 61 shown in Figure 1, for example. The second capacitor electrode 44 is connected to the wiring 62 shown in Figure 1, for example. The first capacitor electrode 42 and the wiring 61 may be made of the same material. The second capacitor electrode 44 and the wiring 62 may be made of the same material. By making the capacitor electrodes and wiring from the same material, the manufacturing process for these components can be simplified.

[0046] The capacitance value of the capacitor 40 can be increased by reducing the thickness of the dielectric film 43 between the first capacitor electrode 42 and the second capacitor electrode 44. The capacitance value of the capacitor 40 can also be increased by using a material with a high dielectric constant for the dielectric film 43.

[0047] Figure 4 is a schematic cross-sectional view along line BB in Figure 1. Figure 4 shows the configuration of the transistor section 10. As shown in Figure 4, the transistor section 10 includes an n-type drift layer 2, a p-type base layer 3, an n-type source layer 4, a gate electrode 5, and a gate insulating film 6.

[0048] The n-type drift layer 2 is provided on the drain electrode 111. The p-type base layer 3 is provided on the n-type drift layer 2. The n-type source layer 4 is selectively provided on the p-type base layer 3.

[0049] The gate electrode 5 faces the p-type base layer 3 via the gate insulating film 6. The gate electrode 5 faces the n-type source layer 4 via the gate insulating film 6. The gate electrode 5 faces a portion of the n-type drift layer 2 via the gate insulating film 6. Multiple gate electrode electrodes 5 are provided, for example, arranged in the X direction. Although not shown, multiple gate electrode electrodes 5 are also arranged in the Y direction, for example. In a plan view, the gate electrode electrodes 5 are arranged, for example, in a matrix.

[0050] The gate electrode 5 contains, for example, polycrystalline Si. The gate insulating film 6 contains, for example, Si oxide.

[0051] In the specific example shown in Figure 4, the gate electrode 5 has, for example, a cylindrical shape extending in the Z direction, and the shape of this cylinder in plan view is, for example, circular, elliptical, square, or hexagonal. A field plate structure 7 is provided inside the cylindrical shape formed by the gate electrode 5. The field plate structure 7 includes a field plate electrode (conductor) 7a and an insulating film 7b1.

[0052] In the field plate structure 7, the field plate electrode 7a faces the gate electrode 5 via an insulating film (second insulating film) 7b2. The field plate electrode 7a extends further downward from the gate electrode 5, and the insulating film (first insulating film) 7b1 surrounds the field plate electrode 7a. Below the gate electrode 5, the field plate electrode 7a faces the n-type drift layer 2 via the insulating film 7b1.

[0053] The field plate electrode 7a contains, for example, polycrystalline Si. The field plate electrode 7a can be formed from the same material as the gate electrode 5. The insulating films 7b1 and 7b2 contain, for example, Si oxide.

[0054] The interlayer insulating film 8 is provided on the gate electrode 5 and the field plate electrode 7a. The interlayer insulating film 8 covers a portion of the n-type source layer 4.

[0055] The source electrode 112 is provided on the interlayer insulating film 8. The source electrode 112 is provided on the n-type source layer 4 and the p-type base layer 3, which are not covered by the interlayer insulating film 8, and is electrically connected to the n-type source layer 4 and the p-type base layer 3.

[0056] The resistive element 50, although not shown in the figure, is provided on the n-type drift layer 2 via an insulating layer and contains, for example, polycrystalline Si containing n-type or p-type impurities. The resistive element 50 may also be, for example, a p-type semiconductor layer provided on the n-type drift layer 2. The resistive element 50 may also be, for example, a film provided on the n-type drift layer 2 via an insulating layer and containing, for example, tungsten, aluminum, nickel, titanium, etc. The resistive element 50 may also be, for example, a high-resistance film provided on the n-type drift layer 2 via an insulating layer and using, for example, SiN or semi-insulating polycrystalline silicon (SIPOS).

[0057] In addition to the above, the following modifications can be applied to the capacitor. Figures 5(a) to 5(c) are schematic cross-sectional views illustrating a capacitor, which is part of a semiconductor device according to a modified example of the first embodiment. As shown in Figure 5(a), the modified capacitor 140 includes a first capacitor electrode 142, a dielectric film 143, and a second capacitor electrode 144.

[0058] The first capacitor electrode 142 is provided on the n-type drift layer 2. The first capacitor electrode 142 is a semiconductor layer containing p-type impurities. The impurity concentration of the first capacitor electrode 142 is approximately equal to, for example, the impurity concentration of the p-type base layer 3 of the transistor section 10 shown in Figure 4.

[0059] A dielectric film 143 is provided on the first capacitor electrode 142. In the specific example shown in Figure 5(a), the first capacitor electrode 142 is selectively provided on the n-type drift layer 2, and the dielectric film 143 is also provided on the n-type drift layer 2. The dielectric film 143 includes, for example, a Si oxide or Si nitride. The dielectric film 143 may also be an insulating material having a high dielectric constant, such as an Hf oxide.

[0060] The second capacitor electrode 144 is provided on the dielectric film 143. The second capacitor electrode 144 is provided on the first capacitor electrode 142 via the dielectric film 143. The second capacitor electrode 144 includes, for example, polycrystalline Si. The first capacitor electrode 142 may be made of a metallic material such as Al, Cu, or Ti.

[0061] In the specific example shown in Figure 5(a), an insulating layer 145 is provided on the second capacitor electrode 144.

[0062] In the modified capacitor 140 shown in Figure 5(a), the first capacitor electrode 142 can be formed simultaneously with the p-type base layer 3 of the transistor section 10 shown in Figure 4 by making the first capacitor electrode 142 a semiconductor layer containing p-type impurities.

[0063] As shown in Figure 5(b), another modified capacitor 140a includes a first capacitor electrode 145a, a dielectric film 147b2, and a second capacitor electrode 147a1. The first capacitor electrode 145a faces the n-type drift layer 2 via an insulating film (third insulating film) 146a. The first capacitor electrode 145a has a cylindrical shape, for example, extending in the Z direction. The cylindrical shape, in plan view, is, for example, circular, elliptical, square, or hexagonal.

[0064] Multiple first capacitor electrodes 145a are provided, arranged, for example, in the X direction. Although not shown in the figure, multiple first capacitor electrodes 145a are also arranged in the Y direction. In a plan view, the first capacitor electrodes 145a are arranged, for example, in a matrix.

[0065] The second capacitor electrode 147a1 is provided inside the cylindrical first capacitor electrode 145a, extending in the Z direction from the surface side of the n-type drift layer 2. The second capacitor electrode 147a1 faces the first capacitor electrode 145a via the dielectric film 147b2.

[0066] In the specific example shown in Figure 5(b), the second capacitor electrode 147a1 extends below the first capacitor electrode 145a. Below the first capacitor electrode 145a, the insulating film (fourth insulating film) 147b1 surrounds the second capacitor electrode 147a1. Below the first capacitor electrode 145a, the second capacitor electrode 147a1 faces the n-type drift layer 2 via the dielectric film 147b2.

[0067] An interlayer insulating film 148a is provided on the first capacitor electrode 145a, the dielectric film 147b2, and the second capacitor electrode 147a1. The interlayer insulating film 148a is also provided on the n-type drift layer 2. The interlayer insulating film 148a includes, for example, a Si oxide or Si nitride.

[0068] The first capacitor electrode 145a includes, for example, polycrystalline Si. The first capacitor electrode 145a can be formed from the same material as the gate electrode 5. The second capacitor electrode 147a1 includes, for example, polycrystalline Si. The second capacitor electrode 147a1 can be formed from the same material as the field plate electrode 7a.

[0069] In this modified example, the first capacitor electrode 145a can be formed using the same process as the gate electrode 5 by using the same material as the gate electrode 5. Furthermore, the second capacitor electrode 147a1 can be formed using the same process as the field plate electrode 7a by using the same material as the field plate electrode 7a.

[0070] Furthermore, the second capacitor electrode 147a1 and the insulating film 147b1 constitute the structure 147a, and the formation process of the structure 147a can be shared with the formation process of the field plate structure 7.

[0071] As shown in Figure 5(c), the capacitor 140b of this modified example includes a first capacitor electrode 145a, a dielectric film 147b2, and a second capacitor electrode 147a1. In this modified example, the capacitor 140b differs from the capacitor 140a shown in Figure 5(b) in that it further includes a p-type base layer 143b, an interlayer insulating film 148b, and a source electrode 112.

[0072] The p-type base layer 143b is provided on the n-type drift layer 2. The first capacitor electrode 145a faces the p-type base layer 143b via the insulating film 146a. The first capacitor electrode 145a also faces a portion of the n-type drift layer 2 via the insulating film 146a.

[0073] The p-type base layer 143b is a semiconductor layer containing p-type impurities. The impurity concentration of the p-type base layer 143b is approximately equal to, for example, the impurity concentration of the p-type base layer 3 of the transistor section 10 shown in Figure 4.

[0074] The interlayer insulating film 148b is provided on the first capacitor electrode 145a, the dielectric film 147b2, and the second capacitor electrode 147a1. The interlayer insulating film 148b is provided on a portion of the p-type base layer 143b.

[0075] The interlayer insulating film 148b includes, for example, a Si oxide or Si nitride. The interlayer insulating film 148b can be formed from the same material as the interlayer insulating film 8 of the transistor section 10 shown in Figure 4.

[0076] The source electrode 112 is provided on the interlayer insulating film 148b. The source electrode 112 is provided on the p-type base layer 143b through an opening in the interlayer insulating film 148b and is electrically connected to the p-type base layer 143b.

[0077] In this modified example, by connecting the p-type base layer 143b and the second capacitor electrode 147a1 to the source electrode 112, the first capacitor electrode 145a faces the p-type base layer 143b on one side and the second capacitor electrode 147a1 on the other side. Therefore, the capacitance value of capacitor 140b can be made larger than that of capacitor 140a shown in Figure 5(b).

[0078] Furthermore, in this modified example, by making the impurity concentration of the p-type base layer 143b equal to that of the p-type base layer 3, the p-type base layers 143b and 3 can be formed in the same process. By forming the interlayer insulating film 148b with the same material as the interlayer insulating film 8, the interlayer insulating films 148b and 8 can be formed in the same process.

[0079] As shown in the specific example, the transistor 10, capacitor 40, and resistor 50 are provided on an n-type drift layer 2 provided on a semiconductor substrate 1. The gate electrode 5 of the transistor 10 can be electrically connected to the gate electrode pad 20, capacitor 40, resistor 50, and gate wiring 60 on the semiconductor device 100.

[0080] By appropriately arranging the transistor section 10, gate electrode pad 20, capacitor 40, and resistor element 50 in a plan view, the length of the gate wiring 60 can be made sufficiently short. As a result, the inductance value of the gate wiring 60 can be kept low, suppressing vibrations in the gate circuit of the transistor section 10 and preventing ringing on the drain side.

[0081] The operation and effects of the semiconductor device 100 according to this embodiment will be described. Figure 6 is a circuit diagram for simulating the switching characteristics of the semiconductor device according to the first embodiment. Figure 7 is a graph showing an example of the switching characteristics of the circuit in Figure 6, where the inductance value of the gate circuit is used as a parameter. The dashed line in Figure 6 represents the equivalent circuit EC shown in Figure 2. In Figure 6, transistor Q1 corresponds to the transistor section 10 in Figure 1, capacitor C1 corresponds to capacitor 40 in Figure 1, and resistor R1 corresponds to resistor 50 in Figure 1. Also, in Figure 6, the inductance value of inductance L2 corresponds to the inductance value of the series circuit between gate wiring 60 and gate connection wire 102c in Figure 1. Inductance L1 represents the inductance value of the wiring between the gate terminal 101c of semiconductor device 100 and signal generator SG.

[0082] The simulation circuit in Figure 6 represents a drive circuit that drives an inductive load L4. Transistor Q2, connected across the inductive load L4, is configured to function as a flywheel diode that shorts its gate-source and clamps the voltage caused by the back electromotive force generated when transistor Q1 is off.

[0083] Inductance L3 represents the inductance of the wiring between the source terminal of transistor Q1 and the inductive load L4. When transistor Q1 is off, the voltage obtained by multiplying the time variation of the current flowing through inductance L3 by the inductance value of inductance L3 is superimposed on the power supply voltage Vdd in a surge manner and applied between the drain and source of transistor Q1.

[0084] Resistor R0 represents the output resistance of the signal generator SG. The smaller the resistance value of resistor R0, the larger the current that can flow between the signal generator SG and the equivalent circuit EC. By adjusting the resistance value of resistor R0, the switching speed of transistor Q1 can be adjusted.

[0085] When transistor Q1 drives an inductive load, as described above, a surge voltage is superimposed on the power supply voltage when transistor Q1 is off. Below, the maximum peak voltage applied between the drain and source of transistor Q1 when it is off is defined as the surge voltage Vsurge.

[0086] The vertical axis of Figure 7 represents the switching loss Eoff of transistor Q1 when it is off, expressed in energy. The horizontal axis of Figure 7 represents the surge voltage Vsurge applied between the drain and source of transistor Q1. In the plot of the graph in Figure 7, the off time of transistor Q1 is changed by varying the output resistance R0 of the signal generator SG.

[0087] Figure 7 plots the Vsurge and Eoff for different capacitance values ​​of capacitor C1, with the inductance value L of the series circuit of inductors L1 and L2 as the parameter. In each plot, "◆" represents the case where L=15nH, "×" represents the case where L=8nH, and "△" represents the simulation result for the case where L=6nH. "●" is the plot for when the ends of capacitor C1 are short-circuited, as in the conventional product, and R0 is changed.

[0088] As shown in the plot of "●" in Figure 7, the smaller the resistance value on the signal generator SG side, the faster the switching speed when off, and the lower the switching loss Eoff. On the other hand, as the rate of change of time of the current flowing through the load-side inductance L3 of transistor Q1 increases, the surge voltage Vsurge increases.

[0089] By enabling capacitor C1, transistor Q1 is switched faster than the "●" plot, and the switching loss Eoff is measured.

[0090] In the plots marked "◆", "×", and "△", a resonant circuit is formed on the gate side of transistor Q1 by the inductance values ​​of the wiring inductances L1 and L2 and the capacitance value on the gate side of transistor Q1. Due to this resonant circuit, the gate side of transistor Q1 vibrates, and this vibration causes the drain side of transistor Q1 to vibrate as well, resulting in ringing. The ringing on the drain side of transistor Q1 causes the drain current and drain-source voltage to cross repeatedly, increasing the switching loss Eoff.

[0091] In Figure 7, the plot marked with "◆" for an inductance value of 15nH shows that when the output resistance of the signal generator SG is sufficiently small, the surge voltage Vsurge is mainly generated by the drain inductance L3 of transistor Q1. In this simulation result, the maximum surge voltage Vsurge is approximately 110V.

[0092] In the plot marked "◆", as the resistance value R0 on the signal generator SG side is gradually increased, the surge voltage Vsurge does not decrease much, and the switching loss Eoff is also larger than in the plot marked "●". This is because ringing occurs on the drain side of transistor Q1 due to a resonant circuit formed by the inductance value on the gate side of transistor Q1, the capacitance value of capacitor C1, and the parasitic capacitance on the gate side of transistor Q1.

[0093] In the "×" plot for the inductance value of 8nH, the surge voltage Vsurge decreases as the resistance value of resistor R0 on the signal generator SG side decreases. The "×" plot shows that the off-switching loss Eoff is lower than the "●" plot for the same surge voltage Vsurge.

[0094] In this way, by sufficiently reducing the inductance value on the gate side of transistor Q1, it is possible to suppress gate-side vibrations and prevent ringing on the drain side. By preventing ringing on the drain side, high-speed switching of transistor Q1 becomes possible, and the switching loss Eoff due to high-speed switching can be reduced.

[0095] In the "△" plot for the inductance value of 6nH, the gate-side oscillation of transistor Q1 is further suppressed. This indicates that the drain-side ringing of transistor Q1 is further suppressed, and the switching loss Eoff is reduced.

[0096] In this way, by inserting capacitor C1 as the gate circuit and keeping the inductance value of the gate-side wiring low, ringing on the drain side can be prevented, enabling high-speed switching operation of the transistor and reducing switching losses.

[0097] The semiconductor device 100 according to this embodiment is configured based on the results of the simulation described above. Specifically, in the semiconductor device 100, the capacitor 40 and the resistive element 50 form a parallel circuit and are electrically connected between the gate electrode 5 of the transistor unit 10 and the gate electrode pad 20 via gate wiring 60.

[0098] Since capacitor 40 is connected in series with the gate input capacitance of transistor section 10, the capacitance value viewed from the gate terminal 101c side decreases. As a result, the effective driving capability of the driving circuit is improved, and the switching speed of transistor section 10 can be increased.

[0099] The transistor section 10, gate electrode pad 20, capacitor 40, and resistor 50 are appropriately arranged on the same semiconductor substrate 1. Therefore, the parallel circuit of the capacitor 40 and resistor 50 electrically connects the gate electrode 5 of the transistor section 10 and the gate electrode pad 20 over a sufficiently short distance. As a result, the inductance value of the gate wiring 60 is kept sufficiently small. In addition, by making the gate connection wire 102c sufficiently short and providing multiple thick wires, the inductance value of the gate connection wire 102c can also be kept sufficiently small.

[0100] As a result, even when a capacitor 40 is connected between the gate electrode pad 20 and the gate electrode 5 of the transistor section 10 to enable high-speed switching of the transistor section 10, gate-side vibrations are suppressed and drain-side ringing is prevented. By preventing ringing that occurs on the drain side of the transistor section 10, switching losses can be reduced.

[0101] For example, by making the wiring between the drive circuit for the semiconductor device 100, such as a signal generator, and the gate terminal 101c of the semiconductor device 100 sufficiently short and thick, it is possible to reduce the inductance value of this wiring to a sufficiently small value, approaching zero. When the sum of the inductance value of this wiring and the inductance value of the series circuit between the gate connection wire 102c of the semiconductor device 100 and the gate wiring 60 is set to 8nH or less, it becomes possible to reduce switching losses by enabling high-speed switching.

[0102] (modified version) From the viewpoint of shortening the length of the gate wiring and reducing the inductance value of the wiring, the transistor section, gate electrode pad, capacitor, and resistor elements can be appropriately arranged in a plan view. Figures 8(a) to 9(c) are schematic plan views illustrating a semiconductor device according to a modified example of the first embodiment. As shown in Figure 8(a), in the modified semiconductor device 100a, the capacitor 40 is positioned adjacent to the gate electrode pad 20. The capacitor 40 is also positioned adjacent to the transistor section 10. The resistive element 50 is positioned between the transistor section 10 and the gate electrode pad 20, and is positioned adjacent to both the transistor section 10 and the gate electrode pad 20. The gate wiring 60a includes wirings 61a1, 61a2, 62a1, and 62a2.

[0103] The wiring 63a is provided so as to surround the outer circumference of the transistor section 10.

[0104] Wiring 61a1 is provided between the gate electrode pad 20 and the capacitor 40, electrically connecting the gate electrode pad 20 and the capacitor 40. Wiring 62a1 is provided between the transistor section 10 and the capacitor 40, electrically connecting wiring 63a and the capacitor 40.

[0105] Wiring 61a2 is provided between the gate electrode pad 20 and one end of the resistor 50, electrically connecting the gate electrode pad 20 and one end of the resistor 50. Wiring 62a2 is provided between the transistor section 10 and the other end of the resistor 50, electrically connecting wiring 63a and the other end of the resistor 50.

[0106] Wiring 61a1 allows for an electrical connection between the gate electrode pad 20 and the capacitor 40 with a sufficiently short length by arranging the gate electrode pad 20 and the capacitor 40 adjacent to each other. Wiring 62a1 allows for an electrical connection between wiring 63a and the capacitor 40 with a sufficiently short length by arranging the transistor section 10 and the capacitor 40 adjacent to each other. By making the lengths of wirings 61a1 and 62a1 sufficiently short, the inductance values ​​of wirings 61a1 and 62a1 can be reduced.

[0107] By arranging the gate electrode pad 20 and the resistive element 50 adjacent to each other, wiring 61a2 can electrically connect the gate electrode pad 20 and one end of the resistive element 50 with a sufficiently short length. By arranging the transistor section 10 and the resistive element 50 adjacent to each other, wiring 62a2 can electrically connect wiring 63a and the other end of the resistive element 50 with a sufficiently short length. By making the lengths of wirings 61a2 and 62a2 sufficiently short, the inductance values ​​of wirings 61a2 and 62a2 can be reduced.

[0108] The inductance value due to wiring can be reduced by shortening the length of the wiring, and it can also be reduced by widening the width of the wiring. For example, in semiconductor device 100a, the parasitic inductance of wirings 61a1 and 62a2 can be reduced by making the widths of wirings 61a1 and 62a2 sufficiently wide according to the shape of the gate electrode pad 20. In addition, the inductance values ​​of wirings 62a1 and 62a2 can be reduced by making the widths of wirings 62a1 and 62a2 sufficiently wide according to the shape of the transistor section 10.

[0109] As shown in Figure 8(b), in the semiconductor device 100b of this modified example, the gate electrode pad 20 is positioned between the transistor section 10 and the capacitor 40, adjacent to both the transistor section 10 and the capacitor 40. The resistive element 50 is positioned between the gate electrode pad 20 and the transistor section 10 and the capacitor 40, adjacent to both the transistor section 10 and the capacitor 40. The gate electrode pad 20 and the resistive element 50 are also positioned adjacent to each other. The gate wiring 60b includes wirings 61b1, 61b2, 62b1, 62b2, and 63b.

[0110] The wiring 63b is provided so as to surround the outer circumference of the transistor section 10.

[0111] Wiring 61b1 is provided between the gate electrode pad 20 and the capacitor 40, electrically connecting the gate electrode pad 20 and the capacitor 40. Wiring 62b1 is provided between the capacitor 40 and the resistor element 50, electrically connecting the capacitor 40 and one end of the resistor element 50.

[0112] Wiring 61b2 is provided between the gate electrode pad 20 and the resistive element 50, electrically connecting the gate electrode pad 20 to the other end of the resistive element 50. Wiring 62b2 is provided between the transistor section 10 and the resistive element 50, electrically connecting wiring 63b to one end of the resistive element 50.

[0113] Wiring 61b1 allows for a sufficiently short connection between the gate electrode pad 20 and the capacitor 40 by arranging them adjacent to each other. Wiring 62b1 allows for a sufficiently short connection between the capacitor 40 and the resistor 50 by arranging them adjacent to each other. By making the lengths of wirings 61b1 and 62b1 sufficiently short, the inductance values ​​of wirings 61b1 and 62b1 can be reduced.

[0114] Wiring 61b2 allows for a sufficiently short connection between the gate electrode pad 20 and the resistor 50 by arranging them adjacent to each other. Wiring 62b2 allows for a sufficiently short connection between wire 63b and the resistor 50 by arranging them adjacent to each other. By making the lengths of wires 61b2 and 62b2 sufficiently short, the inductance values ​​of wires 61b2 and 62b2 can be reduced.

[0115] For example, by making the widths of the wirings 61b1 and 61b2 sufficiently wide according to the shape of the gate electrode pad 20, the inductance values ​​of the wirings 61b1 and 61b2 can be reduced.

[0116] As shown in Figure 8(c), in the modified semiconductor device 100c, the gate electrode pad 20 is positioned between the transistor section 10 and the capacitor 40, adjacent to both the transistor section 10 and the capacitor 40. The resistive element 50 is positioned between the transistor section 10 and the capacitor 40, adjacent to both the transistor section 10 and the capacitor 40. The resistive element 50 is not adjacent to the gate electrode pad 20. The gate wiring 60c includes wirings 61c1, 61c2, 62c1, 62c2, and 63c.

[0117] The wiring 63c is provided so as to surround the outer circumference of the transistor section 10.

[0118] Wiring 61c1 is provided between the gate electrode pad 20 and the capacitor 40, electrically connecting the gate electrode pad 20 and the capacitor 40. Wiring 62c1 is provided between the capacitor 40 and the resistor 50, electrically connecting the capacitor 40 and one end of the resistor 50.

[0119] Wiring 61c2 is provided between the capacitor 40 and the resistor 50, electrically connecting the capacitor 40 to the other end of the resistor 50. Wiring 62c2 is provided between the transistor section 10 and the resistor 50, electrically connecting wiring 63c to one end of the resistor 50. In this modified example, since the resistor 50 is not adjacent to the gate electrode pad 20, the resistor 50 is electrically connected to the gate electrode pad 20 via wiring 61c2, the capacitor 40, and wiring 61c1. Also, since the capacitor 40 is not adjacent to the transistor section 10, the capacitor 40 is electrically connected to wiring 63c via wiring 62c1, the resistor 50, and wiring 62c2.

[0120] Wiring 61c1 allows for a sufficiently short connection between the gate electrode pad 20 and the capacitor 40 by arranging them adjacent to each other. Wiring 62c1 allows for a sufficiently short connection between the capacitor 40 and the resistor 50 by arranging them adjacent to each other. By making the lengths of wirings 61c1 and 62c1 sufficiently short, the inductance values ​​of wirings 61c1 and 62c2 can be reduced.

[0121] Wiring 61c2 allows the capacitor 40 and the resistor 50 to be connected with a sufficiently short length by arranging them adjacent to each other. Wiring 62c2 allows the wire 63c and the resistor 50 to be connected with a sufficiently short length by arranging them adjacent to each other. By making the lengths of wires 61c2 and 62c2 sufficiently short, the inductance values ​​of wires 61c2 and 62c2 can be reduced.

[0122] For example, by making the widths of the wirings 61c1 and 61c2 sufficiently wide according to the shape of the gate electrode pad 20, the inductance values ​​of the wirings 61c1 and 61c2 can be reduced, respectively.

[0123] In this modified example, the capacitor 40 is connected to the wiring 63c via the wiring 62c1, the resistor 50, and the wiring 62c2. Therefore, it is preferable to shorten the length between the transistor section 10 and the capacitor 40 to reduce the inductance value due to the resistor 50.

[0124] As shown in Figure 9(a), in the modified semiconductor device 100d, the gate electrode pad 20 is positioned between the transistor section 10 and the capacitor 40, adjacent to both the transistor section 10 and the capacitor 40. Part of the capacitor 40 is positioned between the transistor section 10 and the resistor 50, adjacent to both the transistor section 10 and the resistor 50. The remaining part of the capacitor 40 is positioned between the gate electrode pad 20 and the resistor 50, adjacent to both the gate electrode pad 20 and the resistor 50. The gate wiring 60d includes wirings 61d1, 61d2, 62d1, 62d2, and 63d.

[0125] The wiring 63d is provided so as to surround the outer circumference of the transistor section 10.

[0126] Wiring 61d1 is provided between the gate electrode pad 20 and the capacitor 40, electrically connecting the gate electrode pad 20 and the capacitor 40. Wiring 62d1 is provided between the transistor section 10 and the capacitor 40, electrically connecting wiring 63d and the capacitor 40.

[0127] Wiring 61d2 is provided between the capacitor 40 and the resistor 50, electrically connecting the capacitor 40 and one end of the resistor 50. Wiring 62d2 is provided between the capacitor 40 and the resistor 50, electrically connecting the capacitor 40 and the other end of the resistor 50. In this modified example, since the resistor 50 is not adjacent to the gate electrode pad 20, one end of the resistor 50 is electrically connected to the gate electrode pad 20 via wiring 61d2, the capacitor 40, and wiring 61d1. Also, since the resistor 50 is not adjacent to the transistor section 10, the other end of the resistor 50 is electrically connected to wiring 63d via wiring 62d2, the capacitor 40, and wiring 62d1.

[0128] By arranging the gate electrode pad 20 and the capacitor 40 adjacent to each other, wiring 61d1 can electrically connect the gate electrode pad 20 and the capacitor 40 with a sufficiently short length. By arranging the transistor section 10 and the capacitor 40 adjacent to each other, wiring 62d1 can electrically connect wiring 63d and the capacitor 40 with a sufficiently short length. By making the lengths of wirings 61d1 and 62d1 sufficiently short, the inductance values ​​of wirings 61d1 and 62d1 can be reduced.

[0129] By arranging the capacitor 40 and the resistor 50 adjacent to each other, the wirings 61d2 and 62d2 can connect the capacitor 40 and the resistor 50 with a sufficiently short length. By making the length of the wirings 61d2 and 62d2 sufficiently short, the inductance value of the wirings 61d2 and 62d2 can be reduced.

[0130] For example, the inductance value of the wiring can be reduced by making the width of the wiring 61d1 sufficiently wide according to the shape of the gate electrode pad 20. Similarly, the inductance value can be reduced by making the width of the wiring 62d2 sufficiently wide according to the shapes of the transistor section 10 and the capacitor 40.

[0131] In this modified example, one end of the resistive element 50 is electrically connected to the gate electrode pad 20 via one of the capacitor electrodes of the capacitor 40. The other end of the resistive element 50 is electrically connected to the wiring 63d via the other electrode of the capacitor 40. As described above in Figures 3 and 5(a) to 5(c), the width between the two capacitor electrodes is sufficiently wide, and the inductance value of the capacitor electrodes is sufficiently small. As a result, the inductance value between the resistive element 50 and the gate electrode pad 20 can be sufficiently small, and the inductance value between the resistive element 50 and the wiring 63d can also be sufficiently small.

[0132] As shown in Figure 9(b), in the modified semiconductor device 100e, the transistor 10 and the capacitor 40 are arranged adjacent to each other. The gate electrode pad 20 and the resistive element 50 are provided on the capacitor 40. The gate wiring 60e includes wirings 62e and 63e.

[0133] Wiring 62e is provided between the transistor section 10 and the capacitor 40, and electrically connects wiring 63e to the capacitor 40. By arranging the transistor section 10 and the capacitor 40 adjacent to each other, wiring 63e can be electrically connected to the capacitor 40 with a sufficiently short length. By making the length of wiring 62e sufficiently short, the inductance value of wiring 62e can be sufficiently reduced. By making the width of wiring 62e sufficiently wide according to the shape of the transistor section 10, the inductance value of wiring 62e can be sufficiently reduced.

[0134] The electrical connection between the gate electrode pad 20 and the capacitor 40 is made by connecting the gate electrode pad 20 to one capacitor electrode of the capacitor 40, beneath the gate electrode pad 20. The electrical connection between the capacitor 40 and the resistor element 50 is made by connecting one end of the resistor element 50 to one capacitor electrode of the capacitor 40, beneath the resistor element 50, and connecting the other end of the resistor element 50 to the other capacitor electrode of the capacitor 40. This allows the inductance value of the connection between the gate electrode pad 20 and the capacitor 40 to be sufficiently small, and also allows the inductance value of the connection between the capacitor 40 and the resistor element 50 to be sufficiently small.

[0135] As shown in Figure 9(c), in the modified semiconductor device 100f, the transistor section 10 and the gate electrode pad 20 are arranged adjacent to each other. The capacitor 40 and the resistor 50 are arranged side by side. The gate electrode pad 20 surrounds the parallel arrangement of the capacitor 40 and the resistor 50. The gate wiring 60f includes wirings 62f and 63f.

[0136] Wiring 63f is provided so as to surround the outer periphery of the transistor section.

[0137] Wiring 62f is provided between the transistor section 10 and the capacitor 40, and electrically connects wiring 63f to one of the capacitor electrodes of the capacitor 40. A gate electrode pad 20 is provided on wiring 62f via an insulating layer, and wiring 62f and the gate electrode pad 20 are electrically isolated.

[0138] The resistive element 50 is electrically connected to one capacitor electrode of the capacitor 40 at one end and to the other capacitor electrode of the capacitor 40 at the other end. The other capacitor electrode of the capacitor 40 is connected to the gate electrode pad 20 below the gate electrode pad 20.

[0139] In this modified example, the other capacitor electrode of the capacitor 40 is made sufficiently wide, and the gate electrode pad 20 is provided on the sufficiently wide capacitor electrode to establish an electrical connection between the capacitor electrode and the gate electrode pad 20. This makes it possible to sufficiently reduce the inductance value of the connection between the gate electrode pad 20 and the capacitor 40.

[0140] In this way, even when a capacitor 40 is provided to increase the switching speed of the transistor section 10, the inductance value based on the interconnections can be made sufficiently small. Therefore, gate vibration caused by the capacitance of the capacitor 40, the parasitic capacitance of the transistor section 10, and the inductance value on the gate side of the transistor section 10 can be suppressed, and the occurrence of ringing on the drain side can be prevented. By preventing ringing on the drain side, switching losses can be reduced.

[0141] (Second embodiment) In this embodiment, instead of using capacitors and resistors formed using the same semiconductor manufacturing process as the transistor section, capacitors and resistors formed using a different manufacturing process than the transistor section are used. Figure 10 is a schematic perspective view illustrating a semiconductor device according to the second embodiment. As shown in Figure 10, the semiconductor device 200 according to this embodiment includes a transistor section 210 and a gate circuit section 230. The transistor section 210 includes a drain electrode 211, a source electrode 212, and a gate electrode pad 220. The gate circuit section 230 includes a capacitor 240 and a resistive element 250.

[0142] In the specific example shown in Figure 10, the transistor section 210 is mounted on a conductive mount bed 201a. The back surface of the transistor section 210 is electrically connected to the mount bed 201a via a bonding material such as solder. The mount bed 201a functions as the drain terminal of the semiconductor device 200. Conductive source terminals 201b and gate terminals 201c are located next to the mount bed 201a. A source connection wire 202b is provided between the source terminal 201b and the source electrode 212 of the transistor section 210, electrically connecting the source terminal 201b and the source electrode 212. A gate connection wire 202c is provided between the gate terminal 201c and the gate circuit section 230, electrically connecting the gate terminal 201c and the gate circuit section 230.

[0143] The mount bed 201a, which houses the gate circuit section 230 and the transistor section 210, the source terminal 201b, the source connection wire 202b, the gate terminal 201c, and the gate connection wire 202c are housed in a case 201. The case 201 is made of, for example, epoxy resin. In Figure 10, the case 201 is represented by a dashed line to clearly illustrate the gate circuit section 230, the transistor section 210, the mount bed 201a, the source terminal 201b, the source connection wire 202b, the gate terminal 201c, and the gate connection wire 202c.

[0144] In the transistor section 210, the source electrode 212 and the gate electrode pad 220 are provided on the surface opposite to the surface connected to the mount bed 201a. The source electrode 212 and the gate electrode pad 220 are electrically isolated. The configuration of the transistor section 210 can be the same as the specific example described in relation to Figure 4.

[0145] Figure 11 is a schematic cross-sectional view of a capacitor, which is part of the semiconductor device shown in Figure 10. As shown in Figure 11, the capacitor 240 includes a first capacitor electrode 240a, a dielectric film 243, and a second capacitor electrode 244. The capacitor 240 is placed on the gate electrode pad 220 via a bonding member 261 such as solder. The first capacitor electrode 240a is provided on a conductive layer 242. Multiple trenches are formed in the first capacitor electrode 240a, and a dielectric film 243 is provided on the wall surface of each of the multiple trenches. The second capacitor electrode 244 is provided on the first capacitor electrode 240a via the dielectric film 243.

[0146] The capacitor 240 is formed using a different manufacturing process than the transistor section 210, allowing for a sufficiently large capacitance value per unit area. The capacitor 240 is, for example, a silicon capacitor. A silicon capacitor can have fine trenches and other structures formed using a different manufacturing process than the transistor section 210, thereby enabling a sufficiently large capacitance.

[0147] In a silicon capacitor, the first capacitor electrode 240a contains, for example, Si containing n-type impurities. The dielectric film 243 contains, for example, Si oxide. The second capacitor electrode 244 contains, for example, polycrystalline Si containing p-type impurities. The conductive layer 242 contains, for example, a metal that is ohmic-connected to the first capacitor electrode 240a.

[0148] In capacitor 240, the thickness of the first capacitor electrode 240a and the conductive layer 242 is sufficiently thin, and their inductance values ​​can be made almost zero. Furthermore, the thickness of the bonding member 261 between the first capacitor electrode 240a and the gate electrode pad 220 can be made sufficiently thin to bring the inductance value close to zero. Therefore, in semiconductor device 200 according to this embodiment, the inductance value of the wiring between the gate electrode pad 220 and the gate circuit section 230 can be made almost zero.

[0149] The resistive element 250 is formed by a different manufacturing process than the transistor section 210. The resistive element 250 is realized, for example, by introducing a low concentration of n-type impurities into a Si substrate to create a desired sheet resistance, and then processing it to a thickness that results in a desired resistance value.

[0150] In the resistive element 250, one electrode is formed on one surface and the other electrode is formed on the other surface. Therefore, by positioning one electrode opposite the surface of the gate electrode pad 220 and connecting them, one electrode can be electrically connected to the gate electrode pad 220. Because the connection between the electrodes of the resistive element 250 and the gate electrode pad 220 is surface-to-surface, the inductance value can be made sufficiently small.

[0151] The capacitor 240 and the resistor 250 are interconnected by an interconnecting wire 202a. The interconnecting wire 202a electrically connects the other capacitor electrode of the capacitor 240 to the other electrode of the resistor 250.

[0152] In this way, the capacitor 240 and the resistor 250 are connected in parallel, and one end of the parallel circuit of the capacitor 240 and the resistor 250 is electrically connected to the gate electrode pad 220.

[0153] The effects of the semiconductor device 200 according to this embodiment will be described. The semiconductor device 200 according to this embodiment and its modified form has the same effects as the semiconductor device 100 shown in Figure 1, and also has the following additional effects. Specifically, in the semiconductor device 200, the gate circuit section 230 is manufactured using a different manufacturing process than the transistor section 210, and is stacked on the gate electrode pad 220 of the transistor section 210 and electrically connected. By making the size of the gate circuit section 230 in plan view approximately the same as or less than the size of the gate electrode pad 220 in plan view, the size of the semiconductor device 200 in plan view does not exceed the size of the transistor section 210. Therefore, a small and low-cost semiconductor device 200 can be realized.

[0154] (modified version) Figures 12(a) and 12(b) are schematic perspective views illustrating a semiconductor device according to a modified example of the second embodiment. In Figures 12(a) and 12(b), the mount bed 201a, source terminal 201b, gate terminal 201c, and case 201 from Figure 10 are omitted from the illustration to avoid complexity. Furthermore, because the source terminal 201b and gate terminal 201c are omitted, the source connection wire 202b and gate connection wire 202c are shown as dashed lines.

[0155] As shown in Figure 12(a), the configuration of the capacitor 240a and the resistor element 250a in the semiconductor device 200a of this modified example differs from that in Figure 10. The other configurations are the same as in Figure 10, and the same reference numerals are used for the same components, and detailed explanations are omitted as appropriate.

[0156] Capacitor 240a has a larger size in plan view than the example in Figure 10 in order to obtain a sufficiently large capacitance value. Similarly, resistor element 250a has a larger size in plan view than the example in Figure 10 in order to obtain a sufficiently low DC resistance value.

[0157] Capacitor 240a and resistor 250a cover the gate electrode pad 220 in a plan view and cover a portion of the source electrode 212 adjacent to the gate electrode pad 220. Although not shown, an insulating layer is provided between capacitor 240a and the source electrode 212 overlapping with capacitor 240a, so that one capacitor electrode of capacitor 240a and the source electrode 212 are electrically isolated from each other. Similarly, an insulating layer is provided between resistor 250a and the source electrode 212 overlapping with resistor 250a, so that one electrode of resistor 250 and the source electrode 212 are electrically isolated from each other.

[0158] As shown in Figure 12(b), the configuration of the capacitor 240b and the resistor element 250b in this modified semiconductor device 200b differs from that in Figure 10. The other configurations are the same as in Figure 10, and the same reference numerals are used for the same components, and detailed explanations are omitted as appropriate.

[0159] In capacitor 240b, the size in plan view is larger than that of the example shown in Figure 12(a) in order to obtain an even larger capacitance value. On the other hand, in resistor element 250b, the size in plan view is smaller than that of the example shown in Figure 12(a).

[0160] Capacitor 240b and resistor 250b cover the gate electrode pad 220 in a plan view. Of these, capacitor 240b overlaps the outer edge region of the transistor section 210, which includes three sides of the outer perimeter in a plan view. The outer edge of the transistor section 210, which includes three sides of the outer perimeter in a plan view, is the outer edge other than the one to which the source connection wire 202b is connected. Capacitor 240b may also overlap the outer edge of the source electrode 212. Although not shown, an insulating layer is provided between capacitor 240b and the transistor section 210 that overlaps capacitor 240b, so that one capacitor electrode of capacitor 240b and the outer edge of the transistor section 210 are electrically isolated from each other.

[0161] Thus, since the shape of capacitors 240a and 240b in plan view can be arbitrary, a sufficiently large area can be secured. Therefore, in these modified semiconductor devices 200a and 200b, capacitors 240a and 240b with large capacitance values ​​can be mounted without increasing the size of the semiconductor devices 200a and 200b in plan view.

[0162] While embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents.

[0163] The embodiments include the following aspects:

[0164] (Note 1) A transistor section comprising: a source electrode provided on a first surface of a semiconductor substrate and electrically connected to a source terminal; a drain electrode provided on a second surface of the semiconductor substrate opposite to the first surface and electrically connected to a drain terminal; and a gate electrode provided between the source electrode and the drain electrode; A gate electrode pad provided on the first surface, A gate connecting member that electrically connects the gate electrode pad and the gate terminal, A gate circuit portion provided on the first surface and electrically connected between the gate electrode pad and the gate electrode, A case housing the transistor section, the gate electrode pad, and the gate circuit section, Equipped with, The aforementioned gate circuit section is Capacitor and, A resistive element connected in parallel with the capacitor, A first connecting member that electrically connects one electrode of the capacitor to the gate electrode pad, A second connecting member electrically connects the other electrode of the capacitor to the gate electrode, Semiconductor equipment including

[0165] (Note 2) In a plan view, The transistor section, the gate electrode pad, the capacitor, and the resistor are arranged so as not to overlap each other. The capacitor is positioned adjacent to the gate electrode pad, The first connecting member is a semiconductor device as described in Appendix 1, provided between the gate electrode pad and the capacitor.

[0166] (Note 3) The capacitor is arranged adjacent to the transistor section, The second connecting member is a semiconductor device as described in Appendix 2, provided between the capacitor and the transistor section.

[0167] (Note 4) The semiconductor device according to any one of the appendices 1 to 3, wherein the inductance value of the series circuit of the gate connection member, the first wiring, and the second wiring is less than 8 nH.

[0168] (Note 5) The aforementioned transistor section is A first conductive drift layer provided on the first surface, A second conductive base layer provided on the drift layer, A first conductive source layer is selectively provided on the base layer, A gate electrode facing a portion of the drift layer and the base layer via a gate insulating film, Includes, The semiconductor substrate contains impurities of the first conductivity type, The source electrode is electrically connected to the base layer and the source layer on the base layer and the source layer, The aforementioned capacitor is A first capacitor electrode electrically connected to the gate electrode pad via the first wiring, A second capacitor electrode electrically connected to the gate electrode via the second wiring, A dielectric film provided between the first capacitor electrode and the second capacitor electrode, A semiconductor device as described in any one of the appendices 1 to 4, including the one described above.

[0169] (Note 6) The first capacitor electrode is provided on the drift layer via the first insulating layer, The dielectric layer is provided on the first capacitor electrode, The second capacitor electrode is a semiconductor device as described in Appendix 5, provided on the dielectric layer.

[0170] (Note 7) The transistor portion includes a conductor extending within the drift layer. The conductor includes a conductor facing the drift layer via a first insulating film and facing the gate electrode via a second insulating film. The first capacitor electrode faces a portion of the drift layer via the third insulating film, The semiconductor device according to Appendix 5, wherein the second capacitor electrode extends in the drift layer, faces the drift layer via a fourth insulating film, and faces the first capacitor electrode via the dielectric layer.

[0171] (Note 8) The capacitor includes the base layer on the drift layer, The first capacitor electrode is a semiconductor device as described in Appendix 7, facing a part of the drift layer and the base layer.

[0172] (Note 9) The semiconductor device according to Appendix 1, wherein the capacitor and the resistive element are arranged on the gate electrode pad via the first connecting member and electrically connected to the gate electrode pad.

[0173] (Note 10) The first connecting member is a semiconductor device as described in Appendix 9, provided between the capacitor and the gate electrode pad. [Explanation of symbols]

[0174] 1...Semiconductor substrate, 1a...First surface, 1b...Second surface, 2...n-type drift layer, 3...p-type base layer, 4...n-type source layer, 5...Gate electrode, 6...Gate insulating film, 7...Field plate structure, 7a...Field plate conductor, 7b, 146a, 147b1...Insulating film, 8, 148a, 148b...Interlayer insulating film, 10, 210...Transistor section, 20, 220...Gate electrode pad, 30, 230...Gate circuit section, 40, 140, 140a, 140b, 240, 240a, 240b...Capacitor Sita, 41, 45... Insulating layer, 42, 142, 145a... First capacitor electrode, 43,... Dielectric film, 44, 144, 147a1... Second capacitor electrode, 50, 250, 250a, 250b... Resistor element, 60~60f... Gate wiring, 61~61e, 62~62f, 63~63f... Wiring, 100, 100a~100f, 200, 200a, 200b... Semiconductor device, 101, 201... Case, 111, 211... Drain electrode, 112, 212... Source electrode, 202a... Interconnecting wire

Claims

1. A transistor section comprising: a source electrode provided on a first surface of a semiconductor substrate and electrically connected to a source terminal; a drain electrode provided on a second surface of the semiconductor substrate opposite to the first surface and electrically connected to a drain terminal; and a gate electrode provided between the source electrode and the drain electrode. A gate electrode pad provided on the first surface, A gate connecting member that electrically connects the gate electrode pad and the gate terminal, A gate circuit portion provided on the first surface and electrically connected between the gate electrode pad and the gate electrode, A case housing the transistor section, the gate electrode pad, and the gate circuit section, Equipped with, The aforementioned gate circuit section is Capacitor and, A resistive element connected in parallel with the capacitor, A first connecting member that electrically connects one electrode of the capacitor to the gate electrode pad, A second connecting member electrically connects the other electrode of the capacitor to the gate electrode, Semiconductor equipment including

2. In a plan view, The transistor section, the gate electrode pad, the capacitor, and the resistor are arranged so as not to overlap each other. The capacitor is positioned adjacent to the gate electrode pad, The semiconductor device according to claim 1, wherein the first connecting member is provided between the gate electrode pad and the capacitor.

3. The capacitor is arranged adjacent to the transistor section, The semiconductor device according to claim 2, wherein the second connecting member is provided between the capacitor and the transistor.

4. The aforementioned transistor section is A first conductive drift layer provided on the first surface, A second conductive base layer provided on the drift layer, A first conductivity type source layer is selectively provided on the base layer, The gate electrode, which faces a portion of the drift layer and the base layer via a gate insulating film, Includes, The semiconductor substrate contains impurities of the first conductivity type, The source electrode is electrically connected to the base layer and the source layer on the base layer and the source layer, The aforementioned capacitor is A first capacitor electrode electrically connected to the gate electrode pad, A second capacitor electrode electrically connected to the gate electrode, A dielectric film provided between the first capacitor electrode and the second capacitor electrode, A semiconductor device according to any one of claims 1 to 3, including the following:

5. The first capacitor electrode is provided on the drift layer via an insulating layer, The dielectric film is provided on the first capacitor electrode, The semiconductor device according to claim 4, wherein the second capacitor electrode is provided on the dielectric film.

6. The first capacitor electrode extends in the drift layer and faces a portion of the drift layer via a third insulating film, The semiconductor device according to claim 4, wherein the second capacitor electrode extends in the drift layer, faces the drift layer via the fourth insulating film, and faces the first capacitor electrode via the dielectric film.

7. The capacitor includes the base layer on the drift layer, The semiconductor device according to claim 6, wherein the first capacitor electrode faces a part of the drift layer and the base layer.

8. The semiconductor device according to claim 1, wherein the capacitor and the resistor are arranged on the gate electrode pad via the first connecting member and electrically connected to the gate electrode pad.

9. The semiconductor device according to claim 8, wherein the first connecting member is provided between the capacitor and the gate electrode pad.

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