Semiconductor manufacturing equipment and semiconductor device manufacturing method

Abstract

To remove by-products containing metallic elements.SOLUTION: Semiconductor equipment of the embodiment has a chamber including a top plate and side walls, a holder provided in the chamber and on which a substrate is placed, a high-frequency power source for applying high-frequency power to the holder, a gas supply pipe for supplying gas to the chamber, a gas discharge pipe for discharging gas from the chamber, and a plurality of lift pins for pushing a substrate in a direction from the holder to the top plate, and whose tips can move from the top surface of the holder to a position at least 70% of the distance between the holder and the top plate.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to a semiconductor manufacturing apparatus and a method for manufacturing a semiconductor device.

Background Art

[0002] When etching a layer containing a metal element by reactive ion etching, a by-product containing the metal element adheres to the inner surface of the chamber. The by-product adhering to the inner surface of the chamber causes, for example, particle generation. Therefore, it is necessary to remove the by-product adhering to the inner surface of the chamber by cleaning the chamber. [

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In one embodiment of the present invention, an object is to remove a by-product containing a metal element.

Means for Solving the Problems

[0005] The semiconductor manufacturing apparatus according to the embodiment includes a chamber including a top plate and side walls, a holder provided in the chamber for placing a substrate, a high-frequency power supply for applying high-frequency power to the holder, a gas supply pipe for supplying gas to the chamber, a gas discharge pipe for discharging gas from the chamber, and a plurality of lift pins for pushing up the substrate in a direction from the holder toward the top plate, wherein the tip ends of the plurality of lift pins are movable from the upper surface of the holder to a position at 70% or more of the distance between the holder and the top plate. A plurality of push pins that push down the substrate in the direction from the top plate toward the holder, It is provided with.

Brief Description of the Drawings

[0006] [Figure 1] A schematic diagram of a semiconductor manufacturing apparatus according to the first embodiment. [Figure 2] A top view of the holder of the semiconductor manufacturing apparatus according to the first embodiment. [Figure 3] A diagram illustrating the operation of the lift pin of the semiconductor manufacturing apparatus according to the first embodiment. [Figure 4] A bottom view of the top plate of the semiconductor manufacturing apparatus according to the first embodiment. [Figure 5] A diagram illustrating the operation of the push pins in the semiconductor manufacturing apparatus of the first embodiment. [Figure 6] An explanatory diagram of an example of a manufacturing method for the semiconductor device of the first embodiment. [Figure 7] An explanatory diagram of an example of a manufacturing method for the semiconductor device of the first embodiment. [Figure 8] An explanatory diagram of an example of a manufacturing method for the semiconductor device of the first embodiment. [Figure 9] An explanatory diagram of an example of a manufacturing method for the semiconductor device of the first embodiment. [Figure 10] An explanatory diagram of an example of a manufacturing method for the semiconductor device of the first embodiment. [Figure 11] An explanatory diagram of an example of a manufacturing method for the semiconductor device of the first embodiment. [Figure 12] A schematic diagram of a semiconductor manufacturing apparatus according to the second embodiment. [Figure 13] A bottom view of the top plate of the semiconductor manufacturing apparatus according to the second embodiment. [Figure 14] A diagram illustrating the operation of the support member of the semiconductor manufacturing apparatus according to the second embodiment. [Figure 15] A diagram illustrating the operation of the support member of the semiconductor manufacturing apparatus according to the second embodiment. [Figure 16] An explanatory diagram of an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 17] An explanatory diagram of an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 18] An explanatory diagram of an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 19] An explanatory diagram of an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 20]Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 21] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 22] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 23] Schematic diagram of a semiconductor manufacturing apparatus according to the first modification of the second embodiment. <> [Figure 24] Explanatory diagram of the operation of a support member of a semiconductor manufacturing apparatus according to the first modification of the second embodiment. [Figure 25] Schematic diagram of a semiconductor manufacturing apparatus according to the first modification of the second embodiment. [Figure 26] Explanatory diagram of the operation of a support member of a semiconductor manufacturing apparatus according to the second modification of the second embodiment. [Figure 27] Explanatory diagram of the operation of a support member of a semiconductor manufacturing apparatus according to the second modification of the second embodiment. [Figure 28] Schematic diagram of a semiconductor manufacturing apparatus according to the third embodiment. [Figure 29] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 30] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 31] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 32] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 33] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 34] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 35] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 36] Explanatory diagram of an example of a method for manufacturing a semiconductor device according to the third embodiment.

Modes for Carrying Out the Invention

[0007] Embodiments of the present invention will be described below with reference to the drawings. In the following description, the same or similar components will be denoted by the same reference numerals, and components that have already been described may be omitted from the description as appropriate.

[0008] Furthermore, for convenience, the terms "up" or "down" may be used in this specification. "Up" or "down" are terms that indicate, for example, relative positional relationships within a drawing. The terms "up" or "down" do not necessarily define positional relationships with respect to gravity.

[0009] The semiconductor manufacturing apparatus and semiconductor device manufacturing method of the embodiment will be described below with reference to the drawings.

[0010] (First embodiment) The semiconductor manufacturing apparatus of the first embodiment includes a chamber including a top plate and side walls; a holder provided inside the chamber on which a substrate is placed; a high-frequency power supply for applying high-frequency power to the holder; a gas supply pipe for supplying gas to the chamber; a gas discharge pipe for discharging gas from the chamber; and a plurality of lift pins that push the substrate upward from the holder toward the top plate, the lift pins having tips that can move from the upper surface of the holder to a position at least 70% of the distance between the holder and the top plate.

[0011] Figure 1 is a schematic diagram of a semiconductor manufacturing apparatus according to the first embodiment. The semiconductor manufacturing apparatus according to the first embodiment is a reactive ion etching apparatus (RIE apparatus). The reactive ion etching apparatus according to the first embodiment is a capacitively coupled plasma apparatus (CCP apparatus).

[0012] The RIE apparatus 100 of the first embodiment includes, for example, a chamber 10, a holder 14, a high-frequency power supply 16, a gas supply pipe 18, a gas discharge pipe 20, an exhaust device 22, a heater 24, a plurality of lift pins 26, a lift pin support plate 28, a plurality of push pins 30, and a push pin support plate 32.

[0013] The chamber 10 includes a top plate 11 and side walls 12.

[0014] The top plate 11 is provided on the upper part of the chamber 10. The top plate 11 functions, for example, as an upper electrode. The top plate 11 is made of, for example, metal.

[0015] The side wall 12 surrounds the holder 14. The side wall 12 is, for example, made of metal. The side wall 12 is, for example, grounded.

[0016] The holder 14 is provided inside the chamber 10. The holder 14, for example, holds a semiconductor wafer W. The semiconductor wafer W is an example of a substrate.

[0017] The holder 14 includes, for example, an electrostatic chuck (not shown) on its upper surface. The holder 14 uses, for example, the electrostatic chuck to attract the semiconductor wafer W.

[0018] The holder 14 functions as the lower electrode. High-frequency power is applied to the holder 14. The holder 14 is made of, for example, metal.

[0019] A heater, for example (not shown), is provided inside the holder 14. The heater can heat the semiconductor wafer W placed on top of the holder 14.

[0020] The high-frequency power supply 16 has the function of applying high-frequency power to the holder 14. The high-frequency power supply 16 is connected to the holder 14. Plasma can be generated in the chamber 10 by the high-frequency power supply 16 that is applied to the holder 14.

[0021] The gas supply pipe 18 is installed, for example, at the top of the chamber 10. Gas is supplied to the chamber 10 from the gas supply pipe 18.

[0022] The gas supply pipe 18 can supply, for example, an etching gas or a cleaning gas. The etching gas is used, for example, to etch the workpiece layer formed on the semiconductor wafer W. The cleaning gas is used to remove by-products generated by the etching of the workpiece layer.

[0023] The gas discharge pipe 20 is provided, for example, at the bottom of the chamber 10. Unused etching gas, unused cleaning gas, or reaction products are discharged from the gas discharge pipe 20 to the outside of the chamber 10.

[0024] The exhaust device 22 is connected to the gas discharge pipe 20. The exhaust device 22 is, for example, a vacuum pump.

[0025] The multiple lift pins 26 have the function of pushing up the substrate placed on the holder 14 in the direction from the holder 14 toward the top plate 11. The lower ends of the multiple lift pins 26 are fixed to the lift pin support plate 28, for example. The multiple lift pins 26 pass through the holder 14, for example.

[0026] Figure 2 is a top view of the holder of the semiconductor manufacturing apparatus according to the first embodiment. Figure 3 is an explanatory diagram of the operation of the lift pin of the semiconductor manufacturing apparatus according to the first embodiment.

[0027] As shown in Figure 2, for example, four lift pins 26 are provided passing through the holder 14. There are, for example, four or more lift pins 26. There may be, for example, three lift pins 26. The lift pins 26 may not pass through the holder 14, but may be configured to be housed inside the holder 14.

[0028] As shown in Figure 3, the lift pin 26 is movable in the direction from the holder 14 toward the top plate 11. For example, the lift pin support plate 28 is driven by a drive mechanism (not shown), causing the lift pin 26 to move up and down.

[0029] Figure 3 shows the state in which the lift pin 26 is closest to the top plate 11. The distance from the top surface of the holder 14 to the tip of the lift pin 26 (d2 in Figure 3) is 70% or more of the distance between the holder 14 and the top plate 11 (d1 in Figure 3). In other words, the tip of the lift pin 26 can move from the top surface of the holder 14 to a position 70% or more of the distance d1 between the holder 14 and the top plate 11.

[0030] The multiple push pins 30 have the function of pushing the substrate downwards in the direction from the top plate 11 toward the holder 14. The upper ends of the multiple push pins 30 are fixed to a push pin support plate 32, for example. The multiple push pins 30 penetrate the top plate 11, for example.

[0031] Figure 4 is a bottom view of the top plate of the semiconductor manufacturing apparatus according to the first embodiment. Figure 5 is an explanatory diagram of the operation of the push pins of the semiconductor manufacturing apparatus according to the first embodiment.

[0032] As shown in Figure 4, for example, four push pins 30 are provided, passing through the top plate 11. There are, for example, four or more push pins 30. There may also be, for example, three push pins 30. The push pins 30 may not pass through the top plate 11, but may be configured to be housed inside the top plate 11.

[0033] As shown in Figure 5, the push pin 30 is movable in the direction from the top plate 11 toward the holder 14. For example, the push pin support plate 32 is driven by a drive mechanism (not shown), causing the push pin 30 to move up and down.

[0034] For example, a semiconductor wafer W placed on the holder 14 is anisotropically etched using plasma generated between the top plate 11 and the holder 14 in the chamber 10.

[0035] Next, a method for manufacturing a semiconductor device using the semiconductor manufacturing apparatus of the first embodiment will be described. The method for manufacturing a semiconductor device of the first embodiment includes etching of a layer containing a metal element by reactive ion etching, and a method for removing by-products generated by etching.

[0036] The first embodiment of the semiconductor device manufacturing method involves loading a first substrate having a first layer containing indium (In) into the chamber of a reactive ion etching apparatus comprising a chamber including a top plate and side walls, and a holder provided inside the chamber; placing the first substrate on the holder; performing an etching process to etch the first layer; removing the first substrate from the chamber; after removing the first substrate from the chamber, loading a second substrate having a resin layer on its surface into the chamber; placing the second substrate on the holder; heating the second substrate; moving the second substrate from the holder toward the top plate to bring the resin layer into contact with the top plate; cooling the second substrate; separating the resin layer from the top plate; and removing the second substrate from the chamber.

[0037] Figures 6, 7, 8, 9, 10, and 11 are explanatory diagrams illustrating an example of a manufacturing method for the first embodiment of the semiconductor device.

[0038] First, a semiconductor wafer W having a first layer containing indium (In) is brought into the chamber 10 of the RIE apparatus 100. The semiconductor wafer W is an example of a first substrate. The semiconductor wafer W is, for example, a silicon substrate.

[0039] The first layer comprises, for example, indium (In), tin (Sn), and oxygen (O). The first layer is, for example, an indium tin oxide layer. The first layer comprises, for example, indium (In), gallium (Ga), zinc (Zn), and oxygen (O). The first layer is, for example, an indium gallium zinc oxide layer.

[0040] The semiconductor wafer W that was brought into the chamber 10 is placed on the holder 14.

[0041] Next, an etching process is performed to etch the first layer (Figure 6). Methane gas (CH4) and hydrogen gas (H2), for example, are supplied to the chamber 10 as etching gases from the gas supply pipe 18. The exhaust device 22 is operated to reduce the pressure inside the chamber 10 and maintain it at a predetermined pressure. It is also possible to use a gas containing fluorine (F), for example, as the etching gas.

[0042] Next, high-frequency power is applied to the holder 14 by the high-frequency power supply 16. Plasma is generated in the chamber 10 by the high-frequency power applied to the holder 14 by the high-frequency power supply 16. Ions or radicals in the plasma collide with the semiconductor wafer W, and the first layer is etched.

[0043] Next, the application of high-frequency power to the holder 14 is stopped, and the supply of etching gas is stopped. The etching process is completed. After the etching process is completed, the semiconductor wafer W is removed from the chamber 10.

[0044] During the etching process, a by-product 40 containing indium (In) adheres to the underside of the top plate 11. The indium-containing by-product 40 is, for example, an oxide. If the etching gas contains fluorine (F), the indium-containing by-product 40 is, for example, a fluoride.

[0045] For example, the process of loading a semiconductor wafer W having a first layer containing indium (In) into a chamber 10, etching the first layer, and unloading the semiconductor wafer W from the chamber 10 is repeated multiple times.

[0046] Next, the cleaning substrate 50 is brought into the chamber 10. The cleaning substrate 50 is a second substrate or an example of a substrate. The cleaning substrate 50 brought into the chamber 10 is placed on the holder 14 (Figure 7).

[0047] The cleaning substrate 50 includes a support layer 51 and a resin layer 52. The resin layer 52 is provided on the surface of the support layer 51.

[0048] The support layer 51 is, for example, a semiconductor layer or an insulating layer. The support layer 51 is, for example, a silicon layer.

[0049] The resin layer 52 includes, for example, a thermoplastic resin.

[0050] The resin layer 52 includes, for example, a hot-melt adhesive.

[0051] The melting point of the resin layer 52 is, for example, 100°C or less.

[0052] The resin layer 52 includes, for example, at least one resin selected from the group consisting of polyethylene (PE), high-density polyethylene (HDPE), polypropylene (PP), polystyrene (PS), polyvinyl acetate (PVAc), polyurethane (PUR), polytetrafluoroethylene (PTFE), acrylonitrile tributadiene styrene resin (ABS resin), ethylene vinyl acetate copolymer (EVA), polyolefin (PO), polyamide (PA), synthetic rubber (SR), acrylic (ACR), and polyurethane (PUR).

[0053] Ethylene vinyl acetate copolymer (EVA), polyolefin (PO), polyamide (PA), synthetic rubber (SR), acrylic (ACR), and polyurethane (PUR) are hot-melt adhesives.

[0054] Next, the cleaning substrate 50 is heated. For heating the cleaning substrate 50, a heater 24 or a heater (not shown) provided in the holder 14 is used.

[0055] The resin layer 52 is softened or melted by heating the cleaning substrate 50. The cleaning substrate 50 is heated, for example, at a temperature of 50°C to 200°C.

[0056] Next, the cleaning substrate 50 is moved from the holder 14 toward the top plate 11 using the lift pin 26. The cleaning substrate 50 is lifted with the lift pin 26. The cleaning substrate 50 is brought into contact with the top plate 11 (Figure 8).

[0057] The softened or melted resin layer 52 incorporates the indium-containing by-product 40. The resin layer 52 traps the by-product 40.

[0058] Next, the resin layer 52 is cooled. Cooling of the resin layer 52 is performed, for example, by stopping heating by the heater 24 and by natural cooling. As the resin layer 52 solidifies, the adhesive strength between the resin layer 52 and the by-product 40 increases.

[0059] Next, the cleaning substrate 50 is separated from the top plate 11 (Figure 9). The resin layer 52 is separated from the top plate 11.

[0060] The cleaning circuit board 50 is moved from the top plate 11 toward the holder 14 using the push pin 30. The cleaning circuit board 50 is pressed down with the push pin 30.

[0061] The by-product 40 bonded to the resin layer 52 is peeled off from the top plate 11. Thus, the indium-containing by-product 40 that was adhering to the underside of the top plate 11 is removed.

[0062] The cleaning substrate 50, which has trapped the by-products 40, is lowered using the lift pins 26 and placed on the holder 14 (Figure 10). Subsequently, the cleaning substrate 50 is removed from the chamber 10.

[0063] Next, a dummy wafer DW is loaded into the chamber 10 of the RIE apparatus. The dummy wafer DW is, for example, a silicon substrate. The dummy wafer DW protects the surface of the electrostatic chuck of the holder 14 during, for example, oxygen plasma processing.

[0064] Next, oxygen plasma treatment is performed (Figure 11). The supply of oxygen gas (O2) into the chamber 10 is started from the gas supply pipe 18. The exhaust device 22 is activated to maintain the pressure inside the chamber 10 at a predetermined pressure. By starting the application of high-frequency power to the holder 14, oxygen plasma is generated.

[0065] Oxygen plasma can be used to remove, for example, the resin originating from the resin layer 52 that has adhered to the underside of the top plate 11.

[0066] Next, the operation and effects of the semiconductor manufacturing apparatus and semiconductor device manufacturing method according to the first embodiment will be described.

[0067] For example, when etching an indium (In)-containing layer, such as an indium tin oxide layer that makes up a semiconductor device, using a RIE (Rapid Inspection Emission) apparatus, indium (In)-containing byproducts adhere to the inner surface of the chamber. These indium-containing byproducts adhere, for example, to the underside of the chamber's top plate.

[0068] By-products adhering to the underside of the chamber's top plate can, for example, cause particle generation. These particles generated within the chamber can reduce the manufacturing yield of semiconductor devices. Therefore, by-products adhering to the underside of the chamber's top plate must be removed periodically. In other words, the chamber needs to be cleaned regularly.

[0069] Indium-containing by-products have a low vapor pressure. In other words, indium-containing by-products do not volatilize easily. Therefore, to remove indium-containing by-products by heating, for example, high temperatures exceeding the tolerance of the RIE apparatus are required.

[0070] Therefore, one could consider methods such as opening the chamber and removing indium-containing by-products by wet etching, but in this case, the time required for the cleaning process would be longer, increasing the turnaround time for semiconductor device manufacturing. Consequently, for example, the manufacturing cost of semiconductor devices would increase.

[0071] In the semiconductor manufacturing apparatus and semiconductor device manufacturing method of the first embodiment, the resin layer 52 of the cleaning substrate 50 traps the indium-containing by-products 40 that have adhered to the underside of the top plate 11 of the chamber 10. By using the cleaning substrate 50 to remove the indium-containing by-products 40, it becomes possible to remove the indium-containing by-products 40 without opening the chamber. Therefore, for example, the time required for the cleaning process is shortened, and the turnaround time for semiconductor device manufacturing is reduced.

[0072] In the semiconductor manufacturing apparatus of the first embodiment, from the viewpoint of ensuring that the resin layer 52 of the cleaning substrate 50 is reliably in contact with the top plate 11, it is preferable that the tip of the lift pin 26 is movable from the upper surface of the holder 14 to a position of 80% or more of the distance d1 between the holder 14 and the top plate 11, and more preferably to a position of 90% or more.

[0073] In the semiconductor manufacturing apparatus of the first embodiment, it is preferable that the number of lift pins 26 be four or more. Increasing the number of lift pins 26 stabilizes the vertical movement of the cleaning substrate 50.

[0074] In the semiconductor manufacturing apparatus of the first embodiment, it is preferable to include push pins 30. This makes it easier to separate the cleaning substrate 50 from the top plate 11. It is also possible to configure the apparatus without push pins 30.

[0075] In the first embodiment of the semiconductor device manufacturing method, the resin layer 52 is preferably a thermoplastic resin. This facilitates the trapping of by-products 40 caused by heating and cooling of the resin layer 52.

[0076] In the first embodiment of the semiconductor device manufacturing method, it is preferable that the resin layer 52 contains a hot-melt adhesive. This increases the adhesive strength between the resin layer 52 and the by-product 40, and improves the efficiency of removing the by-product 40.

[0077] In the first embodiment of the semiconductor device manufacturing method, it is preferable that the melting point of the resin layer 52 is 100°C or lower. This facilitates the trapping of by-products 40 caused by heating and cooling of the resin layer 52.

[0078] In the first embodiment of the semiconductor device manufacturing method, the heating temperature of the cleaning substrate 50 is preferably 50°C to 200°C, and more preferably 70°C to 100°C. Exceeding the lower limit promotes the softening or melting of the resin layer 52. Conversely, keeping the temperature below the upper limit prevents excessive melting of the resin layer 52.

[0079] In the first embodiment of the semiconductor device manufacturing method, oxygen plasma treatment is preferable, for example, from the viewpoint of removing residual resin on the top plate. It is also possible to use a manufacturing method that omits oxygen plasma treatment.

[0080] As described above, according to the semiconductor manufacturing apparatus and semiconductor device manufacturing method of the first embodiment, by-products containing indium can be removed without opening the chamber.

[0081] (Second embodiment) The semiconductor manufacturing apparatus of the second embodiment comprises a chamber including a top plate and side walls; a holder provided inside the chamber on which a substrate is placed; a high-frequency power supply for applying high-frequency power to the holder; a gas supply pipe for supplying gas to the chamber; a gas discharge pipe for discharging gas from the chamber; and a plurality of support members for moving the substrate in the direction from the holder toward the top plate, wherein the tip of each support member is movable in the direction from the side wall toward the holder and the tip of each support member supports the lower surface of the substrate.

[0082] Figure 12 is a schematic diagram of a semiconductor manufacturing apparatus according to the second embodiment. The semiconductor manufacturing apparatus of the second embodiment is a reactive ion etching apparatus (RIE apparatus). The reactive ion etching apparatus of the second embodiment is a capacitively coupled plasma apparatus (CCP apparatus).

[0083] The RIE apparatus 200 of the second embodiment includes, for example, a chamber 10, a holder 14, a high-frequency power supply 16, a gas supply pipe 18, a gas discharge pipe 20, an exhaust device 22, a heater 24, a plurality of support pins 42, and a plurality of guide rails 44. The support pins 42 are an example of support members. The guide rails 44 are an example of guide sections.

[0084] The chamber 10 includes a top plate 11 and side walls 12. The top plate 11 has suction holes 11a.

[0085] The top plate 11 is provided on the upper part of the chamber 10. The top plate 11 functions, for example, as an upper electrode. The top plate 11 is made of, for example, metal.

[0086] The side wall 12 surrounds the holder 14. The side wall 12 is, for example, made of metal. The side wall 12 is, for example, grounded.

[0087] The holder 14 is provided inside the chamber 10. The holder 14, for example, holds a semiconductor wafer W. The semiconductor wafer W is an example of a substrate.

[0088] The holder 14 includes, for example, an electrostatic chuck (not shown) on its upper surface. The holder 14 uses, for example, the electrostatic chuck to attract the semiconductor wafer W.

[0089] The holder 14 functions as the lower electrode. High-frequency power is applied to the holder 14. The holder 14 is made of, for example, metal.

[0090] A heater, for example (not shown), is provided inside the holder 14. The heater can heat the semiconductor wafer W placed on top of the holder 14.

[0091] The high-frequency power supply 16 has the function of applying high-frequency power to the holder 14. The high-frequency power supply 16 is connected to the holder 14. Plasma can be generated in the chamber 10 by the high-frequency power supply 16 that is applied to the holder 14.

[0092] The gas supply pipe 18 is installed, for example, at the top of the chamber 10. Gas is supplied to the chamber 10 from the gas supply pipe 18.

[0093] The gas supply pipe 18 can supply, for example, an etching gas or a cleaning gas. The etching gas is used, for example, to etch the workpiece layer formed on the semiconductor wafer W. The cleaning gas is used to remove by-products generated by the etching of the workpiece layer.

[0094] The gas discharge pipe 20 is provided, for example, at the bottom of the chamber 10. Unused etching gas, unused cleaning gas, or reaction products are discharged from the gas discharge pipe 20 to the outside of the chamber 10.

[0095] The exhaust device 22 is connected to the gas discharge pipe 20. The exhaust device 22 is, for example, a vacuum pump.

[0096] The multiple support pins 42 have the function of moving the substrate placed on the holder 14 in the direction from the holder 14 toward the top plate 11. The multiple support pins 42 are supported, for example, by a guide rail 44.

[0097] The guide rail 44 is provided around the holder 14. The guide rail 44 extends in the direction from the holder 14 toward the top plate 11. Multiple support pins 42 move along the guide rail 44.

[0098] Figure 13 is a bottom view of the top plate of the semiconductor manufacturing apparatus according to the second embodiment. Figures 14 and 15 are explanatory diagrams of the operation of the support member of the semiconductor manufacturing apparatus according to the second embodiment.

[0099] As shown in Figure 13, for example, four suction holes 11a are provided on the top plate 11. The suction holes 11a are connected to, for example, a vacuum pump (not shown). The suction holes 11a have the function of vacuum-adhering a substrate to the top plate.

[0100] As shown in Figure 14, the support pin 42 is movable in a direction from the side wall 12 toward the holder 14. In other words, the support pin 42 is movable laterally. The support pin 42 is moved laterally by, for example, a drive mechanism (not shown) incorporated into the guide rail 44. By moving laterally, the support pin 42 supports the lower surface of a substrate (not shown).

[0101] As shown in Figure 15, the support pin 42 is movable in the direction toward the top plate 11 from the holder 14. The support pin 42 allows a substrate (not shown) to move from the holder 14 toward the top plate 11. The support pin 42 is movable in the vertical direction. The support pin 42 is moved vertically along the guide rail 44 by a drive mechanism (not shown) incorporated into the guide rail 44, for example.

[0102] For example, a semiconductor wafer W placed on the holder 14 is anisotropically etched using plasma generated between the top plate 11 and the holder 14 in the chamber 10.

[0103] Next, a method for manufacturing a semiconductor device using a semiconductor manufacturing apparatus of the second embodiment will be described. The method for manufacturing a semiconductor device of the second embodiment includes etching of a layer containing a metal element by reactive ion etching, and a method for removing by-products generated by etching.

[0104] The second embodiment of the semiconductor device manufacturing method involves loading a cover member into the chamber of a reactive ion etching apparatus, which includes a chamber with a top plate and side walls, and a holder provided inside the chamber; placing the cover member on the holder; moving the cover member in the direction from the holder toward the top plate to cover at least a portion of the top plate with the cover member; after covering at least a portion of the top plate with the cover member, loading a first substrate having a first layer containing indium (In); placing the first substrate on the holder; performing an etching process to etch the first layer; removing the first substrate from the chamber; and after removing the first substrate from the chamber, removing the cover member from the chamber.

[0105] Figures 16, 17, 18, 19, 20, 21, and 22 are explanatory diagrams illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment.

[0106] First, the cover member 62, which is placed on a support substrate 60, is loaded into the chamber 10 of the RIE apparatus 100. The loaded support substrate 60 and cover member 62 are then placed on the holder 14 inside the chamber 10 (Figure 16). The cover member 62 is an example of a substrate.

[0107] The support substrate 60 is, for example, a semiconductor wafer. The support substrate 60 is, for example, a silicon substrate.

[0108] The cover member 62 is, for example, an insulator. The cover member 62 is, for example, aluminum oxide, yttrium oxide, or quartz.

[0109] The cover member 62 is provided with, for example, an opening for passing gas at a position corresponding to the gas supply pipe 18.

[0110] The surface roughness of the surface of the cover member 62 facing the holder 14 is greater than, for example, the surface roughness of the surface of the top plate 11 facing the holder 14. In other words, the surface roughness of the lower surface of the cover member 62 is greater than, for example, the surface roughness of the lower surface of the top plate 11.

[0111] The arithmetic mean roughness (Ra) of the surface of the cover member 62 facing the holder 14 is greater than, for example, the arithmetic mean roughness (Ra) of the surface of the top plate 11 facing the holder 14. In other words, the arithmetic mean roughness (Ra) of the lower surface of the cover member 62 is greater than, for example, the arithmetic mean roughness (Ra) of the lower surface of the top plate 11.

[0112] Next, the support pin 42 is moved laterally, and its tip is inserted between the lower surface of the cover member 62 and the upper surface of the holder 14 (Figure 17). This allows the tip of the support pin 42 to support the lower surface of the cover member 62.

[0113] Next, the cover member 62 is moved from the holder 14 toward the top plate 11. The support pin 42 is moved upward along the guide rail 44, thereby moving the cover member 62 upward. The cover member 62 covers at least a portion of the top plate 11 (Figure 18).

[0114] For example, the upper surface of the cover member 62 is brought into contact with the lower surface of the top plate 11. Furthermore, for example, by drawing a vacuum from the suction holes 11a provided in the top plate 11, the upper surface of the cover member 62 is vacuum-adhered to the lower surface of the top plate 11.

[0115] Next, the support substrate 60 is removed from the chamber 10.

[0116] Next, a semiconductor wafer W having a first layer containing indium (In) is introduced into the chamber 10. The semiconductor wafer W is an example of a first substrate. The semiconductor wafer W is, for example, a silicon substrate.

[0117] The first layer comprises, for example, indium (In), tin (Sn), and oxygen (O). The first layer is, for example, an indium tin oxide layer. The first layer comprises, for example, indium (In), gallium (Ga), zinc (Zn), and oxygen (O). The first layer is, for example, an indium gallium zinc oxide layer.

[0118] The semiconductor wafer W that was brought into the chamber 10 is placed on the holder 14.

[0119] Next, an etching process is performed to etch the first layer (Figure 19). Methane gas (CH4) and hydrogen gas (H2), for example, are supplied into the chamber 10 as etching gases from the gas supply pipe 18. The exhaust device 22 is operated to reduce the pressure inside the chamber 10 and maintain it at a predetermined pressure. It is also possible to use a gas containing fluorine (F), for example, as the etching gas.

[0120] Next, high-frequency power is applied to the holder 14 by the high-frequency power supply 16. Plasma is generated in the chamber 10 by the high-frequency power applied to the holder 14 by the high-frequency power supply 16. Ions or radicals in the plasma collide with the semiconductor wafer W, and the first layer is etched.

[0121] Next, the application of high-frequency power to the holder 14 is stopped, and the supply of etching gas is stopped. The etching process is completed. After the etching process is completed, the semiconductor wafer W is removed from the chamber 10.

[0122] During the etching process, by-products 40 containing indium (In) adhere to the lower surface of the cover member 62. The lower surface of the top plate 11 is covered by the cover member 62, so by-products 40 containing indium (In) do not adhere to it. The by-products 40 containing indium are, for example, oxides. If the etching gas contains fluorine (F), the by-products 40 containing indium are, for example, fluorides.

[0123] For example, the process of loading a semiconductor wafer W having a first layer containing indium (In) into a chamber 10, etching the first layer, and unloading the semiconductor wafer W from the chamber 10 is repeated multiple times.

[0124] Next, the support substrate 60 is loaded into the chamber 10. The support substrate 60 loaded into the chamber 10 is then placed on the holder 14 (Figure 20).

[0125] Next, the vacuum evacuation from the suction holes 11a provided in the top plate 11 is stopped. The cover member 62 can then be detached from the top plate.

[0126] Next, the cover member 62 is moved from the top plate 11 toward the holder 14. By moving the support pin 42 downward, the cover member 62 is moved downward along the guide rail 44. The cover member 62 is then placed on the support base plate 60 (Figure 21).

[0127] Next, the cover member 62, to which the indium-containing by-product 40 is attached, is removed from the chamber 10 together with the support substrate 60 (Figure 22).

[0128] Next, the operation and effects of the semiconductor manufacturing apparatus and semiconductor device manufacturing method according to the second embodiment will be described.

[0129] For example, when etching an indium (In)-containing layer, such as an indium tin oxide layer that makes up a semiconductor device, using a RIE (Rapid Inspection Emission) apparatus, indium (In)-containing byproducts adhere to the inner surface of the chamber. These indium-containing byproducts adhere, for example, to the underside of the chamber's top plate.

[0130] By-products adhering to the underside of the chamber's top plate can, for example, cause particle generation. These particles generated within the chamber can reduce the manufacturing yield of semiconductor devices. Therefore, by-products adhering to the underside of the chamber's top plate must be removed periodically. In other words, the chamber needs to be cleaned regularly.

[0131] Indium-containing by-products have a low vapor pressure. In other words, indium-containing by-products do not volatilize easily. Therefore, to remove indium-containing by-products by heating, for example, high temperatures exceeding the tolerance of the RIE apparatus are required.

[0132] Therefore, one could consider methods such as opening the chamber and removing indium-containing by-products by wet etching, but in this case, the time required for the cleaning process would be longer, increasing the turnaround time for semiconductor device manufacturing. Consequently, for example, the manufacturing cost of semiconductor devices would increase.

[0133] In the semiconductor manufacturing apparatus and semiconductor device manufacturing method of the second embodiment, the top plate 11 is covered with a cover member 62 to prevent indium-containing by-products 40 from adhering to the underside of the top plate 11 of the chamber 10. The cover member 62 can be brought into and out of the chamber 10 without opening the chamber 10. Therefore, the indium-containing by-products 40 can be removed without opening the chamber. As a result, for example, the time required for cleaning is shortened, and the turnaround time for semiconductor device manufacturing is reduced.

[0134] In the semiconductor manufacturing apparatus of the second embodiment, it is preferable that the top plate 11 has suction holes 11a. The cover member 62 can be stably fixed to the top plate 11. It is also possible to configure the top plate 11 without suction holes 11a.

[0135] In the semiconductor manufacturing apparatus manufacturing method of the second embodiment, it is preferable that the surface roughness of the surface of the cover member 62 facing the holder 14 is greater than the surface roughness of the surface of the top plate 11 facing the holder 14. A larger surface roughness on the surface of the cover member 62 facing the holder 14 makes it easier for by-products 40 to adhere to the cover member 62 and harder to remove. Therefore, for example, the efficiency of by-product 40 recovery by the cover member 62 is increased. Also, for example, detachment of by-products 40 from the cover member 62 within the apparatus during the movement of the cover member 62 is suppressed.

[0136] In the method for manufacturing a semiconductor manufacturing apparatus according to the second embodiment, it is preferable to place the cover member 62 on the support substrate 60 and move it. For example, if the lower surface of the cover member 62 to which by-products 40 are attached comes into direct contact with the surface of the holder 14, there is a risk that by-products 40 will adhere to and contaminate the surface of the holder 14. It is also possible to use a configuration without a support substrate 60. Furthermore, the area of ​​the cover member 62 may be larger than the area of ​​the semiconductor wafer W. By covering a wide area of ​​the top plate 11 with the cover member 62, it is possible to more effectively prevent by-products 40 from adhering to the inner surface of the chamber 10.

[0137] (First variation) The semiconductor manufacturing apparatus of the first modification of the second embodiment differs from the semiconductor manufacturing apparatus of the second embodiment in that the holder includes an edge ring provided on the outer circumference of the holder and which is movable up and down, and the tip of the support member is insertable between the substrate and the edge ring.

[0138] Figure 23 is a schematic diagram of a semiconductor manufacturing apparatus of the first modified example of the second embodiment.

[0139] The RIE apparatus 201 of the first modification of the second embodiment includes, for example, a chamber 10, a holder 14, a high-frequency power supply 16, a gas supply pipe 18, a gas discharge pipe 20, an exhaust device 22, a heater 24, a plurality of support pins 42, and a plurality of guide rails 44. The support pins 42 are an example of support members. The guide rails 44 are an example of guide sections.

[0140] The chamber 10 includes a top plate 11 and side walls 12. The top plate 11 has suction holes 11a. The holder 14 includes an edge ring 14a.

[0141] The edge ring 14a is provided on the outer circumference of the holder 14. The edge ring 14a is provided to improve the etching characteristics in the outer circumference region of the holder 14. The edge ring 14a is vertically movable.

[0142] Figure 24 is an explanatory diagram illustrating the operation of the support member of the semiconductor manufacturing apparatus in the first modified example of the second embodiment.

[0143] In the RIE apparatus 201 of the first modification of the second embodiment, the edge ring 14a is lowered, and then the support pin 42 is moved laterally. The tip of the support pin 42 is then inserted between the lower surface of the cover member 62 and the upper surface of the edge ring 14a. This allows the tip of the support pin 42 to support the lower surface of the cover member 62.

[0144] Using the RIE apparatus 201 of the first modified example of the second embodiment, the indium-containing by-product 40 can be removed without opening the chamber in the same manner as the semiconductor device manufacturing method of the second embodiment.

[0145] (Second variation) The semiconductor manufacturing apparatus of the second embodiment, a second modification of the second embodiment, differs from the semiconductor manufacturing apparatus of the second embodiment in that it includes a support rod that supports each of the multiple support members, is provided on the top plate, and extends in the vertical direction.

[0146] Figure 25 is a schematic diagram of a semiconductor manufacturing apparatus of the first modified example of the second embodiment.

[0147] The RIE apparatus 202 of the second embodiment, a second modification of the second embodiment, includes, for example, a chamber 10, a holder 14, a high-frequency power supply 16, a gas supply pipe 18, a gas discharge pipe 20, an exhaust device 22, a heater 24, a plurality of support pins 42, and a plurality of support arms 45. The support pins 42 are an example of support members. The support arms 45 are an example of support rods.

[0148] The chamber 10 includes a top plate 11 and side walls 12. The top plate 11 has suction holes 11a. The holder 14 includes an edge ring 14a.

[0149] The support arm 45 extends from the holder 14 toward the top plate 11. The support arm 45 extends vertically. The support arm 45 is mounted on the top plate. The support arm 45 can move vertically using a drive mechanism (not shown). The support arm 45 supports the support pin 42. The support pin 42 is rotatably attached to the lower end of the support arm 45.

[0150] Figures 26 and 27 are explanatory diagrams illustrating the operation of the support member of a semiconductor manufacturing apparatus in a second modified example of the second embodiment.

[0151] In the RIE apparatus 202, a second modification of the second embodiment, for example, as shown in Figure 26, after the support substrate 60 and cover member 62 are placed on the holder 14, the support pin 42 is rotated to move the support pin 42 laterally. Then, the tip of the support pin 42 is inserted between the lower surface of the cover member 62 and the upper surface of the holder 14. The tip of the support pin 42 becomes able to support the lower surface of the cover member 62.

[0152] Subsequently, as shown in Figure 27, the top plate 11 can be covered with the cover member 62 by moving the support pin 42 upward together with the support arm 45.

[0153] Using the RIE apparatus 202 of the second embodiment, a second modified example, the indium-containing by-product 40 can be removed without opening the chamber in the same manner as the semiconductor device manufacturing method of the second embodiment.

[0154] As described above, according to the semiconductor manufacturing apparatus and semiconductor device manufacturing method of the second embodiment and modified examples, by-products containing indium can be removed without opening the chamber.

[0155] (Third embodiment) The semiconductor manufacturing apparatus of the third embodiment comprises a chamber including a top plate and side walls; a holder provided in the chamber for placing a substrate; a high-frequency power supply for applying high-frequency power to the holder; a gas supply pipe for supplying gas to the chamber; a gas discharge pipe for discharging gas from the chamber; and a plurality of lift pins that push the substrate upward from the holder toward the top plate, the tips of which the lift pins are movable from the upper surface of the holder to a position at least 70% of the distance between the holder and the top plate. In the semiconductor manufacturing apparatus of the third embodiment, the top plate has suction holes for vacuum adsorption of the upper surface of the substrate toward the top plate.

[0156] Figure 28 is a schematic diagram of a semiconductor manufacturing apparatus according to the third embodiment. The semiconductor manufacturing apparatus of the third embodiment is a reactive ion etching apparatus (RIE apparatus). The reactive ion etching apparatus of the third embodiment is a capacitively coupled plasma apparatus (CCP apparatus).

[0157] The RIE apparatus 300 of the third embodiment includes, for example, a chamber 10, a holder 14, a high-frequency power supply 16, a gas supply pipe 18, a gas discharge pipe 20, an exhaust device 22, a heater 24, a plurality of lift pins 26, and a lift pin support plate 28.

[0158] The chamber 10 includes a top plate 11 and side walls 12. The top plate 11 has suction holes 11a.

[0159] The top plate 11 is provided on the upper part of the chamber 10. The top plate 11 functions, for example, as an upper electrode. The top plate 11 is made of, for example, metal.

[0160] Adsorption holes 11a are provided in the top plate 11. The adsorption holes 11a are connected to, for example, a vacuum pump (not shown). The adsorption holes 11a have the function of vacuum-adsorbing a substrate to the top plate.

[0161] The side wall 12 surrounds the holder 14. The side wall 12 is, for example, made of metal. The side wall 12 is, for example, grounded.

[0162] The holder 14 is provided inside the chamber 10. The holder 14, for example, holds a semiconductor wafer W. The semiconductor wafer W is an example of a substrate.

[0163] The holder 14 includes, for example, an electrostatic chuck (not shown) on its upper surface. The holder 14 uses, for example, the electrostatic chuck to attract the semiconductor wafer W.

[0164] The holder 14 functions as the lower electrode. High-frequency power is applied to the holder 14. The holder 14 is made of, for example, metal.

[0165] A heater, for example (not shown), is provided inside the holder 14. The heater can heat the semiconductor wafer W placed on top of the holder 14.

[0166] The high-frequency power supply 16 has the function of applying high-frequency power to the holder 14. The high-frequency power supply 16 is connected to the holder 14. Plasma can be generated in the chamber 10 by the high-frequency power supply 16 that is applied to the holder 14.

[0167] The gas supply pipe 18 is installed, for example, at the top of the chamber 10. Gas is supplied to the chamber 10 from the gas supply pipe 18.

[0168] The gas supply pipe 18 can supply, for example, an etching gas or a cleaning gas. The etching gas is used, for example, to etch the workpiece layer formed on the semiconductor wafer W. The cleaning gas is used to remove by-products generated by the etching of the workpiece layer.

[0169] The gas discharge pipe 20 is provided, for example, at the bottom of the chamber 10. Unused etching gas, unused cleaning gas, or reaction products are discharged from the gas discharge pipe 20 to the outside of the chamber 10.

[0170] The exhaust device 22 is connected to the gas discharge pipe 20. The exhaust device 22 is, for example, a vacuum pump.

[0171] The multiple lift pins 26 have the function of pushing up the substrate placed on the holder 14 in the direction from the holder 14 toward the top plate 11. The lower ends of the multiple lift pins 26 are fixed to the lift pin support plate 28, for example. The multiple lift pins 26 pass through the holder 14, for example.

[0172] The lift pin 26 is movable in the direction from the holder 14 toward the top plate 11. For example, the lift pin support plate 28 is driven by a drive mechanism (not shown) which causes the lift pin 26 to move up and down.

[0173] The distance from the top surface of the holder 14 to the tip of the lift pin 26 is 70% or more of the distance between the holder 14 and the top plate 11. In other words, the tip of the lift pin 26 is movable from the top surface of the holder 14 to a position 70% or more of the distance between the holder 14 and the top plate 11.

[0174] For example, a semiconductor wafer W placed on the holder 14 is anisotropically etched using plasma generated between the top plate 11 and the holder 14 in the chamber 10.

[0175] Next, a method for manufacturing a semiconductor device using a semiconductor manufacturing apparatus of the third embodiment will be described. The method for manufacturing a semiconductor device of the third embodiment includes etching of a layer containing a metal element by reactive ion etching, and a method for removing by-products generated by etching.

[0176] The third embodiment of the semiconductor device manufacturing method involves loading a first substrate having a first layer containing indium (In) into the chamber of a reactive ion etching apparatus comprising a chamber including a top plate and side walls, and a holder provided inside the chamber; placing the first substrate on the holder; performing an etching process to etch the first layer; removing the first substrate from the chamber; after removing the first substrate from the chamber, loading a second substrate having a resin layer on its surface into the chamber; placing the second substrate on the holder; heating the second substrate; moving the second substrate from the holder toward the top plate to bring the resin layer into contact with the top plate; cooling the second substrate; separating the resin layer from the top plate; and removing the second substrate from the chamber.

[0177] Figures 29, 30, 31, 32, 33, 34, 35, and 36 are explanatory diagrams of an example of a semiconductor device manufacturing method according to the third embodiment.

[0178] First, the cover member 62, which is placed on a support substrate 60, is loaded into the chamber 10 of the RIE apparatus 100. The support substrate 60 and cover member 62 loaded into the chamber 10 are then placed on the holder 14 (Figure 29). The cover member 62 is an example of a substrate.

[0179] The support substrate 60 is, for example, a semiconductor wafer. The support substrate 60 is, for example, a silicon substrate.

[0180] The cover member 62 is, for example, an insulator. The cover member 62 is, for example, aluminum oxide, yttrium oxide, or quartz.

[0181] The cover member 62 is provided with, for example, an opening for passing gas at a position corresponding to the gas supply pipe 18.

[0182] The surface roughness of the surface of the cover member 62 facing the holder 14 is greater than, for example, the surface roughness of the surface of the top plate 11 facing the holder 14. In other words, the surface roughness of the lower surface of the cover member 62 is greater than, for example, the surface roughness of the lower surface of the top plate 11.

[0183] The arithmetic mean roughness (Ra) of the surface of the cover member 62 facing the holder 14 is greater than, for example, the arithmetic mean roughness (Ra) of the surface of the top plate 11 facing the holder 14. In other words, the arithmetic mean roughness (Ra) of the lower surface of the cover member 62 is greater than, for example, the arithmetic mean roughness (Ra) of the lower surface of the top plate 11.

[0184] Next, the support base plate 60 and the cover member 62 are moved from the holder 14 toward the top plate 11 using the lift pin 26. The support base plate 60 and the cover member 62 are lifted by the lift pin 26. The cover member 62 covers at least a portion of the top plate 11 (Figure 30).

[0185] For example, the upper surface of the cover member 62 is brought into contact with the lower surface of the top plate 11. Furthermore, for example, by drawing a vacuum from the suction holes 11a provided in the top plate 11, the upper surface of the cover member 62 is vacuum-adhered to the lower surface of the top plate 11.

[0186] Next, the support substrate 60 is lowered using the lift pin 26. The support substrate 60 is then placed on the holder 14 (Figure 31).

[0187] Next, the support substrate 60 is removed from the chamber 10.

[0188] Next, a semiconductor wafer W having a first layer containing indium (In) is introduced into the chamber 10. The semiconductor wafer W is an example of a first substrate. The semiconductor wafer W is, for example, a silicon substrate.

[0189] The first layer comprises, for example, indium (In), tin (Sn), and oxygen (O). The first layer is, for example, an indium tin oxide layer. The first layer comprises, for example, indium (In), gallium (Ga), zinc (Zn), and oxygen (O). The first layer is, for example, an indium gallium zinc oxide layer.

[0190] The semiconductor wafer W that was brought into the chamber 10 is placed on the holder 14.

[0191] Next, an etching process is performed to etch the first layer (Figure 32). Methane gas (CH4) and hydrogen gas (H2), for example, are supplied into the chamber 10 as etching gases from the gas supply pipe 18. The exhaust device 22 is operated to reduce the pressure inside the chamber 10 and maintain it at a predetermined pressure. It is also possible to use a gas containing fluorine (F), for example, as the etching gas.

[0192] Next, high-frequency power is applied to the holder 14 by the high-frequency power supply 16. Plasma is generated in the chamber 10 by the high-frequency power applied to the holder 14 by the high-frequency power supply 16. Ions or radicals in the plasma collide with the semiconductor wafer W, and the first layer is etched.

[0193] Next, the application of high-frequency power to the holder 14 is stopped, and the supply of etching gas is stopped. The etching process is completed. After the etching process is completed, the semiconductor wafer W is removed from the chamber 10.

[0194] During the etching process, by-products 40 containing indium (In) adhere to the lower surface of the cover member 62. The lower surface of the top plate 11 is covered by the cover member 62, so the by-products 40 containing indium (In) do not adhere to it. The by-products 40 containing indium are, for example, oxides. If the etching gas contains fluorine (F), the by-products 40 containing indium are, for example, fluorides.

[0195] For example, the process of loading a semiconductor wafer W having a first layer containing indium (In) into a chamber 10, etching the first layer, and unloading the semiconductor wafer W from the chamber 10 is repeated multiple times.

[0196] Next, the support substrate 60 is loaded into the chamber 10. The support substrate 60 loaded into the chamber 10 is then placed on the holder 14 (Figure 33).

[0197] Next, the support substrate 60 is moved from the holder 14 toward the top plate 11 using the lift pin 26. The support substrate 60 is lifted with the lift pin 26. The support substrate 60 is brought into contact with the cover member 62 (Figure 34).

[0198] Next, the vacuum evacuation from the suction holes 11a provided in the top plate 11 is stopped. The cover member 62 can then be detached from the top plate.

[0199] Next, the support substrate 60 and the cover member 62 are lowered using the lift pin 26. The support substrate 60 and the cover member 62 are then placed on the holder 14 (Figure 35).

[0200] Next, the cover member 62, to which the indium-containing by-product 40 is attached, is removed from the chamber 10 together with the support substrate 60 (Figure 36).

[0201] Next, the operation and effects of the semiconductor manufacturing apparatus and semiconductor device manufacturing method according to the third embodiment will be described.

[0202] For example, when etching an indium (In)-containing layer, such as an indium tin oxide layer that makes up a semiconductor device, using a RIE (Rapid Inspection Emission) apparatus, indium (In)-containing byproducts adhere to the inner surface of the chamber. These indium-containing byproducts adhere, for example, to the underside of the chamber's top plate.

[0203] By-products adhering to the underside of the chamber's top plate can, for example, cause particle generation. These particles generated within the chamber can reduce the manufacturing yield of semiconductor devices. Therefore, by-products adhering to the underside of the chamber's top plate must be removed periodically. In other words, the chamber needs to be cleaned regularly.

[0204] Indium-containing by-products have a low vapor pressure. In other words, indium-containing by-products do not volatilize easily. Therefore, to remove indium-containing by-products by heating, for example, high temperatures exceeding the tolerance of the RIE apparatus are required.

[0205] Therefore, one could consider methods such as opening the chamber and removing indium-containing by-products by wet etching, but in this case, the time required for the cleaning process would be longer, increasing the turnaround time for semiconductor device manufacturing. Consequently, for example, the manufacturing cost of semiconductor devices would increase.

[0206] In the semiconductor manufacturing apparatus and semiconductor device manufacturing method of the third embodiment, the top plate 11 is covered with a cover member 62 to prevent indium-containing by-products 40 from adhering to the underside of the top plate 11 of the chamber 10. The cover member 62 can be brought into and out of the chamber 10 without opening the chamber 10. Therefore, the indium-containing by-products 40 can be removed without opening the chamber. As a result, for example, the time required for cleaning is shortened, and the turnaround time for semiconductor device manufacturing is reduced.

[0207] In the semiconductor manufacturing apparatus of the third embodiment, from the viewpoint of ensuring that the cover member 62 is reliably in contact with the top plate 11, it is preferable that the tip of the lift pin 26 is movable from the surface of the holder 14 to a position that is 80% or more of the distance between the holder 14 and the top plate 11, and more preferably movable to a position that is 90% or more of the distance.

[0208] In the semiconductor manufacturing apparatus of the third embodiment, it is preferable that the number of lift pins 26 be four or more. Increasing the number of lift pins 26 stabilizes the vertical movement of the support substrate 60 and the cover member 62.

[0209] In the manufacturing method of the semiconductor manufacturing apparatus of the third embodiment, it is preferable that the surface roughness of the surface of the cover member 62 facing the holder 14 is greater than the surface roughness of the surface of the top plate 11 facing the holder 14. A larger surface roughness on the surface of the cover member 62 facing the holder 14 makes it easier for by-products 40 to adhere to the cover member 62 and harder to remove. Therefore, for example, the efficiency of by-product 40 recovery by the cover member 62 is increased. Also, for example, detachment of by-products 40 from the cover member 62 within the apparatus during the movement of the cover member 62 is suppressed.

[0210] In the third embodiment of the semiconductor manufacturing apparatus manufacturing method, it is preferable to place the cover member 62 on the support substrate 60 and move it. For example, if the lower surface of the cover member 62 to which by-products 40 are attached comes into direct contact with the surface of the holder 14, there is a risk that by-products 40 will adhere to and contaminate the surface of the holder 14. It is also possible to use a configuration without the support substrate 60.

[0211] As described above, according to the semiconductor manufacturing apparatus and semiconductor device manufacturing method of the third embodiment, by-products containing indium can be removed without opening the chamber.

[0212] Although the semiconductor manufacturing apparatus used in the semiconductor manufacturing methods of the first to third embodiments has been described as a capacitively coupled plasma apparatus (CCP apparatus), the semiconductor manufacturing apparatus used in the semiconductor manufacturing methods of the embodiments is not limited to a CCP apparatus. For example, an inductively coupled plasma apparatus (ICP apparatus) can also be used.

[0213] Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. For example, components of one embodiment may be replaced or modified with components of another embodiment. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0214] 10 Chambers 11 Top plate 11a Adsorption hole 12 Side wall 14 holders 14a Edge Ring 16 High frequency power supply 18 Gas supply pipe 20 Gas discharge pipe 26 Lift Pins 30 push pins 42 Support pin (support member) 44 Guide rail (guide section) 45. Support arm (support rod) 50 Cleaning circuit board (circuit board, second circuit board) 52 resin layer 60 Support substrate 62 Cover component (circuit board) 100 RIE equipment (semiconductor manufacturing equipment) 200 RIE equipment (semiconductor manufacturing equipment) 300 RIE equipment (semiconductor manufacturing equipment) W Semiconductor wafer (substrate, first substrate)

Claims

1. A chamber including a top plate and side walls, A holder for mounting a substrate is provided inside the chamber, A high-frequency power supply for applying high-frequency power to the holder, A gas supply pipe that supplies gas to the chamber, A gas discharge pipe for discharging gas from the chamber, A plurality of lift pins that push the substrate upward from the holder toward the top plate, wherein the tip of each lift pin is movable from the upper surface of the holder to a position at least 70% of the distance between the holder and the top plate, A plurality of push pins that push down the substrate in the direction from the top plate toward the holder, Semiconductor manufacturing equipment equipped with the following features.

2. The semiconductor manufacturing apparatus according to claim 1, wherein the plurality of lift pins penetrate the holder.

3. The semiconductor manufacturing apparatus according to claim 1, wherein the plurality of lift pins are four or more.

4. The semiconductor manufacturing apparatus according to claim 1, wherein the top plate has suction holes for vacuum adsorption of the upper surface of the substrate to the top plate.

5. A first substrate having a first layer containing indium (In) is introduced into the chamber of a reactive ion etching apparatus, which comprises a chamber including a top plate and side walls, a holder provided in the chamber, a plurality of lift pins that push up the substrate in the direction from the holder toward the top plate, the tips of which are movable from the upper surface of the holder to a position of 70% or more of the distance between the holder and the top plate, and a plurality of push pins that push down the substrate in the direction from the top plate toward the holder. The first substrate is placed on the holder, An etching process is performed to etch the first layer, The first substrate is removed from the chamber. After the first substrate is removed from the chamber, a second substrate having a resin layer on its surface is brought into the chamber. The second substrate is placed on the holder, The second substrate is heated, Using the plurality of lift pins, the second substrate is moved in the direction from the holder toward the top plate, so that the resin layer comes into contact with the top plate. The second substrate is cooled, The resin layer is separated from the top plate using the aforementioned plurality of push pins. A method for manufacturing a semiconductor device, comprising transporting the second substrate out of the chamber.

6. The method for manufacturing a semiconductor device according to claim 5, wherein the resin layer comprises a thermoplastic resin.

7. The method for manufacturing a semiconductor device according to claim 5, wherein the melting point of the resin layer is 100°C or lower.

8. The method for manufacturing a semiconductor device according to claim 5, wherein the resin layer comprises at least one resin selected from the group consisting of polyethylene (PE), high-density polyethylene (HDPE), polypropylene (PP), polystyrene (PS), polyvinyl acetate (PVAc), polytetrafluoroethylene (PTFE), acrylonitrile tributadiene styrene resin (ABS resin), ethylene vinyl acetate copolymer (EVA), polyolefin (PO), polyamide (PA), synthetic rubber (SR), acrylic (ACR), and polyurethane (PUR).

9. The method for manufacturing a semiconductor device according to claim 5, wherein the second substrate is heated at a temperature of 50°C to 200°C.

10. The method for manufacturing a semiconductor device according to claim 5, wherein after the second substrate is removed from the chamber, oxygen plasma treatment is further performed in the chamber.

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