Power converter and flying object

Abstract

Provided is an electric power conversion device that outputs a three-phase AC voltage, using as an output voltage a voltage in which an output of a sub-inverter (3) is added to an output of a main inverter (2) that is capable of outputting a voltage in three levels of E, 0, and -E in each of the three phases, wherein: control is performed so that the voltage of an electric power storage element that supplies a bus voltage of the sub-inverter (2) becomes E / 3; and semiconductor switching elements that constitute the main inverter (2) and the sub-inverter (3) are controlled by using a 3rd-order superposition target AC voltage, in which a 3rd-order superposition voltage that is a 3rd-order harmonic wave of a frequency that is triple the frequency of a fundamental wave is added to a target AC voltage of the fundamental wave, as a target AC voltage for the output voltage in each phase, and setting the amplitude of the 3rd-order superposition voltage so that the fundamental wave component that is included in the output voltage of the sub-inverter (2) becomes 0.

Description

[Technical Field]

[0001] This application relates to a power conversion device and an aerial object equipped therewith. [Background technology]

[0002] In recent years, electrification systems such as electric vehicles and ships, which replace engines with motors, have become widespread, and research into electrification for aircraft is also progressing worldwide due to the movement to reduce CO2 emissions. Equipment installed on aircraft requires lightness. Naturally, power conversion devices such as power supplies for aircraft equipment and motor drive inverters are required to be more efficient and lighter. In particular, among power conversion devices, as mentioned above, technology is needed to make inverters that drive AC motors for propulsion, which require a large amount of power, lighter.

[0003] While lightweight design is required for inverter equipment installed in aircraft, its output can affect the load. Wiring exists between the inverter and the motor, which is the load. If the inverter outputs an output voltage with a steep rise, a surge voltage is superimposed on that output. This surge voltage causes a partial discharge phenomenon through the dielectric at the ends of the motor windings or between the wiring, resulting in degradation of both components. In high-altitude environments like those of aircraft, discharge is more likely to occur than on the ground due to the low pressure, requiring a higher level of countermeasures than for ground-based equipment.

[0004] To suppress surges, it is necessary to install a filter as described in Non-Patent Document 1. This filter is heavy, accounting for about half of the equipment's weight, which hinders weight reduction. A multilevel inverter is a useful topology for miniaturizing the filter.

[0005] As a multi-level inverter topology, a series multi-level inverter such as that in Patent Document 1 can be cited as an effective circuit method. In a series multi-level inverter, a main inverter with a high voltage and low frequency and a sub-inverter with a low voltage and high frequency are connected in series, and the sum of the output voltages of each is output as a power conversion device. Hereinafter, this inverter will be referred to as a level control inverter.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Non-Patent Documents

[0007]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] A voltage is required for the DC bus of the sub-inverter of the level control inverter. Preparing a separate DC power source to ensure this voltage is difficult in terms of cost and size. Therefore, if all the output power is borne by the main inverter and the output power of the sub-inverter becomes zero in one cycle of the output AC, a power source-free operation can be achieved. Patent Document 2 discloses one means for achieving this power source-free operation.

[0009] According to Patent Document 2, the aforementioned power supply-less operation can be achieved by adjusting the output power by advancing or delaying the phase of the output pulses of each inverter. However, Patent Document 2 is a technology for reactive power compensation devices that handle reactive power as inverters for power systems where the output AC voltage and frequency are fixed within a specific range, and is therefore unsuitable for applications that utilize active power, such as aircraft propulsion motor drives, where the output AC voltage and frequency are not fixed.

[0010] This invention aims to provide a lightweight power converter that enables the sub-inverter to operate without a power supply, suppresses partial discharge at the load, and is suitable for applications where the output AC voltage and frequency are not fixed, and is composed of a main inverter and a sub-inverter. [Means for solving the problem]

[0011] The power conversion device disclosed herein comprises three main inverters that switch between a DC voltage E, a DC voltage -E, and a 0 voltage using a plurality of semiconductor switching elements connected in series to produce an output voltage, a power storage element that supplies a plurality of semiconductor switching elements and a DC voltage Vb, three sub-inverters that switch between Vb, -Vb, and a 0 voltage to produce an output voltage, and a control device that controls the plurality of semiconductor switching elements of the three main inverters and the plurality of semiconductor switching elements of the three sub-inverters, wherein the three main inverters each constitute a U-phase main inverter, a V-phase main inverter, and a W-phase main inverter, and the three sub-inverters each constitute a U-phase sub-inverter, a V-phase sub-inverter, and a W-phase sub-inverter, respectively, and the U-phase sub-inverter, the V-phase sub-inverter, and the W-phase sub-inverter are connected to the output terminals of the U-phase main inverter, the V-phase main inverter, and the W-phase main inverter, respectively, so that the output voltage of each phase is the sum of the output voltage of the main inverter of each phase and the output voltage of the sub-inverter of each phase, and the power conversion device outputs a three-phase AC voltage. The control device controls each phase Energy storage element The target voltage of Vb, which is the voltage of the target fundamental wave, is set to E / 3. The target AC voltage of the output voltage of each phase is set to the target AC voltage of the target fundamental wave, which is the target AC voltage of the fundamental wave, and the third superimposed voltage, which is the third harmonic with a frequency three times that of the fundamental wave, is added to it. The amplitude of the third superimposed voltage is set so that the fundamental wave component included in the output voltage of the sub-inverter of each phase becomes zero, and the semiconductor switching elements of the main inverter and the sub-inverter of each phase are controlled accordingly. [Effects of the Invention]

[0012] According to this invention, in a power conversion device consisting of a main inverter and a sub-inverter, which is applied to applications where the output AC voltage and frequency are not fixed, it is possible to eliminate the need for a power supply for the sub-inverter, suppress partial discharge at the load, and provide a lightweight power conversion device. [Brief explanation of the drawing]

[0013] [Figure 1] This is a circuit diagram showing the configuration of the power conversion device according to Embodiment 1. [Figure 2] This diagram illustrates the main inverter, sub-inverter, and output voltage of the power converter according to Embodiment 1. [Figure 3] This is a diagram illustrating the basic operation of a grayscale control inverter. [Figure 4] This is a diagram illustrating the operation of the power converter according to Embodiment 1. [Figure 5] This figure shows a graph illustrating a method for determining the rising edge phase of the output pulse of the main inverter, based on an example of the operation of the power converter according to Embodiment 1. [Figure 6] This diagram illustrates a second example of operation of the power converter according to Embodiment 1. [Figure 7] This diagram illustrates a third example of operation of the power converter according to Embodiment 1. [Figure 8]This figure shows a graph illustrating a method for determining the rising edge phase of the output pulse of the main inverter, based on another example of the operation of the power converter according to Embodiment 1. [Figure 9] This figure shows a graph illustrating a method for determining the rising edge phase of the output pulse of the main inverter, using yet another example of the operation of the power converter according to Embodiment 1. [Figure 10] This figure shows a graph of the ratio bb1 / A between the fundamental wave component bb1 of the sub-inverter and the target AC voltage amplitude A, when the target AC voltage amplitude A is changed, with the horizontal axis representing the third superimposed voltage amplitude B of the power conversion device according to Embodiment 1. [Figure 11] This figure shows a portion of the graphs from Figure 10 to illustrate the operation of the power converter according to Embodiment 1. [Figure 12] To illustrate the operation of the power converter according to Embodiment 1, Figure 11 is a diagram in which arrows indicating the direction of control have been added to the graph. [Figure 13] This is a block diagram illustrating the calculations in the control device of the power converter according to Embodiment 1. [Figure 14] This is a block diagram illustrating the calculations in the control device of the power converter according to Embodiment 2. [Figure 15] This is a block diagram illustrating the calculations in the control device of the power converter according to Embodiment 3. [Figure 16] This diagram illustrates the reset operation in the control device of the power converter according to Embodiment 3. [Figure 17] This is a schematic circuit diagram showing another example of the main inverter configuration in each embodiment. [Figure 18] This block diagram shows an example of the configuration of the control device 11 in each embodiment. [Figure 19] This is a block diagram showing the schematic configuration of a flying object according to Embodiment 4. [Modes for carrying out the invention]

[0014] Embodiment 1. The power conversion device according to Embodiment 1 will be described below with reference to the figures. Figure 1 is a circuit diagram showing the configuration of the power conversion device according to Embodiment 1. The power conversion device converts the DC from the DC source 1 into AC necessary for driving the load, which is the motor 8. In this embodiment, the DC source 1 is assumed to be supplied by DC power distribution within the aircraft, but it may also be a normal DC power supply or a battery system such as a solar cell. The power conversion device, i.e., the gradation control inverter, consists of a main inverter 2, a sub-inverter 3, and a control device 11 that controls these inverters. The output of the gradation control inverter is supplied to the load, which is the motor 8, via a filter 7.

[0015] The main inverter 2 is a three-phase inverter, and as shown in Figure 1, it is a three-level inverter that can output three levels of potential in each phase: the positive side (high potential) potential of the DC source 1, the negative side (low potential) potential, and the neutral point potential which is the midpoint between the positive and negative potentials. The three-level inverter shown in Figure 1 consists of three output phases: a U-phase main inverter arm 15 (also simply called the U-phase main inverter 15), a V-phase main inverter arm 16 (also simply called the V-phase main inverter 16), and a W-phase main inverter arm 17 (also simply called the W-phase main inverter 17). Each phase is equipped with semiconductor switching elements consisting of self-extinguishing semiconductor elements such as IGBTs or MOSFETs with four switching capabilities and diodes with two rectification capabilities.

[0016] The output terminals of the U-phase main inverter 15, V-phase main inverter 16, and W-phase main inverter 17 of the main inverter 2 are connected in series to the sub-inverters of each phase that make up the sub-inverter 3. Each phase sub-inverter is a full-bridge inverter consisting of two inverter arms, and is equipped with semiconductor switching elements consisting of self-extinguishing semiconductor elements such as IGBTs or MOSFETs, each having two switching capabilities. The sub-inverters for each phase are called the U-phase sub-inverter 4, V-phase sub-inverter 5, and W-phase sub-inverter 6. Here, capacitors, which are energy storage elements, are used as DC sources to supply the DC bus voltage to each sub-inverter. Specifically, the U-phase capacitor 41 is used as the DC source for the U-phase sub-inverter 4, the V-phase capacitor 51 is used as the DC source for the V-phase sub-inverter 5, and the W-phase Sub Inverter 6 Each sub-inverter is equipped with a W-phase capacitor 61 as its DC source. Note that, in addition to capacitors, energy storage elements such as lithium-ion batteries can also be used as the DC source for each sub-inverter.

[0017] The switching of the semiconductor switching elements constituting the main inverter 2 and sub-inverter 3 is controlled by the control device 11, which controls the output voltage waveform, and the respective semiconductors are controlled via a driver. Body The gate of the switching element is driven. Sensors also detect the voltages on the input side of the main inverter 2, namely the high-potential voltage (voltage across the P bus capacitor 13) and the low-potential voltage (voltage across the N bus capacitor 14), as well as the bus voltages of each of the three phases of the sub-inverter 3: the voltage across the U-phase capacitor 41 (Vbu), the voltage across the V-phase capacitor 51 (Vbv), and the voltage across the W-phase capacitor 61 (Vbw).

[0018] The DC bus voltage Vdc of the main inverter 2 is the voltage of DC source 1, and because it is a 3-level inverter, it is divided at the neutral point by two series capacitors. A P bus capacitor 13 is connected to the high-potential side and an N bus capacitor 14 is connected to the low-potential side, and the voltages of the P bus capacitor 13 and N bus capacitor 14 are controlled to Vm = Vdc / 2, respectively.

[0019] Furthermore, the DC bus voltages Vbu, Vbv, and Vbw (which are the voltages across the capacitors of each phase of sub-inverter 3, and are sometimes referred to as Vb as a common voltage because they are controlled to the same target voltage) are smaller than Vm, which is the voltage on the high and low potential sides of the input to main inverter 2, and are controlled to be one-third of Vm. Therefore, if the voltage level of Vdc is 2E, the voltage level of Vb will be E / 3.

[0020] Since the outputs of main inverter 2 and sub-inverter 3 are added in series to produce an output waveform that is close to a sine wave, a multi-level waveform can be output. Figure 2 is a table summarizing the output voltage of main inverter 2, the output voltage of sub-inverter 3, and the output voltage of the gradation control inverter, which is the sum of both output voltages. Main inverter 2 has three output patterns: E, 0, and -E, and sub-inverter has three patterns: E / 3, 0, and -E / 3. This shows that a ternary-type gradation control inverter is realized, outputting nine voltage levels in seamless E / 3 increments. Because the output voltage outputs nine voltage levels in seamless E / 3 increments, the surge voltage is small, and a lightweight filter can be used. Note that the voltage level of the sub-inverter, i.e., the voltage controlled as Vb, does not need to be exactly one-third of E; for example, it is sufficient if it is controlled within the range of 0.9 × E / 3 to 1.1 × E / 3. Even if Vb deviates slightly from one-third of E, the waveform error can be corrected by switching control, and the filter error is within the reactor design error range, thus achieving the effects of the present invention.

[0021] Figure 3 shows an example of the output voltage resulting from the basic operation of a grayscale control inverter. Only the positive side of the sine wave is shown. The same output voltage waveform is obtained on the negative side, simply by reversing the positive and negative signs. The horizontal axis represents phase, and the vertical axis represents voltage. Starting from phase 0 degrees, When the target waveform exceeds 0.5Vb, only sub-inverter 3 operates and outputs +E / 3. Next, when the target waveform exceeds 1.5Vb, Main Inverter 2 outputs +E and Sub Inverter 3 outputs -E / 3, for a total of 2E / 3. Next, when the target waveform exceeds 2.5Vb, Main Inverter 2 outputs +E and Sub Inverter 3 outputs 0, for a total output of 3E / 3. Next, when the target waveform exceeds 3.5Vb, Main Inverter 2 outputs +E and Sub Inverter 3 outputs +E / 3, for a total of 4E / 3. Next, when the target waveform falls below 3.5Vb, Main Inverter 2 outputs +E and Sub Inverter 3 outputs 0, for a total output of 3E / 3. Next, when the target waveform falls below 2.5Vb, Main Inverter 2 outputs E and Sub Inverter 3 outputs -E / 3, for a total of 2E / 3. Next, when the target waveform falls below 1.5Vb, only sub-inverter 3 will operate and output +E / 3. Finally, when the target waveform falls below 0.5Vb, both the main inverter and the sub-inverter output 0, resulting in a total output of 0 and a phase difference of 180 degrees. This creates a pseudo-sine wave on the positive side. In this invention, the output voltage of the main inverter 2 and the output voltage of the sub-inverter 3 are added together to create a step-like output voltage waveform that changes in steps of E / 3 (=Vb), thereby pseudo-forming a target waveform such as a sine wave. In order to pseudo-form the target waveform with a step-like output voltage waveform that changes in steps of E / 3 (=Vb), the main inverter 2 should start or stop outputting at the phase when the target waveform reaches 1.5Vb. The timing (phase) of starting and stopping the output of the main inverter 2 is the same as in Figures 4, 6, and 7 described later. The same applies to the negative side, although the signs of positive and negative are reversed. That is, the main inverter 2 should start or stop outputting at the phase when the target waveform reaches -1.5Vb.

[0022] Here, the capacitor voltage Vb, which is the DC source supplying the DC bus voltage to sub-inverter 3, needs to be controlled to E / 3. Since there is no dedicated power supply, in order for the capacitor voltage Vb of sub-inverter 3 to be maintained at E / 3, the output power of sub-inverter 3 must be set to 0 overall over the power supply cycle. As shown in Figure 3, sub-inverter 3 outputs positive and negative polarities in half a power supply cycle, so it is sufficient to match the amount of energy during the positive period with the amount of energy during the negative period. Therefore, the amount of energy for each of the positive and negative polarities of sub-inverter 3 is adjusted to match the amount of energy, and this operation is equivalent to the main inverter 2 bearing all of the AC output. Thus, it is sufficient to control which phase period the main inverter 2 starts up in.

[0023] As shown in Figure 3, the output of the sub-inverter 3 of the ternary type gradation control inverter includes a third harmonic component with a frequency three times that of the sine wave (fundamental wave). Therefore, in this embodiment, the target AC voltage output by the gradation control inverter is adjusted by superimposing a third harmonic (also called a third superimposed voltage) with adjusted amplitude onto the target AC voltage of the fundamental wave (fundamental wave target AC voltage), and adjusting the maximum voltage to adjust the power, that is, the period output by the main inverter 2. Although the output of each of the U, V, and W phases includes a third harmonic, the third harmonic is canceled out in the inter-phase voltage, leaving only the fundamental wave component. Even if the third harmonic is not completely canceled out in the inter-phase voltage, the frequency of the third harmonic does not need to be exactly three times the frequency of the fundamental wave, as long as it is within a range that does not cause problems as waveform distortion of the inter-phase voltage. For example, as a phase-to-phase voltage, the frequency of the third harmonic may deviate from three times the frequency of the fundamental wave, as long as the component with a frequency three times that of the fundamental wave component is below the percentage specified by the harmonic standards required for the application. The frequency of the third harmonic may be in the range of, for example, 2.9 to 3.1 times the frequency of the fundamental wave. Figure 4 shows an example of the voltage waveforms when the third harmonic is added to the fundamental wave target AC voltage to obtain the third superimposed target AC voltage, which is the target AC voltage of the gradation control inverter. Comparing Figure 3 and Figure 4, it can be seen that there is a change in the phase and duration of voltage output by the main inverter 2. When the third harmonic shown in Figure 4 is superimposed, the output period of the main inverter 2 becomes longer than in Figure 3, and the output power of the main inverter 2 becomes larger. In this embodiment, the direction of power increase or decrease and the amount of power increase or decrease are changed depending on the polarity and magnitude of the superimposed third harmonic.

[0024] Let's explain the period during which Main Inverter 2 outputs. First, there are three patterns for the period during which Main Inverter 2 outputs, depending on the target AC voltage amplitude A of the fundamental wave and the amplitude B of the third harmonic being added, i.e., the third superimposed voltage (referred to as the third superimposed voltage amplitude). To simplify the formula, let Vb (=E / 3) be the DC bus voltage of Sub Inverter 3 (the voltage across the capacitor of Sub Inverter 3), and Vm (=E) be the voltage of Main Inverter 2.

[0025] The first main pattern is a pattern in which the amplitude polarity of the third harmonic is the same as the amplitude polarity of the fundamental wave. At this time, the target voltage Vr is expressed by Equation (1). Vr = Asinθ + Bsin3θ (1) Here, Equation (2) holds with respect to the phase θ0 at which the main inverter starts outputting. Vm / 2 = 1.5Vb = (A + 3B)sinθ0 - 4Bsin 3 θ0(2) Furthermore, by setting sinθ0 as X, Equation (3) is obtained. 4BX 3 - (A + 3B)X + 1.5Vb = 0 (3)

[0026] When obtaining the solutions of the cubic equation of Equation (3), they are X1, X2, and X3 expressed by Equation (4), Equation (5), and Equation (6). X1 = (-27a0a3 2 + L·i)) 1 / 3 / (3(2) 1 / 3 a3) - (2) 1 / 3 a1 / (-27a0a3 2 + L·i) 1 / 3 (4) X2 = ω(-27a0a3 2 +L·i)) 1 / 3 / (3(2) 1 / 3 a3) - ω 2 (2) 1 / 3 a1 / (-27a0a3 2 +L·i) 1 / 3 (5) X3 = ω 2 (-27a0a3 2 +L·i)) 1 / 3 / (3(2) 1 / 3 a3) - ω(2) 1 / 3 a1 / (-27a0a3 2 +L·i) 1 / 3 (6) Note that a0 = 1.5Vb, a1 = -(A + 3B), a3 = 4B, L = (-4·27(a1a3) 3 -(27a0a3 2 ) 2 ) 1 / 2i is i = √(-1), and ω = -1 / 2 + (√(3) / 2)i.

[0027] For example, when A is 30, B is 10, Vb is 10, and Vm is 30, the graph of the function Y(X) on the left side of equation (3) is shown in Figure 5. The results for which this function is 0 are X1 to X3. Here, the only solution where sinθ is in the range of 0 to 1 is X3, and the phase at which this sinθ becomes X3 is the rising phase θ of the main inverter 2, and the falling phase is 180 degrees -θ.

[0028] The second main pattern is one in which the amplitude polarity of the third harmonic is opposite to that of the fundamental wave (B is negative), and the output pulse of main inverter 2 is only one pulse on the same polarity side. An example waveform is shown in Figure 6. The solution for the second main pattern can be obtained using equations (4), (5), and (6), the same as for the first main pattern.

[0029] The third main pattern is one in which the amplitude polarity of the third harmonic is opposite to that of the fundamental wave (B is negative), and the output pulse of main inverter 2 generates one pulse on the positive side and two pulses on the opposite polarity (negative side). An example waveform is shown in Figure 7. For the positive pulse, the solution is obtained using equations (4), (5), and (6), the same as for the first main pattern. For the pulse on the opposite polarity side, a0 can be changed to -Vm / 2 and the solution can be obtained using equations (4), (5), and (6).

[0030] As an example of the positive output pulse of main inverter 2, let A be 10, B be -25, Vb be 10, Vm be 30, and a0 be Vm / 2. Figure 8 shows a graph where the left side of equation (3) is the function Y(X). The variable X for which function Y(X) is 0 is the solution, and it ranges from X1 to X3. Here, the only solution where sinθ is in the range of 0 to 1 is X2, and the phase at which this sinθ becomes X2 is the rising phase θ of the main inverter. 00 Therefore, the falling edge is 180 degrees - θ 00 This is the result.

[0031] Similarly, as an example of the negative output pulse of main inverter 2, Figure 9 shows a graph where equation (3) is the function Y(X), with A = 10, B = -25, Vb = 10, Vm = 30, and a0 = -Vm / 2. The variable X for which function Y(X) becomes 0 is the solution, and it ranges from X1 to X3. Here, the solutions where sinθ is in the range of 0 to 1 are X2 and X3. The phase from the side closer to sinθ0 to X3 is the phase θ at which the main inverter rises to the negative side. 01 The phase θ such that sinθ becomes X² 02 This is the phase in which the main inverter falls. For the second negative output pulse, the above θ is used from 180 degrees. 01 and θ 02 The values ​​obtained by subtracting these factors correspond to the falling phase and rising phase, respectively.

[0032] Next, we determine the third harmonic, the third superimposed voltage amplitude B, which is the third harmonic to be superimposed. First, we find the fundamental wave component b included in the output voltage of the main inverter 2, which is an odd function. m1 It can be expressed by Fourier series expansion as equation (7). b m1 =(4Vm / π)·(cosθ 00 +cosθ 02 -cosθ 01 ) (7)

[0033] The fundamental wave component b of Main Inverter 2 m1 and the fundamental wave component b included in the output voltage of sub-inverter 3 b1 And equation (8) holds true for the target AC voltage amplitude A. A=b m1 +b b1 (8) Therefore, the fundamental wave component b of sub-inverter 3. b1 This can be found using equation (9). b b1 =Ab m1 =A-(4Vm / π)·(cosθ 00 +cosθ 02 -cosθ 01 ) (9)

[0034] Since the condition for voltage stabilization in sub-inverter 3 is that the total power is 0, if the calculation result of equation (9) above, which shows the fundamental wave component, is 0, then no power is generated in sub-inverter 3, and the DC bus voltage of the sub-inverter is stable.

[0035] Figure 10 shows, as an example, the fundamental wave component b of sub-inverter 3, with the target AC voltage amplitude A as the parameter, and the third superimposed voltage amplitude B on the horizontal axis, when the bus voltage Vm of main inverter 2 is set to 30V and the bus voltage Vb of sub-inverter 3 is set to 10V. b1 b is the ratio of b to the target AC voltage amplitude A. b1 This shows the value of / A. Figure 10 shows graphs for varying the target AC voltage amplitude A from 5V to 35V.

[0036] From the graph in Figure 10, b b1 Each of the / A lines has a point where it intersects the zero line. In other words, if we can control the third superimposed voltage so that it operates at this intersection with the zero line, then the fundamental wave component b included in the output voltage of sub-inverter 3 will be b1 This allows us to set the fundamental wave component b in the output voltage of each phase of the sub-inverter to zero, which in turn allows us to stabilize the bus voltage Vb of sub-inverter 3. In other words, with respect to the target AC voltage amplitude A, the fundamental wave component b included in the output voltage of each phase sub-inverter is... b1 The third superimposed voltage amplitude B at which the value becomes 0 can be determined, and the third superimposed voltage of the determined third superimposed voltage amplitude B can be added to the fundamental wave target AC voltage of the target AC voltage amplitude A to obtain the third superimposed target AC voltage, and the main inverter and sub-inverter can then be controlled accordingly.

[0037] Figure 11 shows the waveforms extracted from Figure 10 when the target AC voltage amplitude A is 35V and when A is 10V. As shown in the figure, when A is 35V, the fundamental wave component b of sub-inverter 3 is... b1 b is the ratio of the target AC voltage amplitude A to b b1 The slope of / A is always negative, and there is one intersection with the zero line. When A is 10V, the fundamental wave component b of sub-inverter 3. b1 b is the ratio of the target AC voltage amplitude A to bb1 The slope of / A has an extreme point where it changes from negative to positive, and there are two points of intersection with the zero line. At the point on the right of the two intersections, b with respect to the controlled variable b1 The slope of / A is opposite to the slope at the intersection located on the left. Figure 12 is Figure 11 with arrows indicating the direction of control.

[0038] Therefore, in order to reach the intersection point in each case, the direction of increase or decrease in the amplitude of the superimposed third-order superimposed voltage, which is necessary to control the bus voltage Vb of sub-inverter 3 to the target value, must be reversed with respect to the polarity of the deviation of the bus voltage Vb of sub-inverter 3. Thus, when the control device 11 calculates the third-order superimposed voltage amplitude B, which is the third harmonic for controlling the bus voltage Vb of sub-inverter 3, the condition for changing the control amount with respect to the deviation should be in the same direction.

[0039] Even if there are two intersections, only the intersection that results in the same control direction as when there is only one intersection is used. In order to match this control direction, a third-order superimposed limiter, which is an upper limiter on the third-order superimposed voltage amplitude B, is set as a forbidden band to prevent it from entering the positive slope, and it is necessary to prevent the control system from reaching the intersection located on the right side.

[0040] The appropriate limiter value is one that is greater than or equal to the third superimposed voltage amplitude B at the intersection located on the left side, which is the low-voltage side and the solution, and less than or equal to B at the pole where the direction of the slope changes. In this embodiment, for each condition of the target AC voltage amplitude A, if there is one intersection, the intersection is found, and if there are two intersections, the pole, which is the point where the slope changes, is found. An approximate formula is created from the plotted values ​​with the target AC voltage amplitude A as the amount of change (variable), and this approximate formula is used in the control device 11. Therefore, the control device 11 calculates the approximate formula in the control routine. A margin may be provided so that the plotted value is greater than the intersection if there is one intersection, and smaller than the pole if there are two intersections.

[0041] Furthermore, as shown in the graph in Figure 12 under the condition that the target AC voltage amplitude A is 10V, if the third superimposed voltage amplitude B is small even on the right-hand intersection side, the control will be temporarily deactivated, but the slope will move from the positive polarity slope to the negative polarity slope, towards the desired slope. Therefore, if the value is smaller than that of the positive polarity intersection, it is possible to set a limiter on the third superimposed voltage amplitude B.

[0042] Of course, the control device 11 can also achieve this by solving an approximate formula in advance, creating a map of the results as limiter values, saving it in memory, and reading it in the control routine, rather than performing the calculation of a complex function every time.

[0043] In summary, given a target AC voltage amplitude A, the fundamental wave component b of the sub-inverter 3 is given relative to A. b1 The third-order superimposed voltage amplitude B, at which the value is 0, is determined using an approximate formula or map stored in the control device 11. From the solution to equation (3), the rising and falling phases of the pulses of the main inverter 2 are determined, as well as the rising and falling phases of the pulses of the sub-inverter, and each semiconductor switching element is controlled accordingly. By controlling in this way, AC voltages with the third-order superimposed voltage superimposed on the fundamental wave are output as the U-phase, V-phase, and W-phase outputs of the gradation control inverter, and a three-phase AC voltage with the third-order superimposed voltage canceled out can be generated as the inter-phase voltage. At this time, the total power of the sub-inverter 3 in one cycle is 0. The target voltage of the capacitor Vb of the sub-inverter 3 is set to E / 3. The rising and falling phases of the pulses of the sub-inverter are determined as phases where the target third-order superimposed AC voltage is E / 3, 2E / 3, 0, -E / 3, and -2E / 3.

[0044] Figure 13 is a block diagram illustrating the calculations for determining the third superimposed voltage amplitude B, which is the superimposed third harmonic, and the inverter output voltage command values ​​Vr (Vru, Vrv, Vrw), which are the third superimposed target AC voltages for the U, V, and W phases, within the control device 11 of the power conversion device according to Embodiment 1.

[0045] First, calculations are performed based on the U-phase. The difference ΔVbu (also called the first deviation) between the sub-DC bus voltage target value (target value of the capacitor voltage) R_Vb, which is the target value of the sub-inverter DC bus voltage of sub-inverter 3, and the U-phase sub-DC bus detection value Vbu, which is the detected value of the U-phase sub-inverter bus voltage, i.e., the voltage of the U-phase capacitor, is calculated by subtractor 101u. An integral controller 102 is used with this deviation ΔVbu as input to calculate the control variable Bi as its output. In addition, a U-phase proportional controller 103u is used with the deviation ΔVbu as input to calculate the control variable Bpu as its output. The sum of the control variable Bi, which is the output of integral controller 102, and the U-phase control variable Bpu, which is the output of U-phase proportional controller 103u, is calculated by adder 104u to become the third superimposed voltage amplitude Bu in the U-phase inverter. The control system that derives the third superimposed voltage amplitude Bu from the first deviation ΔVbu described above is a normal proportional-integral control (PI control). Furthermore, this third-order superimposed voltage amplitude Bu passes through the third-order superimposed limiter 105u, and Bu(sin3θ) is the instantaneous value of the third-order superimposed voltage superimposed by multiplying it by sin3θ, which is three times the frequency of the target AC voltage, the fundamental wave Asinθ. The sum of Asinθ and Bu(sin3θ) added by the adder 106u becomes the U-phase inverter output voltage command value Vru, and the gradation control inverter is output controlled to satisfy this command value.

[0046] Next, in the V phase, the difference ΔVbv (also called the second deviation) between the target value R_Vb of the sub-DC bus voltage and the detected value Vbv of the DC bus voltage of the V phase sub-inverter 3 is calculated using the subtractor 101v. The V phase proportional controller 103v, which takes this deviation ΔVbv as input, is used to calculate the control variable Bpv as its output.

[0047] The control variable Bi, which is the output of the integral controller 102 obtained by the control calculation in the U phase, and the V phase control variable Bpv, which is the output of the V phase proportional controller 103v, are added together by the adder 104v to form the third superimposed voltage amplitude Bv in the V phase inverter. Furthermore, this third superimposed voltage amplitude Bv passes through the third superimposed limiter 105v, and the instantaneous value of the third superimposed voltage superimposed is Bv(sin3θ), which is obtained by multiplying the fundamental wave target AC voltage Asinθ by sin3θ, which has a frequency three times the frequency of the fundamental wave. The sum of the V phase fundamental wave Asin(θ+2π / 3) and Bv(sin3θ) added together by the adder 106v becomes the V phase inverter output voltage command value Vrv, and the gradation control inverter is output controlled to satisfy this command value.

[0048] Next, in the W phase, the difference ΔVbw (also called the third deviation) between the sub-DC bus voltage target value R_Vb and the DC bus voltage detection value Vbw of the W phase sub-inverter 3 is calculated using the subtractor 101w. The W phase proportional controller 103w, which takes this deviation ΔVbw as input, is used to calculate the control variable Bpw as its output. The control variable Bi, which is the output of the integral controller 102 obtained in the control calculation in the U phase, and the control variable Bpw, which is the output of the W phase proportional controller 103w, are added together in the adder 104 w The sum of these values ​​is the third superimposed voltage amplitude Bw in the W-phase inverter. Furthermore, this third superimposed voltage amplitude Bw passes through the third superimposed limiter 105w, and Bw(sin3θ), which is the instantaneous value of the third superimposed voltage superimposed by multiplying it by sin3θ, which is three times the frequency of the fundamental wave target AC voltage Asinθ, is obtained. The sum of the fundamental wave of the W-phase, Asin(θ+4π / 3), and Bw(sin3θ) added by the adder 106w becomes the W-phase inverter output voltage command value Vrw, and the gradation control inverter is output controlled to satisfy this command value.

[0049] By using a common integrating controller 102 across the three-phase control systems, the third superimposed voltage is roughly matched across the three phases, preventing the generation of a zero-sequence voltage. The proportional controllers, separate for each phase, are merely for fine-tuning, and the ideal setting is to apply a limiter to ensure that the zero-sequence voltage remains below a predetermined value due to this fine-tuning component.

[0050] For example, in the characteristics shown in Figure 10, if the target AC voltage amplitude A is in the range of 20V to 35V, b b1 In applications where only the target AC voltage amplitude A, which is within the range where there are no poles in the characteristics of A relative to B, is used, the third-order superimposed limiter can be omitted in each phase.

[0051] According to this embodiment 1, in a gradation control inverter configured to obtain the output voltage by adding the output voltage of the sub-inverter 3 to the output voltage of the main inverter 2, the voltage Vb of the capacitor that serves as the DC source for the sub-inverter 3 is controlled to be E / 3 with respect to the input voltage E (=Vdc / 2) of the main inverter 2. Furthermore, even if the target AC voltage amplitude A and frequency change, the third superimposed voltage amplitude B that makes the fundamental wave component of the sub-inverter 3 zero is determined, and the third superimposed target AC voltage, which is the voltage obtained by adding the third superimposed voltage of the third superimposed voltage amplitude B to the fundamental wave target AC voltage of the target AC voltage amplitude A, is controlled as the target AC voltage of the gradation control inverter. As a result, in a 9-level gradation control inverter that allows for miniaturization of the filter, even in applications where the target AC voltage and frequency change, a dedicated power supply is not required for the DC bus of the sub-inverter 3, thus enabling the provision of a lighter inverter.

[0052] Embodiment 2. Figure 14 is a block diagram illustrating the calculations for determining the third superimposed voltage amplitude B, which is the superimposed third harmonic, and the inverter output voltage command values ​​Vr (Vru, Vrv, Vrw), which are the third superimposed target AC voltages for the U, V, and W phases, within the control device of the power converter according to Embodiment 2. The configuration of the power converter in Embodiment 2 is the same as in Figure 1.

[0053] First, calculations are performed based on the U-phase. The difference ΔVbu between the target value R_Vb of the sub-DC bus voltage and the detected value Vbu of the DC bus voltage of the U-phase sub-inverter 3 is calculated using the subtractor 101u. The integral controller 102, which takes this difference ΔVbu as input, is used to calculate the control variable Bi as its output. Next, the target AC voltage amplitude A is input to the feedforward amount calculator 107, which outputs the feedforward control variable Bff of the tertiary superimposed voltage. This is added to the control variable Bi, which is the output of the integral controller 102, by the adder 108, and the total value Bif is output. In addition, the U-phase proportional controller 103u, which takes the difference ΔVbu as input, is used to calculate the control variable Bpu as its output. The total output amount Bif from the integral controller 102 and the feedforward amount calculator 107, and the U-phase control variable Bpu are added together by the adder 104u to obtain the tertiary superimposed voltage amplitude Bu. Furthermore, this third-order superimposed voltage amplitude Bu passes through the third-order superimposed limiter 105u, and Bu(sin3θ) is the instantaneous value of the third-order superimposed voltage superimposed by multiplying the fundamental wave Asinθ of the target output AC voltage by sin3θ, which has a frequency three times that of the fundamental wave Asinθ. The sum of Asinθ and Bu(sin3θ) added by the adder 106u becomes the U-phase inverter output voltage command value Vru, and the gradation control inverter is output controlled to satisfy this command value.

[0054] Next, in the V phase, the difference ΔVbv between the target value R_Vb of the sub-DC bus voltage and the detected bus voltage Vbv of the V phase sub-inverter 3 is calculated by subtractor 101v. Using this difference ΔVbv as input, the V phase proportional controller 103v is used to calculate the control amount Bpv as its output. Next, the sum of the total output amount Bif obtained in the U phase calculation from the integral controller 102 and the feedforward amount calculator 107 and the control amount Bpv from the V phase proportional controller 103v is added by adder 104v to obtain the third superimposed voltage amplitude Bv. Furthermore, this third superimposed voltage amplitude Bv passes through the third superimposed limiter 105v, and the instantaneous value of the third superimposed voltage is Bv(sin3θ), which is obtained by multiplying it by sin3θ as three times the frequency of the target AC fundamental wave Asinθ. The V-phase fundamental wave, Asin(θ+2π / 3), and Bv(sin3θ) are added together using an adder 106V. The sum of these two values ​​becomes the V-phase inverter output voltage command value Vrv, and the gradation control inverter is controlled to output such a value.

[0055] Next, in the W phase, the deviation ΔVbw between the target value R_Vb of the sub-DC bus voltage and the detected value Vbw of the W phase sub-inverter DC bus voltage is calculated using the subtractor 101w. The W phase proportional controller 103w, which takes this deviation ΔVbw as input, is used to calculate the control amount Bpw as its output. The sum of the total output amount Bif of the integral controller 102 and the feedforward amount calculator obtained in the U phase control calculation and the control amount Bpw of the W phase proportional controller 103w, obtained by adding them with the adder 104w, is the third superimposed voltage amplitude Bw. Furthermore, this third superimposed voltage amplitude Bw passes through the third superimposed limiter 105w, and Bw(sin3θ), obtained by multiplying it by sin3θ as three times the frequency of the target AC fundamental wave Asinθ, is the instantaneous value of the third superimposed voltage. The W-phase fundamental waves, Asin(θ+4π / 3) and Bw(sin3θ), are added together using a 106W adder. The sum of these values ​​becomes the W-phase inverter output voltage command value Vrw, and the gradation control inverter is output-controlled based on this command value.

[0056] Here, the feedforward quantity calculator 107 calculates the fundamental wave component b of the sub-inverter 3. b1 The third-order superimposed voltage amplitude B, which is zero, is calculated, and an approximate formula is obtained using the target AC voltage amplitude A as the variable. This approximate formula is then implemented as a function in the control system, and the result of the calculation of the implemented function for the input target AC voltage amplitude A is output as the feedforward calculation result.

[0057] According to this embodiment, in a 9-level gradation control inverter that allows for miniaturization of the filter, a dedicated power supply for the sub-inverter is not required, and the sub-inverter bus voltage control is also accelerated, making it possible to provide a lightweight inverter that can be applied to loads requiring steeper changes.

[0058] Embodiment 3. Figure 15 is a block diagram illustrating the calculations for determining the third superimposed voltage amplitude B, which is the superimposed third harmonic, and the inverter output voltage command values ​​Vr (Vru, Vrv, Vrw), which are the third superimposed target AC voltages for the U, V, and W phases, within the control device of the power converter according to Embodiment 3. The configuration of the power converter in Embodiment 3 is the same as in Figure 1.

[0059] First, calculations are performed based on the U phase. The difference ΔVbu between the target value R_Vb of the sub-DC bus voltage and the detected value Vbu of the DC bus voltage of the U phase sub-inverter 3 is calculated using the subtractor 101u. The control variable Bi is calculated using the input ΔVbu of the reset integral controller 112, and its output.

[0060] The reset-equipped integral controller 112 has the function of returning the accumulated integral amount to its initial value when a reset signal is input. The reset signal, which is the trigger for the reset, is the signal output from the reset detector 109. The reset detector 109 determines the output fundamental wave component b of the sub-inverter as shown in Figure 10 for the input target AC voltage amplitude A. b1 When the condition changes from A, where there is one intersection point where the value is 0, to A, where there are two intersection points, a toggle-type reset signal is output only for that calculation period.

[0061] The initial value is less than or equal to the appropriate value of the required third-order superimposed voltage amplitude B. Furthermore, as described above, in the condition where there are two intersections, the appropriate value of B is the intersection shown on the left, selected to align the direction of control, as explained in Embodiment 1.

[0062] Figure 16 shows, as an example, the third superimposed voltage amplitude B and the fundamental wave component b of the output voltage of sub-inverter 3 when the target AC voltage amplitude A decreases, in this case when A decreases from a 35V condition to a 10V condition. b1 In relation to this, the diagram illustrates that the control variable Bi accumulated in the integrating controller is returned to its initial value by resetting, so that A moves to the negative polarity slope region when the voltage is 10V.

[0063] In this third embodiment, the fundamental wave component b of the sub-inverter 3 described in the second embodiment is b1 The result of calculating the third-order superimposed voltage amplitude B for which is zero is used as the initial value in an approximation formula where the target AC voltage amplitude A is the variable parameter, and the result of the calculation when the target AC voltage amplitude A is 0.

[0064] Of course, an approximation formula that changes depending on the value of A may also be used. This approximation formula can be created by plotting the value obtained by subtracting the margin voltage in the negative direction from the appropriate solution of B for the target AC voltage amplitude A, and then implementing it as a function in the control device 11.

[0065] Furthermore, instead of performing complex calculations on the function each time in the control device 11, it can also be achieved by solving an approximate formula in advance, creating a map with a list of results as initial values, saving it in memory, and reading it in the control routine.

[0066] Next, the target AC voltage amplitude A, which is the fundamental wave, is input to the feedforward amount calculator 107 and output as the feedforward control amount Bff of the third superimposed voltage. This is added to the control amount Bi, which is the output of the reset-equipped integral controller 112, by the adder 108, and Bif is output. In addition, the deviation ΔVbu is input to the U-phase proportional controller 103u, and the control amount Bpu is calculated as its output. The sum of the total output amount Bif from the reset-equipped integral controller 112 and the feedforward amount calculator 107 and the U-phase control amount Bpu, added by the adder 104u, is the third superimposed voltage amplitude Bu.

[0067] Although Figure 15 utilizes the feedforward amount calculation described in Embodiment 2, it is not necessary to use the feedforward amount calculation as in Embodiment 1.

[0068] Furthermore, this third-order superimposed voltage amplitude Bu passes through the third-order superimposed limiter 105u, and Bu(sin3θ), which is the instantaneous value of the third-order superimposed voltage superimposed by multiplying it by sin3θ as three times the frequency of the target AC fundamental wave Asinθ, is the sum of Asinθ and Bu(sin3θ) added by the adder 106u, which becomes the U-phase inverter output voltage command value Vru, and the gradation control inverter is output controlled to satisfy this command value.

[0069] Next, in the V phase, the difference ΔVbv between the target value R_Vb of the sub-DC bus voltage and the detected value Vbv of the DC bus voltage of the V-phase sub-inverter 3 is calculated using the subtractor 101v. The V-phase proportional controller 103v, which takes this difference ΔVbv as input, is used to calculate the control amount Bpv as its output. Next, the total output amount Bif of the reset integral controller 112 and the feedforward amount calculator 107 obtained in the control calculation in the U phase, and the control amount Bpv of the V-phase proportional controller 103v are added together in the adder 104v to obtain the third superimposed voltage amplitude Bv. Furthermore, this third superimposed voltage amplitude Bv passes through the third superimposed limiter 105v, and the instantaneous value of the third superimposed voltage superimposed is Bv(sin3θ), which is obtained by multiplying it by sin3θ as three times the frequency of the target AC fundamental wave Asinθ. The V-phase fundamental wave, Asin(θ+2π / 3), and Bv(sin3θ) are added together using an adder 106V. The sum of these two values ​​becomes the V-phase inverter output voltage command value Vrv, and the gradation control inverter is controlled to output such a value.

[0070] Next, in the W phase, the difference ΔVbw between the target value R_Vb of the sub-DC bus voltage and the detected value Vbw of the DC bus voltage of the W phase sub-inverter 3 is calculated using the subtractor 101w. The W phase proportional controller 103w, which takes this difference ΔVbw as input, is used to calculate the control amount Bpw as its output. Next, the total output amount Bif of the reset integral controller 112 and the feedforward amount calculator 107 obtained in the control calculation in the U phase, and the control amount Bpw of the W phase proportional controller 103w are added together in the adder 104w to obtain the third superimposed voltage amplitude Bw. Furthermore, this third superimposed voltage amplitude Bw passes through the third superimposed limiter 105w, and the instantaneous value of the third superimposed voltage superimposed is Bw(sin3θ), which is obtained by multiplying it by sin3θ as three times the frequency of the target AC fundamental wave Asinθ. The sum of the fundamental waves of the W phase, Asin(θ+4π / 3) and Bw(sin3θ), obtained by adding them with a 106W adder, becomes the W phase inverter output voltage command value Vrw. The gradation control inverter is then controlled to output a value that satisfies this command value.

[0071] This third embodiment is an alternative control method to the first and second embodiments, which can reduce the amount of control calculation required for sub-inverter bus voltage control in a 9-level gradation control inverter that can miniaturize the filter, and can provide a lightweight inverter.

[0072] In Figures 13 to 15, the controller that takes ΔVbu (first deviation) as input, or ΔVbu and target AC voltage amplitude A as input, and outputs the third superimposed voltage amplitude Bu, is referred to as the first controller; the controller that takes ΔVbv (second deviation) as input and outputs the third superimposed voltage amplitude Bv is referred to as the second controller; and the controller that takes ΔVbw (third deviation) as input and outputs the third superimposed voltage amplitude Bw is referred to as the third controller. Furthermore, if a third superimposed limiter is provided, the first, second, and third controllers shall each include the third superimposed limiter.

[0073] In the embodiments described above, the main inverter 2 is shown as a neutral-clamp type 3-level inverter as shown in Figure 1. However, a T-type 3-level inverter with a bidirectional switch that short-circuits the neutral point of the DC source 1 and the AC output of each phase, as shown in Figure 17, may also be used.

[0074] The control device 11 shown in Figure 1 specifically includes an arithmetic processing unit 11p such as a CPU (Central Processing Unit), a storage device 11m that exchanges data with the arithmetic processing unit 11p, and an input / output interface 11i that inputs and outputs signals between the arithmetic processing unit 11p and the outside, as shown in Figure 18. The arithmetic processing unit 11p may include an ASIC (Application Specific Integrated Circuit), an IC (Integrated Circuit), a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), and various signal processing circuits. Furthermore, multiple arithmetic processing units 11p of the same or different types may be provided, and each processing unit may be assigned to one of them. The storage device 11m may include a RAM (Random Access Memory) configured to allow reading and writing of data from the arithmetic processing unit 11p, or a ROM (Read Only Memory) configured to allow reading of data from the arithmetic processing unit 11p. The input / output interface 11i consists of, for example, an A / D converter that inputs sensor signals output from voltage sensors, current sensors, etc., provided in the main inverter 2 and sub-inverter 3 to the processing unit 11p, and a drive circuit for outputting drive signals to each semiconductor switching element.

[0075] Embodiment 4. This embodiment is an embodiment of a flying object equipped with any of the power conversion devices according to Embodiments 1 to 3. The flying object of this embodiment is, for example, an aircraft, helicopter, drone, flying car, etc.

[0076] Figure 19 is a schematic block diagram of the flying object 200 according to Embodiment 4. 1 The flying object 200 is equipped with a power conversion device as described in any of the three above. The flying object 200 is equipped with a power source 214, a DC power supply 215 connected to the power source 214, a DC / DC converter 216 connected to the DC power supply 215 and equipped with, for example, a step-down chopper circuit that converts it to a predetermined voltage, an inverter 213 that converts the DC power stepped down by the DC / DC converter 216 to AC power, a load 212 to which power is supplied from the inverter 213, and a control device 211 that controls the DC / DC converter 216 and the inverter 213. Here, the load 212 is a propulsion system load for obtaining thrust, for example, an electric motor.

[0077] The gradation control inverter of the power conversion device according to Embodiment 1, Embodiment 2, or Embodiment 3 is used as an inverter 213 mounted on the flying object 200. Here, the DC / DC converter 216 corresponds to the DC source 1 in Figure 1. The control device 211 also includes the functions of the control device 11 in Figure 1. Devices mounted on flying objects that fly in the air, such as aircraft, require lightweight design and reliability, such as resistance to discharge. For this reason, a power conversion device equipped with the gradation control inverter described in Embodiment 1, Embodiment 2, or Embodiment 3 as the inverter 213 is mounted on the propulsion power system 210. This allows for weight reduction, suppression of partial discharge, and improved reliability.

[0078] While this application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but are applicable individually or in various combinations to the embodiments. Accordingly, countless variations not illustrated are envisioned within the scope of the art disclosed herein. For example, these include modifying, adding or omitting at least one component, or extracting at least one component and combining it with a component from another embodiment. [Explanation of Symbols]

[0079] 1 DC source, 2 Main inverter, 3 Sub-inverter, 4 U-phase sub-inverter, 5 V-phase sub-inverter, 6 W-phase sub-inverter, 11 Control device, 15 U-phase main inverter, 16 V-phase main inverter, 17 W-phase main inverter, 41, 51, 61 Capacitors (energy storage elements), 102 Integral controller, 103u U-phase proportional controller, 103v V-phase proportional controller, 103w W-phase proportional controller, 105u, 105v, 105w Third-order superimposed limiter, 107 Feedforward quantity calculator, 109 Reset decision unit, 112 Integral controller with reset, 200 Flying object, 212 Load, 215 DC power supply

Claims

1. Three main inverters, each using multiple semiconductor switching elements connected in series, switch between a DC voltage E, a DC voltage -E, and a voltage of 0 to produce an output voltage. Three sub-inverters, each having multiple semiconductor switching elements and a storage element that supplies a DC voltage Vb, switch between Vb, -Vb, and 0 voltage to produce an output voltage. The system comprises a control device that controls the plurality of semiconductor switching elements of the three main inverters and the plurality of semiconductor switching elements of the three sub-inverters, The three main inverters each constitute a U-phase main inverter, a V-phase main inverter, and a W-phase main inverter, The three sub-inverters each constitute a U-phase sub-inverter, a V-phase sub-inverter, and a W-phase sub-inverter, The U-phase sub-inverter, the V-phase sub-inverter, and the W-phase sub-inverter are connected to the output terminals of the U-phase main inverter, the V-phase main inverter, and the W-phase main inverter, respectively, so that the voltage obtained by adding the output voltage of each phase's sub-inverter to the output voltage of the main inverter of each phase becomes the output voltage of each phase. In a power converter that outputs a three-phase AC voltage, The control device sets the target voltage Vb of the energy storage element in each phase to E / 3, adds a third-order superimposed target AC voltage (a third harmonic with a frequency three times that of the fundamental wave) to the target AC voltage of the target fundamental wave, and sets the amplitude of the third-order superimposed voltage to set the target AC voltage of the output voltage in each phase to set the target AC voltage of the output voltage in each phase to set the amplitude of the third-order superimposed voltage to zero, thereby controlling the semiconductor switching elements of the main inverter and the sub-inverter in each phase.

2. The control device takes the amplitude b of the fundamental wave component included in the output voltage of each phase sub-inverter as a target AC voltage amplitude A, which is the amplitude of the fundamental wave target AC voltage. b1 The power conversion device according to claim 1, which determines the third superimposed voltage amplitude B, which is the amplitude of the third superimposed voltage such that the value becomes 0, and adds the determined third superimposed voltage of the third superimposed voltage amplitude B to the fundamental wave target AC voltage of the target AC voltage amplitude A to set the third superimposed target AC voltage.

3. The control device uses A as a variable, and the b b1 The power conversion device according to claim 2, wherein B is an approximate formula for which the value of B is 0, and B is determined using the approximate formula.

4. The control device is A first controller that takes as input a first deviation, which is the difference between the target voltage of the energy storage element and the detected voltage of the energy storage element of the U-phase sub-inverter, and outputs Bu, which is the third superimposed voltage amplitude of the U-phase, A second controller takes as input a second deviation, which is the difference between the target voltage of the energy storage element and the detected voltage of the energy storage element of the V-phase sub-inverter, and outputs Bv, which is the third superimposed voltage amplitude of the V-phase. The system includes a third controller that takes a third deviation, which is the difference between the target voltage of the energy storage element and the detected voltage of the energy storage element of the W-phase sub-inverter, as input and outputs Bw, which is the third superimposed voltage amplitude of the W-phase. The power conversion device according to claim 2, wherein the output of the first controller, the second controller, and the third controller are used to set the third superimposed target AC voltage for each phase.

5. The first controller is configured to determine Bu by adding the output of an integral controller that takes the first deviation as input and the output of a U-phase proportional controller that takes the first deviation as input. The second controller is configured to calculate Bv by adding the output of the integral controller and the output of the V-phase proportional controller, which takes the second deviation as input. The third controller is configured to determine Bw by adding the output of the integral controller and the output of the W-phase proportional controller, which takes the third deviation as input. The power conversion device according to claim 4.

6. The first controller is configured to calculate Bu by adding the output of an integral controller that takes the first deviation as input, the output of a feedforward quantity calculator that takes the target AC voltage amplitude A as input, and the output of a U-phase proportional controller that takes the first deviation as input. The second controller is configured to calculate Bv by adding the output of the integral controller, the output of the feedforward quantity calculator, and the output of the V-phase proportional controller which takes the second deviation as input. The third controller is configured to calculate Bw by adding the output of the integral controller, the output of the feedforward quantity calculator, and the output of the W-phase proportional controller which takes the third deviation as input. The power conversion device according to claim 4.

7. The power conversion device according to claim 5 or 6, wherein the integral controller has a reset function, and the integral amount of the integral controller is reset to an initial value by a command from a reset determination device that determines whether or not to reset based on the target AC voltage amplitude A.

8. The power conversion device according to any one of claims 4 to 6, wherein the first controller, the second controller, and the third controller are each provided with a third-order superimposed limiter for setting upper limits on the values ​​of Bu, Bv, and Bw, respectively.

9. The power conversion device according to claim 8, wherein the upper limit set by the third superimposed limiter is set based on the target AC voltage amplitude A.

10. An flying object comprising a power source, a load that uses the power of the power source, and a power conversion device according to any one of claims 1 to 6, which converts the power of the power source and supplies power to the load.

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