Multilayer ceramic capacitor and method for manufacturing the same
The multilayer ceramic capacitor with perovskite oxides and indium isolation layers addresses the reduction in insulation resistance and MTTF by enhancing reliability and service life through improved insulation and high-temperature stability.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-02-25
- Publication Date
- 2026-03-31
AI Technical Summary
As the number of stacked inner electrode layers in a multilayer ceramic capacitor increases, the thickness of the dielectric layer decreases, leading to reduced insulation resistance, reliability, high-temperature load life, and mean time to failure (MTTF), thereby shortening the service life.
A multilayer ceramic capacitor design incorporating perovskite oxides with borosilicate glass and indium isolation layers, where inner electrode layers are made of nickel with indium addition, and dielectric layers contain indium isolation layers at grain boundaries, enhancing the insulation resistance and sintering in a reducing atmosphere.
The design improves the mean time between failures and extends the service life of the multilayer ceramic capacitor by providing a Schottky barrier and stable reliability at high temperatures.
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Abstract
Description
Technical Field
[0001] The present invention relates to a capacitor and a method for manufacturing the same, and more particularly to a multilayer ceramic capacitor and a method for manufacturing the same. Prior art
[0002] A multilayer ceramic capacitor (MLCC) is a type of ceramic capacitor, and the capacitance of a ceramic capacitor is proportional to the surface area of the product and the number of stacked ceramic films. The multilayer ceramic capacitor may be provided by surface mount technology (SMT), and since the multilayer ceramic capacitor is easy to form a wafer and has a small volume, it has become the mainstream product in the capacitor industry and is applied to various electronic devices.
Summary of the Invention
Problems to be Solved by the Invention
[0003] Perovskite oxide compounds can be used as the material of the dielectric layer of a multilayer ceramic capacitor to reduce the cost of the multilayer ceramic capacitor and improve the effect of the multilayer ceramic capacitor. Therefore, perovskite oxide compounds are widely applied to multilayer ceramic capacitors. However, as the number of stacked inner electrode layers in a multilayer ceramic capacitor increases, the thickness of the dielectric layer decreases, so the insulation resistance between the inner electrode layers decreases, and the reliability and high-temperature load life of the multilayer ceramic capacitor are reduced.
[0004] In addition, when the thickness of the dielectric layer decreases, the mean time to failure (MTTF) of a well-known multilayer ceramic capacitor decreases, and further the service life of the multilayer ceramic capacitor is shortened.
[0005] Therefore, it is necessary to develop a method for manufacturing a capacitor that can overcome the defects of well-known multilayer ceramic capacitors.
Means for Solving the Problems
[0006] One aspect of the present invention provides a multilayer ceramic capacitor comprising a plurality of perovskite oxides containing barium and titanium, a plurality of dielectric layers containing borosilicate glass, a plurality of inner electrode layers stacked with respect to the dielectric layers, having a first end face and a second end face facing each other, a first terminal electrode provided on the first end face and electrically connected to a part of the inner electrode layer, and a second terminal electrode provided on the second end face and electrically connected to another part of the inner electrode layer, wherein each of the plurality of inner electrode layers includes an inner layer made of nickel and a first indium isolation layer located between the inner layer and one of the dielectric layers and having a thickness of 1 nm to 19 nm, and the dielectric layer each includes a plurality of second indium isolation layers located at a plurality of grain boundaries of the perovskite oxide.
[0007] According to the multilayer ceramic capacitor described in the previous paragraph, if the total weight of the perovskite oxide is 100 wt%, the weight of the borosilicate glass may be 0.01 wt% to 5 wt%.
[0008] According to the multilayer ceramic capacitor described in the previous paragraph, the borosilicate glass may contain diboron trioxide, dialuminum trioxide, and silicon dioxide.
[0009] According to the multilayer ceramic capacitor described in the previous paragraph, the inner electrode layer is formed by sintering an indium-doped nickel paste, and the amount of indium added to the nickel paste may be 0.01 mol% to 5 mol%.
[0010] According to the multilayer ceramic capacitor described in the previous paragraph, the first indium content of the first indium isolation layer may be greater than the second indium content of each of the second indium isolation layers.
[0011] According to the multilayer ceramic capacitor described in the previous paragraph, if the sum of the titanium content of the perovskite oxide and the indium content of the indium 2 segregation layer is 100 mol%, then the indium 2 content is 10 -20 mol%~10 -2 It may also be expressed as mol%.
[0012] According to the multilayer ceramic capacitor described in the previous paragraph, the first indium isolation layer may contain indium, barium, and titanium.
[0013] According to the multilayer ceramic capacitor described in the previous paragraph, the second indium isolation layer may contain indium, barium, and titanium.
[0014] According to the multilayer ceramic capacitor described in the previous paragraph, the ratio of the thickness of each inner electrode layer to the thickness of each dielectric layer may be 0.4 to 0.6.
[0015] Another aspect of the present invention provides a method for manufacturing a multilayer ceramic capacitor, comprising the steps of: forming a plurality of dielectric layers comprising a plurality of perovskite oxides containing barium and titanium and borosilicate glass; forming a plurality of internal electrode layers; alternately stacking the internal electrode layers and dielectric layers to form a laminate; performing a sintering process including a low-temperature firing removal step and a high-temperature sintering step to form the laminate as a multilayer ceramic brick; and forming a first terminal electrode and a second terminal electrode at both ends of the multilayer ceramic brick, respectively, to obtain a multilayer ceramic capacitor.
[0016] According to the manufacturing method for multilayer ceramic capacitors described in the previous paragraph, if the total weight of the perovskite oxide is 100 wt%, the weight of the borosilicate glass may be 0.01 wt% to 5 wt%.
[0017] According to the method for manufacturing a multilayer ceramic capacitor described in the previous paragraph, the borosilicate glass may contain diboron trioxide, dialuminum trioxide, and silicon dioxide.
[0018] According to the method for manufacturing a multilayer ceramic capacitor described in the previous paragraph, the internal electrode layer is formed by sintering a nickel paste added with indium, and the indium addition amount of the nickel paste may be 0.01 mol% to 5 mol%.
[0019] According to the method for manufacturing a multilayer ceramic capacitor described in the previous paragraph, after the sintering process, a first indium isolation layer may be formed at the interface between any one of the internal electrode layers and one of the corresponding dielectric layers, and a plurality of second indium isolation layers may be formed at the grain boundaries of the perovskite oxide, and the first indium isolation layer and the second indium isolation layers may be formed simultaneously.
Advantages of the Invention
[0020] Thereby, the multilayer ceramic capacitor and the method for manufacturing a multilayer ceramic capacitor of the present invention can improve the mean time between failures of the multilayer ceramic capacitor and extend the service life of the multilayer ceramic capacitor.
Brief Description of the Drawings
[0021] In order to make the above and other objects, features, advantages and embodiments of the present invention clearer and easier to understand, the description of the drawings is as follows. [Figure 1] It is a perspective schematic view of a multilayer ceramic capacitor according to an embodiment of the present invention. [Figure 2] It is a cross-sectional schematic view taken along the cross-section line A-A of the multilayer ceramic capacitor according to the embodiment of FIG. 1. [Figure 3] It is a cross-sectional schematic view taken along the cross-section line B-B of the multilayer ceramic capacitor according to the embodiment of FIG. 1. [Figure 4] It is a process flowchart of a method for manufacturing a multilayer ceramic capacitor according to another embodiment of the present invention. [Figure 5] It is an annular dark field image of a scanning transmission electron microscope of the multilayer ceramic capacitor of Experimental Example 1. [Figure 6]It is an indium Lα energy-dispersive X-ray image of Experimental Example 1 in FIG. 5. [Figure 7] It is a bright-field image of a scanning transmission electron microscope of a multilayer ceramic capacitor of Experimental Example 2. [Figure 8] It is an indium Lα energy-dispersive X-ray image of Experimental Example 2 in FIG. 7. [Figure 9] It is an enlarged view of a perovskite oxide of barium titanate in FIG. 8. [Figure 10] It is an indium Lα energy-dispersive X-ray image of a perovskite oxide of barium titanate in FIG. 9. [Figure 11] It is a graph of the total thickness of the dielectric layer with respect to the mean time between failures in nickel multilayer ceramic capacitors and nickel-indium multilayer ceramic capacitors.
Embodiments for Carrying Out the Invention
[0022] Hereinafter, each embodiment of the present invention will be examined in more detail. However, this embodiment is an application of various inventive concepts and can be specifically implemented within various different specific ranges. The specific embodiment is for the purpose of explanation only and is not limited to the disclosed range. Further, in order to simplify the drawings, some well-known structures and elements are simply illustrated in the drawings.
[0023] Also, terms such as "first" and "second" in the description are only for distinguishing elements and operations in the same technology and are not for representing program order or array order.
[0024] The spatial relationship between two elements described in the present invention is applicable not only to the orientation depicted in the drawings but also to orientations not shown in the drawings, such as the upside-down orientation. Also, descriptions such as "connection" and "electrical connection" between two members in the present invention are not limited to direct connection or direct electrical connection between the two members, and may include indirect connection or indirect electrical connection as necessary.
[0025] In this invention, a multilayer ceramic capacitor having a "metal" internal electrode layer is referred to as a "metal" multilayer ceramic capacitor (Metal MLCC), for example, a nickel multilayer ceramic capacitor (Ni MLCC) or a nickel-indium multilayer ceramic capacitor (Ni-In MLCC). Specifically, "nickel multilayer ceramic capacitor" indicates that the multilayer ceramic capacitor has a metal internal electrode layer containing nickel. Similarly, "nickel-indium multilayer ceramic capacitor" indicates that the multilayer ceramic capacitor has a metal internal electrode layer containing nickel and indium.
[0026] Please refer to Figures 1 to 3. Figures 1 to 3 are schematic perspective views of a multilayer ceramic capacitor 100 according to one embodiment of the present invention, and schematic cross-sectional views of the multilayer ceramic capacitor 100 along cross-sectional line AA and cross-sectional line BB according to the embodiment of Figure 1. The multilayer ceramic capacitor 100 includes a multilayer ceramic brick 200, a first terminal electrode 300, and a second terminal electrode 400.
[0027] For example, the multilayer ceramic brick 200 may be a rectangular parallelepiped or a cube. However, the shape of the multilayer ceramic brick 200 can be designed according to the demands of the product, and the present invention is not limited thereto. The multilayer ceramic brick 200 has a first end face 202 and a second end face 204, and the first end face 202 and the second end face 204 face each other. As can be seen from Figures 1 to 3, since the multilayer ceramic brick 200 is a rectangular parallelepiped, it may further include a first surface 205, a second surface 206, a third surface 207 and a fourth surface 208, where the first surface 205 and the second surface 206 face each other, and the third surface 207 and the fourth surface 208 face each other. The first end face 202, the second end face 204, the third surface 207 and the fourth surface 208 are all located between the first surface 205 and the second surface 206. The third surface 207 and the fourth surface 208 are located between the first end face 202 and the second end face 204.
[0028] The multilayer ceramic brick 200 includes a plurality of dielectric layers 210 and a plurality of internal electrode layers 220. The dielectric layers 210 and the internal electrode layers 220 are stacked on top of each other. In the manufacturing process of the multilayer ceramic brick 200, the green sheet of the dielectric layer 210 and the paste layer of the internal electrode layer 220 may be stacked on top of each other to form a stacked structure, and then the stacked structure may be sintered. Since the dielectric layer 210 is a ceramic layer formed by sintering green sheets of perovskite oxide (not shown) and borosilicate glass, each of the dielectric layers 210 contains a variety of perovskite oxides and borosilicate glass. The perovskite oxides include barium and titanium. In some embodiments, the dielectric layer 210 is made of barium titanate (BaTiO3) perovskite oxide.
[0029] The borosilicate glass may contain boron trioxide (B2O3), aluminum oxide (Al2O3), and silicon dioxide (SiO2). In some examples, when the total weight of the perovskite oxide is 100 wt%, the weight of the borosilicate glass may be 0.01 wt% to 5 wt%. For example, the weight of the borosilicate glass may be 0.05 wt%, 0.1 wt%, 0.2 wt%, 0.3 wt%, 0.4 wt%, 0.5 wt%, 0.6 wt%, 0.7 wt%, 0.8 wt%, 0.9 wt%, 1 wt%, 1.5 wt%, 2 wt%, 2.5 wt%, 3 wt%, 3.5 wt%, 4 wt%, or 4.5 wt%. If the weight of the borosilicate glass is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100.
[0030] As shown in Figure 2, the internal electrode layer 220 may be divided into two parts. One part of the internal electrode layer 220 extends from the first end face 202 toward the second end face 204 of the multilayer ceramic brick 200 and is separated from the second end face 204. The other part of the internal electrode layer 220 extends from the second end face 204 toward the first end face 202 and is separated from the first end face 202. The two parts in the multilayer ceramic brick 200 are arranged alternately, and the dielectric layer 210 is located between the two adjacent parts of the internal electrode layer 220. The internal electrode layer 220 is substantially parallel to the first surface 205 and the second surface 206 of the multilayer ceramic brick 200.
[0031] As can be seen from Figures 2 and 3, each of the inner electrode layers 220 includes an inner layer 222 and a first indium isolation layer 224. The material of the inner layer 222 includes nickel. For example, nickel may be the main component of the inner layer 222. Each first indium isolation layer 224 of the inner electrode layer 220 is located between the inner layer 222 and the dielectric layer 210 adjacent to the inner layer 222. Thus, each first indium isolation layer 224 of the inner electrode layer 220 separates the inner layer 222 from the outer dielectric layer 210.
[0032] The thickness of the first indium isolation layer 224 is 1 nm to 100 nm. For example, the thickness of the first indium isolation layer 224 may be 3 nm, 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 18 nm, 19 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, or 90 nm. When the thickness of the first indium isolation layer 224 is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100. See Figure 2. The ratio of the thickness h1 of each inner electrode layer 220 to the thickness h2 of each dielectric layer 210 may be 0.4 to 0.6. When the ratio is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100. See Figure 2. In some embodiments, the total thickness H of the dielectric layer 210 is in the range of 0.5 μm to 8.4 μm. For example, the total thickness H of the dielectric layer 210 may be 1.2 μm, 3.2 μm, 5 μm, or 6.8 μm.
[0033] The inner electrode layer 220 may be formed by sintering an indium-added nickel paste. Thus, the first indium isolation layer 224 may be an aggregated metallic phase layer of indium metal and is located between the nickel inner layer 222 and the ceramic body of the dielectric layer 210. The dielectric layer 210 may be made of barium titanate, and the first indium isolation layer 224 may contain indium, barium, and titanium. The amount of indium added to the nickel paste may be 0.01 mol% to 5 mol%. For example, the amount of indium added to the nickel paste may be 0.05 mol%, 0.1 mol%, 0.2 mol%, 0.3 mol%, 0.4 mol%, 0.5 mol%, 0.6 mol%, 0.7 mol%, 0.8 mol%, 0.9 mol%, 1 mol%, 1.5 mol%, 2 mol%, 2.5 mol%, 3 mol%, 3.5 mol%, 4 mol%, or 4.5 mol%. When the amount of indium added to the nickel paste is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100.
[0034] By adding indium metal, the material of the inner electrode layer 220 can be sintered in a highly reducing atmosphere. For example, the material of the inner electrode layer 220 can be sintered in an atmosphere with a high hydrogen content. Therefore, the multilayer ceramic capacitor 100 can have stable reliability at high operating temperatures, for example, the operating temperature may be 105°C or 125°C. In addition, the first indium isolation layer 224 can provide a Schottky barrier between the inner layer 222 and the dielectric layer 210, and the Schottky barrier can suppress leakage current of the multilayer ceramic capacitor 100. As a result, the multilayer ceramic capacitor 100 has a long high-temperature load life and high reliability.
[0035] Please refer to Figure 1. The first terminal electrode 300 is provided on at least the first end face 202 of the multilayer ceramic brick 200 and is electrically connected to the inner electrode layer 220 extending from the first end face 202. The second terminal electrode 400 is provided on at least the second end face 204 of the multilayer ceramic brick 200 and is electrically connected to the inner electrode layer 220 extending from the second end face 204. As can be seen from Figures 1 and 2, the first terminal electrode 300 covers the first end face 202, and the first surface 205, second surface 206, third surface 207, and fourth surface 208 are adjacent to the first end face 202. The second terminal electrode 400 covers the second end face 204, and the first surface 205, second surface 206, third surface 207, and fourth surface 208 are adjacent to the second end face 204.
[0036] The first terminal electrode 300 and the second terminal electrode 400 may both have a single-layer structure or a multilayer structure. The first terminal electrode 300 and the second terminal electrode 400 may both have a three-layer structure in which they are stacked in order, and the material of the first layer of the three-layer structure may be copper, silver, or a silver-palladium alloy, the material of the second layer of the three-layer structure may be nickel, and the material of the third layer of the three-layer structure may be tin. The multilayer ceramic capacitor 100 of the present invention may be used in autonomous driving technology for electric vehicles, but is not limited thereto.
[0037] Figure 4 is a process flowchart of manufacturing method M for a multilayer ceramic capacitor 100 according to another embodiment of the present invention. Please refer to Figures 2 and 4. As shown in step 410 of manufacturing method M, a plurality of dielectric layers 210 are formed. As shown in step 420 of manufacturing method M, a plurality of internal electrode layers 220 are formed. As shown in step 430 of manufacturing method M, the internal electrode layers 220 and dielectric layers 210 are alternately stacked to form a laminate.
[0038] Next, please refer to Figures 2 and 4. As shown in step 440 of manufacturing method M, a sintering process is performed to form the laminate as a multilayer ceramic brick 200. The sintering process includes a low-temperature firing and removal step and a high-temperature sintering step. The temperature of the low-temperature firing and removal step may be 300°C, and the temperature of the high-temperature sintering step may be 1200°C.
[0039] Please also refer to Figures 2 and 4. As shown in steps 450 and 460 of manufacturing method M, the first terminal electrode 300 and the second terminal electrode 400 are formed at both ends of the multilayer ceramic brick 200, respectively, to obtain a multilayer ceramic capacitor 100.
[0040] The present invention will be further illustrated and described using the following specific examples, which is advantageous as it will allow those skilled in the art to fully utilize and implement the invention without requiring excessive interpretation. These examples should not be considered limitations on the scope of the present invention, but are intended to illustrate how the materials and methods of the present invention are carried out.
[0041] <Experimental Example 1>
[0042] In Experimental Example 1, barium titanate perovskite powder and additives were ball-milled. The additives could also be 3 mol% dysprosium oxide (Dy2O3), 0.1 mol% magnesium oxide (MgO), and 0.03 wt% borosilicate glass powder. The above raw materials were uniformly mixed and dried to obtain a raw material powder, and the raw material powder and organic solvent were pulverized to obtain a raw material paste. The raw material paste was cast onto a plastic film and dried to obtain a ceramic green sheet. Nickel paste with 0.05 wt% indium oxide (In2O3) powder added was uniformly mixed in a three-roller mixer and then printed as an inner layer on the green sheet. Multiple nickel printed sheets were stacked and cut to obtain a green sheet of nickel-indium multilayer ceramic capacitor wafer. After firing the organic adhesive at 300°C, the oxygen partial pressure was 1 × 10⁻⁶. -13 Under Pa conditions, a nickel-indium multilayer ceramic capacitor was fired at 1200°C for 2 hours, and then re-oxidized at a low temperature. During the sintering process in a reducing atmosphere, indium oxide was converted to metallic indium, forming a nickel-indium alloy. Finally, copper terminal electrodes were formed by heating at 780°C for 20 minutes.
[0043] Next, a highly accelerated life test (HALT) was performed under conditions of 140°C and 40V (i.e., a voltage four times higher than the rated voltage). The parameters and mean time between failures for Experimental Example 1 are shown in Table 1 below.
[0044] [Table 1]
[0045] Figure 5 is an annular dark-field image of the multilayer ceramic capacitor 100a of Experimental Example 1 taken with a scanning transmission electron microscope. Figure 6 is an Lα-energy dispersed X-ray image of indium in Experimental Example 1 of Figure 5. As can be seen from Figures 5 and 6, the inner electrode layer 220 was formed by sintering nickel paste with indium added. For this reason, the multilayer ceramic capacitor 100a may also be called a nickel-indium multilayer ceramic capacitor. The structure of the multilayer ceramic capacitor 100a and the structure of the multilayer ceramic capacitor 100 are almost the same. The difference between the multilayer ceramic capacitor 100a and the multilayer ceramic capacitor 100 is that the multilayer ceramic capacitor 100a also has a first indium isolation layer 224 in the inner electrode layer 220, and the dielectric layer 210 of the multilayer ceramic capacitor 100a contains multiple second indium isolation layers 214.
[0046] Specifically, as can be seen from Figures 5 and 6, the dielectric layer 210 contains a plurality of perovskite oxides 212, and the second indium isolation layer 214 may be formed at a plurality of grain boundaries 212a of the perovskite oxide 212. In other words, the indium metal in the material of the inner electrode layer 220 not only isolates the interface between the inner electrode layer 220 and the corresponding dielectric layer 210, but also diffuses into the dielectric layer 210 and acts as a barrier at the grain boundaries 212a of the perovskite oxide 212 in the dielectric layer 210.
[0047] Refer to Figures 5 and 6. The crystalline grains (i.e., barium titanate crystalline grains) may be understood as a core-shell structure, where the core region of the crystalline grain is barium titanate, and the shell region of the crystalline grain is the grain boundary 212a (i.e., second indium isolation layer 214) having indium metal and the first indium isolation layer 224 having indium metal. In other words, the indium metal formed a barrier in the shell region of the core-shell structure. Specifically, the diffused indium (+3) occupies the position of titanium (+4) in the perovskite oxide 212 and functions as an acceptor, and can capture free electrons generated when oxygen vacancies are formed during sintering under a reducing atmosphere. Thus, the indium isolation located in the shell region of the core-shell structure of the barium titanate crystalline grains, including the grain boundary, increased resistivity, reduced leakage current, and improved the mean time between failures of the multilayer ceramic capacitor 100a.
[0048] Nickel can form a liquid phase with borosilicate glass at the interface between one of the inner electrode layers 220 and one of the corresponding dielectric layers 210, and can diffuse into the shell region of the core-shell structure of the barium titanate crystal grains. The amount of co-doping with borosilicate glass increases in proportion to the amount of indium added to the nickel paste. The first indium isolation layer 224 and the second indium isolation layer 214 work together according to the total thickness of the dielectric layer 210.
[0049] The first indium content of the first indium segregation layer 224 may be greater than the second indium content of each of the second indium segregation layers 214. If the sum of the titanium content of the perovskite oxide 212 and the second indium content of the second indium segregation layer 214 is 100 mol%, then the second indium content is 10 -20 mol%~10 -2 It may be expressed as mol%. The second indium isolation layer 214 may contain indium, barium, and titanium.
[0050] After the sintering process, the first indium isolation layer 224 may be formed at the interface between any of the inner electrode layers 220 and one of the corresponding dielectric layers 210, and multiple second indium isolation layers 214 may be formed at multiple grain boundaries 212a of the perovskite oxide 212, and the first indium isolation layer 224 and the second indium isolation layer 214 may be formed simultaneously.
[0051] <Experimental Examples 2-6>
[0052] The manufacturing method for the multilayer ceramic capacitor in Experimental Example 1 was similar to the manufacturing methods for the multilayer ceramic capacitors in Experimental Examples 2 to 6 (hereinafter abbreviated as Experimental Examples 2 to 6). In Experimental Examples 2 to 6, the amount of indium oxide added varied according to the total thickness of the dielectric layer of the multilayer ceramic capacitor. The amount of borosilicate glass powder added was basically proportional to the amount of indium oxide added in order to promote the diffusion of crystalline material in the dielectric layer of indium.
[0053] <Experimental Examples 7-14>
[0054] The manufacturing method for the multilayer ceramic capacitor in Experimental Example 1 was similar to the manufacturing methods for the multilayer ceramic capacitors in Experimental Examples 7 to 14 (hereinafter abbreviated as Experimental Examples 7 to 14). In Experimental Examples 7 to 14, the total thickness of the dielectric layer of the multilayer ceramic capacitor was the same, and the range of the amount of borosilicate glass powder added was 0.01 wt% to 5 wt%, but the amount of indium oxide added differed.
[0055] <Comparative Example 1 to Comparative Example 2>
[0056] The manufacturing method for the multilayer ceramic capacitor in Experimental Example 1 was similar to the manufacturing methods for the multilayer ceramic capacitors in Comparative Examples 1 and 2. In Comparative Example 1, indium oxide was not added. In Comparative Example 2, borosilicate glass powder was not added.
[0057] Figure 7 is a bright-field scanning transmission electron microscope image of the multilayer ceramic capacitor 100b of Experimental Example 2. Figure 8 is an Lα-energy dispersed X-ray image of indium in Experimental Example 2 of Figure 7. As can be seen from Figures 7 and 8, the multilayer ceramic capacitor 100b is a nickel-indium multilayer ceramic capacitor. As shown in Figure 8, the indium isolation (i.e., the first indium isolation layer 224 and the second indium isolation layer 214) is located at the interface between the inner layer 222 and the dielectric layer 210, and at the grain boundary 212a of the perovskite oxide 212.
[0058] Figure 9 is a magnified view of the barium titanate perovskite oxide in Figure 8. Figure 10 is an Lα-energy dispersion X-ray image of indium in the barium titanate perovskite oxide in Figure 9. As shown in Figure 9, indium diffuses and is segregated in the shell region of the core-shell structure. Because the indium segregation is located in the shell region including the grain boundaries, the indium can occupy the position of titanium in the barium titanate and its acceptor function can be extended to the core region of the dielectric layer. When the dielectric layer thickness increases, the indium segregation in the shell region also becomes effective.
[0059] The results in Table 1 show that, compared to the mean time interval between failures of the multilayer ceramic capacitors of Comparative Examples 1 and 2, the multilayer ceramic capacitor of the present invention, which has a specific content of borosilicate glass powder and indium oxide, can improve the mean time interval between failures.
[0060] Figure 11 is a graph showing the relationship between the total thickness of the dielectric layer and the mean time between failures in nickel multilayer ceramic capacitors and nickel-indium multilayer ceramic capacitors. As shown in Figure 11, the mean time between failures of nickel-indium multilayer ceramic capacitors increases with increasing total thickness of the dielectric layer, thereby extending the service life of nickel-indium multilayer ceramic capacitors. Furthermore, the mean time between failures of nickel-indium multilayer ceramic capacitors is superior to that of nickel multilayer ceramic capacitors.
[0061] As described above, one of the advantages of the present invention is as follows: The inner electrode layer of the multilayer ceramic capacitor includes a nickel inner layer and an indium isolation layer located between the nickel inner layer and the dielectric layer. The indium isolation layer can provide a Schottky barrier between the nickel inner layer and the dielectric layer, and the Schottky barrier can suppress leakage current. Furthermore, because indium metal is added, the multilayer ceramic brick can be sintered in a highly reducing atmosphere. Therefore, the multilayer ceramic capacitor can have stable reliability at high operating temperatures. This extends the high-temperature load life of the multilayer ceramic capacitor and improves its reliability. Compared to well-known multilayer ceramic capacitors, the mean time between failures of the multilayer ceramic capacitor of the present invention is improved, thus extending the service life of the multilayer ceramic capacitor.
[0062] Although the present invention has been disclosed in embodiments as described above, these embodiments are not intended to limit the invention, and any person skilled in the art can make various modifications and finishes without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be based on the claims that are later appended. [Explanation of Symbols]
[0063] 100, 100a, 100b: Multilayer ceramic capacitors 200: Multilayer ceramic brick 202: First end surface 204:Second end surface 205: 1st surface 206:Second surface 207:Third surface 208: 4th surface 210: Dielectric layer 212: Perovskite Oxides 212a: Grain boundary 214: Second Indium Sequestration Layer 220: Inner electrode layer 222: Inner layer 224: First indium sequestration layer 300: 1st terminal electrode 400: 2nd terminal electrode 410, 420, 430, 440, 450, 460: Process 1100: Graph H: Total thickness h1, h2: Thickness M: Manufacturing method
Claims
1. A multilayer ceramic brick comprising a plurality of perovskite oxides containing barium and titanium, a plurality of dielectric layers containing borosilicate glass, and a plurality of internal electrode layers stacked with the plurality of dielectric layers, having a first end face and a second end face facing each other, A first terminal electrode provided on the first end face and electrically connected to a portion of the plurality of internal electrode layers, A second terminal electrode provided on the second end face and electrically connected to another portion of the plurality of internal electrode layers, Equipped with, Each of the aforementioned plurality of internal electrode layers is The material consists of an inner layer containing nickel, A first indium isolation layer is located between the inner layer and one of the plurality of dielectric layers, and has a thickness of 1 nm to 19 nm. Includes, A multilayer ceramic capacitor in which each of the plurality of dielectric layers includes a plurality of second indium isolation layers located at the grain boundaries of the plurality of perovskite oxides.
2. The multilayer ceramic capacitor according to claim 1, wherein the total weight of the plurality of perovskite oxides is 100 wt%, and the weight of the borosilicate glass is 0.01 wt% to 5 wt%.
3. The multilayer ceramic capacitor according to claim 1, wherein the borosilicate glass comprises diboron trioxide, dialuminum trioxide, and silicon dioxide.
4. The multilayer ceramic capacitor according to claim 1, wherein the plurality of internal electrode layers are formed by sintering nickel paste with indium added, and the amount of indium added to the nickel paste is 0.01 mol% to 5 mol%.
5. The multilayer ceramic capacitor according to claim 1, wherein the first indium content of the first indium isolation layer is greater than the second indium content of each of the plurality of second indium isolation layers.
6. When the sum of the titanium content of the plurality of perovskite oxides and the second indium content of the plurality of second indium segregation layers is 100 mol%, the second indium content is 10 -20 mol% ~ 10 -2 A multilayer ceramic capacitor according to claim 1, wherein the value is mol%.
7. The multilayer ceramic capacitor according to claim 1, wherein the first indium isolation layer comprises indium, barium, and titanium.
8. The multilayer ceramic capacitor according to claim 1, wherein the plurality of second indium isolation layers include indium, barium, and titanium.
9. The multilayer ceramic capacitor according to claim 1, wherein the ratio of the thickness of each of the plurality of internal electrode layers to the thickness of each of the plurality of dielectric layers is 0.4 to 0.
6.
10. A method for manufacturing a multilayer ceramic capacitor, A step of forming multiple dielectric layers comprising multiple perovskite oxides containing barium and titanium, and borosilicate glass, A process of forming multiple internal electrode layers, A step of alternately stacking the plurality of internal electrode layers and the plurality of dielectric layers to form a laminate, A sintering process including a low-temperature firing removal process and a high-temperature sintering process is performed to form the laminate as a multilayer ceramic brick, A step of forming a first terminal electrode and a second terminal electrode at both ends of the multilayer ceramic brick to obtain a multilayer ceramic capacitor, A method for manufacturing multilayer ceramic capacitors.
11. A method for manufacturing a multilayer ceramic capacitor according to claim 10, wherein the total weight of the plurality of perovskite oxides is 100 wt%, and the weight of the borosilicate glass is 0.01 wt% to 5 wt%.
12. The method for manufacturing a multilayer ceramic capacitor according to claim 10, wherein the borosilicate glass comprises diboron trioxide, aluminum trioxide, and silicon dioxide.
13. The method for manufacturing a multilayer ceramic capacitor according to claim 10, wherein the plurality of internal electrode layers are formed by sintering a nickel paste with indium added, and the amount of indium added to the nickel paste is 0.01 mol% to 5 mol%.
14. A method for manufacturing a multilayer ceramic capacitor according to claim 10, wherein, after performing the sintering process, a first indium isolation layer is formed at the interface between any of the plurality of internal electrode layers and one of the plurality of dielectric layers corresponding thereto, and a plurality of second indium isolation layers are formed at the plurality of grain boundaries of the plurality of perovskite oxides, and the first indium isolation layer and the plurality of second indium isolation layers are produced simultaneously.
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