Method for pre-treating a silicon wafer susceptor and method for heat-treating a silicon wafer

Abstract

To determine that a sufficient number of dummy runs have been performed.SOLUTION: A pretreatment method for a susceptor for a silicon wafer, specifically a pretreatment method for a susceptor used for a heat treatment for a silicon wafer, includes a dummy run step in which a monitor wafer is placed on the susceptor and heat treated, a contact scar size analysis step in which a planar size of a contact scar formed on a portion in contact with the susceptor on the monitor wafer is measured, and a pass / fail determination step for determining whether the size of the measured contact scar is less than or equal to a predetermined threshold value.SELECTED DRAWING: Figure 1

Description

Technical Field

[0005] , ,

[0001] The present invention relates to a pretreatment method for a susceptor for a silicon wafer and a heat treatment method for a silicon wafer.

Background Art

[0002] For a silicon wafer used as a substrate of a semiconductor device, it is required to form a defect-free layer in which void defects called COP (Crystal Originated Particle) do not exist on the surface and the surface layer that become the active region of the semiconductor device. As technologies for such requirements, a technology for batch heat treatment of a silicon wafer at a temperature of 1100 °C or higher using a vertical furnace and a technology for performing rapid thermal processing (RTP) are known.

[0003] However, when a silicon wafer is loaded with thermal stress and bending stress during heat treatment, slip may be introduced and plastic deformation may occur. This slip is a bundle of linear dislocation defects, and depending on the degree of its occurrence, it becomes a factor that affects the electrical characteristics of the semiconductor device as a finished product. The susceptor, which is a holding member of the silicon wafer, is generally made of silicon carbide (SiC) so as not to deform even during high-temperature heat treatment. However, the degree of slip generation in the wafer also depends on the surface state of the susceptor. The reason is that minute irregularities and microcracks formed on the surface during the processing of the susceptor damage (contact marks) the contact surface of the wafer.

[0004] On the other hand, it is known that when an oxide film (SiO2) with a thickness of 0.05 to 5 μm is formed on the surface of a SiC susceptor, this oxide film serves as a buffer material and can mitigate contact marks (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

[0006] Therefore, by forming an oxide film on the surface of the SiC susceptor in a heat treatment furnace as a pretreatment, the degree of contact marks on the silicon wafer is reduced, and as a result, the occurrence of slip is reduced. In other words, by pre-treating silicon wafers that will not be used as products in a heat treatment furnace, the occurrence of slip in silicon wafers that will be used as products can be reduced. This process of pre-treating silicon wafers that will not be used as products in a heat treatment furnace is also called a dummy run. From the viewpoint of reducing the occurrence of slip, it is preferable to perform dummy runs a sufficient number of times to form an oxide film of sufficient thickness before proceeding to manufacturing.

[0007] However, the degree of slippage naturally varies from susceptor to susceptor, and the required oxide film thickness differs for each. Furthermore, the growth rate of the oxide film depends on the surface condition of the susceptor. In addition, measuring the oxide film thickness formed on the surface of a SiC susceptor requires removing the susceptor from the heat treatment furnace and performing non-destructive inspection, which is time-consuming, labor-intensive, and difficult to manage. Therefore, there is a need for a method to determine whether a sufficient number of dummy runs have been performed without removing the susceptor from the heat treatment furnace.

[0008] In view of the above-mentioned problems, the object of the present invention is to provide a pretreatment method for a silicon wafer susceptor and a heat treatment method for a silicon wafer that can determine whether a sufficient number of dummy runs have been performed. [Means for solving the problem]

[0009] To solve the above problems, a pretreatment method for a silicon wafer susceptor according to one aspect of the present invention is a pretreatment method for a susceptor used when heat-treating a silicon wafer, comprising: a dummy run step of placing a monitor wafer on the susceptor and heat-treating it; a contact mark size analysis step of measuring the size of contact marks formed on the monitor wafer at the contact portion with the susceptor; and a pass / fail determination step of determining whether the measured size of the contact marks is below a predetermined threshold.

[0010] By measuring the size of contact marks on the monitor wafer to determine if a sufficient number of dummy runs have been performed, it is not necessary to remove the susceptor and measure the oxide film formed on its surface, significantly reducing time and effort.

[0011] Furthermore, in a pre-treatment method for a silicon wafer susceptor according to one aspect of the present invention, the predetermined threshold is determined by obtaining in advance the relationship between the size of the planar dimensions of the contact marks and whether or not slip occurs on the silicon wafer, and the size of the planar dimensions of the contact marks is such that the probability of slip occurring on the silicon wafer is less than or equal to the predetermined threshold.

[0012] Since the slip that occurs in silicon wafers also depends on the heat treatment sequence, it is possible to set a threshold for the planar size for each heat treatment sequence (for example, at the maximum temperature).

[0013] Furthermore, in a pre-treatment method for silicon wafer susceptors according to one aspect of the present invention, the planar size of the contact marks is determined by converting measurements obtained using an optical microscope into the number of pixels for image recognition.

[0014] A heat treatment method for a silicon wafer according to one aspect of the present invention is a heat treatment method for a silicon wafer in which the silicon wafer is placed on a susceptor and heat treated, comprising: a dummy run step in which a monitor wafer is placed on the susceptor and heat treated; a contact mark size analysis step in which the size of the contact marks formed on the monitor wafer at the contact portion with the susceptor is measured; a pass / fail determination step in which the measured size of the contact marks is determined to be less than or equal to a predetermined threshold; and a heat treatment step in which, if the pass / fail determination step is less than or equal to the predetermined threshold, the silicon wafer is placed on the susceptor and heat treated.

[0015] By measuring the size of contact marks on the monitor wafer to determine if a sufficient number of dummy runs have been performed, it is not necessary to remove the susceptor and measure the oxide film formed on its surface, significantly reducing time and effort. From another perspective, this significantly reduces time and effort while suppressing the occurrence of slip in silicon wafers.

[0016] Furthermore, in one embodiment of the present invention, the heat treatment step for a silicon wafer is a rapid thermal processing (RTP) in an oxygen atmosphere at 1300°C or higher.

[0017] In particular, slip is likely to occur in RTP under an oxygen atmosphere at temperatures above 1300°C, so one embodiment of the present invention is highly useful. [Effects of the Invention]

[0018] According to each aspect of the present invention, it is possible to provide a method for pre-treating a silicon wafer susceptor and a method for heat-treating a silicon wafer that can determine whether a sufficient number of dummy runs have been performed. [Brief explanation of the drawing]

[0019] [Figure 1] Figure 1 is a conceptual cross-sectional view showing an example of a heat treatment apparatus used for heat treatment of silicon wafers. [Figure 2] Figure 2 is a diagram showing the correlation of contact marks measured by an optical microscope and an end face inspection device. [Figure 3] Figure 3 is an example of contact marks measured by an optical microscope and an end face inspection device. [Figure 4] Figure 4 is a diagram showing the dependence relationship between the number of pixels caused by contact marks and the number of dummy run times. [Figure 5] Figure 5 is a flowchart showing a preprocessing method for a susceptor for a silicon wafer and a heat treatment method for a silicon wafer.

Embodiments for Carrying Out the Invention

[0020] Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited by the embodiments described below. Also, in each drawing, the same or corresponding elements are appropriately assigned the same reference numerals. Furthermore, it should be noted that the drawings are schematic, and the dimensional relationships and ratios of each element may be different from the actual ones. There may also be parts where the dimensional relationships and ratios are different between the drawings.

[0021] Figure 1 is a cross-sectional conceptual diagram showing an example of a heat treatment apparatus used for heat treatment of a silicon wafer. The heat treatment apparatus 10 shown in Figure 1 is a rapid thermal processing (RTP) apparatus. The heat treatment apparatus 10 includes a reaction chamber 20 for accommodating the wafer W and performing heat treatment, a wafer holding unit 30 provided in the reaction chamber 20 for holding the wafer W, and a heating unit 40 for heating the wafer W.

[0022] The reaction chamber 20 includes a supply port 22 for supplying an atmospheric gas (solid line arrow) and a discharge port 24 for discharging. The reaction chamber 20 is made of, for example, quartz.

[0023] The wafer holding section 30 includes a susceptor 32 that holds the outer periphery of the back surface of the wafer W in a ring shape, and a rotating body 34 that holds the susceptor 32 and rotates the susceptor 32 around the center of the wafer W as an axis. The susceptor 32 and the rotating body 34 are made of, for example, silicon carbide (SiC).

[0024] The heating unit 40 heats the wafer W from both sides by lamp heating, which is achieved by irradiating the wafer W, held in the wafer holding unit 30, with light whose emission wavelength is controlled from a plurality of halogen lamps 50 located outside the reaction chamber 20 above the device formation surface and below the back surface of the wafer W.

[0025] When performing heat treatment using the heat treatment apparatus 10 shown in Figure 1, the wafer W is introduced into the reaction chamber 20 through a wafer inlet (not shown) provided in the reaction chamber 20, and the outer periphery of the back surface of the wafer W is held in a ring shape on the susceptor 32 of the wafer holding unit 30. The wafer W is heated by the heating unit 40 while supplying an atmospheric gas and rotating the wafer W. The emission wavelength (1000 nm or more) can be adjusted by adjusting the emission wavelength of the halogen lamp 50 used (for example, by using a halogen lamp with an emission wavelength of 1000 nm or more).

[0026] As can be seen from the configuration of the heat treatment apparatus 10, the wafer W and the susceptor 32 are in contact during heat treatment. Although silicon carbide (SiC) is used for the susceptor 32 so that it does not deform even during high-temperature heat treatment, the susceptor 32 damages the wafer W during heat treatment. This damage was one of the causes of wafer W slippage.

[0027] On the other hand, if an oxide film is formed on the surface of the susceptor 32, this oxide film can act as a buffer, reducing the damage inflicted on the wafer W. Therefore, before heat treatment of the wafer W for the product, an oxide film is formed on the surface of the susceptor 32 by heat treatment in an oxygen atmosphere using the heat treatment apparatus 10.

[0028] However, as can be seen from the configuration of the heat treatment apparatus 10, removing the susceptor 32 from the heat treatment apparatus 10, non-destructively measuring the oxide film on the surface of the susceptor 32, and then setting the susceptor 32 back into the heat treatment apparatus 10 before performing heat treatment on the wafer W for the product was an extremely time-consuming process.

[0029] Therefore, in order to determine whether a sufficient oxide film had formed on the surface of the susceptor 32 without removing it from the heat treatment apparatus 10, the following verification was performed.

[0030] Figure 2 shows the correlation between contact marks measured with an optical microscope and an edge inspection device. In the graph shown in Figure 2, the vertical axis represents the planar size of the contact marks on the wafer surface measured using an optical microscope (see Figure 3(a)), and the horizontal axis represents the size (number of pixels) of the contact marks on the wafer surface measured using an edge inspection device (see Figure 3(b)).

[0031] The graph in Figure 2 plots the results of measuring contact marks using an optical microscope and an edge inspection device after heat treatment of 200 silicon wafers with a diameter of φ300 mm in an oxygen atmosphere using the heat treatment apparatus 10 configured as described above. The triangular marks in the graph represent a temperature condition of 1300°C for 30 seconds, and the plus marks in the graph represent a temperature condition of 1350°C for 30 seconds.

[0032] As can be seen from the graph in Figure 2, there is a correlation between the planar size of contact marks on the wafer surface measured using an optical microscope and the size (number of pixels) of the contact marks on the wafer surface measured using an edge inspection device. Moreover, this correlation is almost independent of temperature conditions. Therefore, using this correlation, the size of the planar size of the contact marks can be converted from the measurement value obtained using an optical microscope to the number of pixels used in image recognition.

[0033] Here, the risk of slippage occurring in a silicon wafer due to heat treatment can be determined by obtaining in advance the relationship between the planar size of contact marks on the silicon wafer surface and the presence or absence of slippage, which is evaluated using X-ray topography. By using this property and the correlation shown in Figure 2, the risk of slippage occurring in a silicon wafer due to heat treatment can be automatically determined using the number of pixels in image recognition.

[0034] Figure 4 shows the dependency relationship between the number of pixels caused by contact marks and the number of dummy runs. In the graph shown in Figure 4, the vertical axis represents the size (number of pixels) of contact marks on the wafer surface measured using an edge inspection device, and the horizontal axis represents the number of dummy runs. The graph shown in Figure 4 plots the results of heat treatment (dummy runs) performed on a silicon wafer with a diameter of φ300 mm in an oxygen atmosphere using the heat treatment apparatus 10 with the above configuration.

[0035] The circles in the graph represent a temperature condition of 1300°C for 30 seconds, and the triangles represent a temperature condition of 1350°C for 30 seconds. The number of samples in each dummy run is 35 for 1300°C and 350°C, for a total of 75 samples.

[0036] The dotted line in the graph shown in Figure 4 indicates the +5σ range. The +5σ range represents the range within which 99.71% of 50,000 silicon wafers would fall after heat treatment. This +5σ range can be appropriately set according to the required manufacturing standards.

[0037] As can be seen from the graph in Figure 4, the variability tends to decrease as the number of dummy runs increases. Therefore, if the threshold for slip occurrence is set to 300 pixels, it can be seen that approximately 2500 dummy runs are required. In the graph in Figure 4, the number of pixels at the slip occurrence threshold is shown by a dashed line.

[0038] Based on the above analysis, the pretreatment method for a silicon wafer susceptor and the heat treatment method for a silicon wafer according to the embodiment of the present invention are as follows. Figure 5 is a flowchart showing the pretreatment method for a silicon wafer susceptor and the heat treatment method for a silicon wafer.

[0039] As shown in Figure 5, the pretreatment method for a silicon wafer susceptor according to an embodiment of the present invention includes a dummy run step (step S1), a contact mark size analysis step (step S2), and a pass / fail determination step (step S3). The heat treatment method for a silicon wafer according to an embodiment of the present invention includes a dummy run step (step S1), a contact mark size analysis step (step S2), a pass / fail determination step (step S3), and heat treatment of the product wafer (step S4). In other words, the heat treatment method for a silicon wafer according to an embodiment of the present invention is the pretreatment method for a silicon wafer susceptor with the addition of heat treatment of the product wafer (step S4).

[0040] The dummy run step (step S1) is a process in which a monitor wafer is placed on a susceptor and heat-treated. Here, the monitor wafer is a silicon wafer that will not be used in the final product, and the same silicon wafer as the one used in the final product is used. The heat treatment in step S1 can be performed using the heat treatment apparatus 10 described with reference to Figure 1. The susceptor 32 is also described with reference to Figure 1 and is made of silicon carbide (SiC). The temperature condition is 1300°C, for example, 1300°C for 30 seconds or 1350°C for 30 seconds.

[0041] The contact mark size analysis step (step S2) is a process of measuring the planar size of the contact mark formed on the monitor wafer at the contact point with the susceptor 32. Here, the planar size of the contact mark can be converted from the measured value to the number of pixels in image recognition. By using the number of pixels in image recognition using an edge inspection device instead of measurement using an optical microscope, automatic judgment can be made in the next pass / fail judgment step (step S3).

[0042] The pass / fail determination step (step S3) is a process of determining whether the size of the measured contact mark is below a predetermined threshold. Here, the predetermined threshold is determined by obtaining in advance the relationship between the size of the planar dimensions of the contact mark and whether or not slip occurs on the silicon wafer. In particular, the predetermined threshold is determined as the size of the planar dimensions of the contact mark at which the probability of slip occurring on the silicon wafer is below the predetermined threshold. The size of the planar dimensions of the contact mark can be automatically determined by using the number of pixels in image recognition using an edge inspection device.

[0043] The heat treatment of the product wafer (step S4) is a process in which the silicon wafer W is placed on the susceptor 32 and heat-treated if the pass / fail judgment step (step S3) is passed (step S3; Y). The heat treatment step is preferably a rapid thermal processing (RTP) in an oxygen atmosphere at 1300°C or higher. If the pass / fail judgment step (step S3) is failed (step S3; N), the dummy run step (step S1) is repeated.

[0044] As described above, the pretreatment method for silicon wafer susceptors according to the embodiment of the present invention measures the size of contact marks on a monitor wafer, rather than removing the sceptor and measuring the oxide film formed on the surface of the susceptor. Therefore, it is possible to significantly reduce time and labor without removing the susceptor from the heat treatment furnace. From another perspective, this means that time and labor can be significantly reduced while suppressing the occurrence of slip in the silicon wafer.

[0045] Furthermore, each disclosure of the above-mentioned patent documents and other materials cited is incorporated into this document by reference. Within the framework of the full disclosure of the present invention (including the claims), further modifications and adjustments to the embodiments or examples are possible based on the fundamental technical concept. Also, within the framework of the full disclosure of the present invention, various combinations or selections (including partial deletions) of various disclosure elements (including each element of each claim, each element of each embodiment or example, each element of each drawing, etc.) are possible. In other words, the present invention naturally includes the full disclosure, including the claims, and various modifications and alterations that a person skilled in the art could make in accordance with the technical concept. In particular, with respect to the numerical ranges described in this document, any numerical value or sub-range included within that range should be interpreted as being specifically described, even if not otherwise stated. Furthermore, each disclosure of the above-mentioned cited documents may, if necessary, be used in part or in whole as part of the disclosure of the present invention, in accordance with the spirit of the present invention, and this is also considered to be included in the disclosure of this application. [Explanation of symbols]

[0046] 10 Heat treatment equipment 20 Reaction Chamber 22 supply ports 24 Outlet 30 Wafer holding section 32 Susceptors 34. Solids of revolution 40 Heating section 50 Halogen Lamps

Claims

1. A pretreatment method for forming an oxide film of sufficient thickness on a susceptor used when rapidly heating and cooling a silicon wafer in an oxygen atmosphere at 1300°C or higher (Rapid Thermal Processing; RTP), A dummy run step in which a monitor wafer is placed on the susceptor and subjected to rapid heating and cooling in an oxygen atmosphere, A contact mark size analysis step for measuring the planar size of the contact mark formed on the monitor wafer at the contact portion with the susceptor, A pass / fail determination step that determines whether a sufficient number of dummy runs have been performed based on whether the size of the measured contact marks is below a predetermined threshold, A method for pre-treating a silicon wafer susceptor, characterized by having [a specific feature].

2. The pretreatment method for a silicon wafer susceptor according to claim 1, wherein the size of the planar dimensions of the contact marks is obtained by converting the measured values ​​into the number of pixels in image recognition.

3. The pretreatment method for a silicon wafer susceptor according to claim 1 or 2, characterized in that the predetermined threshold is determined by obtaining in advance the relationship between the size of the planar area of ​​the contact mark and whether or not slip occurs on the silicon wafer.

4. The pretreatment method for a silicon wafer susceptor according to claim 3, characterized in that the predetermined threshold is determined as the size of the planar area of ​​the contact mark such that the probability of slip occurrence in the silicon wafer is less than or equal to the predetermined threshold.

5. A method for heat-treating a silicon wafer, comprising placing the silicon wafer on a susceptor having a sufficiently thick oxide film formed on it and performing rapid thermal processing (RTP) in an oxygen atmosphere at 1300°C or higher, A dummy run step in which a monitor wafer is placed on a susceptor and subjected to rapid heating and cooling in an oxygen atmosphere, A contact mark size analysis step for measuring the size of the contact mark formed on the monitor wafer at the contact portion with the susceptor, A pass / fail determination step that determines whether a sufficient number of dummy runs have been performed based on whether the size of the measured contact marks is below a predetermined threshold, If the pass / fail determination step is successful, the silicon wafer is placed on the susceptor and subjected to a heat treatment step in which it is rapidly heated and cooled in an oxygen atmosphere at 1300°C or higher. A method for heat-treating a silicon wafer, characterized by having [a certain characteristic].

Images