Inverter, rectifier circuit, and contactless power supply system

Abstract

To provide a DE class inverter, a DE class synchronous rectifier circuit, and a non-contact power supply system that can perform an ideal and highly efficient operation, even when a load resistance value fluctuates.SOLUTION: An inverter 2 includes a passive circuit 20 between a switching circuit 11 and a load 5 for converting an input impedance Z to output of the switching circuit 11. The passive circuit 20 converts the input impedance Z into a reference impedance Z0 when the load 5 has a predetermined resistance value Rl0, with the input impedance Z being a reference impedance Z0 when switching voltages of a first switching element 12 and a second switching element 13 achieve ZVS and ZVDS during a time length τ of a dead time, and converts the input impedance Z to be within a range in which the switching voltage achieves ZVS during the time length τ of the dead time when the resistance value Rl of the load 5 varies from the predetermined resistance value Rl0.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] This invention relates to an inverter, a rectifier circuit, and a contactless power supply system. [Background technology]

[0002] In recent years, electric vehicles and autonomous, unmanned electric mobility have attracted attention, and various research and development efforts are underway. However, challenges remain in promoting the widespread adoption of such electric vehicles, including the cost and weight of batteries, the length of charging time, the difficulty of recycling, and the increasing labor costs. One method being explored to address these challenges is unmanned and contactless (wireless) power supply technology.

[0003] Examples of such non-contact power supply methods include magnetic field coupling and electric field coupling. In magnetic field coupling, power is transmitted non-contact by the coupling of a magnetic field formed between a transmitting coil and a receiving coil, which transmits power as magnetic field energy through space. In electric field coupling, power is transmitted non-contact by the coupling of a magnetic field formed between a transmitting electrode and a receiving electrode, which transmits power as electric field energy through space.

[0004] High-frequency power is required to transmit electricity without contact. Therefore, contactless power supply systems use inverters that generate AC voltage or AC current from DC voltage or DC current. The inverters used should preferably have low losses and high efficiency.

[0005] As an inverter topology that achieves a theoretical efficiency of 100%, for example, the Class E inverter is known (Patent Document 1). The Class E inverter achieves high efficiency by suppressing losses in the switching elements by using zero-voltage switching (ZVS) and zero-voltage derivative switching (ZVDS) for the switching voltage in the switching elements.

[0006] However, due to its circuit configuration, a Class E inverter requires the switching elements to operate at voltages and currents below the semiconductor's withstand voltage and current limits, thus restricting the power output. Furthermore, a Class E inverter processes the voltage or current output from the switching elements into a sine wave by passing only the fundamental wave through a resonant filter before outputting it to the load. To supply a sine wave to the load while achieving ZVS and ZVDS in the switching elements, a load inductor must be connected in series with the load. The load Q(=ωL0 / R) of a Class E inverter is limited. l ω is the angular frequency, L0 is the inductance of the load inductor, R l The load resistance (where L0 is the load resistance value) can only be reduced to 1.153. Therefore, Class E inverters require a load inductor with a large inductance L0, and it is not possible to reduce losses in that load inductor.

[0007] On the other hand, DE class inverters are known as another inverter topology (Non-Patent Literature 1). Here, the outline of a DE class inverter will be explained with reference to Figures 31 and 32. Figure 31(a) is a circuit diagram showing a DE class inverter. Figure 31(b) shows the switching state of the first switching element 12 (first control signal Q1) and the second switching element 13 (second control signal Q2) constituting the DE class inverter, and the time change of the voltage v1 applied to the first switching element 12 (first capacitor 14 connected in parallel with the first switching element 12). Figure 32 shows the load Q characteristics with respect to the duty cycle of the first switching element 12 and the second switching element 13 in a DE class inverter.

[0008] As shown in Figure 31(a), the DE class inverter consists of two switching elements connected in series (first switching element 12 and second switching element 13) that supply a DC power supply (in the example in Figure 31(a), a DC voltage V DCThe DE class inverter is configured by connecting to the following: A dead time is provided in which these two switching elements (first switching element 12 and second switching element 13) are simultaneously turned off, and a first control signal Q1 is applied to the first switching element 12 and a second control signal Q2 is applied to the second switching element 13 so that the first switching element 12 and the second switching element 13 are turned on alternately at a predetermined duty cycle.

[0009] As a result, a voltage v1 is generated across the first switching element 12, as shown in Figure 31(b). The DE class inverter converts the voltage v1 to the resonant capacitor 16 (capacitance C r ) and resonant inductor 17 (inductance L r The signal is shaped into a sine wave using a resonant filter configured by connecting ) in series, and then the AC voltage is applied to the load 5 (resistance value R l Output to ).

[0010] Here, the DE class inverter uses the resistance value R of the connected load 5. l The predetermined resistance value R l0 In this case, the switching voltages of the first switching element 12 and the second switching element 13 are designed to achieve ZVS and ZVDS, respectively. As a result, the DE class inverter, like the E class inverter, can suppress losses in the switching elements and achieve high efficiency.

[0011] Furthermore, since the DE class inverter has a configuration in which two switching elements (first switching element 12 and second switching element 13) connected in series are turned on alternately, the voltage utilization rate of the semiconductor is high. As a result, the DE class inverter can output more power than the E class inverter under certain conditions.

[0012] Furthermore, as shown in Fig. 32, in the DE-class inverter, the smaller the load Q is, the larger the duty ratios of the first control signal Q1 applied to the first switching element 12 and the second control signal Q2 applied to the second switching element 13 are. That is, for the same reason as the E-class inverter, the load inductor 18 (inductance L0) is required in series with the load 5. However, for the load Q (Q = ωL0 / R l ) where ZVS and ZVDS can be achieved in the first switching element 12 and the second switching element 13, by setting the duty ratios of the first control signal Q1 applied to the first switching element 12 and the second control signal Q2 applied to the second switching element 13 to 0.29 or more, the value of the load Q can be made 1.15 or less, which is smaller than the load Q of the E-class inverter. As a result, the DE-class inverter can make the inductance L0 of the load inductor 18 required for the output load 5 smaller than that of the E-class inverter according to the duty ratios of the first control signal Q1 applied to the first switching element 12 and the second control signal Q2 applied to the second switching element 13. Therefore, the loss due to the load inductor 18 can be suppressed to a small level.

[0013] Also, the DE-class inverter has the advantage that a full-bridge type inverter can be easily constructed by combining two sets of two series-connected switching elements (the first switching element 12 and the second switching element 13), and the increase in output power can be easily realized in a relatively small area.

[0014] From the above points, there is a desire to adopt a DE-class inverter as the inverter used in the non-contact power supply system.

[0015] On the other hand, in the non-contact power supply system, when using the power transmitted non-contact for motor drive or battery charging, the received high-frequency voltage or high-frequency current cannot be used as it is, and it may be necessary to rectify the high-frequency voltage or high-frequency current into a DC voltage or DC current. In this case, the non-contact power supply system requires a rectifier circuit. This rectifier circuit is also preferably highly efficient with low losses, similar to the inverter.

[0016] Conventionally, rectifier circuits have mainly used diodes. However, it is known that rectifier circuits using diodes experience significant energy loss due to the forward bias voltage of the diode and the current flowing through the diode (Non-Patent Literature 2). Furthermore, rectifier circuits using diodes generate heat due to energy loss by the diode, requiring large heat sinks. However, contactless power supply systems require both miniaturization and high power output, and rectifier circuits using diodes have had difficulty meeting these requirements.

[0017] Therefore, in recent years, rectifier circuits have been expected to reduce losses by using semiconductor switches (switching elements) such as field-effect transistors (FETs). One such topology for rectifier circuits is the DE-class synchronous rectifier circuit.

[0018] The DE class synchronous rectifier circuit is configured as a topology in which the input and output of the DE class inverter shown in Figure 31(a) are inverted. Therefore, in the following description, the DE class synchronous rectifier circuit will be described using the same reference numerals as the DE class inverter shown in Figure 31(a).

[0019] In a Class DE synchronous rectifier circuit, an AC power supply is connected to both ends of the first switching element 12, which is one of two switching elements, a first switching element 12 and a second switching element 13, connected in series. The Class DE synchronous rectifier circuit applies a first control signal Q1 to the first switching element 12 and a second control signal Q2 to the second switching element 13 so that they are turned on alternately at a predetermined duty cycle, with a dead time during which both the first and second switching elements 12 and 13 are simultaneously turned off. At this time, the first control signal Q1 and the second control signal Q2 are generated so that the first and second switching elements 12 and 13 are turned on in synchronization with the AC voltage or AC current of the AC power supply connected to both ends of the first switching element 12. As a result, the Class DE synchronous rectifier circuit rectifies the AC voltage or AC current input from the AC power supply and outputs it to the load as a DC voltage or DC current.

[0020] Here, the DE class synchronous rectifier circuit, like the DE class inverter, has a resistance value R of the connected load 5. l The predetermined resistance value R l0 In this case, the switching voltages in the first switching element 12 and the second switching element 13 are designed to achieve ZVS and ZVDS, respectively. As a result, the DE class synchronous rectifier circuit can also be made more efficient by suppressing losses in the switching elements. [Prior art documents] [Patent Documents]

[0021] [Patent Document 1] Japanese Patent Publication No. 2022-86784 [Non-patent literature]

[0022] [Non-Patent Document 1] MKKazimierczuk and D. Czarkowski, “Resonant Power Converters”, (USA), Wiley, April 2011, pp. 382-404. [Non-Patent Document 2] T. Ohira, “Power efficiency and optimum load formulas on RF rectifiers featuring flow-angle equations”, IEICE Electronics Express, IEICE, 2013.6.10, vol.10, no.11, pp.1-9. [Overview of the project] [Problems that the invention aims to solve]

[0023] Now, as mentioned above, the DE class inverter has a resistance value R of the connected load 5. l The predetermined resistance value R l0 In this case, the switching voltages of the first switching element 12 and the second switching element 13 can be designed to achieve ZVS and ZVDS. However, depending on the load conditions, for example, the charge level if the load is a battery, or the operating state of the motor if the load is a motor, the load resistance R l It fluctuates.

[0024] Here, as shown in Figure 31(b), in the DE class inverter designed as described above, the load resistance value R l The resistance value R fluctuates, and the predetermined resistance value R l0 When it becomes smaller than this, the voltage v1 applied to the first switching element 12 (first control signal Q1) at the timing when the first switching element 12 (first control signal Q1) is turned on becomes less than 0 volts, resulting in negative voltage switching. Also, in this DE class inverter, the load resistance value R l The predetermined resistance value R l0When the value becomes greater than this, the voltage v1 applied to the first switching element 12 (first control signal Q1) at the timing when the first switching element 12 (first control signal Q1) is turned on becomes greater than 0 volts, resulting in positive voltage switching. The same applies to the second switching element 13 (second control signal Q2).

[0025] Thus, the load resistance value R l The predetermined resistance value R l0 If the voltage deviates from this, a voltage other than 0 volts will be applied to the first switching element 12 and the second switching element 13 at the switching timing, resulting in losses in the first switching element 12 and the second switching element 13. Therefore, the DE class inverter has a load resistance value R l The fluctuations in this variable prevented the circuit from achieving high-efficiency, ideal operation. Similar problems also occur in DE-class synchronous rectifier circuits.

[0026] Here, Patent Document 1 discloses a technique for providing a passive circuit in a Class E inverter that converts the input impedance to the switching circuit so that the switching voltage of the switching element remains within the range that achieves ZVS (Zero Void Voltage) with respect to the resistance value of the fluctuating load. Furthermore, Patent Document 1 discloses a technique for providing a passive circuit in a Class E synchronous rectifier circuit that converts the output impedance to the switching circuit so that the switching voltage of the switching element remains within the range that achieves ZVS (Zero Void Voltage) with respect to the resistance value of the fluctuating load.

[0027] However, in DE-class inverters and DE-class synchronous rectifier circuits, dead time is a parameter that affects the achievement of ZVS and ZVDS, while E-class inverters and E-class synchronous rectifier circuits do not have the concept of dead time. Therefore, the invention described in Patent Document 1 alone was not sufficient to obtain highly efficient ideal operation for DE-class inverters and DE-class synchronous rectifier circuits with respect to fluctuating load resistance values.

[0028] The present invention has been made in view of the above circumstances, and aims to provide an inverter and a rectifier circuit having two series-connected switching elements whose switching is controlled alternately with a dead time, enabling highly efficient ideal operation even when the resistance value of the load fluctuates, and to provide a contactless power supply system that uses at least one of these inverters and rectifier circuits. [Means for solving the problem]

[0029] To achieve this objective, an inverter according to a first aspect of the present invention generates and outputs an AC voltage or AC current to be supplied to a load from a DC voltage or DC current, and comprises a series circuit having a first capacitor with a first switching element connected in parallel and a second capacitor with a second switching element connected in parallel, configured to output an AC voltage or AC current based on the voltage or current generated at the connection point of the first capacitor and the second capacitor by alternately turning on the first switching element and the second switching element while the series circuit is connected to the DC voltage or DC current, and a passive circuit provided between the switching circuit and the load for converting the input impedance to the output of the switching circuit, wherein the switching circuit comprises a first control signal consisting of an on signal and an off signal that controls the on / off of the first switching element at a predetermined duty cycle, and a second control signal consisting of an on signal and an off signal that controls the on / off of the second switching element at a predetermined duty cycle. A signal is input, and the ON signal of the first control signal and the ON signal of the second control signal occur alternately in time, and a dead time is provided between the ON signal of the first control signal and the ON signal of the second control signal, during which both the first control signal and the second control signal become the OFF signal, and the passive circuit is configured such that the switching voltages of the first switching element and the second switching element, which are determined based on the configuration and setting values ​​of each element provided in the switching circuit and the circuit connected to the switching circuit including the load, and the length of the dead time, are converted so that the input impedance becomes the reference impedance when zero voltage switching and zero voltage differential switching are achieved during the length of the dead time, and when the resistance value of the load changes from the predetermined resistance value, the input impedance is converted so that the switching voltage is within the range that achieves zero voltage switching during the length of the dead time.

[0030] Here, the expression "alternating voltage or alternating current" means that the present invention is being considered by focusing on one or the other. For example, if the present invention is considered as alternating voltage, alternating current is not excluded; it goes without saying that the two are inseparable physical concepts. The same applies to the expressions "voltage or current" and "direct current or direct current." This way of thinking applies to everything in the present invention.

[0031] The inverter according to the second embodiment is configured such that, in the inverter according to the first embodiment, the passive circuit is configured as a circuit that satisfies impedance parameters obtained when impedance conversion is performed from the real-axis load fluctuation geodesic drawn on the Smith chart representing the fluctuation of the load resistance to the zero-voltage switching geodesic drawn on the Smith chart representing the input impedance that achieves zero-voltage switching over the duration of the dead time.

[0032] In the inverter according to the third embodiment, the impedance parameters of the passive circuit are determined such that the impedance transformation from the real-axis load fluctuation geodesic to the zero-voltage switching geodesic is performed by a Möbius transformation using at least one of scaling, rotation, and translation in the vertical direction on an impedance plane where the vertical axis is the reactance component and the horizontal axis is the resistance component.

[0033] The inverter according to the fourth embodiment is an inverter according to any of the first to third embodiments, wherein the passive circuit is composed of an inductor and a capacitor.

[0034] The fifth embodiment of the rectifier circuit rectifies an AC voltage or AC current and outputs a DC voltage or DC current to a load, and has a series circuit in which a first capacitor with a first switching element connected in parallel and a second capacitor with a second switching element connected in parallel are connected in series, and a switching circuit that outputs the DC voltage or DC current by alternately turning on the first switching element and the second switching element under predetermined conditions while a voltage or current based on the AC voltage or AC current is supplied to the connection point of the first capacitor and the second capacitor, a passive circuit provided between the input terminal of the rectifier circuit to which the AC voltage or AC current is input and the switching circuit for converting the output impedance to the input of the switching circuit, a first control signal consisting of an on signal and an off signal that controls the on / off of the first switching element at a predetermined duty cycle, and a second control signal consisting of an on signal and an off signal that controls the on / off of the second switching element at the same duty cycle as the predetermined duty cycle, are generated and output to the switching circuit The passive circuit comprises a control unit, the control unit generates the first control signal and the second control signal so that the ON signal of the first control signal and the ON signal of the second control signal occur alternately in time, a dead time is provided between the ON signal of the first control signal and the ON signal of the second control signal such that both the first control signal and the second control signal are OFF signals, and the passive circuit generates the first control signal and the second control signal such that the AC voltage or AC current input to the rectifier circuit has a predetermined phase difference, and the passive circuit converts the switching voltage of the first switching element and the second switching element, which is determined based on the configuration and setting values ​​of each element provided in the switching circuit and the circuit connected to the switching circuit including the load, and the time length of the dead time, so that the output impedance when zero voltage switching and zero voltage differential switching are achieved during the time length of the dead time is used as the reference impedance, so that the output impedance becomes the reference impedance when the load has a predetermined resistance value, and when the resistance value of the load changes from the predetermined resistance value,The system is configured to convert the output impedance so that the switching voltage falls within the range that achieves zero-voltage switching during the duration of the dead time.

[0035] The rectifier circuit according to the sixth embodiment is determined in the rectifier circuit according to the fifth embodiment by whether the input to the rectifier circuit is a constant voltage or a constant current, whether the output to the load is a constant voltage or a constant current, and whether the off-diagonal component of the Z parameter or the off-diagonal component of the Y parameter representing the passive circuit is a positive number or a negative number.

[0036] The rectifier circuit according to the seventh embodiment is a rectifier circuit according to the fifth or sixth embodiment, in which the control unit detects the AC voltage or AC current input to the rectifier circuit, and generates the first control signal and the second control signal based on the detection result such that the phase difference between the first control signal and the second control signal and the AC voltage or AC current input to the rectifier circuit becomes the predetermined phase difference.

[0037] The rectifier circuit according to the eighth embodiment is a rectifier circuit according to the fifth or sixth embodiment in which the control unit detects the AC voltage or AC current input to the rectifier circuit and generates the first control signal and the second control signal, and adjusts the phase of the first control signal and the second control signal so that the DC voltage or DC current becomes a predetermined target value.

[0038] The rectifier circuit according to the ninth embodiment is a rectifier circuit according to the fifth or sixth embodiment in which the control unit detects the AC voltage or AC current input to the rectifier circuit and generates the first control signal and the second control signal, and adjusts the phase of the first control signal and the second control signal so that the ratio of the AC voltage to the DC voltage, the ratio of the AC voltage to the DC current, the ratio of the AC current to the DC current, or the ratio of the AC current to the DC voltage becomes a predetermined target value.

[0039] The non-contact power supply system according to the tenth embodiment has an inverter according to any of the first to fourth embodiments on the power supply side and is coupled to a rectifier circuit via a coupler.

[0040] The non-contact power supply system according to the eleventh embodiment has a rectifier circuit according to any of the fifth to ninth embodiments on the power receiving side and is coupled to an inverter via a coupler.

[0041] The non-contact power supply system according to the twelfth embodiment has an inverter according to any of the first to fourth embodiments on the power supply side and a rectifier circuit according to any of the fifth to ninth embodiments on the power receiving side, and the inverter and the rectifier circuit are coupled by a coupler. [Effects of the Invention]

[0042] According to the first embodiment of the power transmission device, a DC voltage or DC current is supplied to a series circuit of a first capacitor and a second capacitor constituting the switching circuit (i.e., a series circuit of a first switching element and a second switching element). A first control signal that controls the on / off state of the first switching element at a predetermined duty cycle, and a second control signal that controls the on / off state of the second switching element at the same predetermined duty cycle, are input to the switching circuit. The ON signals of the first control signal and the ON signals of the second control signal are generated alternately. As a result, an AC voltage or AC current based on the voltage or current generated at the connection point between the first capacitor and the second capacitor (i.e., the connection point between the first switching element and the second switching element) is output from the switching circuit. The inverter can output an AC voltage or AC current to the load based on this AC voltage or AC current output from the switching circuit.

[0043] Here, a dead time is provided between the ON signal of the first control signal and the ON signal of the second control signal, during which both the first and second control signals are OFF. Based on the length of this dead time, as well as the configuration and setting values ​​of each element provided in the switching circuit and the circuit connected to the switching circuit including the load, the switching voltages of the first and second switching elements are determined.

[0044] On the other hand, a passive circuit is provided between the switching circuit and the load, and this passive circuit converts the input impedance to the output of the switching circuit. Specifically, when the load has a predetermined resistance value, the input impedance to the output of the switching circuit is converted to a reference impedance by the passive circuit. Here, the reference impedance is the input impedance to the output of the switching circuit when the switching voltages of the first and second switching elements achieve zero-voltage switching and zero-voltage differential switching over the duration of the dead time. As a result, when the load has a predetermined resistance value, the switching voltages of the first and second switching elements achieve zero-voltage switching and zero-voltage differential switching, thereby suppressing losses in the first and second switching elements.

[0045] Furthermore, even if the load deviates from a predetermined resistance value, the input impedance to the output of the switching circuit is converted by the passive circuit so that the switching voltages of the first and second switching elements remain within the range that achieves zero-voltage switching during the dead time. As a result, even if the load changes from a predetermined resistance value, the switching voltages of the first and second switching elements achieve at least zero-voltage switching, thus suppressing losses in the first and second switching elements in the same way as when the load had a predetermined resistance value. Therefore, it is possible to provide an inverter having two series-connected switching elements with a dead time that are alternately controlled, enabling highly efficient ideal operation even when the load resistance value fluctuates.

[0046] The inverter according to the second embodiment provides the following effects in addition to those of the inverter according to the first embodiment. Specifically, when an impedance parameter is determined that allows impedance conversion from the real-axis load fluctuation geodesic plotted on a Smith chart to the zero-voltage switching geodesic plotted on a Smith chart for the input impedance to the output of a switching circuit that achieves zero-voltage switching as the switching voltage during the dead time, a passive circuit is configured as a circuit that satisfies that impedance parameter. In other words, by simply determining the impedance parameter that allows impedance conversion from the real-axis load fluctuation geodesic to the zero-voltage switching geodesic, it is possible to reliably construct a passive circuit that can convert the input impedance to the output of a switching circuit into an input impedance that allows the switching voltages of the first and second switching elements to achieve zero-voltage switching during the dead time, in response to fluctuations in the load resistance.

[0047] The inverter according to the third embodiment provides the following effects in addition to those of the inverter according to the second embodiment. Specifically, the impedance transformation from a real-axis load fluctuation geodesic to a zero-voltage switching geodesic is performed by a Möbius transformation using at least one of scaling, rotation, and translation in the vertical direction on an impedance plane where the vertical axis represents the reactance component and the horizontal axis represents the resistance component, and the impedance parameters of the passive circuit are determined in this manner.

[0048] The geodesic of real-axis load fluctuations is represented by a straight line on the impedance plane, and the geodesic of zero-voltage switching is represented by a semicircle on the impedance plane. On the other hand, the Möbius transformation allows mapping from circle to circle. Furthermore, since a straight line can be considered as a circle with infinite radius, the Möbius transformation also allows mapping from a straight line to a circle. The passive circuit is constructed so that the impedance transformation from the geodesic of real-axis load fluctuations, which represents the load resistance value as a straight line, to the zero-voltage switching geodesic, which represents the input impedance to the output of the switching circuit as a semicircle, is realized using such a Möbius transformation. As a result, a passive circuit can be constructed that reliably transforms the input impedance to the output of the switching circuit so that, for a fluctuating load resistance value, the input impedance achieves zero-voltage switching for the dead time length of the first and second switching elements.

[0049] Furthermore, since the Möbius transformation performed in a passive circuit uses at least one of scaling, rotation, and translation in the vertical axis direction (the direction in which only the reactance component changes), this Möbius transformation can be constructed using an inductor and a capacitor. In other words, a passive circuit can be constructed without using resistors, thus suppressing losses in the passive circuit. Therefore, even with a passive circuit in place, the high efficiency of the inverter can be maintained.

[0050] According to the inverter of the fourth embodiment, in addition to the effects of the inverter according to any of the first to third embodiments, the passive circuit is composed of an inductor and a capacitor, so that losses in the passive circuit can be suppressed. Therefore, even if a passive circuit is provided, the high efficiency of the inverter can be maintained.

[0051] According to the rectifier circuit of the fifth embodiment, a voltage or current based on an AC voltage or AC current is supplied to the connection point between the first capacitor and the second capacitor in the series circuit of the first capacitor and the second capacitor constituting the switching circuit (i.e., the series circuit of the first switching element and the second switching element) (i.e., the connection point between the first switching element and the second switching element). A first control signal that controls the on / off state of the first switching element at a predetermined duty cycle, and a second control signal that controls the on / off state of the second switching element at the same predetermined duty cycle, are input to the switching circuit. The first control signal and the second control signal are generated by the control unit as follows: The on signals of the first control signal and the on signals of the second control signal are generated alternately in time, a dead time is provided between the on signals of the first and second control signals where both the first and second control signals are off signals, and the first and second control signals are generated such that there is a predetermined phase difference between the first and second control signals and the AC voltage or AC current input to the rectifier circuit. The generated first and second control signals are output from the control unit to the switching circuit. As a result, the first and second switching elements are alternately turned on with a constant phase difference relative to the AC voltage or AC current input to the rectifier circuit. Therefore, the AC voltage or AC current input to the rectifier circuit is rectified by the switching circuit, and a DC voltage or DC current can be output from the switching circuit.

[0052] Here, the switching voltages of the first switching element and the second switching element are determined based on the length of the dead time between the ON signal of the first control signal and the ON signal of the second control signal, as well as the configuration and setting values ​​of each element provided in the switching circuit and the circuit connected to the switching circuit including the load.

[0053] On the other hand, a passive circuit is provided between the input terminal of the rectifier circuit, to which an AC voltage or AC current is input, and the switching circuit, and this passive circuit converts the output impedance to the input of the switching circuit. Specifically, when the load has a predetermined resistance value, the output impedance to the input of the switching circuit is converted to a reference impedance by the passive circuit. Here, the reference impedance is the output impedance to the input of the switching circuit when the switching voltages of the first switching element and the second switching element achieve zero-voltage switching and zero-voltage differential switching over the duration of the dead time. As a result, when the load has a predetermined resistance value, the switching voltages of the first switching element and the second switching element achieve zero-voltage switching and zero-voltage differential switching, thereby suppressing losses in the first switching element and the second switching element.

[0054] Furthermore, even if the load deviates from a predetermined resistance value, the input impedance to the output of the switching circuit is converted by the passive circuit so that the switching voltages of the first and second switching elements remain within the range that achieves zero-voltage switching during the dead time duration. As a result, even if the load changes from a predetermined resistance value, the switching voltages of the first and second switching elements achieve at least zero-voltage switching, thus suppressing losses in the first and second switching elements in the same way as when the load had a predetermined resistance value. Therefore, it is possible to provide a rectifier circuit having two series-connected switching elements that have a dead time and whose switching is controlled alternately, enabling highly efficient ideal operation even when the load resistance value fluctuates.

[0055] The rectifier circuit according to the sixth embodiment provides the following effects in addition to those of the rectifier circuit according to the fifth embodiment. Specifically, the predetermined phase difference between the first control signal and the second control signal and the AC voltage or AC current input to the rectifier circuit is determined by whether the input to the rectifier circuit is a constant voltage or a constant current, whether the output to the load is a constant voltage or a constant current, and whether the off-diagonal component of the Z parameter or the off-diagonal component of the Y parameter, which indicates a passive circuit, is a positive or negative number. This has the effect of realizing a rectifier circuit that can output a constant DC voltage or a constant DC current to the load when a constant AC voltage or a constant AC current is input to the rectifier circuit.

[0056] The rectifier circuit according to the seventh embodiment provides the following effects in addition to the effects of the rectifier circuit according to the fifth or sixth embodiment. Specifically, the control unit detects the AC voltage or AC current input to the rectifier circuit, and based on the detection result, generates the first control signal and the second control signal so that the phase difference between the first control signal and the AC voltage or AC current input to the rectifier circuit is a predetermined phase difference. As a result, even if there is a phase shift in the AC voltage or AC current input to the rectifier circuit, the phase difference between that AC voltage or AC current and the first control signal and the second control signal is maintained at a predetermined phase difference. Therefore, zero-voltage switching in the first switching element and the second switching element can be maintained, which has the effect of maintaining high-efficiency operation in the rectifier circuit.

[0057] The rectifier circuit according to the eighth embodiment provides the following effects in addition to those of the rectifier circuit according to the fifth or sixth embodiment. Specifically, the control unit detects the AC voltage or AC current input to the rectifier circuit and generates a first control signal and a second control signal. At this time, the control unit adjusts the phases of the first control signal and the second control signal so that the DC voltage or DC current becomes a predetermined target value. As a result, even if the constant voltage property of the AC voltage or constant current property of the AC current input to the rectifier circuit is disrupted and the amplitude fluctuates, the magnitude of the DC voltage or DC current output from the rectifier circuit can be kept constant.

[0058] The rectifier circuit according to the ninth embodiment provides the following effects in addition to those of the rectifier circuit according to the fifth or sixth embodiment. Specifically, the control unit detects the AC voltage or AC current input to the rectifier circuit and generates a first control signal and a second control signal. At this time, the control unit adjusts the phases of the first control signal and the second control signal so that the ratio of AC voltage to DC voltage, the ratio of AC voltage to DC voltage, the ratio of AC current to DC current, or the ratio of AC current to DC voltage becomes a predetermined target value. As a result, if the constant voltage property of the AC voltage or the constant current property of the AC current input to the rectifier circuit is disrupted and the amplitude fluctuates, the magnitude of the DC voltage or DC current can be varied in accordance with the fluctuation, while maintaining zero-voltage switching in the first and second switching elements. Therefore, there is an effect of maintaining high-efficiency operation in the rectifier circuit.

[0059] According to the non-contact power supply system of the tenth aspect of the present invention, an AC voltage or AC current is generated by an inverter according to any of the first to fourth aspects provided on the power supply side, and this AC voltage or AC current is supplied to a rectifier circuit via a coupler in a non-contact manner. As a result, this non-contact power supply system can obtain the same effects as those achieved by an inverter provided on the power supply side.

[0060] According to the eleventh aspect of the contactless power supply system, the AC voltage or AC current output from the inverter is received contactlessly via a coupler in a rectifier circuit according to one of the fifth to ninth aspects provided on the receiving side. The DC voltage or DC current generated by the rectifier circuit is then output to the load. As a result, this contactless power supply system can obtain the same effects as those achieved by a rectifier circuit provided on the receiving side.

[0061] According to the twelfth aspect of the contactless power supply system, an AC voltage or AC current is generated by an inverter according to one of the first to fourth aspects provided on the power supply side, and this AC voltage or AC current is supplied contactlessly to a rectifier circuit according to one of the fifth to ninth aspects via a coupler. The DC voltage or DC current generated by the rectifier circuit is then output to the load. As a result, this contactless power supply system can obtain the same effects as those achieved by an inverter provided on the power supply side, and also the same effects as those achieved by a rectifier circuit provided on the power receiving side. [Brief explanation of the drawing]

[0062] [Figure 1] This is a schematic diagram of a contactless power supply system according to one embodiment of the present invention. [Figure 2] (a) is a circuit diagram of the inverter of the contactless power supply system, and (b) is a diagram showing the switching state of the first and second switching elements constituting the inverter, and the time progression of the voltage applied to the first switching element. [Figure 3] The Z-plane diagrams show the ZVS geodesic, ZVDS geodesic, and ZVS / ZVDS load point for the duty cycles set for the first control signal of the first switching element and the second control signal of the second switching element of the inverter, respectively. (a) shows the case with a duty cycle of 0.05, (b) shows the case with a duty cycle of 0.1, (c) shows the case with a duty cycle of 0.15, (d) shows the case with a duty cycle of 0.2, (e) shows the case with a duty cycle of 0.25, and (f) shows the case with a duty cycle of D=0.3. [Figure 4] These are Z-plane views, with (a) showing the case with a duty cycle of 0.35, (b) showing the case with a duty cycle of 0.4, and (c) showing the case with a duty cycle of 0.45. [Figure 5] (a) is a Smith chart showing the ZVS geodesic and the real-axis load fluctuation geodesic of the inverter; (b) is a diagram showing the circular transformation of the Möbius transform on the Z-plane; and (c) is a diagram showing the linear transformation of the Möbius transform on the Z-plane. [Figure 6] (a) is a circuit diagram showing a passive circuit that realizes translation in the vertical axis direction (reactance (X) axis direction) on the Z plane as a circular transformation, (b) is a circuit diagram showing a passive circuit that realizes scaling as a circular transformation, and (c) is a circuit diagram showing a passive circuit that realizes rotation as a circular transformation. [Figure 7] (a) is a diagram showing the Z parameters of the passive circuit provided in the inverter, (b) is a diagram showing an example of the correspondence between three points on the real-axis load fluctuation geodesic and three points on the ZVS geodesic to be obtained by impedance transformation by the passive circuit, and Figure 7(c) is a diagram showing another example of that correspondence. [Figure 8] (a) is a diagram showing a circuit topology that realizes a Z parameter consisting entirely of reactance components, and (b) is a diagram showing a circuit topology that realizes a Y parameter consisting entirely of susceptance components. [Figure 9] Figure 7(b) shows the circuit topology of the passive circuit that realizes the impedance conversion shown. [Figure 10] This figure shows the circuit topology of the passive circuit that realizes the impedance conversion shown in Figure 7(c). [Figure 11] (a) is a circuit diagram showing an inverter having a passive circuit according to design example 1, and (b) is a diagram showing the values ​​of each parameter of the inverter used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 12] This figure shows the simulation results of the inverter related to design example 1. [Figure 13] (a) is a circuit diagram showing an inverter having a passive circuit according to design example 2, and (b) is a diagram showing the values ​​of each parameter of the inverter used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 14] This figure shows the simulation results of the inverter related to design example 2. [Figure 15](a) is a circuit diagram showing an inverter having a passive circuit according to design example 3, and (b) is a diagram showing the values ​​of each parameter of the inverter used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 16] This figure shows the simulation results for the inverter related to design example 3. [Figure 17] (a) is a circuit diagram showing an inverter having a passive circuit according to design example 4, and (b) is a diagram showing the values ​​of each parameter of the inverter used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 18] This figure shows the simulation results of the inverter related to design example 4. [Figure 19] (a) is a circuit diagram showing an inverter having a passive circuit according to design example 5, and (b) is a diagram showing the values ​​of each parameter of the inverter used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 20] This figure shows the simulation results of the inverter related to design example 5. [Figure 21] This is a circuit diagram of the rectifier circuit used in the contactless power supply system. [Figure 22] (a) is a circuit diagram showing a rectifier circuit having a passive circuit according to design example 6, and (b) is a diagram showing the values ​​of each parameter of the rectifier circuit used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 23] This figure shows the simulation results of the rectifier circuit related to design example 6. [Figure 24] (a) is a circuit diagram showing a rectifier circuit having a passive circuit according to design example 7, and (b) is a diagram showing the values ​​of each parameter of the rectifier circuit used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 25] This figure shows the simulation results of the rectifier circuit related to design example 7. [Figure 26](a) is a circuit diagram showing a rectifier circuit having a passive circuit according to design example 8, and (b) is a diagram showing the values ​​of each parameter of the rectifier circuit used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 27] This figure shows the simulation results of the rectifier circuit related to design example 8. [Figure 28] (a) is a circuit diagram showing a rectifier circuit having a passive circuit according to design example 9, and (b) is a diagram showing the values ​​of each parameter of the rectifier circuit used in the design of the said passive circuit and the values ​​of each parameter of the passive circuit obtained by that design. [Figure 29] This figure shows the simulation results of the rectifier circuit related to design example 9. [Figure 30] This diagram illustrates a modified example of a method for generating a first control signal that controls the first switching element and a second control signal that controls the second switching element of a rectifier circuit. [Figure 31] (a) is a circuit diagram showing a conventional DE class inverter, and (b) is a diagram showing the switching state of the first and second switching elements constituting the DE class inverter, and the time progression of the voltage applied to the first switching element. [Figure 32] This figure shows the load Q characteristics with respect to the duty cycle of the first and second switching elements in a DE class inverter. [Modes for carrying out the invention]

[0063] Hereinafter, embodiments for carrying out the present invention will be described with reference to the accompanying drawings. The embodiments described below are all preferred specific examples of the present invention. Therefore, the numerical values, shapes, materials, components, and their arrangement and connection configurations shown in the following embodiments are examples only and are not intended to limit the present invention. Accordingly, among the components in the following embodiments, those not described in the independent claims representing the highest-level concept of the present invention will be described as optional components. Furthermore, in each figure, substantially identical components are denoted by the same reference numerals, and redundant explanations are omitted or simplified.

[0064] <1. Overall Structure> First, with reference to Figure 1, an overview of a contactless power supply system 1 according to one embodiment of the present invention will be described. Figure 1 is a schematic configuration diagram of the contactless power supply system 1.

[0065] The contactless power supply system 1 is a load 5 (resistance value R l This system supplies power to a power source wirelessly and comprises an inverter 2 on the power supply side, a rectifier circuit 3 on the power receiving side, and a coupler 4 that connects the inverter 2 and the rectifier circuit 3.

[0066] Inverter 2 is a circuit that generates and outputs high-frequency power (AC voltage or AC current) to supply (power to) load 5 from a DC power source (DC voltage or DC current). Inverter 2 is configured as a DE class inverter in its topology.

[0067] As described above, the DE class inverter has a resistance value R of load 5 (see Figure 2(a)). l The predetermined resistance value R l0 Therefore, the switching voltage in the switching element can be configured to achieve zero-voltage switching (hereinafter referred to as "ZVS") and zero-voltage differential switching (hereinafter referred to as "ZVDS"). As a result, the DE class inverter can suppress losses due to the switching element, thereby achieving higher efficiency.

[0068] Furthermore, DE-class inverters can output more power than E-class inverters depending on the conditions, and full-bridge inverters can be easily constructed, making it possible to easily achieve high output power in a small area.

[0069] Furthermore, in order for a DE class inverter to output a sine wave (fundamental wave) to the load 5 via a resonant filter (a circuit in which a resonant capacitor 16 and a resonant inductor 17 are connected in series, as shown in Figure 2(a)) while achieving ZVS and ZVDS in the switching elements, a load inductor (load inductor 18 (inductance L0) as shown in Figure 31(a) is required. The load Q (=ωL0 / R) of the DE class inverter is due to this load 5 and load inductor 18. l However, the larger the duty cycle D of the control signal applied to the switching element, the smaller the inductance L0 becomes (see Figure 32). This has the advantage that the inductance L0 of the load inductor 18 (see Figure 31(a)) required for the load 5 can be reduced, thus minimizing losses due to the inductor. Therefore, a DE class inverter is a suitable topology for the inverter 2 of a contactless power supply system 1 that requires a large amount of power to supply power to the load 5.

[0070] The rectifier circuit 3 is a circuit that rectifies the received high-frequency power (AC voltage or AC current) and outputs a DC voltage or DC current to the load 5. The rectifier circuit 3 is configured as a DE class synchronous rectifier circuit.

[0071] As described above, the DE class synchronous rectifier circuit, like the DE class inverter, has a resistance value R of load 5 (see Figure 21). l The predetermined resistance value R l0 Therefore, the switching voltage in the switching element can be configured to achieve ZVS and ZVDS. As a result, the DE class synchronous rectifier circuit can suppress losses due to the switching element, thereby improving efficiency, and can be said to be a suitable topology for the rectifier circuit 3 used in the contactless power supply system 1.

[0072] Coupler 4 is a contactless coupler that connects the power-supplying inverter 2 and the power-receiving rectifier circuit 3. Coupler 4 supplies high-frequency power (AC voltage or AC current) output from the inverter 2 to the rectifier circuit 3 without contact. Coupler 4 can utilize various methods, such as magnetic field coupling using coils on both the transmitting and receiving sides, or electric field coupling using electrodes on both sides. However, any configuration of coupler 4 is acceptable as long as it can supply high-frequency power from the inverter 2 to the rectifier circuit 3 without contact.

[0073] The contactless power supply system 1 configured in this way operates as follows: When a DC voltage or DC current is supplied to the inverter 2, the inverter 2 generates high-frequency power (AC voltage or AC current). The high-frequency power generated by the inverter 2 is supplied to the rectifier circuit 3 contactlessly by the coupler 4. The high-frequency power received by the rectifier circuit 3 is rectified by the rectifier circuit 3, generating a DC voltage or DC current. The DC voltage or DC current generated by the rectifier circuit 3 is output to the load 5. As a result, the contactless power supply system 1 can supply power to the load 5 contactlessly.

[0074] <2. Inverter Configuration> Next, with reference to Figure 2, the configuration of the inverter 2 used in the contactless power supply system 1 will be explained. Figure 2(a) is a circuit diagram of the inverter 2, and Figure 2(b) shows the switching state of the first switching element 12 (first control signal Q1) and the second switching element 13 (second control signal Q2) that constitute the inverter 2, and the time progression of the voltage v1 applied to the first switching element 12 (first capacitor 14 connected in parallel with the first switching element 12). In order to simplify the explanation of the inverter 2, the coupler 4, rectifier circuit 3, and load 5 shown in Figure 1, which are provided after the output of the inverter 2 in the contactless power supply system 1, will be grouped together as a single load 5 (resistance value R l ) will be explained as follows.

[0075] The inverter 2 is configured to include a switching circuit 11 that forms a DE class inverter, and a passive circuit 20 provided between the switching circuit 11 and the load 5.

[0076] The switching circuit 11 has a DC voltage V at its input terminal. DC A DC voltage source 10 is connected to this circuit, which generates and outputs an AC voltage or AC current from the DC voltage source 10. Alternatively, a DC current source 10a may be connected to the input terminal of the switching circuit 11 instead of the DC voltage source 10 (see Figures 15 and 17). The AC voltage or AC current generated by the switching circuit 11 is output from the output terminal to the load 5 via the passive circuit 20.

[0077] The switching circuit 11 includes a smoothing capacitor 19 (capacitance C f ) and a first switching element 12, a second switching element 13, a first capacitor 14 (capacitance C) in which the first switching element 12 is connected in parallel, a second capacitor 15 (capacitance C) in which the second switching element 13 is connected in parallel, and a resonant capacitor 16 (capacitance C r ) and the resonant inductor 17 (inductance L r It is composed of having )

[0078] The smoothing capacitor 19 is a large-capacity capacitor connected in parallel with the DC voltage source 10 for the purpose of supplying a stable DC voltage to the switching circuit 11, and plays the role of smoothing the voltage output from the DC voltage source 10. In addition, the smoothing capacitor 19 also suppresses surge voltages generated by the on / off switching of the first switching element 12 and the second switching element 13, and prevents damage to the first switching element 12 and the second switching element 13.

[0079] The first capacitor 14 and the second capacitor 15 form a series circuit when connected in series. This series circuit is connected in parallel to the DC voltage source 10 such that the first capacitor 14 is connected to the negative side of the DC voltage source 10 and the second capacitor 15 is connected to the positive side of the DC voltage source 10.

[0080] This indicates that the first switching element 12, which is connected in parallel to the first capacitor 14, and the second switching element 13, which is connected in parallel to the second capacitor 15, also constitute a series circuit. This series circuit is connected in parallel to the DC voltage source 10, with the first switching element 12 connected to the negative side of the DC voltage source 10 and the second switching element 13 connected to the positive side of the DC voltage source 10. Furthermore, the connection point between the first switching element 12 and the second switching element 13 is the same (at the same potential) as the connection point between the first capacitor 14 and the second capacitor 15.

[0081] The first switching element 12 and the second switching element 13 are composed of semiconductor switches such as transistors, and for example, field-effect transistors (FETs) such as n-type MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) are used. To control the on / off state of the first switching element 12 and the second switching element 13, the switching circuit 11 receives a first control signal Q1 and a second control signal Q2. The first control signal Q1 is a control signal that controls the on / off state of the first switching element 12 at a predetermined duty cycle D. The second control signal Q2 is a control signal that controls the on / off state of the second switching element 13 at the same predetermined duty cycle D.

[0082] Figure 2(b) shows the waveforms of the first control signal Q1 and the second control signal Q2 when n-type MOSFETs are used as the first switching element 12 and the second switching element 13. The first control signal Q1 and the second control signal Q2 are generated by a control unit (not shown) so as to have the waveforms shown in Figure 2(b). The first control signal Q1 is input to the gate of the n-type MOSFET constituting the first switching element 12, and the second control signal Q2 is input to the gate of the n-type MOSFET constituting the second switching element 13.

[0083] In other words, both the first control signal Q1 and the second control signal Q2 are generated as signals that control the on / off state of the first switching element 12 or the second switching element 13 at a switching period T (switching frequency f = 1 / T). The on signal for turning on the first switching element 12 in the first control signal Q1 and the on signal for turning on the second switching element 13 in the second control signal Q2 are generated alternately in time.

[0084] Furthermore, a dead time is provided between the ON signal of the first control signal Q1 and the ON signal of the second control signal Q2, during which both the first control signal Q1 and the second control signal Q2 are OFF signals. The OFF signal of the first control signal Q1 is a signal to turn off the first switching element 12, and the OFF signal of the second control signal Q2 is a signal to turn off the second switching element 13. Therefore, during the dead time period, both the first switching element 12 and the second switching element 13 are turned off in the switching circuit 11.

[0085] Furthermore, p-type MOSFETs may be used as the first switching element 12 and the second switching element 13. In this case, the polarity of the gate voltage required to turn on the switching element is reversed compared to the n-type MOSFET, so the waveforms of the first control signal Q1 and the second control signal Q2 are inverted versions of those shown in Figure 2(b). That is, when n-type MOSFETs are used as the first switching element 12 and the second switching element 13, as shown in Figure 2(b), (voltage of the ON signal of the first control signal Q1 and the second control signal Q2) > (voltage of the OFF signal of the first control signal Q1 and the second control signal Q2), but when p-type MOSFETs are used as the first switching element 12 and the second switching element 13, (voltage of the ON signal of the first control signal Q1 and the second control signal Q2) < (voltage of the OFF signal of the first control signal Q1 and the second control signal Q2).

[0086] To summarize, the first control signal Q1 and the second control signal Q2 are generated as shown in Figure 2(b), with a dead time duration τ, within a time range of 0 to T (where T is the switching period), for example, as follows.

[0087] First, during the time interval from 0 to τ, there is a dead time, and both the first control signal Q1 and the second control signal Q2 are off signals. Next, during the time interval from τ to T / 2, the second control signal Q2 remains off, and the first control signal Q1 becomes on. Then, during the time interval from T / 2 to T / 2+τ, there is another dead time, and both the first control signal Q1 and the second control signal Q2 are off signals. Finally, during the time interval from T / 2+τ to T, the first control signal Q1 remains off, and the second control signal Q2 becomes on signal.

[0088] Note that the duty cycle D(=T) of the first control signal Q1 and the second control signal Q2 on / (T on +T off ). Here, T on T is the duration of the ON signal. off is the duration of the off signal. ) is determined by the switching period T and the duration of the dead time τ, by the following equation (A).

[0089] D = (T - 2τ) / 2T = (π - φ) / 2π (A) Here, φ is a variable that represents the magnitude (angle) of the phase advance during the dead time length τ relative to the switching period T, and is defined as φ = ωτ = 2πτ / T (where ω is the switching angular frequency, and ω = 2π / T).

[0090] When the first control signal Q1 and the second control signal Q2 are input to the switching circuit 11, the on / off state of the first switching element 12 is controlled by the first control signal Q1, and the on / off state of the second switching element 13 is controlled by the second control signal Q2. As a result, the voltage v1 generated across the first capacitor 14 (i.e., the first switching element 12) takes on the waveform shown in Figure 2(b).

[0091] The voltage v1 generated across the first capacitor 14 (i.e., the first switching element 12) is the switching voltage of the first switching element 12, and can also be described as the voltage v1 generated at the connection point between the first capacitor 14 and the second capacitor 15 (i.e., the connection point between the first switching element 12 and the second switching element 13). A resonant filter, configured by connecting a resonant capacitor 16 and a resonant inductor 17 in series, is connected to this connection point between the first capacitor 14 and the second capacitor 15. This resonant filter is configured to resonate at the fundamental frequency of voltage v1 by the resonant capacitor 16 and the resonant inductor 17. The switching circuit 11 converts the fundamental wave (sine wave) of voltage v1 that has passed through this resonant filter into an AC voltage v l The AC voltage v output from this switching circuit 11 is output from the output terminal. l However, it is supplied to the load 5 via the passive circuit 20.

[0092] Here, the waveform of voltage v1 shown in Figure 2(b) represents the switching voltages of the first switching element 12 and the second switching element 13 achieving ZVS and ZVDS. However, the switching voltages of the first switching element 12 and the second switching element 13 are determined based on the configuration and settings of each element provided in the switching circuit 11 and the circuit connected to the switching circuit 11 including the load 5, as well as the length of the dead time τ.

[0093] This means that the voltage v1 waveform shown in Figure 2(b) is only obtained when the input impedance Z (=R+jX, where R is the input resistance and X is the input reactance) to the output of the switching circuit 11 is equal to the reference impedance Z0 described later. If the input impedance Z deviates from the reference impedance Z0, the voltage v1 waveform will be different from that shown in Figure 2(b), and depending on the input impedance Z, the switching voltages of the first switching element 12 and the second switching element 13 may not be able to achieve not only ZVDS but also ZVS.

[0094] The passive circuit 20 is provided between the switching circuit 11 and the load 5, and the resistance value R of the load 5 l This circuit is for converting the input impedance Z to the output of the switching circuit 11 to an impedance that achieves at least ZVS for the duration τ of the dead time set in the first control signal Q1 and the second control signal Q2, in response to fluctuations in the switching voltage.

[0095] Specifically, the passive circuit 20 uses the resistance value R of the load 5. l The predetermined resistance value R l0 In this case, the input impedance Z is converted to become the reference impedance Z0. Here, the reference impedance Z0 is the input impedance Z when the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2. Also, the passive circuit 20 is configured to handle the resistance value R of the load 5. l The predetermined resistance value R l0 When the voltage fluctuates, the input impedance Z is converted so that the switching voltage remains within the range that achieves ZVS during the dead time duration τ set for the first control signal Q1 and the second control signal Q2.

[0096] The load inductor 18 shown in Figure 31(a), which is required for load 5, is included in the passive circuit 20 in the inverter 2 according to this embodiment. In other words, the passive circuit 20 is designed to include the inductance L0 component of the load inductor 18.

[0097] <3. Design Methods for Passive Circuits> This section describes a design method for a passive circuit 20 that can convert the input impedance Z as described above.

[0098] <3.1. Reference Impedance> First, in inverter 2, the reference impedance Z0 is calculated, which is the input impedance Z at which the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2. This calculation is performed based on the DE class inverter shown in Figure 31(a), in which a load inductor 18 (inductance L0) is connected in series between a resonant filter (resonant capacitor 16 and resonant inductor 17) and a load 5, instead of the passive circuit 20.

[0099] First, the DC voltage V output from the DC voltage source 10 DC The following equation (1) holds true between the voltage v1 applied across the first capacitor 14 (first switching element 12) and the voltage v2 applied across the second capacitor 15 (second switching element 13).

[0100] V DC =v1+v2(1) Furthermore, the current i output from inverter 2 to load 5 can be expressed by the following equation (2).

[0101] i=I P sin(ωt)+I Q cos(ωt) (2) On the other hand, when both the first switching element 12 and the second switching element 13 are off, the current i and the current i flowing through the first capacitor 14 are... c1 and the current i flowing through the second capacitor 15 c2 According to Kirchhoff's first law, the following equation (3) holds true.

[0102] i c2 =i c1 +i (3) If we consider the capacitances C of the first capacitor 14 and the second capacitor 15, then equation (3) can be transformed into the following equation (4).

[0103]

number

[0104] [Number] From Equations (4) and (5), the following Equation (6) holds.

[0105] [Number] Next, the waveform of voltage v1 when time t is in the range 0 < t < τ (where τ is the time length of the dead time) shown in Fig. 2(b) is represented by the following Equation (7).

[0106] [Number] Also, the waveform of voltage v1 when time t is in the range T / 2 < t < (T / 2 + τ) (where T is the switching period) is represented by the following Equation (8).

[0107] [Number] That is, the waveform of voltage v1 when time t is in the range 0 < t < T is summarized in the following Equation (9).

[0108] [Number] Here, when voltage v1 is expanded in a Fourier series, the following Equation (10) is obtained.

[0109] v1(t)=V0+V P sin(ωt)+V Q cos(ωt)+… (10) For this voltage v1, the AC voltage output to load 5 is composed only of the fundamental wave of voltage v1 that has passed through the resonance filter constituted by resonance capacitor 16 and resonance inductor 17. Therefore, considering only the fundamental wave component of voltage v1, the fundamental wave Fourier coefficients of voltage v1 are represented by the following Equations (11) and (12) from Equations (9) and (10).

[0110]

Number

[0111]

Number

[0112]

Number

[0113] By联立Equations (13) and (14), the following Equation (15) is obtained.

[0114]

Number

[0115]

Number

[0116]

Number

[0117]

Number

[0118] Here, a geodesic line is a line that connects two points along a surface (Riemann manifold) with the shortest distance. A geodesic line may be a straight line when viewed on a plane or a circle (or a part of a circle). Also, a geodesic line has the characteristic that its tangent is orthogonal to the axis indicating the reactance component (see FIGS. 3 and 4).

[0119] On the other hand, when substituting the ZVDS condition into formula (6), the following formula (19) is obtained.

[0120]

Number

[0121]

Number

[0122]

Number

[0123] From equations (18) and (21), the ZVS / ZVDS load point, which is the intersection of the ZVS geodesic and the ZVDS geodesic, is expressed by the following equation (22). The ZVS / ZVDS load point expressed by this equation (22) becomes the reference impedance Z0.

[0124]

number

[0125] Figures 3 and 4 are Z-plane diagrams showing the ZVS geodesic, ZVDS geodesic, and ZVS / ZVDS load point for each duty cycle D. Figure 3(a) shows the case when duty cycle D = 0.05, Figure 3(b) shows the case when duty cycle D = 0.1, Figure 3(c) shows the case when duty cycle D = 0.15, Figure 3(d) shows the case when duty cycle D = 0.2, Figure 3(e) shows the case when duty cycle D = 0.25, Figure 3(f) shows the case when duty cycle D = 0.3, Figure 4(a) shows the case when duty cycle D = 0.35, Figure 4(b) shows the case when duty cycle D = 0.4, and Figure 4(c) shows the case when duty cycle D = 0.45.

[0126] In the Z-planes of Figures 3 and 4, the semicircular curves drawn with solid lines represent ZVS geodesics, the straight lines drawn with dashed lines represent ZVDS geodesics, and the circles drawn at the intersections of the ZVS and ZVDS geodesics indicate ZVS / ZVDS loading points.

[0127] Furthermore, when the switching period T is fixed to a predetermined value, as described above, the duty cycle D and the length of the dead time τ (and the magnitude of the phase advance φ during time τ) have a one-to-one relationship according to equation (A) above. That is, if the duty cycle D is determined, the length of the dead time τ is determined, and conversely, if the length of the dead time τ is determined, the duty cycle D is determined.

[0128] For example, if the duty cycle D = 0.05, the dead time duration τ = 9T / 20 (φ = 0.9π) (Figure 3(a)). If the duty cycle D = 0.1, the dead time duration τ = 8T / 20 (φ = 0.8π) (Figure 3(b)). If the duty cycle D = 0.15, the dead time duration τ = 7T / 20 (φ = 0.7π) (Figure 3(c)). If the duty cycle D = 0.2, the dead time duration τ = 6T / 20 (φ = 0.6π) (Figure 3(d)). If the duty cycle D = 0.25, the dead time duration τ = 5T / 20 (φ = 0.5π) (Figure 3(e)). If the duty cycle D = 0.3, the dead time duration τ = 4T / 20 (φ = 0.4π) (Figure 3(f)).

[0129] If the duty cycle D = 0.35, the dead time duration τ = 3T / 20 (φ = 0.3π) (Figure 4(a)). If the duty cycle D = 0.4, the dead time duration τ = 2T / 20 (φ = 0.2π) (Figure 4(b)). If the duty cycle D = 0.45, the dead time duration τ = T / 20 (φ = 0.1π) (Figure 4(c)).

[0130] As shown in Figures 3 and 4, if the duty cycle D (i.e., the length of the dead time τ) of the first control signal Q1 and the second control signal Q2 is different, the ZVS geodesic, ZVDS geodesic, and ZVS / ZVDS load points will be significantly different.

[0131] In other words, the switching voltage of the first switching element 12 and the second switching element 13 changes not only due to the configuration and settings of each element provided in the switching circuit 11 and the circuit connected to the switching circuit 11 including the load 5, but also due to the length of the dead time τ. Therefore, the ZVS geodesic line at which the switching voltage achieves ZVS, the ZVDS geodesic line at which ZVDS is achieved, and the ZVS / ZVDS load point (reference impedance Z0) at which both ZVS and ZVDS are achieved will also differ depending on the length of the dead time τ. Accordingly, the passive circuit 20 in the inverter 2 configured as a DE class inverter needs to be designed taking into account the length of the dead time τ.

[0132] <3.2. Methods for Impedance Transformation in Passive Circuits> Next, with reference to Figure 5, the concept of impedance transformation in the passive circuit 20 will be explained. Figure 5(a) shows the ZVS geodesic at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2, and the resistance value R of the fluctuating load 5. l This is a Smith chart showing the geodesic lines of the actual axis load fluctuations. Figure 5(b) is a diagram showing the circular transformation of the Möbius transform used as impedance transformation by the passive circuit 20 on the Z-plane, and Figure 5(c) is a diagram showing the linear transformation of the same Möbius transform on the Z-plane.

[0133] As mentioned above, the ZVS geodesic is drawn as part of a circle on the Smith chart and on the Z plane, as shown in Figures 5(a), 3 and 4. On the other hand, the geodesic of the actual axis load variation is the resistance value R of load 5. l This represents the fluctuation of the resistance component, and since the reactance component is 0, it is drawn as a straight line on the axis representing the resistance component on both the Smith chart and the Z-plane (Figure 5(a)).

[0134] As described above, the passive circuit 20 has a resistance value R of load 5. lFor the variation of , l it is a circuit for converting the input impedance Z to the output of the switching circuit 11 into at least the impedance at which the switching voltage achieves ZVS at the time length τ of the dead time set by the first control signal Q1 and the second control signal Q2. The passive circuit 20 is configured as a circuit that satisfies the impedance parameters when the impedance parameters for performing impedance conversion from the real-axis load variation geodesic drawn on the Smith chart or the Z-plane to the ZVS geodesic are obtained. That is, by simply obtaining the impedance parameters that can perform impedance conversion from the real-axis load variation geodesic to the ZVS geodesic, the resistance value R of the load 5

[0135] For the variation of , l the passive circuit 20 that can convert the input impedance Z to the input impedance Z at which the switching voltages of the first switching element 12 and the second switching element 13 can achieve ZVS at the time length τ of the dead time set can be reliably constructed.

[0136] Here, the Möbius transformation is a projective transformation on the complex projective line, and when the load impedance on the real-axis load variation geodesic is Z l (=R l ), it is converted to the input impedance Z by the following formula.

[0137] Z=(A·Z l +B) / (C·Z l +D) where A·D≠B·C Such a Möbius transform (indicated as MT in Figures 5(b) and (c)) allows for a circle-to-circle mapping, i.e., a circle-to-circle transformation, as shown in Figure 5(b). Furthermore, since a straight line can be considered as a circle with infinite radius, the Möbius transform also allows for a line-to-circle mapping, i.e., a line-to-circle transformation, as shown in Figure 5(c). The resistance value R of the load 5 on the geodesic of the real-axis load fluctuation in the passive circuit 20. l The impedance transformation of the input impedance Z from the ZVS geodesic line is performed using the line-circle transformation of this Möbius transformation.

[0138] Next, with reference to Figure 6, the circuit configuration for realizing the Möbius transform will be explained. Figure 6(a) is a circuit diagram showing a passive circuit 20 that realizes translation in the vertical axis direction (reactance (X) axis direction) on the Z plane as a circular transform, Figure 6(b) is a circuit diagram showing a passive circuit 20 that realizes scaling as a circular transform, and Figure 6(c) is a circuit diagram showing a passive circuit 20 that realizes rotation as a circular transform.

[0139] As shown in Figure 6(a), the load impedance Z of load 5 l In contrast, when a coil or capacitor with reactance x is connected in series as a passive circuit 20, the load impedance Z l This is converted to an input impedance Z such that the following equation is satisfied.

[0140] Z=Z l +jx That is, the circuit shown in Figure 6(a) has a load impedance Z l This method achieves conversion to input impedance Z by parallel translation along the vertical axis (reactance (X) axis) on the Z-plane.

[0141] Furthermore, as shown in Figure 6(b), the load impedance Z of load 5 is l In contrast, if a transformer with transformation ratio n is connected in series as the passive circuit 20, the load impedance Z l This is converted to an input impedance Z such that the following equation is satisfied.

[0142] Z=n 2 ·Z l That is, the circuit shown in Figure 6(b) has a load impedance Z l This achieves conversion to input impedance Z by scaling up or down.

[0143] Furthermore, as shown in Figure 6(c), the load impedance Z of load 5 is l In contrast, the characteristic impedance Z of the passive circuit 20 c When transmission lines with a phase difference α at both ends are connected in series, the load impedance Z l This is converted to an input impedance Z such that the following equation is satisfied.

[0144] Z=Z c· (Z l +jZ c tanφ) / (Z c +jZ l tanφ) That is, the circuit shown in Figure 6(c) has a load impedance Z l Rotating it achieves conversion to input impedance Z.

[0145] The passive circuit 20 is constructed to perform impedance conversion from the real-axis load fluctuation geodesic to the ZVS geodesic using this Möbius transformation. This allows the resistance value R of the fluctuating load 5 to be converted. l In response to this, a passive circuit 20 can be constructed that reliably converts the input impedance Z to the output of the switching circuit 11 so that it becomes the input impedance Z that achieves ZVS in the first switching element 12 and the second switching element 13.

[0146] Furthermore, the passive circuit 20 combines translation, scaling, and rotation in the vertical axis direction (reactance (X) axis direction) on the Z-plane to determine the load impedance Z on the real axis load geodesic. lImpedance conversion is performed so that it becomes the input impedance Z on the ZVS geodesic line. As a result, the passive circuit 20 can be composed of an inductor and a capacitor. That is, since the passive circuit 20 can be configured without using a resistor, the loss in the passive circuit 20 can be suppressed. Therefore, even if the passive circuit 20 is provided, the inverter 2 can maintain high efficiency.

[0147] <3.3. Derivation of Passive Circuit> Next, referring to FIGS. 7 to 10, a specific derivation method of the passive circuit 20 will be described. FIG. 7(a) is a diagram showing the Z parameters (Z is impedance) of the passive circuit 20. The derivation of the passive circuit 20 is to calculate the Z parameters of the circuit that converts from the load impedance Z l which is the impedance of the load 5, to the input impedance Z on the ZVS geodesic line.

[0148] The calculation of these Z parameters is to extract three load impedances Z l from the real-axis load fluctuation geodesic line, and also to extract the input impedance Z to be obtained by performing impedance conversion (Möbius transformation) by the passive circuit 20 for each load impedance Z l from the ZVS geodesic line, and solve the equation obtained from their relationship.

[0149] FIG. 7(b) is a diagram showing an example of the correspondence between three points Z la , Z l0 , Z lb on the real-axis load fluctuation geodesic line and three points Z a , Z0, Z b on the ZVS geodesic line to be obtained by impedance conversion by the passive circuit 20, and FIG. 7(c) is a diagram showing another example of the correspondence.

[0150] In the examples shown in FIGS. 7(b) and (c), in either case, as three points on the real-axis load fluctuation geodesic line, the first load impedance Z l where the resistance value R la of the load 5 becomes zero (=0), and the resistance value R lThe predetermined resistance value R set by the designer l0 The second load impedance Z is as follows: l0 (=R l0 ) and the resistance value R of load 5 l The third load impedance Z becomes infinite. lb Extract (=∞).

[0151] The passive circuit 20 has a first load impedance Z la For ZVS, the first input impedance Z on the geodesic is a Convert to the second load impedance Z l0 For this, convert it to the reference impedance Z0 on the ZVS geodesic, and the third load impedance Z lb For ZVS, the second input impedance on the geodesic is Z b It shall be converted to [this format].

[0152] In this case, the first input impedance Z a Reference impedance Z0, second input impedance Z b This refers to the Z parameter and the first load impedance Z. la Second load impedance Z l0 Third load impedance Z lb It is expressed by the following equation using . Also, the asymmetric component Z of the Z parameter 12 ,Z 21 The relationship is also shown in the following equation.

[0153]

number

[0154] From these equations, the Z-parameters of the passive circuit 20 can be calculated by solving the equations. The Z-parameters of the passive circuit 20 are given by the following equations (23) to (25).

[0155]

number

[0156] In this example, of the two intersections of the ZVS geodesic and the reactance axis (resistance value 0), the one with the smaller reactance is the first input impedance Z. a Therefore, the one with the larger reactance is the second input impedance Z. b This means that in this case, the passive circuit 20 has a resistance value R of the load 5. l The minimum first load impedance Z la The first input impedance Z has the minimum reactance. a Convert to the resistance value R of load 5. l The maximum third load impedance is Z lb The second input impedance Z has the maximum reactance. b This transformer-type passive circuit 20 converts a constant voltage from a DC voltage source 10 to an AC constant voltage with a constant amplitude and outputs it, and also converts a constant current from a DC current source 10a (see Figure 15(a)) to an AC constant current with a constant amplitude and outputs it.

[0157] The first input impedance Z at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2. a and the second input impedance Z b This can be expressed by equations (26) and (27) below, from equation (18).

[0158]

number

[0159]

number

[0160]

number

[0161]

number

[0162] Furthermore, the Y parameter of the passive circuit 20, indicated by the number (31), is the Y parameter of all components. 11 ,Y 12 ,Y 21 ,Y 22 This is composed solely of susceptances. Here, Figure 8(b) shows a circuit topology that realizes a Y parameter in which all components consist solely of susceptances. In this case, the passive circuit 20 can be realized by a π-type circuit as shown in Figure 8(b).

[0163] By applying the Z parameter shown in equation (30) to the circuit topology shown in Figure 8(a), and the Y parameter shown in equation (31) to the circuit topology shown in Figure 8(b), the transformer-type passive circuit 20 that realizes the impedance conversion shown in Figure 7(b) can be constructed with the circuit topology shown in Figure 9. Which circuit topology the transformer-type passive circuit 20 adopts depends on the "Z parameter". 21 Component reactance X 21 The sign of, or the Y parameter Y 21 The ingredient susceptan B 21 The sign of " and "the predetermined resistance value R of load 5 determined in advance by the designer" l0 The relationship between the capacitive reactance (1 / ωC) of the first capacitor 14 (or the second capacitor 15) and the magnitude of the phase advance φ (=ωτ) during the dead time length τ can be determined as shown in Figure 9.

[0164] Next, the passive circuit 20, as shown in the example in Figure 7(c), controls the first load impedance Z la For ZVS, the first input impedance Z on the geodesic is a Convert to the second load impedance Z l0 For this, convert it to the reference impedance Z0 on the ZVS geodesic, and the third load impedance Z lb For ZVS, the second input impedance on the geodesic is Z b Let's consider the case of converting to [a different format].

[0165] In this example, of the two intersections of the ZVS geodesic and the reactance axis (resistance value 0), the one with the larger reactance is the first input impedance Z. a Therefore, the one with the smaller reactance is the second input impedance Z. b This means that in this case, the passive circuit 20 has a resistance value R of the load 5. l The minimum first load impedance Z la The first input impedance Z has the maximum reactance. a Convert to the resistance value R of load 5. l The maximum third load impedance is Z lb The second input impedance Z has the minimum reactance. b This circuit converts the current into a constant AC current and is constructed as a gyrator type. The gyrator type passive circuit 20 has the characteristic of converting a constant voltage from a DC voltage source 10 to an AC constant current with a constant amplitude and outputting it, and also converting a constant current from a DC current source 10a (see Figure 15(a)) to an AC constant voltage with a constant amplitude and outputting it.

[0166] The first input impedance Z at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2. a and the second input impedance Z b This is the reverse of equations (26) and (27) above, resulting in the following equations (32) and (33).

[0167]

number

[0168]

number

[0169] By applying the Z parameter shown in equation (35) to the circuit topology shown in Figure 8(a), and the Y parameter shown in equation (31) to the circuit topology shown in Figure 8(b), the gyrator-type passive circuit 20 that realizes the impedance transformation shown in Figure 7(c) can be constructed using the circuit topology shown in Figure 10. The choice of circuit topology for the gyrator-type passive circuit 20 is determined by the "Z parameter's Z" as in the transformer-type passive circuit 20. 21 Component reactance X 21 The sign of, or the Y parameter Y 21 The ingredient susceptan B 21 The sign of " and "the predetermined resistance value R of load 5 determined in advance by the designer" l0 The relationship between the capacitive reactance (1 / ωC) of the first capacitor 14 (or the second capacitor 15) and the magnitude of the phase advance φ (=ωτ) during the dead time length τ can be determined as shown in Figure 10.

[0170] As described above, the passive circuit 20 can be designed and constructed. By providing the passive circuit 20 designed in this way, the load 5 will have a predetermined resistance value R l0In this case, the input impedance Z to the output of the switching circuit 11 is converted to a reference impedance Z0 by the passive circuit 20. Here, the reference impedance Z0 is, as described above, the input impedance Z to the output of the switching circuit 11 when the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2. As a result, the load 5 has a predetermined resistance value R l0 In this case, the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing the occurrence of losses in the first switching element 12 and the second switching element 13.

[0171] Furthermore, inverter 2 controls the resistance value R of load 5. l Even if the load R fluctuates, the input impedance Z to the output of the switching circuit 11 can be converted so that the switching voltages of the first switching element 12 and the second switching element 13 remain within the range that achieves ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2. l Even if the load R fluctuates, the switching voltages of the first switching element 12 and the second switching element 13 will reach at least ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thus suppressing losses in the first switching element 12 and the second switching element 13. Therefore, the resistance value R of the load 5 l We can provide a DE-class inverter that can perform ideal operation with high efficiency even when the voltage fluctuates.

[0172] Furthermore, as shown in equations (30), (31), (34), and (35), the passive circuit 20 has all its Z-parameter components expressed as reactances, and all its Y-parameter components expressed as susceptances, and is composed of an inductor and a capacitor, as shown in Figures 9 and 10. Therefore, even if the inverter 2 is provided with a passive circuit 20, the loss that occurs in the passive circuit 20 can be suppressed.

[0173] <4. Design Examples and Simulations of Inverters with Passive Circuits> Next, the effects of the passive circuit 20 and the inverter 2 are confirmed from the simulation results obtained for the inverter 2 having the passive circuit 20 designed by the method described above.

[0174] <4.1. Design Example 1> First, design example 1 will be explained with reference to Figures 11 and 12. Figure 11(a) is a circuit diagram showing an inverter 2 having a passive circuit 20 related to design example 1, and Figure 11(b) shows the values ​​of each parameter of the inverter 2 used in the design of the passive circuit 20, and the values ​​of each parameter of the passive circuit 20 obtained by that design. Figure 12 shows the simulation results of the inverter 2.

[0175] The inverter 2 in design example 1 uses the DC voltage V output from the DC voltage source 10, which acts as a constant voltage source. DC Therefore, a constant amplitude AC voltage v is always maintained for load 5. l This is a DE class inverter that outputs [a certain value], and the passive circuit 20 is of the transformer type.

[0176] In the simulation, the first switching element 12 and the second switching element 13 were replaced with ideal switches instead of transistors. Furthermore, the simulation used the resistance value R of load 5. l The simulations were performed for the cases of 25Ω, 50Ω, and 100Ω. These simulation conditions were applied to all of the design examples 1 to 5 described below.

[0177] As a result of simulating the inverter 2 for this design example 1, the resistance value R of the load 5 is as shown in Figure 12. l Regardless of the resistance value, it can be seen that the switching voltage v1 applied across the first switching element 12 (i.e., the first capacitor 14) is 0 volts when the first switching element 12 is turned on (when the dead time ends). Also, although not explicitly stated, the simulation results show that the switching voltage of the second switching element 13 is similarly 0 volts when the second switching element 13 is turned on (when the dead time ends). In other words, inverter 2 is controlled by the resistance value R of the load 5. l Even if the load R fluctuates, the switching voltage of the switching circuit 11 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. This is because the resistance value R of the load 5 l Even if the impedance fluctuates, the passive circuit 20 in design example 1 is able to transform the input impedance Z to the output of the switching circuit 11 so that it lies on the ZVS geodesic at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2.

[0178] Furthermore, as shown in Figure 12, the inverter 2 in design example 1 has a load resistance value R l Regardless of the resistance value, an AC voltage with the same waveform that does not change in amplitude or phase is generated from the DC voltage source 10 of the constant voltage source, and that AC voltage is the voltage v l It can be seen that the output is made to load 5. As a result, the passive circuit 20 outputs to load 5 with a resistance value R l In response to fluctuations, it is also possible to realize a function that outputs an AC voltage with a constant amplitude from inverter 2 at all times.

[0179] <4.2. Design Example 2> Next, design example 2 will be described with reference to Figures 13 and 14. Figure 13(a) is a circuit diagram showing an inverter 2 having a passive circuit 20 related to design example 3, and Figure 13(b) shows the values ​​of each parameter of the inverter 2 used in the design of the passive circuit 20, and the values ​​of each parameter of the passive circuit 20 obtained by that design. Figure 14 shows the simulation results of the inverter 2.

[0180] The inverter 2 in design example 2 uses the DC voltage V output from the DC voltage source 10, which acts as a constant voltage source. DC Therefore, an alternating current i with a constant amplitude is always maintained for load 5. l This is a DE class inverter that outputs [a certain value], and the passive circuit 20 is of the gyrator type.

[0181] As a result of simulating the inverter 2 for this design example 2, the resistance value of load 5 R is as shown in Figure 14. l Regardless of the resistance value, the switching voltage v1 of the first switching element 12 becomes 0 volts at the end of the dead time. Also, although not explicitly stated, simulation results showed that the switching voltage of the second switching element 13 also became 0 volts at the end of the dead time. In other words, inverter 2 is controlled by the resistance value R of the load 5. l Even if the voltage fluctuates, the switching voltage of the switching circuit 11 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. This shows that the passive circuit 20 according to design example 2 is also able to impedance-transform the input impedance Z to the output of the switching circuit 11 so that it lies on the ZVS geodesic during the dead time length τ set for the first control signal Q1 and the second control signal Q2.

[0182] Furthermore, as shown in Figure 14, the inverter 2 in design example 2 has a load resistance value R l Regardless of the resistance value, an alternating current with the same waveform that does not change in amplitude or phase is generated from the constant voltage source DC voltage source 10, and this alternating current is current i lIt can be seen that the output is made to load 5. As a result, the passive circuit 20 outputs to load 5 with a resistance value R l In response to fluctuations, it is also possible to realize a function that outputs a constant amplitude AC current from inverter 2.

[0183] <4.3. Design Example 3> Next, design example 3 will be described with reference to Figures 15 and 16. Figure 15(a) is a circuit diagram showing an inverter 2 having a passive circuit 20 according to design example 3, and Figure 15(b) shows the values ​​of each parameter of the inverter 2 used in the design of the passive circuit 20 and the values ​​of each parameter of the passive circuit 20 obtained by that design. Figure 16 shows the simulation results of the inverter 2.

[0184] The inverter 2 in design example 3 outputs current I from the DC current source 10a, which acts as a constant current source. DC Therefore, an alternating current i with a constant amplitude is always maintained for load 5. l This is a DE class inverter that outputs [a certain value], and the passive circuit 20 is of the transformer type.

[0185] As a result of simulating the inverter 2 for this design example 3, the resistance value of load 5 R is as shown in Figure 16. l Regardless of the resistance value, the switching voltage v1 of the first switching element 12 becomes 0 volts at the end of the dead time. Also, although not explicitly stated, simulation results showed that the switching voltage of the second switching element 13 also became 0 volts at the end of the dead time. In other words, inverter 2 is controlled by the resistance value R of the load 5. l Even if the voltage fluctuates, the switching voltage of the switching circuit 11 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. This shows that the passive circuit 20 according to design example 3 is also able to impedance-transform the input impedance Z to the output of the switching circuit 11 so that it lies on the ZVS geodesic during the dead time length τ set for the first control signal Q1 and the second control signal Q2.

[0186] Furthermore, as shown in Figure 16, the inverter 2 in design example 3 has a load resistance value R l Regardless of the resistance value, an alternating current with the same waveform that does not change in amplitude or phase is generated from the DC current source 10a of the constant current source, and this alternating current is used as current i l It can be seen that the output is made to load 5. As a result, the passive circuit 20 outputs to load 5 with a resistance value R l In response to fluctuations, it is also possible to realize a function that outputs a constant amplitude AC current from inverter 2.

[0187] <4.4. Design Example 4> Next, design example 4 will be described with reference to Figures 17 and 18. Figure 17(a) is a circuit diagram showing an inverter 2 having a passive circuit 20 according to design example 4, and Figure 17(b) shows the values ​​of each parameter of the inverter 2 used in the design of the passive circuit 20 and the values ​​of each parameter of the passive circuit 20 obtained by that design. Figure 18 is a diagram showing the simulation results of the inverter 2.

[0188] The inverter 2 in design example 4 outputs current I from the DC current source 10a, which is a constant current source. DC Therefore, a constant amplitude AC voltage v is always maintained for load 5. l The output is of the passive circuit 20, which is of the gyrator type.

[0189] As a result of simulating the inverter 2 for this design example 4, the resistance value of load 5 R is as shown in Figure 18. l Regardless of the resistance value, the switching voltage v1 of the first switching element 12 becomes 0 volts at the end of the dead time. Also, although not explicitly stated, simulation results showed that the switching voltage of the second switching element 13 also became 0 volts at the end of the dead time. In other words, inverter 2 is controlled by the resistance value R of the load 5. lEven if the voltage fluctuates, the switching voltage of the switching circuit 11 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. This shows that the passive circuit 20 according to design example 4 is also able to transform the input impedance Z to the output of the switching circuit 11 so that it lies on the ZVS geodesic during the dead time length τ set for the first control signal Q1 and the second control signal Q2.

[0190] Furthermore, as shown in Figure 18, the inverter 2 in design example 4 has a load resistance value R l Regardless of the resistance value, an AC voltage with the same waveform that does not change in amplitude or phase is generated from the DC current source 10a of the constant current source, and that AC voltage is the voltage v l It can be seen that the output is made to load 5. As a result, the passive circuit 20 outputs to load 5 with a resistance value R l In response to fluctuations, it is also possible to realize a function that outputs an AC voltage with a constant amplitude from inverter 2 at all times.

[0191] <4.5. Design Example 5> Next, design example 5 will be described with reference to Figures 19 and 20. Figure 19(a) is a circuit diagram showing an inverter 2 having a passive circuit 20 according to design example 5, and Figure 19(b) shows the values ​​of each parameter of the inverter 2 used in the design of the passive circuit 20 and the values ​​of each parameter of the passive circuit 20 obtained by that design. Figure 20 shows the simulation results of the inverter 2.

[0192] Unlike the previous inverter 2, the inverter 2 in design example 5 is a full-bridge type DE class inverter. This inverter 2, like design example 1, outputs a DC voltage V from the DC voltage source 10 which serves as a constant voltage source. DC Therefore, a constant amplitude AC voltage v is always maintained for load 5. lThis outputs the following. However, the switching circuit 11 according to design example 5 is configured to further include a series circuit in which a third capacitor 15a, to which a third switching element 13a is connected in parallel, and a fourth capacitor 14a, to which a fourth switching element 12a is connected in parallel, are connected in series with respect to the switching circuit 11 of the inverter 2 according to design example 1.

[0193] This series circuit is connected in parallel to the DC voltage source 10, together with the series circuit of the first capacitor 14 and the second capacitor 15 (i.e., the series circuit of the first switching element 12 and the second switching element 13), such that the third capacitor 15a (third switching element 13a) is connected to the negative side of the DC voltage source 10 and the fourth capacitor 14a (fourth switching element 12a) is connected to the positive side of the DC voltage source 10. The capacitances of the third capacitor 15a and the fourth capacitor 14a are both the same value C as the capacitances of the first capacitor 14 and the second capacitor 15.

[0194] The connection point between the third switching element 13a and the fourth switching element 12a is the same (at the same potential) as the connection point between the third capacitor 15a and the fourth capacitor 14a, and the potential at this connection point is the voltage v2 applied across the third capacitor 15a (i.e., the third switching element 13a). This connection point has the same capacitance C as the resonant capacitor 16. r A resonant capacitor 16a having the same inductance L as the resonant inductor 17. r The resonant inductor 17b, which has a resonant inductor, is connected in series with the load 5 to a resonant filter, and then the load 5 is connected to one end (the lower side in Figure 19(a)) via a passive circuit 20. That is, the fundamental wave (sine wave) of the voltage v2 that has passed through the resonance of this resonant filter is applied to one end of the load 5.

[0195] On the other hand, the connection point between the first switching element 12 and the second switching element 13 (i.e., the connection point between the first capacitor 14 and the second capacitor 15) is connected to the other end of the load 5 (upper side in Figure 19(a)) via a resonant filter, which is formed by the series connection of a resonant capacitor 16 and a resonant inductor 17, and a passive circuit 20, similar to design example 1. That is, the fundamental wave (sine wave) of the voltage v1 applied across the first capacitor 14 (i.e., the first switching element 12), which has passed through the resonance of this resonant filter, is applied to the other end of the load 5.

[0196] Here, the first control signal Q1, which controls the on / off state of the first switching element 12, and the second control signal Q2, which controls the on / off state of the second switching element 13, are used, and they have the relationship shown in Figure 2(a). Furthermore, the fourth control signal Q4, which controls the on / off state of the fourth switching element 12a, uses the same signal as the first control signal Q1, and the third control signal Q3, which controls the on / off state of the third switching element 13a, uses the same signal as the second control signal Q2. As a result, voltage v1 is the switching voltage of the first switching element 12 and is equal to the switching voltage of the fourth switching element 12a. Voltage v2 is a voltage with the opposite polarity to voltage v1, and is the switching voltage of the third switching element 13a and is equal to the switching voltage of the second switching element 13. Therefore, the load 5 is subjected to an AC voltage which is the differential voltage between the fundamental wave of voltage v1 and the fundamental wave of voltage v2. Furthermore, since twice the voltage is applied to load 5 compared to the inverter 2 in design example 1, the full-bridge type inverter 2 in design example 5 can supply more power than the inverter 2 in design example 1.

[0197] When inverter 2 is configured as a full-bridge type DE class inverter as described above, the passive circuit 20 can be designed as follows. Note that the passive circuit 20 of inverter 2 in design example 5 is of the transformer type.

[0198] In this design, first, the passive circuit 20 is designed based on the inverter 2 of Design Example 1 shown in Figure 11(a), which is obtained by removing the series circuit of the third capacitor 15a, to which the third switching element 13a is connected in parallel, and the fourth capacitor 14a, to which the fourth switching element 12a is connected in parallel, from the switching circuit 11 of the inverter 2 of Design Example 5. Of the passive circuit 20 obtained by this design, the elements connected in series between the connection point of the first capacitor 14 and the second capacitor 15 and the load 5 (in the example shown in Figure 11(a), an inductor with inductance L1 and an inductor with inductance L3) are used as they are in the passive circuit 20 of Design Example 5, as shown in Figure 19(a), and similar elements are also connected in series between the connection point of the third capacitor 15a and the fourth capacitor 14a and the load 5. On the other hand, in the passive circuit 20 obtained by this design, the element connected in parallel with the load 5 (in the example shown in Figure 11(a), a capacitor with capacitance C2) has its capacitance halved if it is a capacitor, and its inductance doubled if it is an inductor, and is connected in parallel with the load 5 as shown in Figure 19(a).

[0199] As a result of simulating the inverter 2 according to design example 5, which has the passive circuit 20 designed in this way, the resistance value R of the load 5 is as shown in Figure 20. l Regardless of the resistance value, the switching voltage v1 of the first switching element 12 and the fourth switching element 12a, and the switching voltage v2 of the second switching element 13 and the third switching element 13a, are all 0 volts at the end of the dead time. That is, the inverter 2 is controlled by the resistance value R of the load 5. l Even if the voltage fluctuates, the switching voltage of the switching circuit 11 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. This shows that the passive circuit 20 according to design example 5 is able to impedance-transform the input impedance Z to the output of the switching circuit 11 so that it lies on the ZVS geodesic during the dead time length τ set for the first control signal Q1 and the second control signal Q2.

[0200] Furthermore, as shown in Figure 20, the inverter 2 in design example 5 has a load resistance value R l Regardless of the resistance value, an AC voltage with the same waveform that does not change in amplitude or phase is generated from the DC voltage source 10 of the constant voltage source, and that AC voltage is the voltage v l It can be seen that the output is made to load 5. As a result, the passive circuit 20 outputs to load 5 with a resistance value R l In response to fluctuations, it is also possible to realize a function that outputs a constant amplitude AC voltage from inverter 2. Furthermore, the voltage v output to load 5 can be realized. l This inverter has twice the amplitude of the inverter 2 in design example 1, demonstrating that even when the passive circuit 20 of the present invention is provided to a full-bridge type DE class inverter, the effects of the full-bridge type can still be enjoyed.

[0201] <5. Rectifier Circuit Configuration> Next, with reference to Figure 21, the configuration of the rectifier circuit 3 used in the contactless power supply system 1 will be explained. Figure 21 is a circuit diagram of the rectifier circuit 3.

[0202] To simplify the explanation of the rectifier circuit 3, the inverter 2 and coupler 4 shown in Figure 1, which are located before the input of the rectifier circuit 3 in the contactless power supply system 1, will be described together as a single AC constant voltage source 34. The AC constant voltage source 34 provides an AC voltage v with a constant amplitude. s This is a constant voltage source that outputs the AC voltage v from this AC constant voltage source 34. The rectifier circuit 3 receives the AC voltage v from this AC constant voltage source 34. s The following is entered.

[0203] In the contactless power supply system 1, the inverter 2 and coupler 4 shown in Figure 1, which are located before the input of the rectifier circuit 3, can sometimes be considered as a single AC constant current source depending on the configuration of the inverter 2. An AC constant current source is a constant current source that outputs an AC current with a constant amplitude, and in this case, the AC current output from the AC constant current source is input to the rectifier circuit 3.

[0204] The rectifier circuit 3 comprises a switching circuit 31 whose topology forms a Class DE synchronous rectifier circuit, a passive circuit 32, and a control unit 33. The switching circuit 31 has a circuit configuration inverted from the input and output of the switching circuit 11 of the inverter 2 (see Figure 2(a)), and each element constituting the switching circuit 31 corresponds to each element constituting the switching circuit 11 (Figure 2(a)). Each element of the switching circuit 31 is given the same reference numeral as the corresponding element of the switching circuit 11, and its description is omitted.

[0205] An AC constant voltage source 34 is connected to the input side of the switching circuit 31 via a passive circuit 32. One end of the AC constant voltage source 34 is connected to the connection point between the first capacitor 14 and the second capacitor 15 (i.e., the connection point between the first switching element 12 and the second switching element 13) via the passive circuit 32 and a resonant filter composed of a resonant capacitor 16 and a resonant inductor 17. The other end of the AC constant voltage source 34 is connected via the passive circuit 32 to the opposite side of the connection point of the first capacitor 14 (i.e., the opposite side of the connection point of the first switching element 12). As a result, an AC voltage v s A voltage based on this (AC voltage via the passive circuit 32 and the resonant filter) is supplied.

[0206] Furthermore, on the output side of the switching circuit 31, a series circuit is connected in parallel with a resistor R, which consists of a first capacitor 14 with the first switching element 12 connected in parallel and a second capacitor 15 with the second switching element 13 connected in parallel. l The load 5 is connected. The first switching element 12 is controlled to turn on / off by the first control signal Q1, and the second switching element 13 is controlled to turn on / off by the second control signal Q2.

[0207] The switching circuit 31 receives the AC voltage v output from the AC constant voltage source 34. s With the AC voltage v supplied, sIn synchronization with the first control signal Q1 and the second control signal Q2 shown in Figure 2(b), the first switching element 12 and the second switching element 13 are alternately turned on, generating a DC voltage or DC current across the series circuit. The rectifier circuit 3 outputs the DC voltage or DC current generated across this series circuit to the load 5. The AC voltage v in the first control signal Q1 and the second control signal Q2 s Synchronization is performed by the control unit 33. Details of this synchronization will be described later, along with the explanation of the control unit 33.

[0208] The smoothing capacitor 19 is provided for the purpose of outputting a stable DC voltage or DC current. This smoothing capacitor 19 allows the rectifier circuit 3 to stabilize the DC voltage or DC current supplied to the load 5. Furthermore, the smoothing capacitor 19 also suppresses surge voltages generated by the on / off switching of the first switching element 12 and the second switching element 13, preventing damage to the first switching element 12 and the second switching element 13.

[0209] The passive circuit 32 is provided between the AC constant voltage source 34 (in other words, the input terminal of the rectifier circuit 3 to which the AC voltage of the AC constant voltage source 34 is input) and the switching circuit 31, and the resistance value R of the load 5 l This circuit is for converting the output impedance ZO to the input of the switching circuit 31 to an impedance that achieves at least ZVS for the duration τ of the dead time set in the first control signal Q1 and the second control signal Q2, in response to fluctuations in the switching voltage.

[0210] Specifically, the passive circuit 32 controls the resistance value R of the load 5. l The predetermined resistance value R l0In this case, the output impedance ZO is converted to become the reference impedance Z0. Here, the reference impedance Z0 is the output impedance ZO when the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2. Also, the passive circuit 32 is configured to handle the resistance value R of the load 5. l The predetermined resistance value R l0 When the voltage fluctuates, the output impedance ZO is converted so that the switching voltage is within the range that achieves ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2.

[0211] Here, the dead time is the period between the ON signal of the first control signal Q1 and the ON signal of the second control signal Q2 during which both the first control signal Q1 and the second control signal Q2 are OFF signals (see Figure 2(b)).

[0212] Similar to the switching circuit 11 of the inverter 2, the switching voltage of the first switching element 12 and the second switching element 13 changes not only due to the configuration and settings of each element provided in the switching circuit 31 and the circuit connected to the switching circuit 31 including the load 5, but also due to the length of the dead time τ of the first switching element 12 and the second switching element 13. Therefore, the ZVS geodesic at which the switching voltage achieves ZVS, the ZVDS geodesic at which ZVDS is achieved, and the ZVS / ZVDS load point (reference impedance Z0) at which both ZVS and ZVDS are achieved will also differ depending on the length of the dead time τ. Accordingly, the passive circuit 32 in the rectifier circuit 3, which is configured as a DE class synchronous rectifier circuit, needs to be designed taking into account the length of the dead time τ.

[0213] The passive circuit 32 can be designed in the same way as the passive circuit 20 of the inverter 2, as described in <3. Passive Circuit Design Method>. However, the topology of the passive circuit 32 will be the inverted input and output sides of the topology determined by Figure 9 or Figure 10.

[0214] By providing the passive circuit 32 designed in this manner, the rectifier circuit 3 operates as follows.

[0215] In other words, load 5 has a predetermined resistance value R l0 In this case, the output impedance ZO to the input of the switching circuit 31 is converted to a reference impedance Z0 by the passive circuit 32. Here, the reference impedance Z0 is the output impedance ZO to the input of the switching circuit 31 when the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, as described above. As a result, the load 5 has a predetermined resistance value R l0 In this case, the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS, thereby suppressing the occurrence of losses in the first switching element 12 and the second switching element 13.

[0216] Furthermore, the rectifier circuit 3 controls the resistance value R of the load 5. l Even if the load R fluctuates, the output impedance ZO to the input of the switching circuit 31 can be converted so that the switching voltages of the first switching element 12 and the second switching element 13 remain within the range that achieves ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2. l Even if the resistance value R of the load 5 fluctuates, the switching voltages of the first switching element 12 and the second switching element 13 will at least achieve ZVS, thus suppressing the occurrence of losses in the first switching element 12 and the second switching element 13. lThis provides a DE-class synchronous rectifier circuit that can perform ideal operation with high efficiency even when the voltage fluctuates.

[0217] Furthermore, the passive circuit 32, like the passive circuit 20 of the inverter 2, has all its Z-parameter components expressed as reactances and all its Y-parameter components expressed as susceptances, and is composed of an inductor and a capacitor. Therefore, even if the rectifier circuit 3 is provided with the passive circuit 32, the loss occurring in the passive circuit 32 can be suppressed.

[0218] However, in order for the switching voltages of the first switching element 12 and the second switching element 13 to achieve ZVS and for the rectifier circuit 3 to output a DC voltage or DC current, the AC voltage v input to the rectifier circuit 3 must be s (AC voltage v output from AC constant voltage source 34) s It is necessary to alternately turn on the first switching element 12 and the second switching element 13 while synchronizing with the other elements.

[0219] The control unit 33 receives the AC voltage v s While synchronized with the other signals, a first control signal Q1, as shown in Figure 2(b), is generated to control the on / off state of the first switching element 12 at a predetermined duty cycle D corresponding to the dead time length τ, and a second control signal Q2, as shown in Figure 2(b), is generated to control the on / off state of the second switching element 13 at the same predetermined duty cycle D, and these signals are output to the switching circuit 31.

[0220] The control unit 33 receives an AC voltage v from the AC constant voltage source 34. s The input is the AC voltage v. The control unit 33 receives the input AC voltage v. s Therefore, the AC voltage v s It detects the AC voltage v, and based on the detection result, s The phase difference between the first control signal Q1 and the AC voltage v becomes a predetermined phase difference θ, and the AC voltage v s The first control signal Q1 and the second control signal Q2 are generated such that the phase difference between them is a predetermined phase difference of (θ-180°) or (θ+180°).

[0221] The control unit 33 controls the AC voltage v s The control unit 33 may generate the first control signal Q1 such that the phase difference between it and the first control signal Q1 is a predetermined phase difference θ, and generate the second control signal Q2 such that the phase difference between it and the first control signal Q1 is -180° or +180°. In addition, the control unit 33 controls the AC voltage v s The control unit 33 may generate the second control signal Q2 such that the phase difference between it and the second control signal Q2 is a predetermined phase difference (θ-180°) or (θ+180°), and generate the first control signal Q1 such that the phase difference between it and the second control signal Q2 is -180° or +180°. Even if the control unit 33 generates the first control signal Q1 and the second control signal Q2 in this way, as a result, the AC voltage v s The phase difference between the first control signal Q1 and the AC voltage v becomes a predetermined phase difference θ, and the AC voltage v s The first control signal Q1 and the second control signal Q2 can be generated such that the phase difference between them is a predetermined phase difference of (θ-180°) or (θ+180°).

[0222] When an AC current output from an AC constant current source is input to the rectifier circuit 3, the control unit 33 detects the AC current, and based on the detection result, the phase difference between the AC current and the first control signal Q1 becomes a predetermined phase difference θ, and the AC voltage v s The first control signal Q1 and the second control signal Q2 are generated such that the phase difference between them is a predetermined phase difference of (θ-180°) or (θ+180°).

[0223] The control unit 33 receives the AC voltage v input to the rectifier circuit 3. s Alternatively, by detecting the AC current and generating the first control signal Q1 and the second control signal Q2 based on the detection result, the AC voltage v input to the rectifier circuit 3 is generated. s Alternatively, even if a phase shift occurs in the AC current, the AC voltage v s Alternatively, the phase difference between the alternating current and the first control signal Q1 and the second control signal Q2 is maintained at a predetermined phase difference θ. This allows the ZVS in the first switching element 12 and the second switching element 13 to be maintained, thereby enabling high-efficiency operation of the rectifier circuit 3.

[0224] The predetermined phase difference θ depends on whether the input to the rectifier circuit 3 is a constant AC voltage or a constant AC current, whether the output to the load 5 is a constant DC voltage or a constant DC current, and the off-diagonal component X of the Z parameter of the passive circuit 32 designed by the above method. 21 (=X 12 ) or the off-diagonal component B of the Y parameter 21 (=B 12 Whether ) is a positive or negative number determines the following:

[0225] (1) When the input to the rectifier circuit 3 is a constant AC voltage and the output to the load 5 is a constant DC voltage, or when the input to the rectifier circuit 3 is a constant AC current and the output to the load 5 is a constant DC current (when the passive circuit 32 is a transformer type), X 21 >0(B 21 When >0, θ = 180°, X 21 <0(B 21 When <0, θ = 0°.

[0226] (2) When the input to the rectifier circuit 3 is a constant AC voltage and the output to the load 5 is a constant DC current, or when the input to the rectifier circuit 3 is a constant AC current and the output to the load 5 is a constant DC voltage (when the passive circuit 32 is of the gyrator type), X 21 >0(B 21 When <0, θ = -90°, X 21 <0(B 21 When >0, θ = +90°.

[0227] The control unit 33 generates the first control signal Q1 and the second control signal Q2 so that the predetermined phase difference θ is as described above, thereby enabling the switching voltages of the first switching element 12 and the second switching element 13 to achieve ZVS. In addition, the rectifier circuit 3 controls the constant voltage AC voltage v s Alternatively, when a constant current AC is input, a constant voltage DC voltage or a constant current DC current can be output to load 5.

[0228] <6. Design Examples and Simulations of Rectifier Circuits with Passive Circuits> Next, we will explain the effects of the passive circuit 32 and the rectifier circuit 3 based on the simulation results obtained for the rectifier circuit 3 having the passive circuit 32 designed by the method described above.

[0229] <6.1. Design Example 6> First, design example 6 will be explained with reference to Figures 22 and 23. Figure 22(a) is a circuit diagram showing a rectifier circuit 3 having a passive circuit 32 related to design example 6, and Figure 22(b) shows the values ​​of each parameter of the rectifier circuit 3 used in the design of the passive circuit 32, and the values ​​of each parameter of the passive circuit 32 obtained by that design. Figure 23 shows the simulation results of the rectifier circuit 3.

[0230] The rectifier circuit 3 in design example 6 receives an AC voltage v with a constant amplitude from the AC constant voltage source 34. s Therefore, a constant DC voltage V is always maintained relative to the load 5. RDC This is a Class DE synchronous rectifier circuit that outputs [a certain value], and the passive circuit 32 is of the transformer type.

[0231] In the simulation, as in design examples 1-5, the first switching element 12 and the second switching element 13 were replaced with ideal switches instead of transistors. Furthermore, the simulation used the resistance value R of load 5. l The simulations were performed for the cases of 25Ω, 50Ω, and 100Ω. These simulation conditions were applied to all of the design examples 6-9 described below.

[0232] Furthermore, in design example 6, the result of designing the passive circuit 32 was that the off-diagonal component X of the Z parameter of the passive circuit 32 was 21 is a positive value (X 21 >0). The rectifier circuit 3 in design example 6 uses an AC voltage v s Since a constant DC voltage is input and output to load 5, the simulation in design example 6 uses a predetermined phase difference θ of 180°. That is, in this simulation, the AC voltage v sThe first control signal Q1, which has a phase difference of 180° from the AC voltage v, turns the first switching element 12 on / off, and the AC voltage v s The second switching element 13 was turned on / off by a second control signal Q2, which has a phase difference of 0° from the first signal.

[0233] As a result of simulating the rectifier circuit 3 related to this design example 6, the resistance value R of the load 5 is as shown in Figure 23. l Regardless of the resistance value, it can be seen that the switching voltage v1 applied across the first switching element 12 (i.e., the first capacitor 14) is 0 volts when the first switching element 12 is turned on (when the dead time ends). Also, although not explicitly stated, the simulation results show that the switching voltage of the second switching element 13 is similarly 0 volts when the second switching element 13 is turned on (when the dead time ends). In other words, the rectifier circuit 3 is controlled by the resistance value R of the load 5. l Even if the resistance value R of the load 5 fluctuates, the switching voltage of the switching circuit 31 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. l Even if the impedance fluctuates, the passive circuit 32 in design example 6 is able to transform the output impedance ZO to the input of the switching circuit 31 so that it lies on the ZVS geodesic at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2.

[0234] Furthermore, as shown in Figure 23, the rectifier circuit 3 in design example 6 uses the resistance value R of the load 5. l Regardless of the resistance value, the AC voltage v s Therefore, a constant DC voltage of 100V V RDC It generates a constant DC voltage V RDC It can be seen that this is output to load 5.

[0235] Based on the above, the rectifier circuit 3 having a passive circuit 32 according to design example 6 uses the passive circuit 32 designed as described above, and furthermore, the AC voltage v sBy generating the first control signal Q1 and the second control signal Q2 such that the predetermined phase difference θ between the first control signal Q1 and the first control signal Q1 is 180°, the switching voltages of the first switching element 12 and the second switching element 13 can achieve ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing the occurrence of losses in the first switching element 12 and the second switching element 13. Furthermore, this rectifier circuit 3 uses the passive circuit 32 designed as described above, and by setting the predetermined phase difference θ to 180°, a constant voltage AC voltage v s When this is input, a constant DC constant voltage V RDC It can output to a load of 5.

[0236] <6.2. Design Example 7> Next, design example 7 will be described with reference to Figures 24 and 25. Figure 24(a) is a circuit diagram showing a rectifier circuit 3 having a passive circuit 32 according to design example 7, and Figure 24(b) shows the values ​​of each parameter of the rectifier circuit 3 used in the design of the passive circuit 32, and the values ​​of each parameter of the passive circuit 32 obtained by that design. Figure 25 shows the simulation results of the rectifier circuit 3.

[0237] The rectifier circuit 3 in design example 7, like design example 6, receives a constant amplitude AC voltage v from the AC constant voltage source 34. s Therefore, a constant DC voltage V is always maintained relative to the load 5. RDC This is a DE class synchronous rectifier circuit that outputs a signal, and the passive circuit 32 is of the transformer type. However, unlike design example 6, the off-diagonal component X of the Z parameter of the passive circuit 32 is 21 (Off-diagonal component B of the Y parameter) 21 ) is a negative value (X 21 This is an example where the result was <0).

[0238] Therefore, in the simulation of design example 7, the predetermined phase difference θ was set to 0°. That is, in this simulation, the AC voltage v s The first control signal Q1, which has a phase difference of 0° with respect to the first switching element 12, turns the AC voltage vs The second switching element 13 was turned on / off by a second control signal Q2, which has a phase difference of 180° from the first signal.

[0239] As a result of simulating the rectifier circuit 3 related to this design example 7, the resistance value R of the load 5 is as shown in Figure 25. l Regardless of the resistance value, it can be seen that the switching voltage v1 becomes 0 volts at the end of the dead time. Also, although not explicitly stated, the simulation results showed that the switching voltage of the second switching element 13 also became 0 volts at the end of the dead time. In other words, the rectifier circuit 3 is equal to the resistance value R of the load 5. l Even if the resistance value R of the load 5 fluctuates, the switching voltage of the switching circuit 31 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. l Even if the impedance fluctuates, the passive circuit 32 in design example 7 is able to transform the output impedance ZO to the input of the switching circuit 31 so that it lies on the ZVS geodesic at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2.

[0240] Furthermore, as shown in Figure 25, the rectifier circuit 3 in design example 7 uses the resistance value R of the load 5. l Regardless of the resistance value, the AC voltage v s Therefore, a constant DC voltage of 100V V RDC It generates a constant DC voltage V RDC It can be seen that this is output to load 5.

[0241] Based on the above, the rectifier circuit 3 having the passive circuit 32 according to design example 7 uses the passive circuit 32 designed as described above, and furthermore, the AC voltage v sBy generating the first control signal Q1 and the second control signal Q2 such that a predetermined phase difference θ, which is the phase difference between the first control signal Q1 and the first control signal Q1, becomes 0°, the switching voltages of the first switching element 12 and the second switching element 13 can achieve ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing the occurrence of losses in the first switching element 12 and the second switching element 13. Furthermore, this rectifier circuit 3 uses the passive circuit 32 designed as described above, and by setting the predetermined phase difference θ to 0°, a constant voltage AC voltage v s When this is input, a constant DC constant voltage V RDC It can output to a load of 5.

[0242] <6.3. Design Example 8> Next, design example 8 will be described with reference to Figures 26 and 27. Figure 26(a) is a circuit diagram showing a rectifier circuit 3 having a passive circuit 32 according to design example 8, and Figure 26(b) shows the values ​​of each parameter of the rectifier circuit 3 used in the design of the passive circuit 32, and the values ​​of each parameter of the passive circuit 32 obtained by that design. Figure 27 shows the simulation results of the rectifier circuit 3.

[0243] The rectifier circuit 3 in design example 8 receives a constant amplitude AC voltage v from the AC constant voltage source 34. s Therefore, a constant DC current I is always constant for load 5. RDC This is a DE-class synchronous rectifier circuit that outputs a signal, and the passive circuit 32 is of the gyrator type. Also, the off-diagonal component X of the Z parameter of the passive circuit 32. 21 (Off-diagonal component B of the Y parameter) 21 ) is a positive value (X 21 This is an example where the result was >0).

[0244] Therefore, in the simulation of design example 8, the predetermined phase difference θ was set to -90°. That is, in this simulation, the AC voltage v s The first switching element 12 is turned on / off by the first control signal Q1, which has a phase difference of -90° from the AC voltage v sThe second switching element 13 was turned on / off by a second control signal Q2, which has a phase difference of +90° from the first signal.

[0245] As a result of simulating the rectifier circuit 3 related to this design example 8, the resistance value R of the load 5 is as shown in Figure 27. l Regardless of the resistance value, it can be seen that the switching voltage v1 becomes 0 volts at the end of the dead time. Also, although not explicitly stated, the simulation results showed that the switching voltage of the second switching element 13 also became 0 volts at the end of the dead time. In other words, the rectifier circuit 3 is equal to the resistance value R of the load 5. l Even if the resistance value R of the load 5 fluctuates, the switching voltage of the switching circuit 31 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. l Even if the impedance fluctuates, the passive circuit 32 in design example 8 is able to transform the output impedance ZO to the input of the switching circuit 31 so that it lies on the ZVS geodesic at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2.

[0246] Furthermore, as shown in Figure 27, the rectifier circuit 3 in design example 8 uses the resistance value R of the load 5. l Regardless of the resistance value, the AC voltage v s Therefore, a constant DC current of 1A is obtained. RDC It generates a constant DC current I RDC It can be seen that this is output to load 5.

[0247] Based on the above, the rectifier circuit 3 having the passive circuit 32 according to design example 8 uses the passive circuit 32 designed as described above, and furthermore, the AC voltage v sBy generating the first control signal Q1 and the second control signal Q2 such that the predetermined phase difference θ between the first control signal Q1 and the first control signal Q1 is -90°, the switching voltages of the first switching element 12 and the second switching element 13 can achieve ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing the occurrence of losses in the first switching element 12 and the second switching element 13. Furthermore, this rectifier circuit 3 uses the passive circuit 32 designed as described above, and by setting the predetermined phase difference θ to -90°, a constant voltage AC voltage v s If this is input, a constant current DC constant current I RDC It can output to a load of 5.

[0248] <6.4. Design Example 9> Next, design example 9 will be described with reference to Figures 28 and 29. Figure 28(a) is a circuit diagram showing a rectifier circuit 3 having a passive circuit 32 according to design example 9, and Figure 28(b) shows the values ​​of each parameter of the rectifier circuit 3 used in the design of the passive circuit 32, and the values ​​of each parameter of the passive circuit 32 obtained by that design. Figure 29 shows the simulation results of the rectifier circuit 3.

[0249] The rectifier circuit 3 in design example 9, like design example 8, receives a constant amplitude AC voltage v from the AC constant voltage source 34. s Therefore, a constant DC current I is always constant for load 5. RDC This is a DE class synchronous rectifier circuit that outputs a certain value, and the passive circuit 32 is of the gyrator type. However, unlike design example 8, the off-diagonal component X of the Z parameter of the passive circuit 32 is 21 (Off-diagonal component B of the Y parameter) 21 ) is a negative value (X 21 This is an example where the result was <0).

[0250] Therefore, in the simulation of design example 9, the predetermined phase difference θ was set to +90°. That is, in this simulation, the AC voltage v s The first control signal Q1, which has a phase difference of +90° from the AC voltage v, turns the first switching element 12 on / off, and the AC voltage vs The second switching element 13 was turned on / off by a second control signal Q2, which has a phase difference of -90° from the first signal.

[0251] As a result of simulating the rectifier circuit 3 related to this design example 9, the resistance value R of the load 5 is as shown in Figure 29. l Regardless of the resistance value, it can be seen that the switching voltage v1 becomes 0 volts at the end of the dead time. Also, although not explicitly stated, the simulation results showed that the switching voltage of the second switching element 13 also became 0 volts at the end of the dead time. In other words, the rectifier circuit 3 is equal to the resistance value R of the load 5. l Even if the resistance value R of the load 5 fluctuates, the switching voltage of the switching circuit 31 achieves ZVS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. l Even if the impedance fluctuates, the passive circuit 32 in design example 9 is able to transform the output impedance ZO to the input of the switching circuit 31 so that it lies on the ZVS geodesic at the time length τ of the dead time set for the first control signal Q1 and the second control signal Q2.

[0252] Furthermore, as shown in Figure 29, the rectifier circuit 3 in design example 9 uses the resistance value R of the load 5. l Regardless of the resistance value, the AC voltage v s Therefore, a constant DC current of 1A is obtained. RDC It generates a constant DC current I RDC It can be seen that this is output to load 5.

[0253] Based on the above, the rectifier circuit 3 having the passive circuit 32 according to design example 9 uses the passive circuit 32 designed as described above, and furthermore, the AC voltage v sBy generating the first control signal Q1 and the second control signal Q2 such that the predetermined phase difference θ between the first control signal Q1 and the first control signal Q1 is +90°, the switching voltages of the first switching element 12 and the second switching element 13 can achieve ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing the occurrence of losses in the first switching element 12 and the second switching element 13. Furthermore, this rectifier circuit 3 uses the passive circuit 32 designed as described above, and by setting the predetermined phase difference θ to +90°, a constant voltage AC voltage v s If this is input, a constant current DC constant current I RDC It can output to a load of 5.

[0254] <6.5. Other Design Examples> Although not shown in the diagram, for the rectifier circuit 3, which is configured as a Class DE synchronous rectifier circuit to which an AC current with a constant amplitude is input from an AC constant current source, a passive circuit 32 was designed under the following conditions, and a simulation of the rectifier circuit 3 having the passive circuit 32 was performed.

[0255] (1) A constant DC current I that always maintains a constant current for load 5. RDC Outputs the off-diagonal component X of the Z parameter. 21 (Off-diagonal component B of the Y parameter) 21 ) is a positive value (X 21 A passive circuit 32 where >0). In this case, the simulation was performed with a predetermined phase difference θ of 180°.

[0256] (2) A constant DC current I that always maintains a constant current for load 5 RDC Outputs the off-diagonal component X of the Z parameter. 21 (Off-diagonal component B of the Y parameter) 21 ) is a negative value (X 21 A passive circuit 32 where the phase difference is <0). In this case, the simulation was performed with a predetermined phase difference θ of 0°.

[0257] (3) A constant DC voltage V that is always constant relative to load 5 RDC Outputs the off-diagonal component X of the Z parameter. 21(Off-diagonal component B of the Y parameter) 21 ) is a positive value (X 21 A passive circuit 32 where >0). In this case, the simulation was performed with a predetermined phase difference θ of -90°.

[0258] (4) A constant DC voltage V is always constant relative to load 5. RDC Outputs the off-diagonal component X of the Z parameter. 21 (Off-diagonal component B of the Y parameter) 21 ) is a negative value (X 21 A passive circuit 32 where <0). In this case, the simulation was performed with a predetermined phase difference θ of +90°.

[0259] The simulation results confirmed that, in all cases of the rectifier circuit 3, the switching voltages of the first switching element 12 and the second switching element 13 can achieve ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing losses in the first switching element 12 and the second switching element 13. Furthermore, in all cases of the rectifier circuit 3, when a constant AC voltage is input, the constant DC constant voltage V is maintained as per the conditions. RDC Or constant current DC constant current I RDC We confirmed that it can output to a load of 5.

[0260] <7. Summary> As described above, the contactless power supply system 1 according to this embodiment has an inverter 2 on the power supply side and a rectifier circuit 3 on the power receiving side, and the inverter 2 and the rectifier circuit 3 are coupled by a coupler 4.

[0261] Inverter 2 is composed of a DE class inverter, and its switching circuit 11 has a first switching element 12 and a second switching element 13. Inverter 2 is configured such that when the load 5 has a predetermined resistance value R l0 In this case, the switching voltages of the first switching element 12 and the second switching element 13 can be configured to achieve ZVS and ZVDS. However, the resistance value R of the load 5 lIf this fluctuates, the switching voltages of the first switching element 12 and the second switching element 13 will no longer be able to achieve ZVS and ZVDS.

[0262] In this DE class inverter 2, a dead time is provided between the ON signal of the first control signal Q1 that turns on the first switching element 12 and the ON signal of the second control signal Q2 that turns on the second switching element 13. Both the first control signal Q1 and the second control signal Q2 are set as OFF signals, thereby turning off both the first switching element 12 and the second switching element 13. The switching voltages of the first switching element 12 and the second switching element 13 are determined based on the length τ of this dead time.

[0263] Inverter 2 has a passive circuit 20 between the switching circuit 11 and the load 5, and the passive circuit 20 converts the input impedance Z to the output of the switching circuit 11. Specifically, when the load 5 has a predetermined resistance value R l0 In this case, the input impedance Z to the output of the switching circuit 11 is converted to a reference impedance Z0 by the passive circuit 20. The reference impedance Z0 is the input impedance Z to the output of the switching circuit 11 when the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2. Also, when the load 5 has a predetermined resistance value R l0 Even if it fluctuates, the input impedance Z to the output of the switching circuit 11 is converted by the passive circuit 20 so that the switching voltages of the first switching element 12 and the second switching element 13 remain within the range that achieves ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2.

[0264] As described above, the switching voltage is determined based on the dead time length τ, but by designing the passive circuit 20 as described above, the passive circuit 20 takes into account the dead time length τ, and the load 5 has a predetermined resistance value R l0In this case, the input impedance Z to the output of the switching circuit 11 is converted to the reference impedance Z0, and the load 5 is converted to a predetermined resistance value R l0 Even if it fluctuates, the input impedance Z to the output of the switching circuit 11 is converted so that the switching voltages of the first switching element 12 and the second switching element 13 remain within the range that achieves ZVS.

[0265] As a result, load 5 will have a predetermined resistance value R l0 In this case, the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing the occurrence of losses in the first switching element 12 and the second switching element 13. Also, the load 5 has a predetermined resistance value R l0 Even if the load 5 fluctuates from a predetermined resistance value R, the switching voltages of the first switching element 12 and the second switching element 13 will achieve at least ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, so that the loss in the first switching element 12 and the second switching element 13 is prevented when the load 5 is at a predetermined resistance value R l0 It can be suppressed in the same way as in the case where it was.

[0266] Therefore, the resistance value R of load 5 l We can provide a DE-class inverter that can perform ideal operation with high efficiency even when the voltage fluctuates.

[0267] Furthermore, the rectifier circuit 3 is composed of a DE class synchronous rectifier circuit, and its circuit configuration is the same as that of the inverter 2, but with the input and output reversed. That is, the switching circuit 31 of the rectifier circuit 3 has a first switching element 12 and a second switching element 13, similar to the switching circuit 11 of the inverter 2, and the switching operation of the first switching element 12 and the second switching element 13 in the rectifier circuit 3 is the same as that of the switching circuit 11 of the inverter 2.

[0268] Furthermore, the rectifier circuit 3 has a passive circuit 32 between the input terminal of the rectifier circuit 3 and the switching circuit 31, and the passive circuit 32 converts the output impedance ZO to the input of the switching circuit 31. Specifically, when the load 5 has a predetermined resistance value R l0 In this case, the output impedance ZO to the input of the switching circuit 31 is converted to a reference impedance Z0 by the passive circuit 32. The reference impedance Z0 is the output impedance ZO to the input of the switching circuit 11 when the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set for the first control signal Q1 and the second control signal Q2. Also, when the load 5 has a predetermined resistance value R l0 Even if it fluctuates, the output impedance ZO to the input of the switching circuit 11 is converted by the passive circuit 32 so that the switching voltages of the first switching element 12 and the second switching element 13 remain within the range that achieves ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2.

[0269] In the rectifier circuit 3, the switching voltage is determined based on the dead time length τ, but by designing the passive circuit 32 as described above, the passive circuit 32 takes into account the dead time length τ, and the load 5 has a predetermined resistance value R l0 In this case, the output impedance ZO to the input of the switching circuit 11 is converted to the reference impedance Z0, and the load 5 is converted to a predetermined resistance value R l0 Even if it fluctuates, the output impedance ZO to the input of the switching circuit 11 is converted so that the switching voltages of the first switching element 12 and the second switching element 13 remain within the range that achieves ZVS.

[0270] As a result, load 5 will have a predetermined resistance value R l0In this case, the switching voltages of the first switching element 12 and the second switching element 13 achieve ZVS and ZVDS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, thereby suppressing losses in the first switching element 12 and the second switching element 13. Also, when the load 5 has a predetermined resistance value R l0 Even if the load 5 fluctuates from a predetermined resistance value R, the switching voltages of the first switching element 12 and the second switching element 13 will achieve at least ZVS during the dead time length τ set in the first control signal Q1 and the second control signal Q2, so that the loss in the first switching element 12 and the second switching element 13 is prevented when the load 5 is at a predetermined resistance value R l0 It can be suppressed in the same way as in the case where it was.

[0271] Therefore, the resistance value R of load 5 l This provides a DE-class synchronous rectifier circuit that can perform ideal operation with high efficiency even when the voltage fluctuates.

[0272] Furthermore, the contactless power supply system 1, composed of such an inverter 2 and rectifier circuit 3, can supply power to the load 5 in a contactless and highly efficient manner.

[0273] <8. Variation> Although the present invention has been described above based on embodiments, it is easy to infer that the present invention is not limited in any way to the above embodiments, and that various improvements and modifications are possible without departing from the spirit of the present invention. For example, each embodiment, including the modifications described below, may be constructed by modifying the embodiment by adding or replacing some or more parts of the configuration of another embodiment with that embodiment. Furthermore, the numerical values ​​given in the above embodiments are merely examples, and it is naturally possible to use other numerical values.

[0274] In the above embodiment, in the rectifier circuit 3, the control unit 33 receives the AC voltage v from the AC constant voltage source 34 input to the rectifier circuit 3. sIt detects the AC voltage v, and based on the detection result, s The phase difference between the first control signal Q1 and the AC voltage v becomes a predetermined phase difference θ, and the AC voltage v s We have described the case in which the first control signal Q1 and the second control signal Q2 are generated such that the phase difference between the AC voltage v and the second control signal Q2 is a predetermined phase difference (θ-180°) or (θ+180°), but the AC voltage v s As long as the phase difference between the first control signal Q1 and the second control signal Q2 is such that it equals the above-mentioned phase difference, the method for generating the first control signal Q1 and the second control signal Q2 can be any method.

[0275] Figure 30 is a diagram illustrating a modified example of the method for generating the first control signal Q1 and the second control signal Q2. For example, the control unit 33 receives the AC voltage v from the AC constant voltage source 34 input to the rectifier circuit 3. s Alternatively, it detects the alternating current and generates a first control signal Q1 and a second control signal Q2 from the detection result. Then, the control unit 33 outputs a constant DC voltage V from the rectifier circuit 3 to the load 5. RDC or DC constant current I RDC The phases of the first control signal Q1 and the second control signal Q2 are feedback controlled so that the AC voltage v s Alternatively, the phase difference between the AC current and the first control signal Q1 is set to a predetermined phase difference θ, and the AC voltage v s Alternatively, the phase difference between the AC current and the second control signal Q2 can be set to a predetermined phase difference of (θ-180°) or (θ+180°). Furthermore, the AC voltage v input to the rectifier circuit 3... s Even if the constant voltage or constant current of the AC current is disrupted and the amplitude fluctuates, feedback control can keep the magnitude of the DC voltage or DC current output from the rectifier circuit 3 constant.

[0276] Another variation is that the control unit 33 receives the AC voltage v from the AC constant voltage source 34 input to the rectifier circuit 3. sAlternatively, this modified version is the same as the previous modification in that it detects AC current and generates a first control signal Q1 and a second control signal Q2 from the detection result, but in this modified version, the method of feedback control of the phase of the first control signal Q1 and the second control signal Q2 is different from the previous modified version. That is, the control unit 33 in this modified version controls the AC voltage v input to the rectifier circuit 3. s And the DC constant voltage V output from the rectifier circuit 3 RDC The ratio of this to the AC voltage v input to the rectifier circuit 3. s And the DC constant current I output from the rectifier circuit 3 RDC The ratio of the AC current input to the rectifier circuit 3 to the DC constant current I output from the rectifier circuit 3 is as follows: RDC The ratio of the AC current input to the rectifier circuit 3 to the DC constant voltage V output from the rectifier circuit 3 is as follows: RDC The phases of the first control signal Q1 and the second control signal Q2 are feedback controlled so that the ratio of either of the following reaches a predetermined target time. Through this feedback control, the control unit 33 also controls the AC voltage v s Alternatively, the phase difference between the AC current and the first control signal Q1 is set to a predetermined phase difference θ, and the AC voltage v s Alternatively, the phase difference between the AC current and the second control signal Q2 can be set to a predetermined phase difference of (θ-180°) or (θ+180°). Furthermore, the AC voltage v input to the rectifier circuit 3... s Even if the constant voltage or constant current of the AC current is disrupted and the amplitude fluctuates, the control unit 33 will adjust the DC constant voltage V in accordance with the fluctuation through feedback control. RDC or DC constant current I RDC The ZVS in the first switching element 12 and the second switching element 13 can be maintained while varying the magnitude of the ZVS. Therefore, high-efficiency operation of the rectifier circuit 3 can be maintained.

[0277] In the above embodiment, the contactless power supply system 1 was described as having an inverter 2 on the power supply side and a rectifier circuit 3 on the power receiving side, with these connected by a coupler 4. In contrast, the contactless power supply system 1 may also have an inverter 2 on the power supply side, but a rectifier circuit or other circuit different from the rectifier circuit 3 on the power receiving side, with these connected by a coupler 4. In this case, the contactless power supply system 1 can enjoy at least the effects of the inverter 2. Alternatively, the contactless power supply system 1 may have an inverter different from the inverter 2 on the power supply side, but a rectifier circuit 3 on the power receiving side, with these connected by a coupler 4. In this case, the contactless power supply system 1 can enjoy at least the effects of the rectifier circuit 3.

[0278] In the above embodiment, the case in which the inverter 2 is used in a contactless power supply system 1 was described, but it is not limited to this, and the inverter 2 can be used in any device or system that requires a circuit to generate and output an AC voltage or AC current from a DC voltage or DC current.

[0279] In the above embodiment, the case in which the rectifier circuit 3 is used in a contactless power supply system 1 was described, but it is not limited to this, and the rectifier circuit 3 can be used in any device or system that requires a circuit that generates and outputs a DC voltage or DC current from an AC voltage or AC current. [Explanation of symbols]

[0280] 1. Contactless power supply system 2 Inverters 3 Rectifier circuit 4 Combiner 5 load 10 DC voltage source 10a DC current source 11 Switching Circuits 12 First switching element 13 Second switching element 14 First Capacitor 15 Second Capacitor 20 Passive Circuits 31 Switching Circuits 32 Passive Circuits 33 Control Unit 34 AC constant voltage source D duty cycle Q1 First control signal Q2 Second control signal R l Resistance R l0 predetermined resistance value T switching period Z Input impedance Z0 reference impedance Z O Output impedance τ: Length of dead time

Claims

1. An inverter that generates and outputs an AC voltage or AC current to be supplied to a load from a DC voltage or DC current, A switching circuit having a series circuit in which a first capacitor with a first switching element connected in parallel and a second capacitor with a second switching element connected in parallel are connected in series, and configured to output an AC voltage or AC current based on the voltage or current generated at the connection point between the first capacitor and the second capacitor by alternately turning on the first switching element and the second switching element while the series circuit is connected to the DC voltage or the DC current, The switching circuit and the load are provided with a passive circuit for converting the input impedance to the output of the switching circuit, The aforementioned switching circuit is A first control signal, consisting of an on signal and an off signal that control the on / off state of the first switching element at a predetermined duty cycle, and a second control signal, consisting of an on signal and an off signal that control the on / off state of the second switching element at a predetermined duty cycle, are input. The ON signal of the first control signal and the ON signal of the second control signal occur alternately in time, and a dead time is provided between the ON signal of the first control signal and the ON signal of the second control signal, during which both the first control signal and the second control signal are OFF signals. The passive circuit described above is Based on the configuration and setting values ​​of each element provided in the switching circuit and the circuit connected to the switching circuit including the load, and the length of the dead time, the switching voltages of the first switching element and the second switching element are determined, with the input impedance at which zero-voltage switching and zero-voltage differential switching are achieved during the length of the dead time being used as the reference impedance. When the load has a predetermined resistance value, the input impedance is converted to become the reference impedance. An inverter characterized in that, when the resistance value of the load deviates from the predetermined resistance value, the input impedance is converted such that the switching voltage remains within the range that achieves zero-voltage switching during the dead time duration.

2. The inverter according to claim 1, characterized in that the passive circuit is configured as a circuit that satisfies impedance parameters obtained when impedance conversion is performed from the real-axis load fluctuation geodesic plotted on the Smith chart representing the fluctuation in the resistance value of the load to the zero-voltage switching geodesic plotted on the Smith chart representing the input impedance that achieves zero-voltage switching during the dead time duration.

3. The inverter according to claim 2, characterized in that the impedance parameters of the passive circuit are determined such that the impedance transformation from the real-axis load fluctuation geodesic to the zero-voltage switching geodesic is performed by a Möbius transformation using at least one of scaling, rotation, and translation in the vertical axis direction on an impedance plane where the vertical axis is the reactance component and the horizontal axis is the resistance component.

4. The inverter according to claim 1, characterized in that the passive circuit is composed of an inductor and a capacitor.

5. A rectifier circuit that rectifies an AC voltage or AC current and outputs a DC voltage or DC current to a load, A switching circuit having a series circuit in which a first capacitor with a first switching element connected in parallel and a second capacitor with a second switching element connected in parallel are connected in series, and with a voltage or current based on the AC voltage or AC current supplied to the connection point of the first capacitor and the second capacitor, the first switching element and the second switching element are alternately turned on under predetermined conditions to output the DC voltage or DC current, A passive circuit is provided between the input terminal of the rectifier circuit to which the AC voltage or AC current is input and the switching circuit, for converting the output impedance to the input of the switching circuit, The system includes a control unit that generates a first control signal consisting of an on signal and an off signal that controls the on / off state of the first switching element at a predetermined duty cycle, and a second control signal consisting of an on signal and an off signal that controls the on / off state of the second switching element at the same duty cycle as the predetermined duty cycle, and outputs these signals to the switching circuit. The control unit is The ON signal of the first control signal and the ON signal of the second control signal occur alternately in time, a dead time is provided between the ON signal of the first control signal and the ON signal of the second control signal during which both the first and second control signals become OFF signals, and the first and second control signals are generated such that there is a predetermined phase difference between the first and second control signals and the AC voltage or AC current input to the rectifier circuit. The passive circuit described above is Based on the configuration and setting values ​​of each element provided in the switching circuit and the circuit connected to the switching circuit including the load, and the length of the dead time, the switching voltages of the first switching element and the second switching element are determined, with the output impedance at which zero-voltage switching and zero-voltage differential switching are achieved during the length of the dead time being used as the reference impedance. When the load has a predetermined resistance value, the output impedance is converted to become the reference impedance. A rectifier circuit characterized in that, when the resistance value of the load deviates from the predetermined resistance value, the output impedance is converted such that the switching voltage remains within the range that achieves zero-voltage switching during the dead time duration.

6. The rectifier circuit according to claim 5, characterized in that the predetermined phase difference is determined by whether the input to the rectifier circuit is a constant voltage or a constant current, whether the output to the load is a constant voltage or a constant current, and whether the off-diagonal component of the Z parameter or the off-diagonal component of the Y parameter representing the passive circuit is a positive number or a negative number.

7. The rectifier circuit according to claim 5, characterized in that the control unit detects the AC voltage or AC current input to the rectifier circuit, and generates the first control signal and the second control signal based on the detection result such that the phase difference between the first control signal and the second control signal and the AC voltage or AC current input to the rectifier circuit becomes the predetermined phase difference.

8. The rectifier circuit according to claim 5, characterized in that the control unit detects the AC voltage or AC current input to the rectifier circuit and generates the first control signal and the second control signal, and adjusts the phase of the first control signal and the second control signal so that the DC voltage or DC current becomes a predetermined target value.

9. The rectifier circuit according to claim 5, characterized in that the control unit detects the AC voltage or AC current input to the rectifier circuit and generates the first control signal and the second control signal, and adjusts the phase of the first control signal and the second control signal so that the ratio of the AC voltage to the DC voltage, the ratio of the AC voltage to the DC current, the ratio of the AC current to the DC current, or the ratio of the AC current to the DC voltage becomes a predetermined target value.

10. A contactless power supply system characterized by having an inverter according to any one of claims 1 to 4 on the power supply side and coupling it to a rectifier circuit via a coupler.

11. A contactless power supply system characterized by having a rectifier circuit according to any one of claims 5 to 9 on the power receiving side and coupling it to an inverter via a coupler.

12. A contactless power supply system characterized by having an inverter according to any one of claims 1 to 4 on the power supply side and a rectifier circuit according to any one of claims 5 to 9 on the power receiving side, wherein the inverter and the rectifier circuit are coupled by a coupler.

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