Charge pump voltage detection circuit and gate drive circuit

Abstract

To provide a voltage detection circuit of a charge pump, capable of detecting a pressure rise voltage by a charge pump circuit with high accuracy as well as reducing a power consumption current, and provide a gate drive circuit.SOLUTION: A voltage current conversion circuit converts an emitter potential difference of a transistor Q2 and a transistor Q4 into a current difference flowing in the transistor Q2 and the transistor Q4. Each of Zener diodes dz1 and Dz2 is connected to between a first input 18 into which a gate voltage VG is inputted and an emitter of the transistor Q2, and is not connected to a second input 19 into which a DC voltage VDD1 and an emitter of the transistor Q4. A comparison circuit 20 compares a current flowing in each of the transistors Q2 and Q4, and outputs their comparison result.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a voltage detection circuit and a gate drive circuit for a charge pump.

Background Art

[0002] An overcurrent protection circuit has been proposed that turns off a load switch to cut off overcurrent when an overcurrent flows through a load. When an N-channel field effect transistor (MOS transistor) is used as the load switch, a boosted voltage obtained by boosting the power supply voltage by a charge pump circuit is supplied to the gate of the MOS transistor. Also, in order to reduce power consumption, a method is required to stop the boosting operation of the charge pump circuit when the boosted voltage, that is, the gate voltage, has risen sufficiently, and to resume the boosting operation when it has dropped to a certain value.

[0003] The gate voltage operates in a wide voltage range from near ground to above the power supply voltage. Conventionally, as a method for detecting a voltage whose input voltage changes in such a wide voltage range, a circuit such as that of Patent Document 1 has been proposed. As a voltage detection circuit for a charge pump that detects an increase or decrease in the gate voltage using the circuit of Patent Document 1, for example, the one shown in FIG. 4 can be considered.

[0004] The voltage detection circuit 100 for a charge pump shown in FIG. 4 is a circuit that compares the voltage difference between the gate voltage VG and the DC voltage VDD1 with a reference voltage Vref. In the voltage detection circuit 100, the emitter potential difference between the transistors Q1, Q2 and the transistors Q3, Q4 becomes the current difference flowing through the transistors Q2, Q4. For this reason, the emitter potential difference between the transistors Q2, Q4 is detected as the voltage difference between the resistors R31, R32 connected in series to the transistors Q2, Q4. The output of the comparator 101 that compares the voltages at both ends of the resistors R31, R22 is the output of the voltage detection circuit 100.

[0005] Furthermore, a current mirror circuit 102 and a constant current source 103 are provided to sink a constant current I3 from the current flowing through resistor R21 in order to set the reference voltage Vref. The reference voltage Vref is expressed by the following formula. Vref=R21·I3

[0006] A reference voltage Vref of approximately 10V to 15V is required. The constant current I3 should be kept small due to current consumption considerations. If a constant current I3 of 1μA is used to detect a 10V potential difference, the resistance of resistor R21 will be 10MΩ.

[0007] Incidentally, the gain of the voltage detection circuit 100 depends on the value of resistor R21; the higher the resistance value of resistor R21, the lower the gain and the lower the detection accuracy. Therefore, conventional voltage detection circuits 100 have the problem of not being able to achieve both a reduction in current consumption and an improvement in detection accuracy. [Prior art documents] [Patent Documents]

[0008] [Patent Document 1] Japanese Patent Application Publication No. 05-232147 [Overview of the Initiative] [Problems that the invention aims to solve]

[0009] The present invention has been made in view of the above circumstances, and its purpose is to provide a charge pump voltage detection circuit that can reduce current consumption and accurately detect the boosted voltage generated by the charge pump circuit. [Means for solving the problem]

[0010] To achieve the aforementioned objectives, the voltage detection circuit and gate drive circuit of the charge pump according to the present invention are characterized by the following [1] to [6]. [1] A first transistor with its collector and base connected, or its drain and gate connected, A second transistor having its emitter connected to the emitter of the first transistor and its base connected to the base of the first transistor, or having its source connected to the source of the first transistor and its gate connected to the gate of the first transistor, A third transistor with its collector and base connected, or its drain and gate connected, A fourth transistor having its emitter connected to the emitter of the third transistor and its base connected to the base of the third transistor, or having its source connected to the source of the third transistor and its gate connected to the gate of the third transistor, The first transistor base or gate and the third transistor base or gate It has a constant current source connected to it, A voltage-current conversion circuit that converts the emitter potential difference or source potential difference between the second transistor and the fourth transistor into the current difference flowing through the second transistor and the fourth transistor, A boosted voltage, obtained by boosting the DC voltage using a charge pump circuit, is input to the first input, which is connected to the emitter or source of the second transistor. The DC voltage is input to a second input which is connected to the emitter or source of the fourth transistor, A first Zener diode connected between the first input and the emitter or source of the second transistor, The comparison result of the currents flowing through the second transistor and the fourth transistor is output, and the boost operation of the charge pump circuit is performed according to the comparison result. of A comparison circuit for stopping or starting, It is a voltage detection circuit for a charge pump. [2] In the voltage detection circuit of the charge pump described in [1], A first resistor connected in series with the first Zener diode between the first input and the emitter or source of the second transistor, The device comprises a second resistor connected between the second input and the emitter or source of the fourth transistor, The resistance values ​​of the first resistor and the second resistor are set to different values. It is a voltage detection circuit for a charge pump. [3] In the voltage detection circuit of the charge pump described in [1], The first input and the emitter or source of the second transistor further include a diode-connected bipolar transistor connected in series with the first Zener diode, It is a voltage detection circuit for a charge pump. [4] In the voltage detection circuit of the charge pump described in [1], The constant current source is comprised of a constant current circuit that has a second Zener diode and supplies a constant current corresponding to the Zener voltage of the second Zener diode. It is a voltage detection circuit for a charge pump. [5] In the voltage detection circuit of the charge pump described in [1], The comparison circuit comprises a current mirror circuit in which the input is connected to the collector or drain of the fourth transistor and the output is connected to the collector or drain of the second transistor. It is a voltage detection circuit for a charge pump. [6] A charge pump circuit that supplies a boosted voltage, obtained by boosting the DC voltage, to the gate of a transistor for a load switch connected between a DC power supply and a load, A voltage detection circuit for a charge pump as described in any one of items [1] to [5], It must be a gate drive circuit. [Effects of the Invention]

[0011] According to the present invention, it is possible to provide a voltage detection circuit and a gate drive circuit of a charge pump that can reduce the consumption current and accurately detect the boosted voltage boosted by the charge pump circuit.

[0012] As described above, the present invention has been briefly described. Further, the details of the present invention will be further clarified by reading through the embodiments for carrying out the invention described below (hereinafter referred to as "embodiments") with reference to the accompanying drawings.

Brief Explanation of Drawings

[0013] [Figure 1] FIG. 1 is a circuit diagram showing a power supply device incorporating the voltage detection circuit of the charge pump of the present invention. [Figure 2] FIG. 2 is a circuit diagram showing the details of the first voltage detection circuit shown in FIG. 1 in the first embodiment. [Figure 3] FIG. 3 is a circuit diagram showing the details of the first voltage detection circuit shown in FIG. 1 in the second embodiment. [Figure 4] FIG. 4 is a circuit diagram showing an example of a conventional voltage detection circuit of a charge pump.

Embodiments for Carrying out the Invention

[0014] (First Embodiment) The first embodiment of the present invention will be described below with reference to each figure.

[0015] FIG. 1 is a circuit diagram showing a power supply device incorporating the voltage detection circuit of the charge pump of the present invention in the first embodiment. As shown in the figure, the power supply device 1 is a device that supplies the DC voltage VDD1 output from the power supply 2 to the load RL. The power supply device 1 includes a transistor MSW for a load switch connected between the power supply 2 and the load RL, a sense resistor Rs for detecting the current flowing through the load RL, and an overcurrent protection circuit 3 that controls the on / off of the transistor MSW to protect the power supply 2 and the load RL from overcurrent.

[0016] The MSW transistor is composed of N-channel field-effect transistors. The MSW transistor is connected to the positive terminal of power supply 2, relative to the load RL. The source of the MSW transistor is connected to the load RL, and the drain is connected to the positive terminal of power supply 2 via a sense resistor Rs.

[0017] The overcurrent protection circuit 3 comprises a power supply 4, an overcurrent interruption circuit 5, and a gate drive circuit 6. The power supply 4 outputs a DC voltage VDD2. The overcurrent interruption circuit 5 is a circuit that turns off the transistor MSW to interrupt the overcurrent when an overcurrent flows through the load RL. The gate drive circuit 6 is a circuit that turns on the transistor MSW.

[0018] First, let's describe the overcurrent protection circuit 5. The overcurrent protection circuit 5 includes a differential amplifier 7 that amplifies the voltage across the sense resistor Rs according to the load current, and a gate control circuit 8 that, when it detects an overcurrent based on the output of the differential amplifier 7, pulls the gate of the transistor MSW to ground, thereby forcibly turning off the transistor MSW.

[0019] Next, the gate drive circuit 6 will be described in detail. The gate drive circuit 6 includes a charge pump circuit 9, a constant current circuit 10, a resistor R1, a first voltage detection circuit 11, a second voltage detection circuit 12, and a charge pump control circuit 13. The charge pump circuit 9 is a circuit that boosts the DC voltage VDD1 and supplies it to the gate of the transistor MSW. The constant current circuit 10 is a circuit that receives current from the charge pump circuit 9 and outputs a constant current I1. In this embodiment, the constant current circuit 10 includes a constant current source 15 and transistors M11 and M12 that constitute a current mirror circuit.

[0020] The constant current source 15 outputs a constant current I1. Transistors M11 and M12 are composed of P-channel field-effect transistors. Transistor M11 has its gate and drain connected. The constant current source 15 is connected between the drain of transistor M11 and ground. Transistor M12 has its gate and source connected to the gate and source of transistor M11. The drain of transistor M12 is connected to the gate of transistor MSW. With the above configuration, the constant current I1 output by the constant current source 15 is folded back to the drain of transistor M12 as a current corresponding to the transistor size ratio of transistors M11 and M12.

[0021] Resistor R1 has one end connected to the drain of transistor M12, supplying the drain current of transistor M12. The drain current of transistor M12 charges the gate capacitance of transistor MSW, allowing transistor MSW to be turned on. Resistor R1 is connected between the gate and source of transistor MSW, and discharges the charge of the gate capacitance when the drain current of transistor M12 is not supplied to the gate capacitance. When the gate capacitance is discharged by resistor R1, transistor MSW is turned off.

[0022] The charge pump circuit 9 described above includes a capacitor C1, an inverter 14, and diodes D1 and D2 for preventing reverse current. One end of capacitor C1 is connected to the connection point between the cathode of diode D1 and the anode of diode D2. The other end of capacitor C1 is connected to the output of inverter 14.

[0023] The inverter 14 operates by receiving a DC voltage VDD1 from the power supply 2. The inverter 14 receives a pulse signal output from an oscillator circuit (not shown). Diode D1 has its anode connected to the positive terminal of the power supply 4 and its cathode connected to one end of capacitor C1. Diode D2 has its anode connected to one end of capacitor C1 and its cathode connected to the sources of transistors M11 and M12 that constitute the constant current circuit 10. The cathode of diode D2 becomes the output of the charge pump circuit 9, which outputs a boosted voltage obtained by increasing the DC voltage VDD1.

[0024] With the above configuration, when the pulse signal from the oscillation circuit becomes high level and the output of inverter 14 becomes low level (ground), the potential at the other end of capacitor C1 becomes equal to ground, so current is supplied from power supply 4 via diode D1 and capacitor C1 is charged. Due to the charging from power supply 4, the voltage across capacitor C1 becomes equal to the DC voltage VDD2. In addition, diode D2 prevents current from flowing from the gate of transistor MSW to capacitor C1. When the output of inverter 14 becomes high level (DC voltage VDD1), the potential at the other end of capacitor C1 becomes equal to the DC voltage VDD1. Therefore, one end of capacitor C1 has a potential that is shifted up by DC voltage VDD2 to the high-voltage side of DC voltage VDD1.

[0025] Specifically, one end of capacitor C1 outputs a pulse signal that alternates between an L level (DC voltage VDD2) and an H level (DC voltage VDD1 + DC voltage VDD2). This pulse signal is smoothed by a smoothing capacitor (not shown), and a boosted voltage higher than DC voltage VDD1 is output from the charge pump circuit 9 and supplied to the constant current circuit 10.

[0026] The first voltage detection circuit 11 is a circuit that detects an increase in the gate voltage VG of the transistor MSW. The first voltage detection circuit 11 compares the potential difference (VG - Vref1) between the gate voltage VG of the transistor MSW and the reference voltage Vref1 with the DC voltage VDD1, and outputs the comparison result to the charge pump control circuit 13. The second voltage detection circuit 12 is a circuit that detects a decrease in the gate voltage VG of the transistor MSW. The second voltage detection circuit 12 compares the potential difference (VG - Vref2) between the gate voltage VG of the transistor MSW and the reference voltage Vref2 (<Vref1) with the DC voltage VDD1, and outputs the comparison result to the charge pump control circuit 13.

[0027] When the gate voltage VG of the transistor MSW rises and the comparison result that the potential difference (VG - Vref1) is greater than the DC voltage VDD1 is output from the first voltage detection circuit 11, the charge pump control circuit 13 controls an oscillation circuit (not shown) to stop the output of the pulse signal. As a result, the boosting operation of the charge pump circuit 9 is stopped. When the gate voltage VG of the transistor MSW drops and the comparison result that the potential difference (VG - Vref2) is lower than the DC voltage VDD1 is output from the second voltage detection circuit 12, the charge pump control circuit 13 controls an oscillation circuit (not shown) to resume the output of the pulse signal. As a result, the boosting operation of the charge pump circuit 9 is resumed.

[0028] Next, the details of the first voltage detection circuit 11 and the second voltage detection circuit 12 described above will be explained. The first voltage detection circuit 11 and the second voltage detection circuit 12 correspond to the voltage detection circuits of the charge pump of the present invention. The first voltage detection circuit 11 and the second voltage detection circuit 12 have the same configuration except that the reference voltages Vref1 and Vref2 are different. Therefore, the first voltage detection circuit 11 will be described representatively with reference to FIG. 2.

[0029] As shown in Figure 2, the first voltage detection circuit 11 includes a voltage-to-current conversion circuit 17, a first input 18, a second input 19, Zener diodes Dz1 and Dz2, resistors R21 and R22, a transistor Tr, diodes D22, D22 and D3, and a comparison circuit 20.

[0030] The voltage-to-current conversion circuit 17 includes transistors Q1 to Q4 and a constant current source 16. Transistors Q1 to Q4 are composed of PNP-type bipolar transistors. Transistor Q1 (the first transistor) has its collector and base connected to each other, and the collector and base connected to each other are connected to the constant current source 16. Transistor Q2 (the second transistor) has its base connected to the base of transistor Q1, and its emitter connected to the emitter of transistor Q1.

[0031] Transistor Q3 (the third transistor) has its collector and base connected to each other, and the collector and base connected to each other are connected to the constant current source 16. Transistor Q4 (the fourth transistor) has its base connected to the base of transistor Q3, and its emitter connected to the emitter of transistor Q3. The constant current source 16 outputs a constant current I2. The voltage-to-current conversion circuit 17 converts the emitter potential difference between transistors Q2 and Q4 into the current difference flowing through transistors Q2 and Q4.

[0032] The first input 18 receives the gate voltage VG of transistor MSW (= a boosted voltage obtained by boosting the DC voltage VDD1 by the charge pump circuit 9), and is connected to the emitter of transistor Q2 via diode D21, transistor Tr (bipolar transistor), Zener diodes Dz1 and Dz2 (first Zener diodes), and resistor R21 (first resistor), which will be described later.

[0033] The second input 19 receives a DC voltage VDD1 and is connected to the emitter of transistor Q4 via diode D22 and resistor R22 (second resistor), which will be described later.

[0034] Resistor R21, Zener diodes Dz1 and Dz2, transistor Tr, and diode D21 are connected in series between the emitters of transistors Q1 and Q2 and the first input 18. Resistor R21 has one end connected to the emitters of transistors Q1 and Q2 and the other end connected to the anode of Zener diode Dz1. The cathode of Zener diode Dz1 is connected to the anode of Zener diode Dz2. The cathode of Zener diode Dz2 is connected to the collector of transistor Tr. Transistor Tr is diode-connected (i.e., base and collector are connected). Diode D21 has its cathode connected to the emitter of transistor Tr and its anode connected to the first input 18.

[0035] Resistor R22 and diode D22 are connected in series between the emitters of transistors Q3 and Q4 and the second input 19. No Zener diodes or bipolar transistors are connected between the emitters of transistors Q3 and Q4 and the second input 19. One end of resistor R22 is connected to the emitters of transistors Q3 and Q4, and the other end is connected to the cathode of diode D22. The anode of diode D22 is connected to the second input 19. The anode of diode D3 is connected to the emitters of transistors Q3 and Q4, and the cathode is connected to the emitters of transistors Q1 and Q2.

[0036] With the above configuration, when the gate voltage VG increases and the emitter potentials of transistors Q1 and Q2 become higher than those of transistors Q3 and Q4, the current flowing through transistor Q2 becomes greater than the current flowing through transistor Q4. On the other hand, when the gate voltage VG decreases and the emitter potentials of transistors Q1 and Q2 become lower than those of transistors Q3 and Q4, the current flowing through transistor Q2 becomes lower than that flowing through transistor Q4.

[0037] The emitter potentials Ve1 of transistors Q1 and Q2 are expressed by the following equation (1). Ve1=VG-Vd-Vbe-2Vdz-R21·I21 …(1) Vd: Forward voltage of diodes D21 and D22 Vbe: Base-emitter voltage of transistor Tr Vdz: Zener voltage of Zener diodes Dz1 and Dz2 R21: Resistance value of resistor R21 I21: Current flowing through resistor R21

[0038] The emitter potentials Ve2 of transistors Q3 and Q4 are expressed by the following equation (2). Ve2 = VDD1 - Vd - R22·I22 …(2) R22: Resistance value of resistor R22 I22: Current flowing through resistor R22

[0039] The voltage difference (VG-VDD1) when the emitters of transistors Q1 and Q2 are equal to the emitters of transistors Q3 and Q4 is the reference voltage Vref1. At this time, I2=I21=I22. Therefore, the reference voltage Vref1 is expressed by the following equation (3). Vref1=2Vdz+Vbe+I2·(R21-R22) …(3)

[0040] In the first embodiment, the reference voltage Vref can be set by the Zener voltages Vdz of the Zener diodes Dz1 and Dz2 connected in series with resistor R21, and the base-emitter voltage Vbe of the transistor Tr. This allows the resistance values ​​of resistors R21 and R22 to be kept small, increasing the gain of the voltage-current conversion circuit 17 and improving the detection accuracy of the first voltage detection circuit 11.

[0041] Furthermore, in the first embodiment, the resistance values ​​of resistors R21 and R22 are set to different values. If the resistance values ​​of resistors R21 and R22 are equal, the reference voltage Vref1 must be set by the Zener voltage Vdz and the base-emitter voltage Vbe, making it difficult to set the reference voltage Vref1 to a desired value. In contrast, by making the resistance values ​​of resistors R21 and R22 different, the reference voltage Vref1 can be finely adjusted to a desired value by the difference in the resistance values ​​of resistors R21 and R22, making it easy to set the reference voltage Vref1 to a desired value.

[0042] Furthermore, when the potential difference (VG-VDD1) is lower than the reference voltage Vref1, the Zener diodes Dz1 and Dz2 turn off, suppressing the current flowing out from the gate of the transistor MSW. As shown in Figure 1, when used as overcurrent protection circuit 3, this suppresses the current flowing from the gate of the transistor MSW to ground during normal operation when the overcurrent protection circuit 3 is not operating.

[0043] A transistor Tr is a temperature compensation element. For example, if the Zener voltages Vdz of Zener diodes Dz1 and Dz2 have a positive temperature coefficient, the base-emitter voltage of the bipolar transistor Tr has a negative temperature characteristic, which can slow down the temperature fluctuations of the reference voltage Vref1.

[0044] The comparator circuit 20 outputs the comparison result of the currents flowing through transistors Q2 and Q4 from the output terminal COUT. The comparator circuit 20 has transistors M1 and M2, transistors M3 and M4, and resistor R3 that constitute a current mirror circuit. Transistors M1 to M4 are composed of N-channel field-effect transistors. Transistor M1 has its gate and drain connected. Transistor M1 has its source connected to ground, and its drain, which is the input to the current mirror circuit, is connected to the collector of transistor Q4. Transistor M1 is supplied with the current that flows through transistor Q4.

[0045] Transistor M2 has its gate connected to the gate of transistor M1, and its source connected to the source of transistor M1. As a result, the drain current flowing through transistor M1 is folded back into the drain current of transistor M2. The drain of transistor M2, which is the output of the current mirror circuit, is connected to the collector of transistor Q2 via transistor M3, which will be described later.

[0046] Transistor M3 has its gate connected to the positive terminal of power supply 4, its source connected to the drain of transistor M2, and its drain connected to the collector of transistor Q2. Transistor M3 receives the current that flows through transistor Q2. Transistor M4 has its source connected to ground, its gate connected to the connection point of the source of transistor M3 and the drain of transistor M2, and its drain connected to the positive terminal of power supply 4 via resistor R3. The connection point between this resistor R3 and the drain of transistor M4 becomes the output terminal COUT.

[0047] With the above configuration, if the current flowing through transistor Q2 is greater than the current flowing through transistor Q4, the current flowing through transistor M3 will be greater than the current flowing through transistor M2. As a result, the connection point between transistors M2 and M3 becomes high, transistor M4 turns on, and a low level (ground) is output from the output terminal COUT.

[0048] On the other hand, if the current flowing through transistor Q2 is less than the current flowing through transistor Q3, the current flowing through transistor M3 will be less than the current flowing through transistor M2. As a result, the connection point between transistors M2 and M3 becomes low, transistor M4 turns off, and a high level (DC voltage VDD2) is output from the output terminal COUT.

[0049] Furthermore, according to the comparison circuit 20 described above, the gate voltage of transistor M4 can be clamped by transistor M3. As a result, when the potential difference (VG-VDD1) is large, current flows only through transistors Q1 and Q2, and the collector current of transistors Q3 and Q4 is stopped. Since the bases and emitters of transistors Q1 and Q2 are connected, the current flowing through the first input 18 is expressed by the following equation (4). IG = I²·(MQ²¹+1) …(4) IG: Current flowing from the first input 18 (gate of transistor MSW in Figure 1) to ground. MQ21: Emitter area ratio of transistor Q1 to transistor Q2 (assuming "1" in this embodiment)

[0050] As shown in the voltage detection circuit 100 in Figure 4 above, when resistor R31 is connected to the collector of transistor Q2, a current twice the constant current I2 flows to ground through transistors Q1 and Q2. However, in the first voltage detection circuit 11 of the first embodiment, the collector current of transistor Q2 flows to ground through transistors M2 and M3, but transistor M2 forms a current mirror with transistor M1. When the collector current of transistor Q4 is stopped, transistor M1 is off. Therefore, transistor M2 cannot supply collector current, and current flows from the emitter of transistor Q2 to the base. As a result, the current from the gate of transistor MSW becomes the same as the constant current I2 and can be suppressed more than in equation (4).

[0051] Furthermore, the second voltage detection circuit 12 is almost identical to the first voltage detection circuit 11, and the number of Zener diodes, the number of bipolar transistors Tr, the resistance values ​​of resistors R21 and R22 are set appropriately to make the reference voltage Vref2 smaller than the reference voltage Vref1.

[0052] Diode D21 prevents current from flowing from power supply 2 to the gate of transistor MSW when the gate voltage VG drops to near ground, by becoming reverse-biased. Diode D22 is provided to cancel out the potential difference generated by diode D21.

[0053] (Second Embodiment) Next, the second embodiment will be described. The difference between the first embodiment and the second embodiment is the configuration of the first voltage detection circuit 11B. The only difference between the first voltage detection circuit 11B and the second voltage detection circuit is the reference voltages Vref1 and Vref2. For this reason, the first voltage detection circuit 11B will be described as representative with reference to Figure 3.

[0054] In Figure 3, parts equivalent to the first voltage detection circuit 11 already described in the first embodiment described above in Figure 2 are denoted by the same reference numerals, and their detailed description is omitted.

[0055] The difference between the first voltage detection circuit 11 of the first embodiment and the first voltage detection circuit 11B of the second embodiment is that a resistor R5 is provided instead of a transistor Tr to correct the temperature coefficients of the Zener diodes Dz1 and Dz2, and the constant current source 16 is constructed from the constant current circuit 16B shown in Figure 3.

[0056] Resistor R5 is connected between resistor R21 and Zener diode Dz1. The constant current circuit 16B includes transistor M5, resistor R4, Zener diode Dz3, and comparator 22. Transistor M5 is an N-channel field-effect transistor. The drain of transistor M5 is connected to the collector and base of transistors Q1 and Q3. Resistor R4 has one end connected to the source of transistor M5 and the other end connected to the cathode of Zener diode Dz3. The anode of Zener diode Dz3 is connected to ground. Comparator 22 has a reference voltage Vref3 supplied to its non-inverting input and the connection point between resistor R4 and the source of transistor M5 connected to its inverting input.

[0057] With the above configuration, the constant current I2 output by the constant current circuit 16B of the second embodiment, that is, the drain current of transistor M5, is expressed by the following equation (5). I2 = ID5 = (Vref3 - Vdz3) / R4 …(5) ID5: Drain current of transistor M5 Vdz3: Zener voltage of Zener diode Dz3 R4: Resistance value of resistor R4

[0058] If resistors R21, R4, and R5 have the same resistance value, the sum of the voltages generated by resistors R21 and R5 and Zener diodes Dz1 and Dz2 will be equal to twice the reference voltage Vref3. As is clear from equation (5), the constant current I2 will be a value corresponding to the Zener voltage Vdz3, and will fluctuate with temperature to cancel out the temperature fluctuations of the Zener voltage Vdz that sets the reference voltage Vref1. As a result, if the reference voltage Vref3 is constant with respect to temperature, the reference voltage Vref1 can also be made constant with respect to temperature.

[0059] Furthermore, the present invention is not limited to the embodiments described above, and can be modified, improved, etc., as appropriate. In addition, the material, shape, dimensions, number, placement, etc. of each component in the embodiments described above are arbitrary and not limited, as long as they can achieve the present invention.

[0060] In the embodiment described above, hysteresis was introduced into the control of the charge pump circuit 9 by providing two first voltage detection circuits 11 and a second voltage detection circuit 12, but this is not the only option. If hysteresis is not required, only the first voltage detection circuit 11 may be provided.

[0061] In the embodiment described above, resistors R21 and R22 were set to different resistance values, but this is not the only option. If the reference voltage Vref1 can be set using only the Zener diode, resistors R21 and R22 may be set to the same resistance value.

[0062] In the first embodiment described above, a bipolar transistor Tr connected by diodes was connected between the first input 18 and the emitters of transistors Q1 and Q2, but this is not the only option. If there is no need to compensate for temperature fluctuations of the reference voltage Vref1, the transistor Tr may not be necessary.

[0063] In the embodiment described above, the comparison circuit 20 had transistors M1 and M2 that constitute a current mirror circuit, but it is not limited to this. The comparison circuit 20 may consist of a third resistor connected between the emitter of transistor Q2 and ground, a fourth resistor connected between the emitter of transistor Q4 and ground, and a comparator that compares the voltage generated across the third resistor with the voltage generated across the fourth resistor.

[0064] Furthermore, although transistors Q1 to Q4 in the above-described embodiment were composed of bipolar transistors, they are not limited to this and may be composed of field-effect transistors. In this case, the explanation can be provided by substituting the base of the transistor with the gate, the emitter with the source, and the collector with the drain. [Explanation of symbols]

[0065] Q1 Transistor (First transistor) Q2 Transistor (Second transistor) Q3 Transistor (Third transistor) Q4 Transistor (4th transistor) 6 gate drive circuit 9. Charge pump circuit 11, 11B First voltage detection circuit (charge pump voltage detection circuit) 16 constant current source 16B constant current circuit 17 Voltage-to-Current Conversion Circuit 18 First Input 19 Second input 20 Comparison circuit Dz1, Dz2 Zener diodes (first Zener diode) Dz3 Zener diode (second Zener diode) M1 Transistor (Current Mirror Circuit) M2 Transistor (Current Mirror Circuit) MSW transistor (transistor for load switch) R21 Resistor (First resistor) R22 Resistor (Second resistor) RL load Tr Transistor (Bipolar Transistor) VDD1 DC voltage

Claims

1. A first transistor with its collector and base connected, or its drain and gate connected, A second transistor having its emitter connected to the emitter of the first transistor and its base connected to the base of the first transistor, or having its source connected to the source of the first transistor and its gate connected to the gate of the first transistor, A third transistor with its collector and base connected, or its drain and gate connected, A fourth transistor having its emitter connected to the emitter of the third transistor and its base connected to the base of the third transistor, or having its source connected to the source of the third transistor and its gate connected to the gate of the third transistor, The device comprises a constant current source connected to the base or gate of the first transistor and the base or gate of the third transistor, A voltage-current conversion circuit that converts the emitter potential difference or source potential difference between the second transistor and the fourth transistor into the current difference flowing through the second transistor and the fourth transistor, A boosted voltage, obtained by boosting the DC voltage using a charge pump circuit, is input to the first input, which is connected to the emitter or source of the second transistor. The DC voltage is input to a second input which is connected to the emitter or source of the fourth transistor, A first Zener diode connected between the first input and the emitter or source of the second transistor, The system includes a comparison circuit that outputs a comparison result of the currents flowing through the second transistor and the fourth transistor, and stops or starts the boosting operation of the charge pump circuit according to the comparison result. Voltage detection circuit for a charge pump.

2. In the voltage detection circuit of the charge pump described in claim 1, A first resistor connected in series with the first Zener diode between the first input and the emitter or source of the second transistor, The device comprises a second resistor connected between the second input and the emitter or source of the fourth transistor, The resistance values ​​of the first resistor and the second resistor are set to different values. Voltage detection circuit for a charge pump.

3. In the voltage detection circuit of the charge pump described in claim 1, The first input and the emitter or source of the second transistor further include a diode-connected bipolar transistor connected in series with the first Zener diode, Voltage detection circuit for a charge pump.

4. In the voltage detection circuit of the charge pump described in claim 1, The constant current source is comprised of a constant current circuit that has a second Zener diode and supplies a constant current corresponding to the Zener voltage of the second Zener diode. Voltage detection circuit for a charge pump.

5. In the voltage detection circuit of the charge pump described in claim 1, The comparison circuit includes a current mirror circuit in which the input is connected to the collector or drain of the fourth transistor and the output is connected to the collector or drain of the second transistor. Voltage detection circuit for a charge pump.

6. A charge pump circuit that supplies a boosted voltage, obtained by boosting the DC voltage, to the gate of a transistor for a load switch connected between a DC power supply and a load, A voltage detection circuit for a charge pump according to any one of claims 1 to 5, comprising: Gate drive circuit.

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