Power converter, overheat detection device, and overheat detection method

Abstract

To determine the overheat of a semiconductor element with high accuracy.SOLUTION: A power conversion device includes: a semiconductor device including a semiconductor element with a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode; a voltage detection unit that detects voltage between both terminals of the first terminal and the second terminal; a current detection unit that detects current flowing between both terminals; and a control unit that controls switching of the semiconductor device. Based on the relation among the voltage in a conduction state between both terminals, the current flowing in the conduction state between both terminals, and the temperature of the semiconductor element, the control unit estimates the temperature corresponding to the voltage detected in the conduction state by the voltage detection unit and the current detected in the conduction state by the current detection unit, and when the estimated value of the temperature is over a predetermined threshold, it is determined that overheat occurs in the semiconductor element.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a power conversion device, an overheat determination device, and an overheat determination method.

Background Art

[0002] Conventionally, a technique is known in which when a certain collector current is flowing through a semiconductor element, the voltage Vce between the collector and emitter is measured, and when the difference between the measured value of the voltage Vce and the initial value exceeds a determination value, it is determined that the life of the semiconductor element is approaching (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, although the above-described conventional technique determines the life of a semiconductor element, it does not estimate the temperature of the semiconductor element, so it is difficult to accurately determine overheating of the semiconductor element.

[0005] The present disclosure provides a power conversion device, an overheat determination device, and an overheat determination method capable of accurately determining overheating of a semiconductor element.

Means for Solving the Problems

[0006] In one aspect of the present disclosure, a semiconductor device having a semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode, a voltage detection unit that detects a voltage between both terminals of the first terminal and the second terminal, a current detection unit that detects a current flowing between both terminals, The semiconductor device comprises a control unit for controlling the switching of the semiconductor device, The power conversion device is provided, wherein the control unit estimates the temperature corresponding to the voltage detected by the voltage detection unit and the current detected by the current detection unit in the energized state, based on the relationship between the voltage between the two terminals in the energized state, the current flowing between the two terminals in the energized state, and the temperature of the semiconductor element, and determines that the semiconductor element is overheating when the estimated temperature exceeds a predetermined threshold.

[0007] In another aspect of this disclosure, A semiconductor device having a first main electrode and a second main electrode, and a semiconductor device having a first terminal electrically connected to the first main electrode and a second terminal electrically connected to the second main electrode, A voltage detection unit that detects the voltage between the first terminal and the second terminal, A current detection unit for detecting the current flowing between the two terminals, An estimation unit estimates the temperature corresponding to the voltage detected by the voltage detection unit in the energized state and the current detected by the current detection unit in the energized state, based on the relationship between the voltage between the two terminals in the energized state, the current flowing between the two terminals in the energized state and the temperature of the semiconductor element, An overheating detection device is provided, which includes a determination unit that determines that the semiconductor element is overheating when the estimated temperature exceeds a predetermined threshold.

[0008] In another aspect of this disclosure, A method for determining overheating of a semiconductor device having a semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode, The voltage detection unit detects the voltage between the first terminal and the second terminal, The current detection unit detects the current flowing between the two terminals, The estimation unit estimates the temperature corresponding to the voltage detected by the voltage detection unit in the energized state and the current detected by the current detection unit in the energized state, based on the relationship between the voltage between the two terminals in the energized state, the current flowing between the two terminals in the energized state and the temperature of the semiconductor element. The determination unit provides an overheating determination method in which it determines that the semiconductor element is overheating when the estimated temperature exceeds a predetermined threshold. [Effects of the Invention]

[0009] According to this disclosure, overheating of semiconductor devices can be determined with high accuracy. [Brief explanation of the drawing]

[0010] [Figure 1] This figure shows an example configuration of a power conversion device according to the first embodiment. [Figure 2] This figure shows an example configuration of an overheat detection device according to the first embodiment. [Figure 3] This timing chart illustrates the waveforms of various parts associated with the detection operation of voltage Vce1 when the semiconductor device is energized between both terminals. [Figure 4] This is a functional block diagram showing the first example of an overheat detection method. [Figure 5] This figure shows an example of a cross-sectional structure of a semiconductor device according to the second embodiment. [Figure 6] This figure shows an example configuration of an overheat detection device according to the second embodiment. [Figure 7] This is a functional block diagram showing a second example of an overheat detection method. [Figure 8] This figure shows an example of the configuration of an overheat detection device according to the third embodiment. [Figure 9] This is a functional block diagram showing a third example of an overheat detection method. [Modes for carrying out the invention]

[0011] The following describes the power conversion device, overheat detection device, and overheat detection method according to this embodiment.

[0012] Power conversion devices are being introduced more rapidly into applications that require high reliability, such as power transmission and distribution equipment, or moving objects such as trains and automobiles. One of the main failure factors of power conversion devices is semiconductor devices such as power semiconductor modules. Semiconductor devices include semiconductor elements such as power semiconductor chips. Since semiconductor elements will fail when their absolute maximum rated temperature is exceeded due to overload or module degradation, estimating and monitoring the temperature of semiconductor elements leads to higher reliability of power conversion devices.

[0013] As one method for estimating the temperature of a semiconductor element, there is a method of estimating the temperature of the semiconductor element based on the measured voltage between the main terminals of the semiconductor device while paying attention to the temperature dependence of the on-resistance (voltage drop) of the semiconductor element by measuring the voltage in the energized state between the main terminals of the semiconductor device.

[0014] However, the voltage between the main terminals of a semiconductor device, such as between the collector and emitter, generally changes depending on load conditions such as the load current flowing between the main terminals. Therefore, in a method of estimating the temperature of a semiconductor element based on the measured voltage between the main terminals when a constant current is flowing, when the current flowing through the semiconductor element changes, the accuracy of estimating the temperature of the semiconductor element decreases, and it is difficult to accurately determine overheating of the semiconductor element.

[0015] The power conversion device or overheat determination device according to this embodiment has a function capable of accurately determining overheating of a semiconductor element. Further, the present disclosure provides an overheat determination method capable of accurately determining overheating of a semiconductor element.

[0016] <First Embodiment> FIG. 1 is a diagram showing a configuration example of a power conversion device according to this embodiment. The power conversion device 200 shown in FIG. 1 includes a main circuit unit 10 that converts DC power supplied from a DC power source 33 into AC power supplied to a load 14, and a control unit 20 that controls the power conversion operation of the main circuit unit 10. FIG. 1 illustrates a form in which the main circuit unit 10 converts DC power into three-phase AC power.

[0017] The main circuit section 10 includes a plurality of power semiconductor modules 111 to 116, a plurality of voltage detection units VD1 to VD6, a plurality of gate drive units PD1 to PD6, and a current detection unit 30. The power semiconductor modules 111 to 116 are examples of semiconductor devices for power conversion.

[0018] Figure 1 illustrates an IGBT module in a 1-in-1 package, which incorporates an IGBT chip for one arm of an inverter and a diode chip (FWD chip) connected in antiparallel to it, as a power semiconductor module. IGBT is an abbreviation for Insulated Gate Bipolar Transistor, the IGBT chip is an example of a power semiconductor element, and the FWD chip is an example of a rectifier element. However, the package configuration of the power semiconductor module may be other types of package configurations, such as 6-in-1, and the power semiconductor elements configured in the power semiconductor module may be other types of power semiconductor elements, such as MOSFETs. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0019] Multiple power semiconductor modules 111 to 116 may each have the same configuration, multiple voltage detection units VD1 to VD6 may each have the same configuration, and multiple gate drive units PD1 to PD6 may each have the same configuration.

[0020] The u-phase upper arm power semiconductor module 111 has an IGBT chip Q1 and an FWD chip D1. The power semiconductor module 111 also has a collector terminal C, an emitter terminal E, a gate terminal G, and an auxiliary emitter terminal Es. The collector terminal C is an example of a first terminal, the emitter terminal E is an example of a second terminal, the gate terminal G is an example of a control terminal, and the auxiliary emitter terminal Es is an example of an auxiliary terminal.

[0021] The IGBT chip Q1 is an example of a switching element (semiconductor element) having a collector electrode 11c, an emitter electrode 11e, and a gate electrode 11g. The collector electrode 11c is an example of a first main electrode, the emitter electrode 11e is an example of a second main electrode, and the gate electrode 11g is an example of a control electrode.

[0022] The FWD chip D1 is an example of a rectifier element (semiconductor element) having an anode electrode 11a and a cathode electrode 11k.

[0023] The collector terminal C is electrically connected to the collector electrode 11c and the cathode electrode 11k. The emitter terminal E is electrically connected to the emitter electrode 11e and the anode electrode 11a. The gate terminal G is electrically connected to the gate electrode 11g. The auxiliary emitter terminal Es is electrically connected to the emitter electrode 11e and the anode electrode 11a.

[0024] The u-phase lower arm power semiconductor module 112 has an IGBT chip Q2 and an FWD chip D2. The v-phase upper arm power semiconductor module 113 has an IGBT chip Q3 and an FWD chip D3. The v-phase lower arm power semiconductor module 114 has an IGBT chip Q4 and an FWD chip D4. The w-phase upper arm power semiconductor module 115 has an IGBT chip Q5 and an FWD chip D5. The w-phase lower arm power semiconductor module 116 has an IGBT chip Q6 and an FWD chip D6. Power semiconductor modules 112 to 116 have the same configuration as power semiconductor module 111 described above.

[0025] The gate drive unit PD1 is a circuit that drives the gate electrode 11g of the IGBT chip Q1 according to an on or off switching command S1 supplied from the control unit 20. Similarly, the gate drive units PD2 to PD6 are circuits that drive the gate electrode 11g of the IGBT chips Q2 to Q6 according to on or off switching commands S2 to S6 supplied from the control unit 20, respectively. The gate drive units PD1 to PD6 are drive units that apply a drive voltage to switch the IGBT chips Q1 to Q6 of the power semiconductor modules 111 to 116 between the gate terminal G and the auxiliary emitter terminal Es, according to the switching commands S1 to S6 from the control unit 20.

[0026] Voltage detection circuit VD1 detects the voltage Vce1 between the collector terminal C and emitter terminal E of power semiconductor module 111 and transmits the detected value of Vce1 to control unit 20. Similarly, voltage detection circuits VD2 to VD6 detect the voltages Vce2 to Vce6 between the collector terminal C and emitter terminal E of power semiconductor modules 112 to 116 and transmit the detected values ​​of Vce2 to Vce6 to control unit 20.

[0027] The current detection unit 30 is a current sensor that detects the three-phase alternating currents iu, iv, and iw flowing between the power semiconductor modules 111 to 116 and the load 14, and transmits the detected values ​​of the alternating currents iu, iv, and iw to the control unit 20.

[0028] The control unit 20 is a control device that includes, for example, a processor such as a CPU (Central Processing Unit) and memory. The functions of the control unit 20 are realized by the processor operating according to a program stored in memory. The functions of the control unit 20 may also be realized by an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

[0029] The main circuit unit 10 may also include a heat sink temperature detection unit 80. The heat sink temperature detection unit 80 is a temperature sensor that detects the temperature of a heat sink (e.g., fins, etc.) for cooling the power semiconductor modules 111 to 116 and transmits the detected heat sink temperature Th to the control unit 20.

[0030] Figure 2 shows an example of the configuration of an overheat detection device according to the first embodiment. The overheat detection device 301 shown in Figure 2 determines overheating of the semiconductor device 101. Figure 2 shows, for example, the circuit configuration for one arm of an inverter. In the case of the circuit configuration of the upper arm of the u-phase, the semiconductor device 101 corresponds to, for example, the power semiconductor module 111 described above. Since the circuit configurations of each arm are the same, unless otherwise specified, the upper arm of the u-phase will be used as an example in the following explanation.

[0031] The overheat detection device 301 comprises a semiconductor device 101, a gate drive unit 40, a voltage detection unit 51, a current detection unit 30 (see Figure 1), and a control unit 21.

[0032] The gate drive unit 40 is a drive unit that applies a drive voltage to switch the IGBT chip Q1 of the semiconductor device 101 between the gate terminal G and the auxiliary emitter terminal Es, in accordance with a switching command S from the control unit 21. The gate drive unit 40 corresponds to, for example, the gate drive unit PD1 described above.

[0033] The voltage detection unit 51 detects the voltage Vce between the collector terminal C and the emitter terminal E of the semiconductor device 101 and transmits the detected value of Vce to the control unit 21. The voltage detection unit 51 corresponds to, for example, the voltage detection circuit VD1 described above.

[0034] The control unit 21 generates a switching command S based on the detected values ​​of the AC currents iu, iv, and iw obtained from the current detection unit 30 (Figure 1). The control unit 21 estimates the temperature of the IGBT chip Q1 or FWD chip D1 and performs an overheat determination based on the estimated value. The control unit 21 corresponds to, for example, the control unit 20 (Figure 1) described above, but it may be a different control unit from the control unit 20.

[0035] A current Ic flows through the semiconductor device 101. The sign of the current Ic is determined by, for example, whether it flows from the collector terminal C through the IGBT chip Q1 to the emitter terminal E (positive) or from the emitter terminal E through the FWD chip D1 to the collector terminal C (negative). In the case of an inverter, the control unit 21 can determine the direction in which the current Ic is flowing based on the AC currents iu, iv, and iw obtained from the current detection unit 30 (Figure 1) and the state of the switching command (on or off).

[0036] Figure 3 is a timing chart illustrating the waveforms of each part during the detection operation of the voltage Vce1 when the semiconductor device is energized between both terminals. In the example shown, iu is a sinusoidal current, and the U-phase voltage command is a sinusoidal voltage. The on and off states of the upper and lower arms of the U-phase are determined by the relative magnitudes of the U-phase voltage command and the carrier wave. In the example shown, the control unit 20 outputs a switching command S1 that turns Q1 on and turns Q2 off during periods when the U-phase voltage command is greater than the carrier wave. On the other hand, the control unit 20 outputs a switching command S1 that turns Q1 off and turns Q2 on during periods when the U-phase voltage command is less than the carrier wave.

[0037] When Q1 is on and iu is positive, the same current as iu flows through Q1. When Q2 is off and iu is negative, the same current as iu flows through D1. For example, the detected voltage Vce1 is transmitted as a discrete value from the voltage detection circuit VD1 to the control unit 20, and the detected current iu is transmitted as a discrete value from the current detection unit 30 to the control unit 20. In the example shown in the figure, the sampling timing for voltage Vce1 and current iu is at the bottom of each carrier wave.

[0038] The control unit 20, for example, samples the detected value of Vce1 detected by the voltage detection circuit VD1 at each bottom of the carrier wave. This allows the control unit 20 to obtain the detected value of voltage Vce1 from the voltage detection circuit VD1 in the first energized state when current Ic flows from the collector terminal C to the emitter terminal E through the IGBT chip Q1. The control unit 20 can also obtain the detected value of voltage Vce1 from the voltage detection circuit VD1 in the second energized state when current Ic flows from the emitter terminal E to the collector terminal C through the FWD chip D1.

[0039] The control unit 20, for example, samples the detected current iu from the current detection unit 30 at each bottom of the carrier wave. This allows the control unit 20 to obtain the detected current Ic from the current detection unit 30 when the current Ic flows from the collector terminal C to the emitter terminal E into the IGBT chip Q1 (powered state A). The control unit 20 can also obtain the detected current Ic from the current detection unit 30 when the current Ic flows from the emitter terminal E to the collector terminal C into the FWD chip D1 (powered state B).

[0040] Current-on states A and B are conduction states in which the main current (current Ic in this example) flows between the first main terminal and the second main terminal of the semiconductor device. Current-on state A is an example of the first current-on state in which the current from the first main terminal to the second main terminal of the semiconductor device flows through the switching element. Current-on state B is an example of the second current-on state in which the current from the second main terminal to the first main terminal of the semiconductor device flows through the diode.

[0041] However, the method for detecting the voltage Vce1 between the main terminals when the IGBT chip or the FWD chip connected in antiparallel to it is ON (powered on) is not limited to this.

[0042] Figure 4 is a functional block diagram showing a first example of an overheating detection method performed by the control unit. The functions shown in Figure 4 may be realized solely by hardware resources such as circuits, or by the cooperation of hardware resources and software. The control unit 21 has an estimation unit 61 and a determination unit 62.

[0043] The estimation unit 61 has a relationship (relationship X1) between the voltage Vce in energized state A, the current Ic in energized state A, and the temperature Tj of the IGBT chip Q1. Relationship X1 may be defined by a map or an arithmetic formula. The data for defining relationship X1 is stored in memory in advance.

[0044] The estimation unit 61 estimates the temperature Tj corresponding to the voltage (detected value Vce,det) detected by the voltage detection unit 51 in energized state A and the current (detected value Ic) detected by the current detection unit 30 in energized state A, based on the relationship X1. As a result, even during operation of the semiconductor device 101 where one or both of the voltage Vce and current Ic fluctuate, the estimation unit 61 can accurately estimate the temperature Tj of the IGBT chip Q1 corresponding to any voltage Vce and any current Ic. The estimation unit 61 outputs the estimated value Tj,est of the temperature Tj of the IGBT chip Q1.

[0045] The determination unit 62 determines that the IGBT chip Q1 is overheating if the estimated value Tj,est of the temperature Tj of the IGBT chip Q1 exceeds a predetermined first overheating determination threshold, and issues an alarm to indicate overheating of the IGBT chip Q1. The first overheating determination threshold is set, for example, to the absolute maximum rated temperature of the IGBT chip Q1. Since the determination unit 62 uses the estimated value Tj,est, which is derived with high accuracy by the estimation unit 61 based on the relationship X1, to determine overheating of the IGBT chip Q1, it can accurately determine overheating of the IGBT chip Q1.

[0046] The estimation unit 61 has a relationship (relationship Y1) between the voltage Vce in energized state B, the current Ic in energized state B, and the temperature Tj of the FWD chip D1. Relationship Y1 may be defined by a map or an arithmetic formula. The data for defining relationship Y1 is stored in memory in advance.

[0047] The estimation unit 61 estimates the temperature Tj corresponding to the voltage (detected value Vce,det) detected by the voltage detection unit 51 in energized state B and the current (detected value Ic) detected by the current detection unit 30 in energized state B, based on the relationship Y1. As a result, even during operation of the semiconductor device 101 where one or both of the voltage Vce and current Ic fluctuate, the estimation unit 61 can accurately estimate the temperature Tj of the FWD chip D1 corresponding to any voltage Vce and any current Ic. The estimation unit 61 outputs the estimated value Tj,est of the temperature Tj of the FWD chip D1.

[0048] The determination unit 62 determines that the FWD chip D1 is overheating if the estimated value Tj,est of the temperature Tj of the FWD chip D1 exceeds a predetermined second overheating determination threshold, and issues an alarm to indicate that the FWD chip D1 is overheating. The second overheating determination threshold is set, for example, to the absolute maximum rated temperature of the FWD chip D1. Since the determination unit 62 uses the estimated value Tj,est, which is derived with high accuracy by the estimation unit 61 based on the relationship Y1, to determine if the FWD chip D1 is overheating, it can accurately determine if the FWD chip D1 is overheating.

[0049] The control unit 21 can prevent failure of the semiconductor device 101 by reducing or stopping the output of the power converter 200 upon activation of an overheating alarm for the IGBT chip Q1 or FWD chip D1.

[0050] <Second Embodiment> Figure 5 shows an example of a cross-sectional structure of a semiconductor device according to the second embodiment. In the second embodiment, the explanation of the configuration, operation, and effects similar to those of the above-described embodiment will be omitted or simplified by referring to the above-described explanation. Furthermore, the structure illustrated in Figure 5 is also applicable to the first embodiment.

[0051] The semiconductor device 102 shown in Figure 5 is fixed to a heat sink 1, such as a fin, in contact with thermal grease 2. The thermal grease 2 stabilizes heat dissipation from the semiconductor device 102 to the heat sink 1. The semiconductor device 102 includes a case 7, an insulating substrate 5, a collector terminal E, an emitter terminal E, an auxiliary emitter terminal Es, a gate terminal G, an IGBT chip Q1, an FWD chip D1, and wires 15, 16, 17, and 18.

[0052] Case 7 is a housing that accommodates the components of the semiconductor device 102, and has a base substrate 3 at its bottom. The base substrate 3 supports the components of the semiconductor device 102 on it. The base substrate 3 can be made of a copper (Cu) substrate, an aluminum silicon carbide (Al-SiC) substrate, or the like, which have high heat dissipation properties. Alternatively, the base substrate 3 that constitutes the bottom of Case 7 and the frame that constitutes the sides may be formed separately, and Case 7 may be formed by erecting the frame on the periphery of the base substrate 3.

[0053] Case 7 has a flat lid. The lid is placed on the side of Case 7 and encloses the components of the semiconductor device 102 inside Case 7.

[0054] The insulating substrate 5 is a substrate on which the IGBT chip Q1 and FWD chip D1 are mounted, and can be, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Blazing) substrate. The insulating substrate 5 is fixed onto the base substrate 3 via a bonding material 4 such as solder.

[0055] The insulating substrate 5 includes an insulating layer 5a, a conductor layer 5b, and a wiring layer 5c. The insulating layer 5a is, for example, a ceramic plate. The conductor layer 5b is provided on the lower surface of the insulating layer 5a and is a metal foil formed of, for example, a conductive metal such as copper. The conductor layer 5b is in contact with the base substrate 3 via a bonding material 4 such as solder. The wiring layer 5c is provided on the upper surface of the insulating layer 5a and is a conductor layer formed of, for example, a conductive metal such as copper. The wiring layer 5c includes conductor patterns 5c1, 5c2, 5c3, and 5c4.

[0056] The IGBT chip Q1 is a semiconductor element incorporated into the semiconductor device 102, and is a semiconductor switching element having electrodes on both its front surface 12 and back surface 13. The IGBT chip Q1 may be either a Si semiconductor element or a SiC semiconductor element.

[0057] The IGBT chip Q1 has a front surface 12 on which an emitter electrode 11e and a gate electrode 11g are formed, and a back surface 13 on which a collector electrode 11c is formed. The collector electrode 11c is an example of a first main electrode of the IGBT chip Q1. The emitter electrode 11e is an example of a second main electrode of the IGBT chip Q1. The gate electrode 11g is an example of a control electrode of the IGBT chip Q1. The IGBT chip Q1 is fixed on the insulating substrate 5 on its back surface 13 by joining the collector electrode 11c to the conductor pattern 5c4 with a bonding material 6 such as solder.

[0058] The FWD chip D1 is a semiconductor element incorporated into the semiconductor device 102, and is a semiconductor diode element having electrodes on both its front surface 8 and back surface 9. The FWD chip D1 may be either a Si semiconductor element or a SiC semiconductor element.

[0059] The FWD chip D1 has a front surface 8 on which the anode electrode 11a is formed, and a back surface 9 on which the cathode electrode 11k is formed. The FWD chip D1 is fixed onto the insulating substrate 5 on the back surface 9 by bonding the cathode electrode 11k to the conductor pattern 5c4 with a bonding material 6 such as solder. The cathode electrode 11k is electrically connected to the collector electrode 11c by the conductor pattern 5c4.

[0060] The collector terminal C, emitter terminal E, gate terminal G, and auxiliary emitter terminal Es are external terminals for connecting the semiconductor device 102 to the outside. Each of these external terminals is formed into a cylindrical or flat shape using a conductive metal such as copper or aluminum.

[0061] The collector terminal C is a main terminal erected on the conductor pattern 5c4. The collector terminal C is electrically connected to the collector electrode 11c and the cathode electrode 11k via the conductor pattern 5c4.

[0062] The emitter terminal E is a main terminal erected on the conductor pattern 5c1. The emitter terminal E is electrically connected to the emitter electrode 11e via the conductor pattern 5c1 and wire 15, and is electrically connected to the anode electrode 11a via wire 18.

[0063] The gate terminal G is a control terminal erected on the conductor pattern 5c3. The gate terminal G is electrically connected to the gate electrode 11g via the conductor pattern 5c3 and the wire 17.

[0064] The auxiliary emitter terminal Es is an auxiliary terminal for gate driving, erected on the conductor pattern 5c2. The auxiliary emitter terminal Es is electrically connected to the emitter electrode 11e via the conductor pattern 5c2 and wire 16.

[0065] Wires 15-18 are bonding wires formed with a diameter of 300-500 μm using conductive metals such as copper and aluminum, or conductive alloys such as iron-aluminum alloy. Wire 15 is one or more (e.g., four) linear members that connect the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, to the conductor pattern 5c1. Wire 16 is one or more (e.g., one) linear member that connects the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, to the conductor pattern 5c2. Wire 17 is one or more (e.g., one) linear member that connects the gate electrode 11g, which is the surface electrode of the IGBT chip Q1, to the conductor pattern 5c3. Wire 18 is one or more (e.g., four) linear members that connect the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, to the anode electrode 11a, which is the surface electrode of the FWD chip D1. Wire 15 is an example of a first wire or main wire. Wire 16 is an example of a second wire or auxiliary wire.

[0066] Current Ic flows through wires 15 and 18, but not through wires 16 and 17. Current Ic flowing from collector terminal C into semiconductor device 102 flows to collector electrode 11c via conductor pattern 5c4 and bonding material 6, and passes through IGBT chip Q1. Then, current Ic output from emitter electrode e flows to emitter terminal E via wire 15 and conductor pattern 5c1. Conversely, current Ic flowing from emitter terminal E into semiconductor device 102 flows to anode electrode 11a via conductor pattern 5c1 and wires 15 and 18, and passes through FWD chip D1. Then, current Ic output from cathode electrode 11k flows to collector electrode C via bonding material 6 and conductor pattern 5c4.

[0067] The IGBT chip Q1 and FWD chip D1 are thermally connected in the following sequence: bonding material 6, insulating substrate 5, bonding material 4, base substrate 3, thermal grease 2, and heat sink 1, respectively. Each chip is cooled by heat dissipation from the heat sink 1 into the ambient air.

[0068] The semiconductor device 102 is known to degrade due to repeated heat generation caused by the current flowing through each chip and switching. Main areas of degradation include the wire connections between wires and chips or wiring patterns, and the solder and other bonding materials 4 and 6 beneath the chips. Degradation of the wire connections primarily increases electrical resistance, while degradation of the solder and other bonding materials beneath the chips primarily increases thermal resistance. The thermal grease 2 degrades with temperature changes in the semiconductor device 102 or the heat sink 1. Degradation of the thermal grease 2 increases thermal resistance. The heat sink 1 also experiences increased thermal resistance due to factors such as fin clogging and fan failure.

[0069] Figure 6 is a diagram showing an example of the configuration of an overheat detection device according to the second embodiment. The overheat detection device 302 shown in Figure 6 determines overheating of the semiconductor device 102. Figure 6 shows, for example, the circuit configuration for one arm of an inverter. In the second embodiment, the description of the same configuration, operation, and effect as in the above embodiment will be omitted or simplified by referring to the above description. Figure 6 shows the electrical resistance component Rs of the bonding material 6 (see Figure 5) between the collector terminal C and the collector electrode 11c, and the electrical resistance component Rw including the wire 15 (see Figure 5) between the emitter terminal E and the emitter electrode 11e.

[0070] When the electrical resistance component Rw of the wire 15 joint increases due to deterioration caused by thermal stress, the detected value Vce,det of the voltage Vce between the collector terminal C and the emitter terminal E increases. As a result, if the chip temperature Tj is directly estimated from Vce,det, the accuracy of the temperature Tj estimation decreases. The overheating detection device 302 according to the second embodiment suppresses the decrease in the accuracy of temperature Tj estimation due to deterioration of the wire joint (increase in electrical resistance component Rw) and accurately determines overheating of the semiconductor device.

[0071] The overheat detection device 302 shown in Figure 6 comprises a semiconductor device 102, a gate drive unit 40, a voltage detection unit 52, a current detection unit 30 (see Figure 1), and a control unit 22.

[0072] The voltage detection unit 52 detects the voltage Vce between the collector terminal C and the emitter terminal E, and the voltage Vee between the auxiliary emitter terminal Es and the emitter terminal E, and transmits the detected values ​​of Vce and Vee to the control unit 22. Voltage Vce is an example of a first voltage between the first main terminal and the second main terminal. Voltage Vee is an example of a second voltage between the auxiliary terminal and the second main terminal.

[0073] Figure 7 is a functional block diagram showing a second example of an overheating detection method performed by the control unit. The functions shown in Figure 7 may be realized solely by hardware resources such as circuits, or by the cooperation of hardware resources and software. The control unit 22 has an estimation unit 63 and a determination unit 62.

[0074] The estimation unit 63 has a relationship (relationship X2) between the differential voltage (Vce-Vee) in energized state A, the current Ic in energized state A, and the temperature Tj of the IGBT chip Q1. The differential voltage (Vce-Vee) in energized state A represents the value obtained by subtracting the voltage Vee in energized state A from the voltage Vce in energized state A. Relationship X2 may be defined by a map or an arithmetic formula. The data for defining relationship X2 is stored in memory in advance.

[0075] The estimation unit 63 calculates the detected differential voltage (Vce,det-Vee,det) in energized state A by subtracting the voltage detected by the voltage detection unit 52 in energized state A (Vee,det) from the voltage detected by the voltage detection unit 52 in energized state A (Vce,det). Based on relationship X2, the estimation unit 63 estimates the temperature Tj corresponding to the detected differential voltage (Vce,det-Vee,det) in energized state A and the current detected by the current detection unit 30 in energized state A (Ic). As a result, even during operation of the semiconductor device 101 where one or both of the voltage Vce and current Ic fluctuate, the estimation unit 63 can accurately estimate the temperature Tj of the IGBT chip Q1 corresponding to any voltage Vce and any current Ic. Furthermore, the estimation unit 63 can suppress the decrease in accuracy of the temperature Tj due to changes in the electrical resistance component Rw by utilizing the differential voltage (Vce-Vee) and its detected value (Vce,det-Vee,det) in energized state A. The estimation unit 63 outputs an estimated value Tj,est of the temperature Tj of the IGBT chip Q1.

[0076] The determination unit 62 uses the estimated values ​​Tj,est, which are highly accurate and derived by the estimation unit 63 based on the relationship X2, to determine if the IGBT chip Q1 is overheating, thus enabling accurate determination of overheating of the IGBT chip Q1.

[0077] The estimation unit 63 has a relationship (relationship Y2) between the differential voltage (Vce-Vee) in energized state B, the current Ic in energized state B, and the temperature Tj of the FWD chip D1. The differential voltage (Vce-Vee) in energized state B represents the value obtained by subtracting the voltage Vee in energized state B from the voltage Vce in energized state B. Relationship Y2 may be defined by a map or an arithmetic formula. Data for defining relationship Y2 is stored in memory in advance.

[0078] The estimation unit 63 calculates the detected differential voltage (Vce,det-Vee,det) in energized state B by subtracting the voltage detected by the voltage detection unit 52 in energized state B (Vee,det) from the voltage detected by the voltage detection unit 52 in energized state B (Vce,det). Based on the relationship Y2, the estimation unit 63 estimates the temperature Tj corresponding to the detected differential voltage (Vce,det-Vee,det) in energized state B and the current detected by the current detection unit 30 in energized state B (Ic). As a result, even during operation of the semiconductor device 102 where one or both of the voltage Vce and current Ic fluctuate, the estimation unit 63 can accurately estimate the temperature Tj of the FWD chip D1 corresponding to any voltage Vce and any current Ic. Furthermore, the estimation unit 63 can suppress the decrease in accuracy of the temperature Tj due to changes in the electrical resistance component Rw by utilizing the differential voltage (Vce-Vee) and its detected value (Vce,det-Vee,det) in the energized state B. The estimation unit 63 outputs the estimated value Tj,est of the temperature Tj of the FWD chip D1.

[0079] The determination unit 62 uses the estimated values ​​Tj,est, which are highly accurate in determining whether the FWD chip D1 is overheating, based on the relationship Y2, derived by the estimation unit 63, to determine whether the FWD chip D1 is overheating.

[0080] <Third Embodiment> Figure 8 shows an example of the configuration of an overheat detection device according to the third embodiment. The overheat detection device 303 shown in Figure 8 determines overheating of the semiconductor device 102. Figure 8 shows, for example, the circuit configuration for one arm of an inverter. In the third embodiment, the description of the same configuration, operation, and effect as in the above-described embodiment will be omitted or simplified by referring to the above-described explanation.

[0081] In the second embodiment, the voltage detection unit 52 detects the voltage Vce between the collector terminal C and the emitter terminal E when the semiconductor device 102 is ON, and the voltage Vee between the auxiliary emitter terminal Es and the emitter terminal E when the semiconductor device 102 is ON. The control unit 22 then estimates the chip temperature based on the difference between the detected voltage Vce and the detected voltage Vee. On the other hand, in the third embodiment, the voltage detection unit 53 directly detects the voltage Vces between the collector terminal C and the auxiliary emitter terminal Es when the semiconductor device 102 is ON. The control unit 23 then estimates the chip temperature based on the detected voltage Vces using the same algorithm as in the second embodiment.

[0082] The overheat detection device 303 shown in Figure 8 comprises a semiconductor device 102, a gate drive unit 40, a voltage detection unit 53, a current detection unit 30 (see Figure 1), and a control unit 23.

[0083] The voltage detection unit 53 detects the voltage Vces between the collector terminal C and the auxiliary emitter terminal Es, and transmits the detected value of Vces to the control unit 23. The voltage Vces is an example of a third voltage between the first main terminal and the auxiliary terminal.

[0084] Figure 9 is a functional block diagram showing a third example of an overheating detection method performed by the control unit. The functions shown in Figure 9 may be realized solely by hardware resources such as circuits, or by the cooperation of hardware resources and software. The control unit 23 has an estimation unit 64 and a determination unit 62.

[0085] The estimation unit 64 has a relationship (relationship X3) between the voltage Vces in energized state A, the current Ic in energized state A, and the temperature Tj of the IGBT chip Q1. Relationship X3 may be defined by a map or an arithmetic formula. The data for defining relationship X3 is stored in memory in advance.

[0086] The estimation unit 64 estimates the temperature Tj corresponding to the voltage (detected value Vces,det) detected by the voltage detection unit 53 in energized state A and the current (detected value Ic) detected by the current detection unit 30 in energized state A, based on the relationship X3. As a result, even during operation of the semiconductor device 102 where one or both of the voltage Vce and current Ic fluctuate, the estimation unit 64 can accurately estimate the temperature Tj of the IGBT chip Q1 corresponding to any voltage Vce and any current Ic. Furthermore, by utilizing the voltage Vces and its detected value (Vces,det) in energized state A, the estimation unit 64 can suppress the decrease in accuracy of the temperature Tj due to changes in the electrical resistance component Rw. The estimation unit 64 outputs the estimated value Tj,est of the temperature Tj of the IGBT chip Q1.

[0087] The determination unit 62 uses the estimated values ​​Tj,est, which are highly accurate and derived by the estimation unit 64 based on the relationship X3, to determine if the IGBT chip Q1 is overheating, thus enabling accurate determination of overheating of the IGBT chip Q1.

[0088] The estimation unit 64 has a relationship (relationship Y3) between the voltage Vces in energized state B, the current Ic in energized state B, and the temperature Tj of the FWD chip D1. Relationship Y3 may be defined by a map or an arithmetic formula. The data for defining relationship Y3 is stored in memory in advance.

[0089] The estimation unit 64 estimates the temperature Tj corresponding to the voltage (detected value Vces,det) detected by the voltage detection unit 53 in energized state B and the current (detected value Ic) detected by the current detection unit 30 in energized state B, based on the relationship Y3. As a result, even during operation of the semiconductor device 102 where one or both of the voltage Vce and current Ic fluctuate, the estimation unit 64 can accurately estimate the temperature Tj of the FWD chip D1 corresponding to any voltage Vce and any current Ic. Furthermore, by using the voltage Vces and its detected value Vces,det in energized state B, the estimation unit 64 can suppress the decrease in accuracy of the temperature Tj due to changes in the electrical resistance component Rw. The estimation unit 64 outputs the estimated value Tj,est of the temperature Tj of the FWD chip D1.

[0090] The determination unit 62 uses the estimated values ​​Tj,est, which are highly accurate and derived by the estimation unit 64 based on the relationship Y3, to determine if the FWD chip D1 is overheating, thus enabling accurate determination of overheating of the FWD chip D1.

[0091] Although embodiments have been described above, the present invention is not limited to the embodiments described above. Various modifications and improvements are possible, such as combinations or substitutions with some or all of the other embodiments.

[0092] For example, the semiconductor element is not limited to power transistors such as IGBTs, but can also be a diode, thyristor, gate turn-off thyristor, triac, etc. [Explanation of Symbols]

[0093] 1 Heatsink 2 Thermal grease 3 Base board 4,6 Bonding material 5. Insulating substrate 7 cases 8 surface 9 Back side 10 Main circuit section 11a Anode electrode 11c collector electrode 11e Emitter electrode 11g gate 11k cathode electrode 12 Surface 13 Back side 14 load 15-18 wires 20, 21, 22, 23 Control Unit 30 Current detection unit 33 Power supply 40 Gate drive unit 51, 52, 53 Voltage detection unit 61,63,64 Estimation part 62 Judgment section 101,102 Semiconductor equipment 111-116 Power semiconductor modules 200 Power converter 301,302,303 Overheating determination device C Collector terminal E emitter terminal Es auxiliary emitter terminal G gate terminal

Claims

1. A semiconductor element having a first main electrode and a second main electrode, and a semiconductor device having a first terminal electrically connected to the first main electrode and a second terminal electrically connected to the second main electrode, A voltage detection unit that detects the voltage between the first terminal and the second terminal, A current detection unit for detecting the current flowing between the two terminals, The semiconductor device comprises a control unit for controlling the switching of the semiconductor device, The second terminal includes a main terminal electrically connected to the second main electrode via a first wire, and an auxiliary terminal electrically connected to the second main electrode via a second wire. The voltage detection unit detects a first voltage between the first terminal and the main terminal, and a second voltage between the auxiliary terminal and the main terminal. The current detection unit detects the main current flowing between the first terminal and the main terminal. The control unit estimates the temperature corresponding to the difference voltage between the first voltage detected by the voltage detection unit in the conduction state and the second voltage detected by the voltage detection unit in the conduction state, and the main current detected by the current detection unit in the conduction state, based on the relationship between the first voltage detected by the voltage detection unit in the conduction state and the second voltage detected by the voltage detection unit in the conduction state, and the temperature of the semiconductor element, and determines that the semiconductor element is overheating when the estimated temperature exceeds a predetermined threshold.

2. The semiconductor device has a control terminal that is electrically connected to the control electrode of the semiconductor element. The power conversion device according to claim 1, further comprising a drive unit that applies a drive voltage between the control terminal and the auxiliary terminal to switch the semiconductor device in accordance with a command from the control unit.

3. The semiconductor element includes a switching element and a diode connected in antiparallel to the switching element. When the state in which the current flows from the first terminal to the second terminal through the switching element is defined as the first energized state, and the state in which the current flows from the second terminal to the first terminal through the diode is defined as the second energized state, The control unit, Based on the relationship between the voltage in the first energized state, the current in the first energized state, and the temperature of the switching element, the voltage detection unit estimates the temperature of the switching element corresponding to the voltage detected in the first energized state and the current detection unit estimates the temperature of the switching element corresponding to the voltage detected in the first energized state. If the estimated temperature of the switching element exceeds a predetermined first threshold, it is determined that the switching element is overheating. The power conversion device according to claim 1 or 2, wherein, based on the relationship between the voltage in the second energized state, the current in the second energized state, and the temperature of the diode, the voltage detection unit estimates the temperature of the diode corresponding to the voltage detected in the second energized state and the current detected in the second energized state by the current detection unit, and if the estimated value of the diode temperature exceeds a predetermined second threshold, it is determined that the diode is overheating.

4. A semiconductor element having a first main electrode and a second main electrode, and a semiconductor device having a first terminal electrically connected to the first main electrode and a second terminal electrically connected to the second main electrode, A voltage detection unit that detects the voltage between the first terminal and the second terminal, A current detection unit for detecting the current flowing between the two terminals, An estimation unit for estimating the temperature of the semiconductor device, The system includes a determination unit that determines that the semiconductor element is overheating when the estimated temperature exceeds a predetermined threshold. The second terminal includes a main terminal electrically connected to the second main electrode via a first wire, and an auxiliary terminal electrically connected to the second main electrode via a second wire. The voltage detection unit detects a first voltage between the first terminal and the main terminal, and a second voltage between the auxiliary terminal and the main terminal. The current detection unit detects the main current flowing between the first terminal and the main terminal. An overheating detection device in which the estimation unit estimates the temperature corresponding to the difference voltage between the first voltage detected by the voltage detection unit in the conduction state and the second voltage detected by the voltage detection unit in the conduction state, and the main current detected by the current detection unit in the conduction state, based on the relationship between the difference voltage between the first voltage detected by the voltage detection unit in the conduction state and the second voltage detected by the voltage detection unit in the conduction state, and the temperature of the semiconductor element.

5. A method for determining overheating of a semiconductor device having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode, The second terminal includes a main terminal electrically connected to the second main electrode via a first wire, and an auxiliary terminal electrically connected to the second main electrode via a second wire. The voltage detection unit detects a first voltage between the first terminal and the main terminal, and a second voltage between the auxiliary terminal and the main terminal. The current detection unit detects the main current flowing between the first terminal and the main terminal. The estimation unit estimates the temperature corresponding to the difference voltage between the first voltage detected by the voltage detection unit in the conduction state and the second voltage detected by the voltage detection unit in the conduction state, and the main current detected by the current detection unit in the conduction state, based on the relationship between the first voltage detected by the voltage detection unit in the conduction state and the second voltage detected by the voltage detection unit in the conduction state, and the temperature of the semiconductor element. The determination unit determines that the semiconductor element is overheated when the estimated temperature exceeds a predetermined threshold, and this is an overheating determination method.

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