Substrate support and substrate processing device

Abstract

Provided is a substrate support arranged inside a plasma processing chamber, the substrate support comprising a base that is electrically connected to at least one power supply, a first dielectric part that is arranged on the base and that has a substrate support surface, and a second dielectric part that is arranged on the base so as to surround the first dielectric part and that has a ring support surface, the first dielectric part having incorporated therein a first heat-conducting-gas diffusion space, a first electrode arranged above the first heat-conducting-gas diffusion space, and an electroconductive section that is electrically connected to the first electrode and to the base, and the second dielectric part having incorporated therein a second heat-conducting-gas diffusion space, and a second electrode that is arranged above the second heat-conducting-gas diffusion space and that is electrically connected to a power supply for outputting a voltage in common with the base.

Description

Substrate support and substrate processing apparatus

[0001] The present disclosure relates to a substrate support and a substrate processing apparatus.

[0002] Patent Document 1 discloses a mounting table having a substrate mounting surface on which a substrate is mounted and an edge ring mounting surface on which an edge ring is mounted. A gas supply pipe is provided inside the mounting table described in Patent Document 1, and a heat transfer gas such as helium gas is supplied between the back surface of the substrate and the substrate mounting surface, and between the back surface of the edge ring and the edge ring mounting surface, via this gas supply pipe.

[0003] Japan Patent Publication No. 2021-141277

[0004] The technology according to the present disclosure suppresses the occurrence of abnormal discharge in the gas diffusion space formed inside the substrate support part during plasma processing of the substrate.

[0005] One aspect of the present disclosure is a substrate support comprising: a base electrically connected to at least one power source; a first dielectric portion disposed on the base and having a substrate support surface; and a second dielectric portion disposed on the base surrounding the first dielectric portion and having a ring support surface, wherein the first dielectric portion has therein a first heat transfer gas diffusion space that supplies heat transfer gas toward the substrate support surface, a first electrode disposed above the first heat transfer gas diffusion space so as to vertically overlap at least a portion of the first heat transfer gas diffusion space, and a conductive portion electrically connecting the first electrode to the base; and the second dielectric portion has therein a second heat transfer gas diffusion space that supplies heat transfer gas toward the ring support surface, and a second electrode disposed above the second heat transfer gas diffusion space so as to vertically overlap at least a portion of the second heat transfer gas diffusion space, and is electrically connected to a power source that outputs a voltage common to the base.

[0006] According to the present disclosure, it is possible to suppress the occurrence of abnormal discharge in the gas diffusion space formed inside the substrate support part during plasma processing of the substrate.

[0007] FIG. 1 is a diagram for explaining a configuration example of a plasma processing system. FIG. 2 is a block diagram of a computer on which various embodiments can be implemented. FIG. 3 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus. FIG. 4 is a cross-sectional view showing an outline of the configuration of a substrate support part according to an embodiment. FIG. 5 is an explanatory diagram of electrostatic capacitance in a substrate support part of a conventional structure. FIG. 6 is an explanatory diagram of electrostatic capacitance in a substrate support part according to an embodiment.

[0008] In the manufacturing process of semiconductor devices, various plasma processes such as etching, film formation, diffusion, etc. are performed on a semiconductor substrate (hereinafter simply referred to as "substrate") supported on a substrate support in a chamber. In these plasma processes, it is important to appropriately control the substrate temperature during processing in order to obtain processing results with high in-plane uniformity for the substrate being processed.

[0009] The substrate temperature during plasma processing is controlled, for example, by forming a gas supply space inside a substrate support part that supports the substrate to be processed and supplying a heat transfer gas between the back surface of the substrate and the substrate support surface.

[0010] However, when a gas supply space is formed inside the substrate support part in this manner, a potential difference occurs within the gas supply space when high-frequency power is applied to the substrate support part during plasma processing, which may result in abnormal discharge in the gas supply space.

[0011] The technology disclosed herein has been made in consideration of the above circumstances, and suppresses the occurrence of abnormal discharge in a gas diffusion space formed inside a substrate support during plasma processing of a substrate. Hereinafter, a substrate processing apparatus and a substrate support according to this embodiment will be described with reference to the drawings. Note that in this specification and the drawings, elements having substantially the same functional configuration are designated by the same reference numerals, and redundant description will be omitted.

[0012] <Plasma Processing System> First, a plasma processing system according to one embodiment will be described with reference to Fig. 1. Fig. 1 is a diagram for explaining an example of the configuration of the plasma processing system.

[0013] In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 (described later), and the gas exhaust port is connected to an exhaust system 40 (described later). The substrate support 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate and a ring support surface for supporting an edge ring.

[0014] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma generated in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), or surface wave plasma (SWP). Various types of plasma generators may be used, including alternating current (AC) plasma generators and direct current (DC) plasma generators. In one embodiment, the AC signal (AC power) used in the AC plasma generator has a frequency in the range of 100 kHz to 10 GHz. Thus, AC signals include radio frequency (RF) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0015] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 may be implemented by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and execute the read program to perform various control operations. This program may be stored in the storage unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a RAM (Random Access Memory), a ROM (Read Only Memory), a HDD (Hard Disk Drive), a SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network). The storage medium may be temporary or non-temporary.

[0016] Controller or Control Circuitry: Figure 2 is a block diagram of a computer that may implement various embodiments described herein. The control aspects of the present disclosure may be embodied as a system, method, and / or computer program product. The computer program product may include a computer-readable storage medium having computer-readable program instructions recorded thereon, where one or more processors may perform aspects of the embodiments.

[0017] A computer-readable storage medium may be a tangible device capable of storing instructions for use by an instruction execution device (processor). Examples of computer-readable storage media include, but are not limited to, electronic, magnetic, optical, electromagnetic, and semiconductor storage devices, or any suitable combination of these devices. A non-exhaustive list of more specific examples of computer-readable storage media (and suitable combinations) includes each of the following: floppy disks, hard disks, solid-state drives (SSDs), random access memory (RAM), read-only memory (ROM), programmable read-only memory (EPROM or flash), static random access memory (SRAM), compact disks (CDs or CD-ROMs), digital versatile disks (DVDs), and memory cards or sticks. Computer-readable storage media, as used in this disclosure, should not be construed as being transitory signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through a fiber optic cable), or electrical signals passing through electrical wires.

[0018] The computer-readable program instructions described in this disclosure can be downloaded to a suitable computing or processing device from a computer-readable storage medium or to an external computer or external storage device via a global network (i.e., the Internet), a local area network, a wide area network, and / or a wireless network. The network may include copper wire, fiber optics, wireless transmissions, routers, firewalls, switches, gateway computers, and edge servers. A network adapter card or network interface of each computing or processing device may receive the computer-readable program instructions from the network and transfer the computer-readable program instructions for storage in a computer-readable storage medium within the computing or processing device.

[0019] Computer-readable program instructions for carrying out the operations of the present disclosure include machine language instructions and / or microcode, and may be compiled or interpreted from source code written in any combination of one or more programming languages, including assembly language, Basic, Fortran, Java, Python, R, C, C++, C#, or similar programming languages. The computer-readable program instructions may execute entirely on a user's personal computer, notebook computer, tablet, or smartphone, or entirely on a remote computer or computer server, or any combination of these computing devices. The remote computer or computer server may be connected to the user's device or devices via a computer network, including a local area network, a wide area network, or a global network (e.g., the Internet). In some embodiments, electronic circuitry, including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), executes the computer-readable program instructions using information from the computer-readable program instructions to configure or customize the electronic circuitry to carry out aspects of the present disclosure.

[0020] Aspects of the present disclosure are described with reference to flow diagrams and block diagrams of methods, apparatus (systems), and computer program products according to the disclosed embodiments. Those skilled in the art will understand that each block of the flow diagrams and block diagrams, and combinations of blocks in the flow diagrams and block diagrams, can be implemented by computer-readable program instructions.

[0021] Computer-readable program instructions capable of implementing the systems and methods described in this disclosure may be provided to one or more processors (and / or one or more cores within a processor) of a general-purpose computer, special-purpose computer, or other programmable device. These computer-readable program instructions may be stored on a computer-readable storage medium that can direct a computer, programmable device, and / or other device to function in a particular manner, in which case the computer-readable storage medium storing the instructions is an article of manufacture containing instructions that implement aspects of the functionality specified in the flow diagrams and block diagrams of this disclosure.

[0022] The computer-readable program instructions may also be loaded into a computer, other programmable device, or other apparatus, and the instructions, when executed on the computer, other programmable device, or other apparatus, may cause a series of operational steps to be performed to produce a computer-implemented process such that the functions specified in the flow diagrams and block diagrams of this disclosure are implemented.

[0023] 2 is a functional block diagram illustrating a networked system 800 of one or more networked computers and servers. In one embodiment, the hardware and software environment illustrated in FIG. 2 may provide an exemplary platform for implementation of software and / or methods according to the present disclosure.

[0024] As shown in Figure 2, networked system 800 may include, but is not limited to, a computer 805, a network 810, a remote computer 815, a web server 820, a cloud storage server 825, and a computer server 830. In some embodiments, multiple instances of one or more of the functional blocks shown in Figure 2 may be employed.

[0025] Additional details of computer 805 are shown in Figure 2. The functional blocks shown in computer 805 are provided only to establish example functionality and are not intended to be exhaustive. Also, although details are not provided for remote computer 815, web server 820, cloud storage server 825, and computer server 830, these other computers and devices may have similar functionality shown for computer 805.

[0026] The computer 805 can be a personal computer (PC), a desktop computer, a laptop computer, a tablet computer, a netbook computer, a personal digital assistant (PDA), a smartphone, or any other programmable electronic device capable of communicating with other devices on the network 810.

[0027] Computer 805 may include a processor 835, a bus 837, memory 840, non-volatile storage 845, a network interface 850, a peripherals interface 855, and a display interface 865. Each of these functions may, in some embodiments, be implemented as an individual electronic subsystem (an integrated circuit chip or combination of chips and associated devices), or in other embodiments, some combination of functions may be implemented on a single chip (sometimes called a system on a chip, or SoC).

[0028] Processor 835 may be one or more single or multi-chip microprocessors, such as those designed and / or manufactured by Intel Corporation, Advanced Micro Devices, Inc. (AMD), ARM Holdings, Inc. (ARM), Apple Computer, etc. Examples of microprocessors include Intel's Celeron, Pentium, Core i3, Core i5, and Core i7, AMD's Opteron, Phenom, Athlon, Turion, and Ryzen, and ARM's Cortex-A, Cortex-R, and Cortex-M.

[0029] Bus 837 may be a proprietary standard high-speed parallel or serial peripheral interconnect bus such as ISA, PCI, PCI Express (PCI-e), AGP, or the like.

[0030] The memory 840 and the non-volatile storage 845 may be computer-readable storage media. The memory 840 may include any suitable volatile storage device, such as dynamic random access memory (DRAM) and static random access memory (SRAM). The non-volatile storage 845 may include one or more of a floppy disk, a hard disk, a solid-state drive (SSD), a read-only memory (ROM), a programmable read-only memory (EPROM or Flash), a compact disk (CD or CD-ROM), a digital versatile disk (DVD), and a memory card or stick.

[0031] Program 848 may be a collection of machine-readable instructions and / or data stored in non-volatile storage 845 and used to create, manage, and control certain software functions described in detail elsewhere in this disclosure and illustrated in the figures. In some embodiments, memory 840 may be significantly faster than non-volatile storage 845. In such embodiments, program 848 may be transferred from non-volatile storage 845 to memory 840 before being executed by processor 835.

[0032] Computer 805 can communicate and interact with other computers over network 810 via network interface 850. Network 810 may include, for example, a local area network (LAN), a wide area network (WAN) such as the Internet, or a combination of both, wired, wireless, or fiber optic connections. In general, network 810 can be any combination of connections and protocols that support communication between two or more computers and associated devices.

[0033] The peripheral interface 855 may enable input and output of data to and from the computer 805 and other devices that may be locally connected. For example, the peripheral interface 855 may provide a connection to external devices 860. The external devices 860 may include devices such as a keyboard, a mouse, a keypad, a touchscreen, and / or other suitable input devices. The external devices 860 may also include portable computer-readable storage media, such as thumb drives, portable optical or magnetic disks, and memory cards. Software and data used in embodiments of the present disclosure may be stored, for example, in the program 848, portable computer-readable storage media, or the like. In such embodiments, software may be loaded into the non-volatile storage 845 or, alternatively, directly into the memory 840 via the peripheral interface 855. The peripheral interface 855 may connect to the external devices 860 using industry-standard connections, such as RS-232 or Universal Serial Bus (USB).

[0034] Display interface 865 may connect computer 805 to a display 870. Display 870 may be used in some embodiments to present a command line or graphical user interface to a user of computer 805. Display interface 865 may connect to display 870 using one or more proprietary connections or industry standard connections such as VGA, DVI, DisplayPort, HDMI, etc.

[0035] As noted above, network interface 850 provides for communication with other computing and storage systems or devices external to computer 805. Software programs and data described herein may be downloaded to non-volatile storage 845 via network interface 850 and network 810 from, for example, remote computer 815, web server 820, cloud storage server 825, and computer server 830. Additionally, the systems and methods described in this disclosure may be performed by one or more computers connected to computer 805 via network interface 850 and network 810. For example, in some embodiments, the systems and methods described in this disclosure may be performed by remote computer 815, computer server 830, or a combination of interconnected computers on network 810.

[0036] Data, datasets and / or databases used in embodiments of the implementation of the systems and methods described in this disclosure may be stored or downloaded from a remote computer 815, a web server 820, a cloud storage server 825 and a computer server 830.

[0037] <Plasma Processing Apparatus> Next, a configuration example of a capacitively coupled plasma processing apparatus 1 will be described as an example of the above-mentioned plasma processing apparatus 1. FIG.

[0038] The plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11, which is an example of a substrate support, and a gas inlet unit. The substrate support 11 is disposed within the plasma processing chamber 10. The gas inlet unit is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet unit includes a showerhead 13. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. Inside the plasma processing chamber 10, a plasma processing space 10s is defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0039] The substrate support 11 includes a main body 110 and a ring assembly 120. The main body 110 has a central region 110a for supporting a substrate W and an annular region 110b for supporting the ring assembly 120. A wafer is an example of a substrate W. The annular region 110b of the main body 110 surrounds the central region 110a of the main body 110 in a plan view. The substrate W is disposed on the central region 110a of the main body 110, and the ring assembly 120 is disposed on the annular region 110b of the main body 110 so as to surround the substrate W on the central region 110a of the main body 110. Therefore, the central region 110a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 110b is also referred to as a ring support surface for supporting the ring assembly 120.

[0040] In one embodiment, the main body 110 includes a conductive base 111 , an electrostatic chuck 112 and an annular electrostatic chuck 113 .

[0041] The conductive base 111 includes a conductive member such as aluminum and has a generally circular plate shape. The conductive member of the conductive base 111 can function as a lower electrode. The electrostatic chuck 112 is disposed on the conductive base 111. The electrostatic chuck 112 includes a ceramic member 112a, a plurality of electrodes 114 disposed within the ceramic member 112a, and a heat transfer gas supply unit 115 formed within the ceramic member 112a (see FIG. 4). The ceramic member 112a has a central region 110a. The annular electrostatic chuck 113 is disposed on the conductive base 111 to surround the electrostatic chuck 112. The annular electrostatic chuck 113 includes a ceramic member 113a, a plurality of electrodes 116 disposed within the ceramic member 113a, and a heat transfer gas supply unit 117 formed within the ceramic member 113a (see FIG. 4). The ceramic member 113a has an annular region 110b. The annular electrostatic chuck 113 may be formed integrally with the electrostatic chuck 112 on the conductive base 111 as shown, or may be formed independently (separately).

[0042] At least one RF / DC electrode coupled to an RF power supply 31 and / or a DC power supply 32, which will be described later, may be disposed within the ceramic members 112a and 113a. The at least one RF / DC electrode may correspond to the plurality of electrodes 114 and the plurality of electrodes 116 described above. In this case, the at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or a DC signal, which will be described later, is supplied to the at least one RF / DC electrode, the RF / DC electrode is also called a bias electrode. Note that the conductive member of the conductive base 111 and the at least one RF / DC electrode may function as the plurality of lower electrodes. Alternatively, an electrostatic electrode may function as the lower electrode. Thus, the substrate support 11 includes at least one lower electrode.

[0043] The ring assembly 120 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings. The one or more annular members may also include at least one cover ring. The edge rings are formed of a conductive material or an insulating material, and the cover rings are formed of an insulating material. The ring assembly 120 may be disposed over the annular electrostatic chuck 113, or may be disposed over both the electrostatic chuck 112 and the annular electrostatic chuck 113.

[0044] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 112, the annular electrostatic chuck 113, the ring assembly 120, and the substrate W to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow path 111a, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 111a. In one embodiment, the flow path 111a is formed in the conductive base 111, and one or more heaters are disposed in the ceramic members 112a, 113a of the electrostatic chuck 112 and the annular electrostatic chuck 113. However, the configuration of the temperature adjustment module is not limited thereto, and it may be configured to adjust the temperature of at least one of the electrostatic chuck 112, the annular electrostatic chuck 113, the ring assembly 120, and the substrate W.

[0045] The detailed configuration of the substrate support portion 11 will be described later.

[0046] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0047] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

[0048] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This causes a plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generating unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, thereby attracting ions in the formed plasma to the substrate W.

[0049] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0050] The second RF generator 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0051] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to the at least one lower electrode and configured to generate a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to the at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0052] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generator for generating the sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have either positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generating units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b.

[0053] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0054] <Substrate Supporting Section> Next, an example of the detailed configuration of the substrate supporting section 11 as a substrate supporting device according to this embodiment will be described. Fig. 4 is a cross-sectional view showing an outline of the configuration of the substrate supporting section 11. Note that Fig. 4 omits the illustration of the substrate W supported by the electrostatic chuck 112, the ring assembly 120 supported by the annular electrostatic chuck 113, and the flow path 111a in the conductive base 111.

[0055] As described above, the substrate support 11 includes the main body 110 and the ring assembly 120. The main body 110 includes the conductive base 111, the electrostatic chuck 112, and the annular electrostatic chuck 113.

[0056] The conductive base 111 includes a conductive material such as aluminum and has a substantially circular disk shape. An electrostatic chuck 112 and an annular electrostatic chuck 113 are disposed on the conductive base 111. In one example, the electrostatic chuck 112 and the annular electrostatic chuck 113 are bonded to the conductive base 111 via a bonding layer (not shown). The bonding layer is formed of a plasma-resistant and heat-resistant material, such as an acrylic resin, a silicone resin, or an epoxy resin. As shown in FIG. 4 , a radio frequency power supply RFS that generates a source RF signal and a bias power supply S2 (described later) that generates a bias signal for the ring assembly 120 are electrically connected to the conductive base 111. The radio frequency power supply RFS may be the power supply 30 described above.

[0057] The electrostatic chuck 112 is disposed on the conductive base 111 as described above. The electrostatic chuck 112 includes a ceramic member 112a having at least one layer of an insulating (dielectric) material, for example, a ceramic layer in this embodiment. The ceramic member 112a has a central region 110a on its upper surface. The annular electrostatic chuck 113 is disposed on the conductive base 111 as described above, surrounding the electrostatic chuck 112. The annular electrostatic chuck 113 includes a ceramic member 113a having at least one layer of an insulating (dielectric) material, for example, a ceramic layer in this embodiment. The ceramic member 113a has an annular region 110b on its upper surface.

[0058] The ceramic member 112a of the electrostatic chuck 112 has a greater thickness than the ceramic member 113a of the annular electrostatic chuck 113. In other words, the main body 110 of the substrate support part 11 has a substrate support surface (central region 110a) that is higher than the ring support surface (annular region 110b), and has a substantially convex cross-sectional shape with a convex portion formed on the upper surface.

[0059] A plurality of electrodes 114, including an electrostatic electrode 114a, a bias electrode 114b, and an electric discharge prevention electrode 114c, are provided inside the ceramic member 112a as a first dielectric portion. The electrostatic electrode is an example of a clamp electrode. A heat transfer gas supply unit 115 is also formed inside the ceramic member 112a to supply a heat transfer gas (hereinafter referred to as a "heat transfer gas") such as helium gas between the rear surface of the substrate W and the central region 110a. The electrostatic chuck 112 is configured by sandwiching the electrostatic electrode 114a, the bias electrode 114b, the electric discharge prevention electrode 114c, and the heat transfer gas supply unit 115 between the ceramic member 112a (e.g., a pair of dielectric films made of a non-magnetic dielectric material such as ceramic).

[0060] The electrostatic electrode 114a is electrically connected to a power supply HV1 for electrostatic attraction of the substrate W. An electrostatic force such as Coulomb force is generated by applying a voltage from the electrostatic attraction power supply HV1 to the electrostatic electrode 114a, and the substrate W is attracted and held in the central region 110a by the generated electrostatic force. The above-mentioned power supply 30 may be used as the electrostatic attraction power supply HV1. A positive voltage or a negative voltage may be output from the electrostatic attraction power supply HV1. The electrostatic attraction power supply HV1 may be a DC power supply or an AC power supply. The electrostatic electrode 114a may be either a single-pole or multi-pole. Furthermore, the electrostatic electrode 114a may be divided.

[0061] The bias electrode 114b is disposed below the electrostatic electrode 114a within the ceramic member 112a. The bias electrode 114b is primarily used to attract ions toward the center of the substrate W. The bias electrode 114b can also function as a lower electrode. A bias power supply S1 for the substrate W is electrically connected to the bias electrode 114b. In one example, the bias power supply S1 outputs a negative DC pulse. The above-described power supply 30 may be used as the bias power supply S1. The voltage applied from the bias power supply S1 is not limited to a negative DC pulse and may be changed as appropriate depending on the purpose of substrate processing in the plasma processing apparatus 1. That is, a positive voltage may be applied instead of a negative voltage, and a high-frequency AC voltage may be applied instead of a DC voltage. Furthermore, a continuous wave may be applied instead of a pulse wave. Furthermore, the bias electrode 114b may be divided.

[0062] The discharge prevention electrode 114c is disposed inside the ceramic member 112a below the bias electrode 114b and above a diffusion space 115a (described later) of the heat transfer gas supply unit 115. The discharge prevention electrode 114c is disposed so as to overlap at least a portion of the diffusion space 115a (described later) in the vertical direction (in a plan view), preferably the entire diffusion space 115a in a plan view. The discharge prevention electrode 114c is electrically connected to the conductive base 111 via a conductive member 114c1, and a common voltage is applied to the discharge prevention electrode 114c and the conductive base 111. As a result, an equipotential space is formed between the conductive base 111 and the discharge prevention electrode 114c in the thickness direction inside the ceramic member 112a. The conductive member 114c1 corresponds to the "conductive portion" according to the technology of the present disclosure.

[0063] The number of conductive members 114c1 connecting the conductive base 111 and the discharge prevention electrode 114c is not particularly limited, and a plurality of conductive members 114c1 may be arranged along the circumferential direction of the electrostatic chuck 112. In this case, it is desirable that the plurality of conductive members 114c1 are arranged at equal intervals along the circumferential direction of the electrostatic chuck 112. The conductive members 114c1 may be, for example, vias. The discharge prevention electrode 114c may also be divided.

[0064] The heat transfer gas supply unit 115 has a diffusion space 115a, a gas inlet 115b for supplying a heat transfer gas to the diffusion space 115a, and a gas outlet 115c for discharging the heat transfer gas from the diffusion space 115a. The heat transfer gas supply unit 115 supplies a heat transfer gas from a heat transfer gas supply source (not shown) to between the back surface of the substrate W and the central region 110a via the gas inlet 115b, the diffusion space 115a, and the gas outlet 115c, in this order. The heat transfer gas is also called "backside gas." Note that multiple heat transfer gas supply units 115 may be formed inside the ceramic member 112a. The heat transfer gas supply unit 115 may be formed by embedding a gas supply pipe inside the ceramic member 112a, or may be formed as a cavity by not stacking ceramics (dielectric member) in a portion of the ceramic member 112a.

[0065] The diffusion space 115a, serving as a first heat transfer gas diffusion space, is formed within the ceramic member 112a below the discharge prevention electrode 114c. More specifically, the diffusion space 115a is formed within the ceramic member 112a between the conductive base 111 and the discharge prevention electrode 114c, i.e., in the equipotential space described above. The gas inlet 115b extends downward from the diffusion space 115a to the underside of the conductive base 111. A heat transfer gas supply source (not shown) is connected to the gas inlet 115b. The gas outlet 115c extends upward from the diffusion space 115a to the substrate support surface (central region 110a), which is the upper surface of the ceramic member 112a. The number of gas outlets 115c extending from the diffusion space 115a, in other words, the number of heat transfer gas exhaust holes on the substrate support surface, is not particularly limited, and multiple gas outlets 115c may be formed along the circumferential direction of the electrostatic chuck 112.

[0066] In the substrate support part 11 according to this embodiment, the diffusion space 115a for supplying the heat transfer gas is formed in the same potential space inside the ceramic member 112a, thereby suppressing the occurrence of a potential difference inside the diffusion space 115a, and thereby suppressing the occurrence of abnormal discharge in the diffusion space 115a during plasma processing of the substrate W.

[0067] The ceramic member 113a serving as the second dielectric portion is provided therein with an electrostatic electrode 116a and a bias electrode 116b serving as a plurality of electrodes 116. Also formed within the ceramic member 113a is a heat transfer gas supply unit 117 for supplying a heat transfer gas between the rear surface of the ring assembly 120 and the annular region 110b. The annular electrostatic chuck 113 is configured by sandwiching the electrostatic electrode 116a, the bias electrode 116b, and the heat transfer gas supply unit 117 between the ceramic member 113a (for example, a pair of dielectric films made of a non-magnetic dielectric material such as ceramics).

[0068] The electrostatic electrode 116a is electrically connected to a power supply HV2 for electrostatic attraction of the ring assembly 120. An electrostatic force such as Coulomb force is generated by applying a voltage from the power supply HV2 to the electrostatic electrode 116a, and the generated electrostatic force attracts and holds the ring assembly 120 to the annular region 110b. The power supply 30 described above may be used as the power supply HV2 for electrostatic attraction. The power supply HV2 for electrostatic attraction may output a positive or negative voltage. The power supply HV2 for electrostatic attraction may be a DC power supply or an AC power supply. The electrostatic electrode 116a may be unipolar or multipolar. Furthermore, the electrostatic electrode 116a may be divided.

[0069] The bias electrode 116b is disposed below the electrostatic electrode 116a inside the ceramic member 113a. The bias electrode 116b is disposed so as to overlap at least a portion of the diffusion space 117a (described later) in the vertical direction (in a plan view), preferably the entire diffusion space 117a in a plan view. The bias electrode 116b is primarily used to attract ions to the peripheral edge of the substrate W. The bias electrode 116b is electrically connected to the bias power supply S2 of the ring assembly 120 and the above-described high-frequency power supply RFS. In other words, the power supply connected to the bias electrode 116b is the same as the power supply connected to the conductive base 111. Thus, a common voltage is applied to the conductive base 111 and the bias electrode 116b inside the ceramic member 113a, thereby forming an equipotential space between the conductive base 111 and the bias electrode 116b in the thickness direction. The above-described power supply 30 may be used as the bias power supply S2. In one example, the bias power supply S2 may output a negative DC pulse, but the voltage applied from the bias power supply S2 may be changed as appropriate depending on the purpose of substrate processing in the plasma processing apparatus 1. That is, a positive voltage may be applied instead of a negative voltage, and a high-frequency AC voltage may be applied instead of a DC voltage. Also, a continuous wave may be supplied instead of a pulse wave. Furthermore, the bias electrode 116b may be divided.

[0070] The heat transfer gas supply unit 117 has a diffusion space 117a, a gas inlet 117b for supplying heat transfer gas to the diffusion space 117a, and a gas outlet 117c for discharging the heat transfer gas from the diffusion space 117a. The heat transfer gas supply unit 117 supplies heat transfer gas from a heat transfer gas supply source (not shown) to between the back surface of the ring assembly 120 and the annular region 110b via the gas inlet 117b, the diffusion space 117a, and the gas outlet 117c, in this order. Note that multiple heat transfer gas supply units 117 may be formed inside the ceramic member 113a. The heat transfer gas supply unit 117 may be formed by embedding a gas supply pipe inside the ceramic member 113a, or may be formed as a cavity by not layering ceramics (dielectric member) in a portion of the ceramic member 113a.

[0071] A diffusion space 117a serving as a second heat transfer gas diffusion space is formed within the ceramic member 113a below the bias electrode 116b. More specifically, the diffusion space 117a is formed within the ceramic member 113a between the conductive base 111 and the bias electrode 116b, i.e., in the equipotential space described above. A gas inlet 117b extends downward from the diffusion space 117a to the underside of the conductive base 111. A heat transfer gas supply source (not shown) is connected to the gas inlet 117b. The heat transfer gas supply source connected to the gas inlet 117b may be used in common with the heat transfer gas supply source connected to the heat transfer gas supply unit 115 on the electrostatic chuck 112 side, or may be used independently. That is, the plasma processing apparatus 1 according to this embodiment is provided with one or more heat transfer gas supply sources (not shown). The gas outlets 117c are formed to extend upward from the diffusion space 117a to the ring support surface (annular region 110b), which is the upper surface of the ceramic member 113a. The number of gas outlets 117c extending from the diffusion space 117a, in other words, the number of exhaust holes for the heat transfer gas on the ring support surface, is not particularly limited, and a plurality of gas outlets 117c may be formed along the circumferential direction of the annular electrostatic chuck 113.

[0072] In the substrate support part 11 according to this embodiment, the diffusion space 117a for supplying the heat transfer gas is formed in the same potential space inside the ceramic member 113a, thereby suppressing the occurrence of a potential difference inside the diffusion space 117a, and thereby suppressing the occurrence of abnormal discharge in the diffusion space 117a during plasma processing of the substrate W.

[0073] According to the substrate support part 11 of the above embodiment, in the electrostatic chuck 112, an electric discharge prevention electrode 114c electrically connected to the conductive base 111 is disposed, thereby forming an equipotential space inside the ceramic member 112a. In the annular electrostatic chuck 113, an equipotential space is formed inside the ceramic member 113a by connecting the bias electrode 116b to a common power source as the conductive base 111 and applying a common voltage thereto. In the substrate support part 11 of this embodiment, diffusion spaces 115a and 117a for supplying heat transfer gas between the back surface of the substrate W and the central region 110a, and between the back surface of the ring assembly 120 and the annular region 110b, are disposed in the equipotential spaces thus formed inside the ceramic members 112a and 113a, respectively. By disposing the diffusion spaces 115a and 117a in the equipotential spaces, potential differences are suppressed within the diffusion spaces, thereby suppressing abnormal discharges in the diffusion spaces during plasma processing of the substrate W.

[0074] In the above embodiment, the electrostatic chuck 112 in the central region 110a is provided with the discharge prevention electrode 114c electrically connected to the conductive base 111, and the annular electrostatic chuck 113 in the annular region 110b is provided with the bias electrode 116b connected to a common power supply to the conductive base 111. However, the method for forming the equipotential space in each of the electrostatic chucks is not limited to this. That is, for example, both the electrostatic chuck 112 and the annular electrostatic chuck 113 may be provided with discharge prevention electrodes electrically connected to the conductive base 111, or the bias electrodes in both the electrostatic chuck 112 and the annular electrostatic chuck 113 may be connected to a common power supply to the conductive base 111. Alternatively, for example, the bias electrode 114b in the electrostatic chuck 112 may be connected to a common power supply to the conductive base 111, and the annular electrostatic chuck 113 may be provided with a discharge prevention electrode electrically connected to the conductive base 111.

[0075] In the above embodiment, for example, from the viewpoint of ease of forming the electrostatic chuck, the discharge prevention electrode 114c in the ceramic member 112a is disposed at the same height (in the same plane) as the bias electrode 116b in the ceramic member 113a. However, the arrangement of the discharge prevention electrode 114c is not limited to this.

[0076] When a substrate W is placed on the central region 110a, electrostatic capacitances are generated between the substrate W and the electrostatic electrode 114a, between the electrostatic electrode 114a and the bias electrode 114b, and between the bias electrode 114b and the discharge prevention electrode 114c. These capacitances are combined to generate an electrostatic capacitance between the substrate W and the discharge prevention electrode 114c. Because the electrostatic capacitance depends on the distance between the substrate W and the discharge prevention electrode 114c, the value of the electrostatic capacitance generated between the substrate W and the discharge prevention electrode 114c can be adjusted by changing the height position of the discharge prevention electrode 114c within the ceramic member 112a. This allows the ratio of the electrostatic capacitance between the electrostatic chuck 112 on which the substrate W is placed and the annular electrostatic chuck 113 on which the ring assembly 120 is placed to be controlled by changing the height position of the discharge prevention electrode 114c within the ceramic member 112a. In other words, the impedance ratio between the electrostatic chuck 112 on which the substrate W is placed and the annular electrostatic chuck 113 on which the ring assembly 120 is placed can be controlled.

[0077] The method for controlling the capacitance ratio between the substrate W placed on the substrate support part 11 and the ring assembly 120 according to this embodiment will be described in detail below. Figures 5 and 6 are explanatory diagrams showing the capacitance between the substrate W and the ring assembly 120 on the substrate support part, with Figure 5 illustrating a substrate support of a conventional structure in which the discharge prevention electrode 114c is not provided, and Figure 6 illustrating the substrate support part 11 according to this embodiment in which the discharge prevention electrode 114c is provided. Note that in the substrate support of the conventional structure shown in Figure 5, elements having substantially the same functional configuration as those in the substrate support part 11 according to this embodiment shown in Figure 6 are designated by the same reference numerals, and detailed description thereof will be omitted.

[0078] In order to improve the in-plane uniformity of plasma processing on the substrate W, it is important to uniformly apply the radio frequency (RF) power applied to the conductive base 111 to the substrate W and the ring assembly 120 (edge ​​ring), thereby uniformly attracting ions across the entire surface of the substrate W. However, because the radio frequency power applied to the conductive base 111 is applied to the substrate W and the ring assembly 120 via the dielectric ceramic members 112 a and 113 a, respectively, a distribution may occur in the ratio of the radio frequency power applied to the substrate W and the ring assembly 120, i.e., the impedance ratio between the substrate W and the ring assembly 120.

[0079] Specifically, the impedance of the substrate W is determined by the reciprocal of the capacitance [Cw]. The parasitic capacitance Cw of the substrate W may depend, for example, on the thickness of the dielectric member (ceramic member 112a) through which the high-frequency power is transmitted, i.e., the distance between the conductive base 111 and the substrate W. The impedance of the ring assembly 120 is determined by the reciprocal of the capacitance [Cf × A1 / A2]. The parasitic capacitance Cf (see FIG. 5) of the ring assembly 120 may depend, for example, on the thickness of the dielectric member (ceramic member 113a) through which the high-frequency power is transmitted, i.e., the distance between the conductive base 111 and the ring assembly 120. The above-mentioned area A1 (see FIG. 5) is the exposed area of ​​the ring assembly 120 to the plasma processing space, i.e., the upper surface area of ​​the ring assembly 120. The above-mentioned area A2 (see FIG. 5) is the inlet area of ​​the high-frequency power to the ring assembly 120, i.e., the contact area between the ring assembly 120 and the annular region 110b.

[0080] As described above, the high-frequency power applied from the high-frequency power supply is distributed and propagated in accordance with the impedances of the electrostatic chuck 112 on which the substrate W is placed and the annular electrostatic chuck 113 on which the ring assembly 120 is placed. However, in a conventional substrate support unit in which the discharge prevention electrode 114c is not provided, as shown in Fig. 5 , the impedance (capacitance [Cw]) of the substrate W and the impedance (capacitance [Cf × A1 / A2]) of the ring assembly 120 do not match, which can result in a distribution in the capacitive coupling between the substrate W and the ring assembly 120.

[0081] In this regard, in the substrate support part 11 according to this embodiment, in which the discharge prevention electrode 114c is provided, it is easy to match the capacitance [Cw] of the substrate W with the capacitance [Cf × A1 / A2] of the ring assembly 120. That is, in the substrate support part 11 according to this embodiment, the capacitance value of the parasitic capacitance Cw of the substrate W can be adjusted arbitrarily by changing the height position of the discharge prevention electrode 114c inside the ceramic member 112a, as shown in Fig. 6, and thereby the impedance ratio between the substrate W and the ring assembly 120 can be adjusted. More specifically, the height position of the discharge prevention electrode 114c is designed so that the capacitance [Cw] of the substrate W matches the capacitance [Cf × A1 / A2] of the ring assembly 120, thereby appropriately suppressing unevenness in the capacitive coupling between the substrate W and the ring assembly 120.

[0082] According to the substrate support part 11 of this embodiment, in plasma processing of the substrate W, it is possible to suppress abnormal discharge in the diffusion space of the heat transfer gas formed in the electrostatic chuck as shown in the above embodiment, and to adjust the high-frequency impedance characteristics in the substrate mounting part and the ring mounting part.

[0083] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive, and the above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.

[0084] REFERENCE SIGNS LIST 11 substrate support portion 111 conductive base 112a ceramic member 113a ceramic member 114c discharge prevention electrode 114c1 conductive member 115a diffusion space 116b bias electrode 117a diffusion space 120 ring assembly RFS high frequency power supply S2 bias power supply W substrate

Claims

1. a base electrically connected to at least one power source; a first dielectric portion disposed on the base and having a substrate support surface; a second dielectric portion disposed on the base so as to surround the first dielectric portion and having a ring support surface; The first dielectric portion is a first heat transfer gas diffusion space for supplying a heat transfer gas toward the substrate support surface; a first electrode disposed above the first heat transfer gas diffusion space so as to vertically overlap at least a portion of the first heat transfer gas diffusion space; a conductive portion electrically connecting the first electrode and the base, The second dielectric portion is a second heat transfer gas diffusion space for supplying a heat transfer gas toward the ring support surface; a second electrode disposed above the second heat transfer gas diffusion space so as to vertically overlap at least a portion of the second heat transfer gas diffusion space, and electrically connected to a power source that outputs a voltage common to the base; and

2. The substrate support of claim 1 , wherein the first electrode and the second electrode are disposed in the same plane.

3. The first dielectric portion is The substrate support according to claim 1 , further comprising a substrate bias electrode disposed above the first electrode.

4. The first dielectric portion is The substrate support according to claim 1 or 2, further comprising an electrostatic electrode for a substrate disposed above the first electrode.

5. The second dielectric portion is The substrate support of claim 1 or 2, further comprising a ring electrostatic electrode disposed above the second electrode.

6. 3. The substrate support of claim 1, wherein the second electrode is a bias electrode for a ring supported on the ring support surface.

7. The substrate support according to claim 1 , wherein a plurality of the conductive portions are arranged along a circumferential direction of the first dielectric portion.

8. The substrate support according to claim 7 , wherein the conductive portions are arranged at equal intervals along a circumferential direction of the first dielectric portion.

9. a plasma processing chamber; a substrate support disposed within the plasma processing chamber, The substrate support includes: a base electrically connected to at least one power source; a first dielectric portion disposed on the base and having a substrate support surface; a second dielectric portion disposed on the base so as to surround the first dielectric portion and having a ring support surface; The first dielectric portion is a first heat transfer gas diffusion space for supplying a heat transfer gas toward the substrate support surface; a first electrode disposed above the first heat transfer gas diffusion space; a conductive portion electrically connecting the first electrode and the base, The second dielectric portion is a second heat transfer gas diffusion space for supplying a heat transfer gas toward the ring support surface; a second electrode disposed above the second heat transfer gas diffusion space and electrically connected to a power source that outputs a voltage common to the base, the second electrode being disposed therein.

10. The plasma processing apparatus of claim 9 , further comprising an edge ring mounted on the ring support surface.

11. The plasma processing apparatus of claim 10 , wherein the second electrode is a bias electrode for the edge ring.

12. 12. The plasma processing apparatus according to claim 10, wherein an area of ​​the ring support surface of the second dielectric portion is smaller than an area of ​​a lower surface of the edge ring supported by the ring support surface.

13. 12. The plasma processing apparatus according to claim 9, wherein the first electrode and the second electrode are disposed in the same plane.

14. The first dielectric portion is 12. The plasma processing apparatus according to claim 9, further comprising a substrate bias electrode disposed above the first electrode.

15. The first dielectric portion is 12. The plasma processing apparatus according to claim 9, further comprising an electrostatic electrode for a substrate disposed above the first electrode.

16. The second dielectric portion is 12. The plasma processing apparatus according to claim 9, further comprising a ring electrostatic electrode disposed above the second electrode.

17. The plasma processing apparatus according to claim 9, wherein a plurality of the conductive portions are arranged along a circumferential direction of the first dielectric portion.

18. The plasma processing apparatus according to claim 17 , wherein the plurality of conductive portions are disposed at equal intervals along a circumferential direction of the first dielectric portion.