Semiconductor film and method for producing semiconductor film

Abstract

Provided is a semiconductor film comprising a solid-phase crystallized product of an indium oxide doped with tin and hydrogen.

Description

Semiconductor film and method for manufacturing the semiconductor film

[0001] The present invention relates to a semiconductor film, and more particularly to a semiconductor film containing solid-phase crystallized hydrogen-atom-containing tin-doped indium oxide, a method for producing the semiconductor film, a sputtering target used in the production of the semiconductor film, and a thin-film transistor.

[0002] Tin-doped indium oxide (ITO) is used as a transparent electrode in display devices, touch panels, etc. It is also used as a component of semiconductor devices, such as the semiconductor layer (sometimes referred to as the channel layer) of thin film transistors (TFTs) (see, for example, Patent Documents 1 to 6).

[0003] In Patent Document 1, in a thin film transistor having a gate electrode, a gate insulating film, a source electrode, a drain electrode, and a semiconductor layer of an ITO film having low conductivity, the carrier concentration of the semiconductor layer is 10 １８ pieces / cm －３ The following discloses a TFT in which the semiconductor layer is a light-transmitting film.

[0004] Patent Document 2 discloses the use of other covalent oxides of non-transition metals containing dopant atoms as the semiconductor material for the channel region, and teaches that a sufficiently high conductivity for use as the semiconductor material for a switching element can be obtained by setting the concentration of the dopant atoms in the range of 0.001% to 0.3%.

[0005] Patent Document 3 discloses a TFT having a crystalline indium oxide semiconductor film in which the content of metal elements with a valence of 4 or more relative to the metal elements contained in the semiconductor film is 10 atomic ppm or less. It has been found that impurities in a semiconductor film made of crystalline indium oxide, specifically metal elements with a valence of 4 or more, affect the trap density of the semiconductor film, and the use of high-purity crystalline indium oxide is proposed.

[0006] Patent Document 4 describes an In alloy containing tin as an additive element. ２ O ３A tin-containing In sintered body, characterized in that the relative density is 98% or more by adding 0.01 to 0.2% of tin atoms as a ratio to the total number of atoms of all metal elements in the sintered body. ２ O ３ A sintered body is disclosed.

[0007] In Patent Document 5, the water pressure in the sputtering device is 3×10 －４ ~5 x 10 －２ This publication discloses a method for forming an oxide semiconductor film, in which a sputtering target made of a metal oxide is DC sputtered at 1000 Pa to form a film, and the film is crystallized.

[0008] Patent Document 6 discloses a laminated structure having an oxide semiconductor thin film layer and a TFT using the same as a channel layer, and discloses that the oxide semiconductor thin film layer is made of a laminated structure of materials including indium oxide, Ga-doped indium oxide, Al-doped indium oxide, Zn-doped indium oxide, and Sn-doped indium oxide.

[0009] Japanese Patent Laid-Open No. 05-251705 Japanese Patent Laid-Open No. 11-505377 International Publication No. 2010 / 047063 Japanese Patent Laid-Open No. 2011-093730 Japanese Patent Laid-Open No. 2011-222557 Japanese Patent Laid-Open No. 2012-253315

[0010] It is known that a high-mobility oxide semiconductor film can be formed by sputtering high-purity indium oxide in the presence of water or hydrogen and then crystallizing the film. However, the mobility can be reduced by heat treatment at high temperatures (e.g., 350°C or higher) performed to stabilize the TFT. Therefore, it has been difficult to achieve both high mobility and stable operation in the TFT.

[0011] An object of the present invention is to provide a semiconductor film that exhibits little decrease in mobility even when heat-treated at high temperatures to stabilize TFTs, and a method for producing the same, and also to provide a sputtering target that allows stable film formation when producing the semiconductor film.

[0012] According to the present invention, the following semiconductor films and the like are provided: 1. A semiconductor film comprising a solid phase crystallization product of tin and hydrogen-doped indium oxide. 2. In the solid phase crystallization product, the content of tin atoms (Sn) relative to the total of indium atoms (In) and tin atoms (Sn) [Sn / (In+Sn): molar ratio] is 0.000005 to 0.008, and the hydrogen atom (H) concentration measured by secondary ion mass spectrometry is 0.5×10 ２０ ~50 x 10 ２０ atoms / cc. 3. The semiconductor film according to 1 or 2, having a tapered cross section. 4. A method for producing a semiconductor film according to any one of 1 to 3, comprising the steps of: sputtering a tin-doped indium oxide (ITO) sputtering target in a film formation gas containing a gas supplying hydrogen atoms at a partial pressure of 0.5 to 12% to form an amorphous film; and heating the amorphous film to crystallize it. 5. The method according to 4, further comprising the step of processing the etched cross section into a tapered shape in a photolithography process after the step of forming the amorphous film. 6. 7. A tin-doped indium oxide sputtering target for forming an amorphous film of tin and hydrogen-doped indium oxide, wherein the content of tin atoms (Sn) relative to the total of indium atoms (In) and tin atoms (Sn) [Sn / (In+Sn): molar ratio] is 0.000005 to 0.008. 7. A thin film transistor comprising the semiconductor film according to any one of 1 to 3.

[0013] According to the present invention, it is possible to provide a semiconductor film that exhibits little decrease in mobility even when heat-treated at high temperatures to stabilize TFTs, and a method for producing the same, and also to provide a sputtering target that allows stable film formation when producing the semiconductor film.

[0014] 1 is a schematic cross-sectional view of a TFT according to one embodiment of the present invention; FIG. 2 is an SEM photograph of a cross section of a sputtering target produced in Example 1-1; FIG. 3 is a schematic cross-sectional view of a TFT produced in an Example; FIG. 4 is a transfer curve of a TFT produced in Example 2-1; FIG. 5 is a Vg-μ graph of a TFT produced in Example 2-1; and FIG. 6 is a Vg-μ graph of a TFT produced in Comparative Example 3-1, which is a transfer curve of a TFT produced in Comparative Example 3-1.

[0015] In this specification and the like, the terms "film" or "thin film" and "layer" can be used interchangeably in some cases.

[0016] In the sintered body and oxide thin film of this specification and the like, the terms "compound" and "crystalline phase" can be interchangeable in some cases.

[0017] In this specification, the “oxide sintered body” may be simply referred to as the “sintered body.” In this specification, the “sputtering target” may be simply referred to as the “target.”

[0018] In this specification, "electrically connected" includes a connection via "something that has some kind of electrical function." Here, "something that has some kind of electrical function" is not particularly limited as long as it allows electrical signals to be transmitted and received between the connected objects. For example, "something that has some kind of electrical function" includes electrodes, wiring, switching elements (transistors, etc.), resistive elements, inductors, capacitors, and other elements with various functions.

[0019] In this specification, the functions of the source and drain of a transistor may be interchanged when transistors of different polarities are used or when the direction of current flow changes during circuit operation, etc. Therefore, in this specification, the terms source and drain may be used interchangeably.

[0020] In this specification, "x to y" represents a numerical range of "not less than x and not more than y." The upper and lower limits of the numerical ranges can be combined in any combination. In addition, a combination of two or more of the individual embodiments of the present invention described below is also an embodiment of the present invention.

[0021] 1. Semiconductor Film The semiconductor film according to this embodiment includes a solid-phase crystallized material of tin and hydrogen-doped indium oxide (hereinafter, tin and hydrogen-doped indium oxide may be abbreviated as H:ITO). Here, solid-phase crystallization refers to the heating and crystallization of an amorphous (non-crystalline) material in a solid state. On the other hand, vapor-phase crystallization refers to, for example, crystallization by film formation.

[0022] It is known that vapor-phase crystallized indium oxide and tin-doped indium oxide (ITO) cannot be etched without using a strong acid such as aqua regia. Etching with a strong acid can damage the source electrode, drain electrode, gate electrode, and other components of the TFT, limiting its use. Damage to the interlayer insulating film and gate insulating film may also occur.

[0023] On the other hand, the amorphous film used for solid-phase crystallization can be etched even with a weak organic acid such as oxalic acid, and therefore the source electrode, drain electrode, gate electrode, etc. that constitute the TFT are not affected, and TFTs can be manufactured stably. In this embodiment, for example, a semiconductor film containing a solid-phase crystallized product of H:ITO can be obtained by crystallizing a solid-phase amorphous film formed by sputtering by heating after etching.

[0024] Tin and hydrogen doped indium oxide (H:ITO) means that indium oxide is doped with tin atoms and hydrogen atoms. The doping of tin and hydrogen and the amount of doping (content) can be measured by elemental analysis such as secondary ion mass spectrometry (SIMS), inductively coupled plasma mass spectrometry (ICP-MS), or the like.

[0025] The thickness of the semiconductor film in this embodiment is preferably 5 nm to 150 nm. Within this range, a homogeneous film is easily obtained, and the film formation time is appropriate, improving productivity. Furthermore, mobility may be increased when used in a TFT. The thickness is preferably 10 nm to 100 nm, and more preferably 15 nm to 80 nm.

[0026] It is known that adding tin atoms to indium oxide has the effect of improving the sinterability (crystallinity) of sintered crystals. Similarly, it is thought that the crystallinity of an indium oxide film to which tin atoms have been added is improved. If the amount of tin atoms added is small, the resulting semiconductor film may not be able to withstand heating at temperatures above 350°C. On the other hand, if too many tin atoms are added, the resulting film may become a transparent conductive film and may not function as a semiconductor film.

[0027] From the above viewpoints, in the semiconductor film of this embodiment, the content of tin atoms (Sn) relative to the total of indium atoms (In) and tin atoms (Sn) in the solid-phase crystallized product [Sn / (In+Sn): molar ratio] is preferably 0.000005 to 0.008. More preferably, it is 0.00001 to 0.005, even more preferably 0.00002 to 0.003, and particularly preferably 0.00002 to 0.001. The upper limit may be less than 0.001.

[0028] Furthermore, ITO is usually crystallized to form tin (Sn ４＋ ) The dopant is activated, and In ２ O ３ Sn at the In site of the crystal ４＋ It is known that the tin atoms are substituted to generate electron carriers, resulting in a transparent conductive film. For example, when all of the added tin atoms are activated and two electron carriers are released per tin dopant, the raw material SnO ２ Even if the amount of addition is 0.01 mass%, ３ The number of tin atoms per １８ , so the electron concentration is 10 １８ It is believed that the number of tin dopants is at least 1, and it is expected that a transparent conductive film will result. However, surprisingly, in this embodiment, it is believed that the tin dopant is not activated, and as a result, a semiconductor film is formed.

[0029] In addition, during the crystallization process, the H dopant ４＋ is reduced to Sn ２＋ In ２ O ３ Sn at the In site of the crystal ２＋ Even if hydrogen is substituted, electron carriers are not generated and it is possible that the film functions as a semiconductor film, so hydrogen doping is important.

[0030] Furthermore, it is well known that in the case of crystalline indium oxide thin films, carriers are generated due to oxygen vacancies. It is thought that filling the carriers generated by oxygen vacancies with -OH groups can have the effect of suppressing carrier generation. On the other hand, there is also a possibility that In vacancies may occur. In in this crystal ３＋ 3H of loss ＋ It is also possible that they are being filled in by H. ＋ The ionic radius of the In ion is 0.38 Å. ３＋ Ionic radius of ion (6-coordinate In ３＋ ) is 0.80 Å. From this, it is possible to determine whether the In vacancy is caused by H ＋ It is possible that the ions are filling in the gaps, maintaining the stability of the crystal.

[0031] From the above viewpoint, the concentration of hydrogen atoms (H) contained in the semiconductor film is 0.5×10 ２０ ~50 x 10 ２０ atoms / cc. ２０ If the hydrogen concentration is less than 0.5×10 atoms / cc, the hydrogen addition effect may not be obtained. ２０ To achieve a concentration of less than 50×10 atoms / cc, it is necessary to dehydrogenate the crystallized indium oxide film at high temperature and under high vacuum, which may reduce productivity. ２０ If it exceeds 1×10 atoms / cc, there is a possibility that hydrogen is contained due to physically adsorbed water, which may result in a decrease in mobility or a decrease in driving stability of the TFT. ２０ ~30 x 10 ２０ atoms / cc, and more preferably 1×10 ２０~20 x 10 ２０ atoms / cc, and particularly preferably 1×10 ２０ ~10 x 10 ２０ atoms / cc.

[0032] The hydrogen atom (H) concentration in the semiconductor film is the hydrogen concentration (atoms / cc) measured by secondary ion mass spectrometry (SIMS). The hydrogen atom (H) concentration in the solid-phase crystallized material is not constant but may vary in the depth direction of the film thickness, but is shown as an average value.

[0033] In the semiconductor film of this embodiment, the etched cross section is preferably tapered. This makes it easier to ensure insulation from other films when forming constituent films of a TFT, such as an interlayer insulating film or a gate insulating film. The taper angle (the interior angle between the bottom base and the side of the cross section) is 45° to 90°. If it is less than 45°, the width of the tapered shape becomes too wide, which may make it unsuitable for manufacturing TFTs with short channel widths. On the other hand, if it exceeds 90°, the coverage by the interlayer insulating film or the like may be insufficient, resulting in contact with other layers and causing the TFT to malfunction. The taper angle is preferably 50° to 85°, more preferably 55° to 80°.

[0034] 2. Method for Producing Semiconductor Film The semiconductor film of the present invention can be produced, for example, by sputtering an ITO target in a film-forming gas (sputtering gas) containing a gas that supplies hydrogen atoms at a partial pressure of 0.5 to 12% to form an amorphous film, and then heating the amorphous film to crystallize it.

[0035] The gas that supplies hydrogen atoms may be water (water vapor), hydrogen, etc. The gas that supplies hydrogen atoms is preferably supplied to the sputtering device in a gaseous state. The concentration of the gas that supplies hydrogen atoms during sputtering is adjusted according to the desired crystallization temperature.

[0036] For example, if the hydrogen atom supply gas is supplied at a partial pressure of less than 0.5% during sputtering, the film tends to crystallize at low temperatures, which may result in a vapor-phase crystallized film. As a result, crystallization may occur during heat treatment in the photolithography process, making etching impossible, or residue may be generated, causing etching defects and hindering the manufacture of TFTs.

[0037] On the other hand, increasing the partial pressure of the hydrogen atom supply gas tends to increase the crystallization temperature. If the hydrogen atom supply gas is supplied at a partial pressure of more than 15%, the crystallization temperature due to heating may exceed the desired temperature, and the amorphous film may not crystallize, or may crystallize but with a low degree of crystallization. As a result, the mobility of the TFT may decrease.

[0038] The amount of hydrogen atom supply gas supplied is preferably 0.5 to 12% in terms of partial pressure, more preferably 1 to 12%, even more preferably 1 to 10%, and particularly preferably 2 to 8%.

[0039] The deposition gas may further contain an oxidizing gas. Examples of the oxidizing gas include oxygen, N ２ O, NO ２ Among these, oxygen is preferred.

[0040] When hydrogen is used as a hydrogen atom supply gas, it is preferable to use it together with oxygen. When sputtering is performed by supplying only hydrogen without supplying oxygen, In ２ O ３ The hydrogen peroxide itself is reduced to generate oxygen vacancies, which may result in a transparent conductive film. When forming a semiconductor film, it is preferable to use a combination of oxygen and hydrogen, or water and hydrogen.

[0041] When oxygen and hydrogen are used in combination, the amount of oxygen supplied during sputtering is adjusted according to the amount of hydrogen used in combination. Oxygen reacts with hydrogen to produce water as shown in the following formula: H ２ +1 / 2O ２ →H ２ Therefore, it is preferable that the supply amount of hydrogen is at least twice that of oxygen, which allows for effective hydrogen doping.

[0042] On the other hand, when water is used as the hydrogen atom supply gas, hydrogen doping is possible with the hydrogen atoms contained in the water molecules, but by supplying additional hydrogen, hydrogen doping can be performed more effectively.

[0043] The conditions for sputtering an ITO target in a film-forming gas containing at least one of a gas that supplies hydrogen atoms and an oxidizing gas are not particularly limited, and can be appropriately adjusted depending on the apparatus used, the composition of the target, the composition of the sputtering gas, etc.

[0044] The film formation method is not particularly limited, and examples thereof include DC sputtering, AC sputtering, RF sputtering, ICP sputtering, reactive sputtering, etc. Among these, pulsed DC sputtering can be suitably used as the DC sputtering method.

[0045] In the case of pulsed DC sputtering, the pulse frequency is, for example, 1 KHz to 1 MHz, preferably 10 KHz to 500 KHz, and more preferably 30 KHz to 300 KHz. The driving time during the pulse (the ratio of actual sputtering driving, expressed as Duty (%)) is usually 30% to 95%, preferably 40% to 95%, and more preferably 50% to 90%.

[0046] If the duty is 30% or less, the sputtering rate will decrease, which will lengthen the sputtering time and reduce productivity.If the duty is 95% or more, the sputtering rate will increase too much, which will increase the amount of yellow flakes during sputtering and cause them to adhere to the target as foreign matter, resulting in the generation of nodules.

[0047] The sputtering film formation output relative to the target area is, for example, 1 W / cm ２ ~10 W / cm ２ 1 W / cm ２ If the power is less than 10 W / cm, the sputtering speed will decrease, the sputtering time will be longer, and the productivity may decrease. In addition, the density of the obtained film may decrease. ２ Above this level, the output may be too high and a large amount of yellow flakes may be produced.

[0048] Film forming output is 8 W / cm ２ When the film forming output is around 1 W / cm, the generation of yellow flakes can be suppressed by shortening the duty. ２ In the case of an output in this range, by lengthening the duty, it is possible to increase the sputtering speed and adjust the sputtering rate to maintain high productivity, and to suppress the generation of yellow flakes and nodules.

[0049] After forming an amorphous film by sputtering, the amorphous film is heated and crystallized to obtain the semiconductor film of the present invention (H: a film containing a solid-phase crystallized product of ITO). Note that crystallization treatment by heating is sometimes called annealing. The crystallization temperature is, for example, 200°C to 500°C. At temperatures below 200°C, crystallization may not occur. On the other hand, at temperatures above 500°C, the durability of the heating device may become an issue. The temperature is preferably 250°C to 450°C.

[0050] In the crystallization treatment, for example, an oxide semiconductor film with good crystallinity can be obtained by maintaining the film in a crystallization temperature range for a certain period of time or by increasing the temperature at a rate of 10° C. / min or less. The crystallization temperature varies depending on the amount of hydrogen atom supply gas supplied during film formation, and therefore, it is important to combine the crystallization temperature with the film formation conditions.

[0051] When the temperature is maintained at the crystallization temperature for a certain period of time, the maintenance time is preferably 5 to 60 minutes. If the maintenance time is less than 5 minutes, crystallization may not start, and if the maintenance time is more than 60 minutes, the maintenance time is too long, which may reduce productivity. The maintenance time is preferably 8 to 45 minutes, and more preferably 10 to 30 minutes.

[0052] It is also preferable to carry out the heat treatment for crystallization in two stages. The first heat treatment allows crystals to grow, and the second heat treatment stabilizes the crystals. The temperature may be changed in each heat treatment. For example, the first heat treatment may be performed at a low temperature and the second heat treatment at a high temperature to crystallize, or the first heat treatment may be performed at a high temperature and the second heat treatment at a low temperature to crystallize, thereby stabilizing the crystals.

[0053] Between the first and second heat treatments, N ２ SiO by treatment or CVD treatment２ It is also possible to form a film to provide an interlayer insulating film, a gate insulating film, etc. ２ SiO by CVD or ２ During the film formation process, defects in the crystalline structure of the semiconductor film may occur, and excess oxygen or hydrogen elements may exist between the crystalline layers or between other layers. By carrying out the heat treatment in two stages, the second heat treatment may have the effect of stabilizing the semiconductor film.

[0054] The manufacturing method of this embodiment may include a step of forming the amorphous film and then processing the etched cross section into a tapered shape in a photolithography step. After processing into the tapered shape, the amorphous film may be heat crystallized (annealed).

[0055] Regarding adjustment of the taper angle, increasing the adhesion between the resist and the amorphous film tends to increase the taper angle. As the adhesion decreases, the taper angle tends to decrease. Therefore, the taper angle can be adjusted by controlling the adhesion.

[0056] Furthermore, increasing the temperature of the etching solution tends to increase the taper angle, while decreasing the temperature tends to decrease the taper angle. The adhesion between the resist and the amorphous film can be controlled by combining the temperature of the etching solution.

[0057] When used in a TFT, the semiconductor film formed by the above-described manufacturing method exhibits little or no decrease in mobility even when exposed to high temperatures. Therefore, even when high-temperature annealing is performed to stabilize the TFT, high mobility can be maintained, enabling the TFT to achieve both high mobility and stable operation. The high-temperature annealing temperature for stabilizing the TFT may be 250°C or higher, 300°C or higher, or even 350°C or higher. The temperature is typically 500°C or lower.

[0058] 3. Sputtering Target A sputtering target according to one aspect of the present invention is a tin-doped indium oxide sputtering target for forming an amorphous film of tin and hydrogen-doped indium oxide. That is, it is an ITO target used in the manufacturing method described in item 2 above.

[0059] From the same viewpoint as in the semiconductor film of Item 1 above, in the target of this embodiment, the content of tin atoms (Sn) relative to the total of indium atoms (In) and tin atoms (Sn) [Sn / (In+Sn): molar ratio] is preferably 0.000005 to 0.008. More preferably, it is 0.00002 to 0.005, even more preferably 0.00003 to 0.005, and particularly preferably 0.00005 to 0.005. By adding tin atoms, the tin atoms dissolve in indium oxide to generate carriers, which has the effect of lowering the resistance of the target.

[0060] In the target of this embodiment, the relative density is preferably 99.0% or more. This allows stable film formation. The relative density is more preferably 99.1% or more. The relative density is the theoretical density (7.18 g / cm ３ ) is the ratio (%) of the actually measured value to the target. It is also preferable that the bulk (intrinsic) resistivity of the target is 10 mΩcm or less. This allows stable film formation. It is more preferable that the bulk resistivity is 5 mΩcm or less. The bulk resistivity is a value measured by the method described in the examples.

[0061] The method for producing the target of this embodiment is not particularly limited, and a general method can be used. Specifically, when the tin atom content is more than 0.0001, the target can be produced by mixing and grinding the raw materials indium oxide and tin oxide, molding the mixed powder, and sintering it to form an oxide sintered body, which can be cut and polished as necessary, and then fixed to a backing plate.

[0062] On the other hand, if the tin atom content is less than 0.0001, the relative density of the target may decrease and the bulk resistance value may increase. However, by using a device capable of mixing and grinding with high energy, such as a planetary ball mill, to turn the raw materials into fine sintering powder, a sintered body (target) with high density and low resistance can be produced.

[0063] The shape of the target can be selected from round, rectangular, cylindrical, etc. to suit the sputtering apparatus. The purity of the indium oxide raw material is preferably 99.9% or higher, more preferably 99.99% or higher, and even more preferably 99.995% or higher. High purity suppresses carrier scattering due to impurities, making it possible to produce high-performance semiconductor films.

[0064] The crystal grain size in the target (sintered body) is preferably 0.5 to 20 μm. If it is less than 0.5 μm, the crystal grains are too small, reducing the strength of the sintered body and causing cracks or microcracks. On the other hand, if the crystal grains are large and exceed 20 μm, the crystals may grow abnormally, causing cracks or microcracks inside the crystals. In a target with microcracks, a large amount of yellow flakes or nodules may be generated. Removal of the yellow flakes and nodules takes time, shortening the actual sputtering time and reducing productivity. The crystal grain size is more preferably 1 to 15 μm, and even more preferably 1 to 10 μm.

[0065] 4. Thin Film Transistor The TFT according to this embodiment includes the semiconductor film of the present invention described above. Preferably, the semiconductor film of the present invention is used as the semiconductor layer (channel layer) of the TFT.

[0066] 1 is a schematic cross-sectional view of a thin film transistor according to an embodiment of the present invention, which includes a silicon wafer 20, a gate insulating film 30, a semiconductor film 40, a source electrode 50, a drain electrode 60, and interlayer insulating films 70 and 70A.

[0067] The silicon wafer 20 is a gate electrode. The gate insulating film 30 is an insulating film that blocks electrical conduction between the gate electrode and the semiconductor film 40, and is provided on the silicon wafer 20. The semiconductor film 40 is a channel layer and is provided on the gate insulating film 30. The semiconductor film according to the present invention is used for the semiconductor film 40.

[0068] The source electrode 50 and the drain electrode 60 are conductive terminals for passing source current and drain current through the semiconductor film 40, and are provided so as to be in contact with the vicinity of both ends of the semiconductor film 40. The interlayer insulating film 70 is an insulating film that blocks conduction between the source electrode 50 and the drain electrode 60 and the semiconductor film 40 except at the contact portions between the source electrode 50 and the drain electrode 60 and the semiconductor film 40. The interlayer insulating film 70A is an insulating film that blocks conduction between the source electrode 50 and the drain electrode 60 and the semiconductor film 40 except at the contact portions between the source electrode 50 and the drain electrode 60 and the semiconductor film 40. The interlayer insulating film 70A is also an insulating film that blocks conduction between the source electrode 50 and the drain electrode 60. The interlayer insulating film 70A also functions as a channel layer protective layer.

[0069] There is no particular limitation on the materials forming the drain electrode 60, the source electrode 50, and the gate electrode, and any commonly used material can be selected. In the example shown in FIG. 1, a silicon wafer is used as the substrate, and the silicon wafer also functions as the electrode, but the electrode material is not limited to silicon. For example, ITO, indium zinc oxide (IZO), ZnO, and SnO ２ For example, a transparent electrode such as a metal electrode made of Al, Ag, Cu, Cr, Ni, Mo, Au, Ti, or Ta, or a metal electrode or laminated electrode made of an alloy containing these may be used. In addition, in FIG. 1, the gate electrode may be formed on a substrate such as glass.

[0070] There is no particular limitation on the material for forming the interlayer insulating films 70 and 70A, and any commonly used material can be selected. Specific examples of the material for forming the interlayer insulating films 70 and 70A include SiO. ２ , SiNx, Al ２ O ３ , Ta ２ O ５ , TiO ２ , MgO, ZrO ２ , CeO ２ , K. ２ O, Li ２ O, Na ２ O, Rb ２ O, Sc ２ O ３ , Y ２ O ３ , HfO ２ , CaHfO ３ , PbTiO３ ,BaTa ２ O ６ , SrTiO ３ , Sm ２ O ３ Compounds such as GaN and AlN can be used.

[0071] The shape of the thin film transistor according to this embodiment is not particularly limited, but a bottom gate transistor, a top gate transistor, a double gate transistor, a dual gate transistor, a back channel etch transistor, an etch stopper transistor, or the like is preferred.

[0072] Among transistor characteristics, the On / Off characteristics are a factor that determines the display performance of a display. When using thin film transistors to switch liquid crystal, it is preferable that the On / Off ratio be six digits or more. In the case of OLEDs, the On current is important because they are driven by current, but it is also preferable that the On / Off ratio be six digits or more.

[0073] In one embodiment, the TFT has an On / Off ratio of 1×10 ６ The On / Off ratio is preferably 1×10 or more. ６ ~1 x 10 １２ is more preferable, and 1×10 ７ ~10 １１ More preferably, 10 ８ ~10 １０ More preferably, the On / Off ratio is 1×10 ６ If the On / Off ratio is 1×10 or more, the liquid crystal display can be driven. １２ If the On / Off ratio is 1×10 or less, an organic EL display with high contrast can be driven. １２ If the off-state current is 10 －１１ When the thin film transistor is used as a transfer transistor or reset transistor of a CMOS image sensor, the image retention time can be extended and the sensitivity can be improved. The method for measuring the On / Off ratio will be described in detail in the Examples.

[0074] In one embodiment, the mobility of the TFT is 5 cm ２ / Vs or more, and ２ The linear mobility is more preferably 1 / Vs or more. The method for measuring the linear mobility will be explained in detail in the Examples.

[0075] The threshold voltage (Vth) is preferably −3.0 to 3.0 V, more preferably −2.0 to 2.0 V, and even more preferably −1.0 to 1.0 V. When the threshold voltage (Vth) is −3.0 V or higher, a TFT with high mobility can be obtained. When the threshold voltage (Vth) is 3.0 V or lower, a TFT with a small off-current and a large on-off ratio can be obtained. The method for measuring the threshold voltage (Vth) will be described in detail in the Examples.

[0076] The off current is 1×10 －１０ A or less is preferable, and 1 × 10 －１１ A or less is more preferable, and 1×10 －１２ A or less is more preferable. －１０ When the off-state current is 0.05A or less, an organic EL device with high contrast can be driven. Furthermore, when used as a transfer transistor or reset transistor in a CMOS image sensor, the image retention time can be extended and the sensitivity can be improved. The method for measuring the off-state current will be described in detail in the Examples.

[0077] The TFT according to this embodiment can be suitably used in display elements such as solar cells, liquid crystal elements, organic electroluminescence elements, and inorganic electroluminescence elements, power semiconductor elements, touch panels, and other electronic devices.

[0078] The present invention will be specifically described below based on examples, but the present invention is not limited to these examples.

[0079] [Production of Sputtering Target] Example 1-1 99.99% by mass of indium oxide (manufactured by Kojundo Chemical Co., Ltd.) was mixed and ground using a planetary ball mill (Pulverisette 5, manufactured by Fritsch GmbH, Germany) at a rotation speed of 220 rpm for 4 hours using zirconia beads as the grinding media. The resulting powder was granulated, press-molded, and pressure-molded by cold isostatic pressing (CIP). The molded body was fired at 1450°C for 28 hours to obtain an oxide sintered body. After cooling to room temperature in a furnace, it was ground and polished. The polished oxide sintered body was bonded to a backing plate to produce a sputtering target with a diameter of 4 inches and a thickness of 5 mm. In Example 1-1, the sputtering target was free of cracks and was successfully produced.

[0080] Examples 1-2 to 1-5 Sputtering targets were produced in the same manner as in Example 1-1, except that the blending ratio of indium oxide and tin oxide was changed as shown in Table 1. In the examples, the sputtering targets were free from cracks and the like and could be produced satisfactorily.

[0081] Comparative Examples 1-1 to 1-3 Sputtering targets were produced in the same manner as in Example 1-1, except that the blending ratio of indium oxide and tin oxide was changed and a ball mill was used to mix and grind the raw materials, as shown in Table 1. In the ball mill, the raw materials and zirconia balls were placed in a plastic container, and rotated for 24 hours using a rotating roll.

[0082] For the sputtering targets manufactured in each of the above examples, the raw material composition, the atomic (mol) ratio calculated from the composition, ３ The number of tin atoms per unit area, relative density, and bulk resistance are shown in Table 1. The atomic ratio is the value of (In or Sn) / (In+Sn). Furthermore, using a CS200 manufactured by ULVAC, sputtering was performed continuously for two hours in an argon gas atmosphere containing 6% water (partial pressure), with a sputtering pressure of 0.5 Pa and DC power of 400 W (target diameter 4 inches) applied, and the presence or absence of abnormal discharge was observed. The results are shown in Table 1.

[0083]

[0084] 1 cm ３ The number of tin atoms per ３ In all Examples and Comparative Examples, the formula weight of indium oxide was 277.64. ３ The number of tin atoms per １８ Since there are more than 10 electrons, the electron concentration is 10 １８ Since the number of target atoms is thought to be more than 1, it is expected that a film formed using the target will be a conductive film. However, in the examples described below, a semiconductor film is obtained.

[0085] The relative density is calculated by multiplying the actual measured value by 100 by the theoretical density (7.18 g / cm ３ The bulk resistance value (mΩcm) was measured using a resistivity meter Loresta (Loresta AX MCP-T370, manufactured by Mitsubishi Chemical Corporation) based on the four-probe method (JIS R 1637). Measurements were made at five locations in total, including the center of the sputtering target and four midpoints between the four corners and the center, and the average value of the five locations was taken as the bulk resistance value.

[0086] From Table 1, it can be seen that the sputtering targets manufactured using the planetary ball mill have a relative density of 99% or more, no abnormal discharge is observed during sputtering, and stable film formation is possible.

[0087] Fig. 2 is an SEM photograph of a cross section of the sputtering target (oxide sintered body) produced in Example 1-1. From Fig. 2, the average crystal grain size is 3.1 µm.

[0088] [Fabrication of Semiconductor Film and TFT] Examples 2-1 to 2-5 Using the sputtering target produced in Example 1-1, a semiconductor film (evaluation sample) and a semiconductor layer of a TFT were fabricated under the film formation conditions (film formation atmosphere gas partial pressure ratio) shown in Table 2. (A) Semiconductor Film (Evaluation Sample) (1) Formation of Oxide Film An oxide film (film thickness 40 nm) was formed on a glass substrate ("ABC-G" manufactured by Nippon Electric Glass Co., Ltd.) under the film formation conditions shown in Table 2. Sputtering conditions other than those listed in Table 2 were as follows: Ultimate pressure: 5 x 10 －５Pa Sputtering pressure: 0.5 Pa Sputtering method: DC magnetron sputtering method Sputtering power (W / cm ２ ): 5.33 (400 W) Duty: 100% T (target) - S (substrate) distance: 70 mm Substrate temperature: room temperature

[0089] The obtained oxide film was analyzed using an inductively coupled plasma atomic emission spectrometer (ICP-AES, manufactured by Shimadzu Corporation), and it was confirmed that the atomic ratio of metal atoms in the oxide film was the same as the atomic ratio of metal atoms in the sputtering target used to produce the film.

[0090] (2) Crystallization Treatment (Annealing A) The substrate with the oxide film was heat-treated under the conditions shown in Table 2. In Table 2, a "-" for the temperature rise rate means that the substrate was placed in a furnace set to the heating temperature. After the treatment, the Hall effect was measured and the crystallinity of the film (crystalline or amorphous) was evaluated.

[0091] (3) Reduction Treatment (Annealing B) The substrate subjected to the crystallization treatment in (2) above was placed in a furnace under a nitrogen flow, heated from room temperature to 250°C in 3 minutes, and held at 250°C for 5 minutes. It was then allowed to cool to below 100°C and then removed from the furnace. The Hall effect of the film after the treatment was measured.

[0092] (4) Stabilization Treatment (Anneal C) After the above (3), the film was again heat-treated in the atmosphere at the temperature and for the time shown in Table 2. The Hall effect and the hydrogen atom (H) concentration of the treated film were measured by secondary ion mass spectrometry.

[0093] (B) Fabrication of TFT The TFT shown in Figure 3 was fabricated. (1) Formation of oxide (amorphous) film SiO ２ A silicon wafer 20 (gate electrode) with a thermal oxide film (gate insulating film 30) was used as a substrate. ２ On the thermal oxide film, an amorphous film 40 having a thickness of 40 nm was formed by sputtering through a metal mask using the sputtering target manufactured in Example 1-1 under the same film formation conditions as in (A)(1) above.

[0094] (2) Formation of Source Electrode and Drain Electrode Next, a titanium metal target was used to form titanium electrodes as the source electrode 50 and the drain electrode 60 by sputtering through a metal mask used to form contact holes for the source electrode 50 and the drain electrode 60, thereby fabricating a TFT.

[0095] (3) Crystallization Treatment (Annealing A) The TFT obtained in (2) above was subjected to a heat treatment under the same conditions (Table 2) as those for the semiconductor film (evaluation sample) in (A) above.

[0096] (4) Reduction Treatment (Annealing B) The TFT crystallized in (3) above was heat-treated under the same conditions (Table 2) as those for the semiconductor film (evaluation sample) in (A) above. That is, it was placed in a furnace under a nitrogen flow, heated from room temperature to 250°C in 3 minutes, and held at 250°C for 5 minutes. It was then allowed to cool to below 100°C and removed from the furnace.

[0097] (5) Stabilization Treatment (Anneal C) After the above (4), the semiconductor film was again subjected to heat treatment under the same conditions (Table 2) as those for the above (A) semiconductor film (evaluation sample).

[0098] [Characteristics Evaluation] The following evaluations were carried out on the evaluation samples and TFTs. The results are shown in Table 2. In the table, "X.XXE+YY" means "X.XX×10 ＋ＹＹ " For example, "1E-12" means "1 x 10 －１２ " (Hall Effect Measurement) Evaluation was performed on each evaluation sample after annealing A, B, and C. Metal indium (In) was soldered to the four corners of the film-coated substrate in a size of approximately 2 mm x 2 mm or less to prepare a sample for Hall effect measurement. The sample for Hall effect measurement was set in a Hall effect / resistivity measurement device (ResiTest 8300, manufactured by Toyo Corporation), and the Hall effect was evaluated at room temperature to determine the carrier concentration and mobility.

[0099] (Crystallineness of the film) The evaluation samples before and after the above-mentioned annealing A were evaluated. The crystallinity of the oxide film was evaluated by X-ray diffraction (XRD) measurement. When no peak was observed in the XRD measurement, it was judged as "amorphous", and when a peak was observed in the XRD measurement, it was judged as "crystalline". Furthermore, when a broad micropattern was observed instead of a clear peak, it was judged as "microcrystalline". Note that when the X-ray diffraction spectrum obtained by the XRD measurement was evaluated for those indicated as "crystalline", it was confirmed that they were crystalline with a bixbyite structure.

[0100] (Etching Characteristics) The evaluation samples before Anneal A were evaluated. The etching characteristics of the oxide film were evaluated by the taper angle. Specifically, a resist film patterned with 1 mm lines and spaces was formed on the substrate on which the oxide film had been formed by a photolithography process. The etching time was set to 1.5 times the just-etching time using a 4% aqueous oxalic acid solution, and the cross section of the etched surface was observed using an SEM to measure the etching angle.

[0101] (Hydrogen Atom Concentration) The evaluation sample after the above-mentioned annealing C was evaluated using a quadrupole secondary ion mass spectrometer (ULVAC-PHI: D-SIMS) with a Cs ion source of 1 kV, a primary ion current of 100 nA, and a chamber vacuum of 5×10 －１０ The measurement was performed under conditions of 1000 torr. The H secondary ion intensity at each depth obtained by a quadrupole secondary ion mass spectrometer was integrated by the film thickness to eliminate the influence of the semiconductor film interface, and the intensity was normalized using an In—O thin film with a known hydrogen concentration and film thickness to quantify the hydrogen concentration. The average of the obtained values ​​was taken as the hydrogen atomic concentration.

[0102] (Evaluation of TFT Characteristics) The linear mobility, threshold voltage (Vth), On / Off ratio, and off-current of the TFTs after annealing A and annealing C were evaluated. The linear mobility was determined from the transfer characteristics when a drain voltage of 0.1 V was applied. Specifically, a graph of the transfer characteristics Id-Vg was created, the transconductance (Gm) for each Vg was calculated, and the mobility was derived using the linear region equation. Gm is expressed by ∂(Id) / ∂(Vg), and Vg was applied from -15 to 25 V, and the maximum mobility in that range was defined as the linear mobility. Id is the current between the source and drain electrodes, and Vg is the gate voltage when a voltage Vd is applied between the source and drain electrodes. The threshold voltage (Vth) was determined from the transfer characteristics graph when Id=10 －９ The Vg was defined as V at 1000 V. The On / Off ratio was calculated from the ratio [on current value / off current value], where the Id value at Vg = -10 V was defined as the off current value and the Id value at Vg = 20 V was defined as the on current value.

[0103] (Evaluation of characteristics of high-speed response TFTs) The TFTs after the above anneal C were evaluated. The field-effect mobility μ in the linear region was determined from the transfer characteristics when a drain voltage of 0.1 V was applied. Specifically, a graph of the transfer characteristics Id-Vg was created, the transconductance (Gm) for each Vg was calculated, and the field-effect mobility was derived using the linear region equation. Gm is expressed as ∂(Id) / ∂(Vg). Vg was applied from -15 to 20 V, and the maximum mobility within that range was defined as the field-effect mobility. Id is the current between the source and drain electrodes, and Vg is the gate voltage when a voltage Vd is applied between the source and drain electrodes.

[0104] From the Vg-μ graph obtained by the field-effect mobility method in the linear region, the field-effect mobility at Vg = Vth (threshold voltage) + 5 (V) was calculated. In addition, the average field-effect mobility from Vg = Vth (V) to Vth + 20 (V) was calculated using the following formula.

[0105] Vg = Vth + 5 (V) field effect mobility is 10 cm ２ / Vs or more, and the average field effect mobility from Vg=Vth (V) to Vth+20 (V) is 50% or more of the maximum field effect mobility in that range, can be said to be a high-speed response TFT.

[0106]

[0107] Examples 3-1 to 3-3 Using the sputtering target produced in Example 1-2, a semiconductor film (evaluation sample) and a semiconductor layer of a TFT were produced and evaluated in the same manner as in Example 2-1, except for the film formation conditions shown in Table 3. The results are shown in Table 3.

[0108]

[0109] Examples 4-1 to 4-3: Using the sputtering targets produced in Examples 1-3, semiconductor films (evaluation samples) and semiconductor layers of TFTs were produced and evaluated in the same manner as in Example 2-1, except for the film formation conditions shown in Table 4. In Example 4-3, a pulsed DC sputtering method was used, with a pulse frequency of 100 kHz and a duty of 50%. The results are shown in Table 4.

[0110] * Example 4-3: Pulsed DC sputtering

[0111] Examples 5-1 to 5-3: Using the sputtering target produced in Example 1-4, a semiconductor film (evaluation sample) and a semiconductor layer of a TFT were produced and evaluated in the same manner as in Example 2-1, except for the film formation conditions shown in Table 5. In Example 5-3, a pulsed DC sputtering method was used, with a pulse frequency of 100 kHz and a duty of 50%. The results are shown in Table 5.

[0112] * Example 5-3: Pulsed DC sputtering

[0113] Examples 6-1 to 6-3 Semiconductor films (evaluation samples) and semiconductor layers of TFTs were prepared and evaluated in the same manner as in Example 2-1, except that the sputtering targets prepared in Example 1-5 were used and the film formation conditions shown in Table 6 were used. The results are shown in Table 6.

[0114]

[0115] Comparative Examples 2-1 to 2-3 Using the sputtering target produced in Comparative Example 1-1, a semiconductor film (evaluation sample) and a semiconductor layer of a TFT were produced and evaluated in the same manner as in Example 2-1, except for the film formation conditions shown in Table 7. The results are shown in Table 7. When a high-purity indium oxide target was used as in Comparative Example 2-1, the linear mobility of the TFT characteristics was 30 cm after annealing A at 300°C. ２ / V, but after annealing at 350°C, which is the stabilization treatment (anneal C), the linear mobility is 10 cm ２ / V·s.

[0116]

[0117] Comparative Examples 3-1 to 3-4 Using the sputtering target produced in Example 1-1, semiconductor films (evaluation samples) and semiconductor layers of TFTs were produced and evaluated in the same manner as in Example 2-1, except for the film formation conditions shown in Table 8. The results are shown in Table 8.

[0118]

[0119] FIG. 4 shows the transfer curve of the TFT fabricated in Example 2-1. FIG. 5 shows the Vg-μ graph of the TFT fabricated in Example 2-1. FIG. 6 shows the transfer curve of the TFT fabricated in Comparative Example 3-1. FIG. 7 shows the Vg-μ graph of the TFT fabricated in Comparative Example 3-1. From FIGS. 4 and 5, it can be seen that the TFT in which the semiconductor film was formed with a water partial pressure of 6% in the sputtering gas exhibited good performance. On the other hand, from FIGS. 6 and 7, it can be seen that when the film was formed in the absence of a hydrogen atom supply gas, as in the comparative example, the characteristics of the resulting TFT were inferior, even if sputtering was performed in the presence of oxygen.

[0120] Although several embodiments and / or examples of the present invention have been described in detail above, those skilled in the art will readily be able to make numerous modifications to these exemplary embodiments and / or examples without substantially departing from the novel teachings and advantages of the present invention. Accordingly, these numerous modifications are within the scope of the present invention. The contents of all documents cited in this specification and of the applications from which this application claims priority under the Paris Convention are incorporated by reference in their entirety.

Claims

1. comprising a solid-phase crystallized product of tin and hydrogen-doped indium oxide, wherein the content ratio of tin atoms (Sn) to the total of indium atoms (In) and tin atoms (Sn) in the solid-phase crystallized product [Sn / (In + Sn): mol ratio] is from 0.000005 to 0.008, and the hydrogen atom (H) concentration measured by secondary ion mass spectrometry is from 0.5 × 10^20 to 50 × 10^20 atoms / cc, a semiconductor film.

2. The semiconductor film according to claim 1, wherein the cross-section is in a tapered shape.

3. A method for manufacturing the semiconductor film according to claim 1 or 2, comprising: sputtering a tin-doped indium oxide (ITO) sputtering target in a film-forming gas containing a gas supplying hydrogen atoms at a partial pressure of 0.5 to 12% to form an amorphous film; heating the amorphous film to crystallize it.

4. The manufacturing method according to claim 3, further comprising, after the step of forming the amorphous film, a step of processing an etching cross-section into a tapered shape in a photolithography process.

5. A tin-doped indium oxide sputtering target for forming an amorphous film of tin and hydrogen-doped indium oxide, wherein the content ratio of tin atoms (Sn) to the total of indium atoms (In) and tin atoms (Sn) [Sn / (In + Sn): mol ratio] is from 0.000005 to 0.

008.

6. A thin film transistor comprising the semiconductor film according to claim 1 or 2.