Semiconductor apparatus and method for manufacturing semiconductor apparatus
Patent Information
- Application Number
- JP2024516044
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-04-22
- Filing Date
- 2022-04-22
- Publication Date
- 2025-04-22
- Estimated Expiration
- 2042-04-22
AI Technical Summary
In semiconductor device manufacturing, the use of adhesives in flip chip packaging leads to issues with fillet formation and peeling, particularly when the device is subjected to repeated heating and cooling cycles, resulting in internal stress and potential adhesive failure.
The implementation of a hybrid bonding technology that connects semiconductor chips without general adhesives, using adhesive film members to sandwich the bonding structure and form a fillet on the outside of the chip, thereby preventing fillet sticking and peeling, while also reducing device height and enhancing protection.
This approach improves the reliability and protection of the semiconductor device by eliminating fillet gaps and peeling risks, allowing for lower device height and stronger connections between chips, while using inorganic and organic insulating materials for enhanced bonding strength and heat resistance.
Abstract
Description
Semiconductor device and method for manufacturing the same
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.
[0002] Conventionally, wire bonding, which uses thin metal wires such as gold wires, has been widely used to connect semiconductor chips to substrates. However, in order to meet the demands for higher performance, higher integration, and higher speeds for semiconductor devices, flip-chip connection (FC connection), which directly connects the semiconductor chip to the substrate by forming conductive protrusions called bumps on the semiconductor chip or substrate, is becoming more popular.
[0003] Known FC connection methods include a method of joining the connection parts by metal bonding using solder, tin, gold, silver, copper, etc., a method of joining the connection parts by metal bonding using ultrasonic vibrations, and a method of maintaining mechanical contact by the contraction force of resin.From the viewpoint of the reliability of the connection parts, a method of joining the connection parts by metal bonding using solder, tin, gold, silver, copper, etc. is common.
[0004] For example, the COB (Chip On Board) type connection method, which is widely used for connecting semiconductor chips and substrates in BGA (Ball Grid Array), CSP (Chip Size Package), etc., also falls under the FC connection method. The FC connection method is also widely used in COC (Chip On Chip) type connection methods, which form connection portions (bumps or wiring) on semiconductor chips to connect semiconductor chips (see, for example, Patent Document 1).
[0005] Furthermore, in packages where further miniaturization, thinning, and high functionality are strongly required, chip-stacked packages, POP (Package On Package), TSV (Through-Silicon Via), and other stacked and multi-tiered versions of the above-mentioned connection methods are beginning to become widely used. These stacking and multi-tiering technologies arrange semiconductor chips and other components three-dimensionally, allowing for smaller packages compared to methods that arrange them two-dimensionally. Furthermore, these stacking and multi-tiering technologies are also effective in improving semiconductor performance, reducing noise, reducing packaging area, and saving power, and are therefore attracting attention as next-generation semiconductor wiring technologies.
[0006] JP 2012-222038 A
[0007] In the manufacturing method of a semiconductor device having the above-mentioned flip-chip package, a film-like adhesive as an underfill material is applied to a semiconductor wafer with protruding electrodes in advance, and then the wafer is singulated into individual semiconductor chips. Then, as shown in Figures 7 and 8, the singulated semiconductor chips with adhesive are stacked in order to obtain a multilayered semiconductor device. However, when the semiconductor chips with adhesive are stacked and pressed with a bonding tool, the film-like adhesive protrudes to the outside, forming a portion called a fillet 156. When the semiconductor chips are multilayered, adjacent fillets 156 in the stacking direction stick together, forming a gap V between the fillets 156. When a semiconductor device having such a gap V is repeatedly heated and cooled, the fillet expands and contracts, generating internal stress, which may cause the adhesive or the like to peel off from the gap V.
[0008] An object of the present disclosure is to provide a semiconductor device and a method for manufacturing the semiconductor device that can improve the reliability of a semiconductor device having multiple semiconductor chips.
[0009] The present disclosure relates to a semiconductor device, comprising: a first semiconductor component including a first semiconductor chip and a first insulating film and a first electrode provided thereon; a second semiconductor component including a second semiconductor chip and a second insulating film and a second electrode provided thereon; a first hybrid bonding structure component in which the first insulating film and the second insulating film are bonded together and the first electrode and the second electrode are joined together; a first adhesive film member attached to a surface of the second semiconductor chip of the first hybrid bonding structure component opposite the second insulating film; and a first bump connection component having first connection bumps disposed in the first adhesive film member and connected to electrodes of the second semiconductor chip.
[0010] This semiconductor device is configured to include a first hybrid bonding structure component using hybrid bonding technology that bonds and connects semiconductor chips (or semiconductor wafers, etc.) without using conventional adhesives, and first connection bumps having a first adhesive film member. This configuration allows the first hybrid bonding structure component to be sandwiched between adhesive film members, thereby preventing fillets from adhering to each other. This prevents gaps from forming in the fillets of the semiconductor device, preventing delamination originating from the gaps. As a result, this semiconductor device can improve reliability. Furthermore, connecting semiconductor chips using hybrid bonding technology can achieve a lower profile than connections using bumps, etc., allowing for a lower profile semiconductor device. Meanwhile, the adhesive film member allows the fillets to extend outside the semiconductor chip, thereby protecting the semiconductor chip in the semiconductor device. As a result, this semiconductor device can achieve a lower profile and improved protective function.
[0011] The semiconductor device may further include a third semiconductor component including a third semiconductor chip and a third insulating film and a third electrode provided on the third semiconductor chip, and a fourth semiconductor component including a fourth semiconductor chip and a fourth insulating film and a fourth electrode provided on the fourth semiconductor chip, the fourth insulating film and the fourth electrode being bonded to the third and fourth insulating films, a second hybrid bonding structure component having a second adhesive film member attached to a surface of the second hybrid bonding structure component opposite the fourth insulating film of the fourth semiconductor chip, and a second bump connecting component having second connection bumps disposed in the second adhesive film member and connected to the electrodes of the fourth semiconductor chip. In this semiconductor device, it is preferable that the second adhesive film member of the second bump connecting component be attached to a surface of the first hybrid bonding structure component opposite the first insulating film of the first semiconductor chip, and the second connection bumps be connected to the electrodes of the first semiconductor chip. This semiconductor device can improve reliability even when multi-layered. It can also achieve a low profile and enhanced protection function.
[0012] The semiconductor device may further include a substrate having wiring electrodes, and the first connection bumps of the first bump connection component may be connected to the wiring electrodes. This configuration allows for a more reliable connection between the first semiconductor component and the substrate.
[0013] In the semiconductor device described above, the first adhesive film member may protrude outward from the end of the second semiconductor chip to form a fillet. This configuration allows for more reliable protection of the semiconductor chip included in the semiconductor device. In this case, it is preferable that the maximum protrusion width of the fillet from the end of the second semiconductor chip is less than half the thickness of the first hybrid bonding structure component. This configuration allows for a balance between protecting the semiconductor chip and preventing peeling, thereby providing a more reliable semiconductor device.
[0014] In the semiconductor device, at least one of the first insulating film and the second insulating film may contain an inorganic insulating material. This configuration makes it possible to fabricate a semiconductor device with a finer configuration. Furthermore, since inorganic materials are easily bonded to each other, it is possible to increase the adhesive strength between semiconductor chips and further improve the connection reliability of the semiconductor device.
[0015] In the semiconductor device, at least one of the first insulating film and the second insulating film may contain an organic insulating material. With this configuration, the organic material, which is a relatively soft material, allows debris generated when the semiconductor chips are diced to be absorbed (embedded) in the insulating film made of the organic material, thereby reducing connection defects between the semiconductor chips joined by hybrid bonding.
[0016] In the semiconductor device described above, the organic insulating material contained in at least one of the first insulating film and the second insulating film may include polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These materials are liquid or soluble in a solvent, which facilitates the preparation of the first insulating film, for example, by spin coating, and facilitates the formation of thin films. Furthermore, these materials have high heat resistance, which allows them to withstand high temperatures and other conditions encountered during hybrid bonding, enabling more reliable bonding of semiconductor chips.
[0017] In the semiconductor device, the first adhesive film member preferably contains a cured product of a resin composition containing an epoxy resin, a thermoplastic resin, a curing agent, and an inorganic filler, which allows for more reliable bonding of the first hybrid bonding structure components and the like, thereby improving the reliability of the semiconductor device.
[0018] Another aspect of the present disclosure relates to a method for manufacturing a semiconductor device. This method for manufacturing a semiconductor device includes the steps of: preparing a first semiconductor substrate having a first substrate body including a plurality of first semiconductor elements, a first insulating film and a plurality of first electrodes provided on the first substrate body; preparing a second semiconductor substrate having a second substrate body including a plurality of second semiconductor elements, and a second insulating film and a plurality of second electrodes provided on the second substrate body; bonding the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate to each other and joining the plurality of first electrodes of the first semiconductor substrate and the plurality of second electrodes of the second semiconductor substrate to obtain a hybrid bonding structure; forming a plurality of connection bumps on a surface of the second substrate body opposite to the second insulating film; bonding an adhesive film member to a surface of the second substrate body opposite to the second insulating film; and dicing the hybrid bonding structure with the adhesive film member bonded to obtain a plurality of hybrid bonding laminate components each including at least one first semiconductor element, at least one first electrode, at least one second semiconductor element, at least one second electrode, and at least one connection bump.
[0019] This semiconductor device manufacturing method involves fabricating a hybrid bonding structure using hybrid bonding technology, which bonds and connects semiconductor substrates together without using conventional adhesives. An adhesive film is then bonded to the hybrid bonding structure, resulting in an adhesive-attached hybrid bonding laminate component. This manufacturing method allows the portions corresponding to the hybrid bonding structure to be sandwiched between adhesive film members, thereby preventing fillets from adhering to each other. This prevents gaps from forming in the fillets of the semiconductor device, preventing delamination originating from the gaps. As a result, this semiconductor device manufacturing method improves the reliability of the semiconductor device. Furthermore, connecting semiconductor chips using hybrid bonding technology allows for a lower profile than connections using bumps or the like, making it possible to fabricate a low-profile semiconductor device. Meanwhile, using an adhesive film member allows for fillets to be exposed outside the semiconductor chip, making it possible to obtain a semiconductor device configured to protect the semiconductor chip.
[0020] In the above-described semiconductor device manufacturing method, the plurality of hybrid bonding laminate components may include a first hybrid bonding laminate component and a second hybrid bonding laminate component, and the method may further include a step of attaching the second hybrid bonding laminate component to a first semiconductor chip corresponding to the first substrate body in the first hybrid bonding laminate component. In this case, even when the semiconductor device is multi-layered, the reliability of the semiconductor device can be improved. Furthermore, the semiconductor device can be made thinner and have enhanced protection functions.
[0021] The method for manufacturing a semiconductor device may further include the steps of: placing a first hybrid bonding laminate component on a substrate and then pressing the first hybrid bonding laminate component; and, after pressing the first hybrid bonding laminate component, placing a second hybrid bonding laminate component on the first hybrid bonding laminate component and pressing the second hybrid bonding laminate component. According to this manufacturing method, pressing is performed each time a hybrid bonding laminate component is placed, thereby preventing misalignment of the hybrid bonding laminate components and providing a semiconductor device with high connection accuracy.
[0022] The method for manufacturing a semiconductor device may further include a step of pressing the first hybrid bonding laminate component and the second hybrid bonding laminate component together after placing the second hybrid bonding laminate component on the first hybrid bonding laminate component. This method allows the hybrid bonding laminate components to be connected together at the same time, thereby enabling efficient fabrication of semiconductor devices.
[0023] In the above-described semiconductor device manufacturing method, in any of the pressing steps, a portion of at least one of the first and second hybrid bonding laminate components corresponding to the adhesive film member may be pushed outward from an end of the hybrid bonding laminate component in a direction intersecting the pressing direction. This manufacturing method allows for the fabrication of a semiconductor device having a fillet that more reliably protects the semiconductor chip. In this case, the maximum amount by which the portion corresponding to the adhesive film member is pushed outward may be less than half the thickness of the hybrid bonding laminate component. This manufacturing method allows for a more reliable semiconductor device to be provided by achieving a balance between protecting the semiconductor chip and preventing peeling.
[0024] The method for manufacturing a semiconductor device may further include the steps of preparing a substrate having wiring electrodes on its surface, and mounting the first hybrid bonding laminate component on the substrate so that the connection bumps of the first hybrid bonding laminate component are connected to the wiring electrodes. This manufacturing method allows for more reliable connection between the wiring electrodes of the substrate and the connection bumps of the first hybrid bonding laminate component.
[0025] In the above-described method for manufacturing a semiconductor device, at least one of the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate may contain an inorganic insulating material. This manufacturing method enables the fabrication of semiconductor devices with finer configurations. Furthermore, since inorganic materials are easily bonded to each other, the adhesive strength between semiconductor chips can be increased, thereby further improving the connection reliability of the semiconductor device.
[0026] In the above-described method for manufacturing a semiconductor device, at least one of the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate may contain an organic insulating material. According to this manufacturing method, the organic material, which is a relatively soft material, allows debris generated when the semiconductor substrate is diced into semiconductor chips to be absorbed (embedded) in the insulating film made of the organic material, thereby reducing connection defects between semiconductor chips joined by hybrid bonding.
[0027] In the above-described method for manufacturing a semiconductor device, the organic insulating material contained in at least one of the first insulating film and the second insulating film may include polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These materials are liquid or soluble in a solvent, which facilitates the preparation of the first insulating film, for example, by spin coating, and facilitates the formation of thin films. Furthermore, these materials have high heat resistance, which allows them to withstand high temperatures and other conditions encountered during hybrid bonding, enabling more reliable bonding of semiconductor chips.
[0028] In the method for manufacturing a semiconductor device, the adhesive film member may contain an epoxy resin, a thermoplastic resin, a curing agent, and an inorganic filler. This manufacturing method allows for more reliable bonding of the first hybrid bonding structure components and the like, thereby improving the reliability of the semiconductor device.
[0029] According to the present disclosure, a highly reliable semiconductor device can be provided.
[0030] FIG. 1 is a cross-sectional view schematically illustrating a semiconductor device according to an embodiment of the present disclosure. FIG. 2 is a plan view of the semiconductor device illustrated in FIG. 1 as viewed from above. FIGS. 3A and 3B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device illustrated in FIG. 1. FIGS. 4A and 4B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device illustrated in FIG. 1, illustrating steps subsequent to the steps illustrated in FIG. 3. FIGS. 5A and 5B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device illustrated in FIG. 1, illustrating steps subsequent to the steps illustrated in FIG. 4. FIGS. 6A and 6B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device illustrated in FIG. 1, illustrating steps subsequent to the steps illustrated in FIG. 5. FIGS. 7A to 7C are cross-sectional views sequentially illustrating a method for manufacturing a semiconductor device according to a comparative example. FIGS. 8A and 8B are cross-sectional views sequentially illustrating a method for manufacturing a semiconductor device according to a comparative example, illustrating steps subsequent to the steps illustrated in FIG. 7.
[0031] Hereinafter, several embodiments of the present disclosure will be described in detail, with reference to the drawings as necessary. In the following description, identical or equivalent parts will be designated by the same reference numerals, and duplicate explanations will be omitted. Furthermore, positional relationships such as up, down, left, and right will be based on the positional relationships shown in the drawings unless otherwise specified. When terms such as "left," "right," "front," "back," "top," "bottom," "upper," and "lower" are used in the description and claims of this specification, these are intended for explanatory purposes and do not necessarily mean that these relative positions will always be the same. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.
[0032] In this specification, the term "layer" encompasses not only a structure with a shape formed over the entire surface when observed in a plan view, but also a structure with a shape formed on a portion of the surface. Furthermore, in this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes, as long as the intended effect of the process is achieved. Furthermore, a numerical range indicated using "to" indicates a range that includes the numerical values before and after "to" as the minimum and maximum values, respectively.
[0033] (Configuration of Semiconductor Device) FIG. 1 is a cross-sectional view schematically illustrating an example of a semiconductor device according to this embodiment. As shown in FIG. 1 , the semiconductor device 1 is, for example, an example of a semiconductor package, and includes a substrate 10, a set of a first hybrid bonding structure component 40A and a first bump connection component 50A disposed on the substrate 10, and another set of a second hybrid bonding structure component 40B and a second bump connection component 50B disposed on the first hybrid bonding structure component 40A and the first bump connection component 50A. In this semiconductor device 1, the first bump connection component 50A, the first hybrid bonding structure component 40A, the second bump connection component 50B, and the second hybrid bonding structure component 40B are stacked in this order on the substrate 10. In this semiconductor device 1, the adhesive film members 52A, 52B of the first bump connection component 50A and the second bump connection component 50B have fillets 56 that protrude outward from their ends. The fillets 56 are formed so as not to adhere to each other in the stacking direction.
[0034] The substrate 10 has a plurality of wiring electrodes 12 on its surface 11. The substrate 10 is not particularly limited as long as it is a wired circuit board, and examples thereof include a circuit board in which wiring (wiring pattern) is formed by etching away unnecessary portions of a metal layer formed on the surface of an insulating substrate whose main component is glass epoxy, polyimide, polyester, ceramic, epoxy, bismaleimide triazine, polyimide, or the like; a circuit board in which wiring (wiring pattern) is formed on the surface of the insulating substrate by metal plating, or the like; and a circuit board in which wiring (wiring pattern) is formed by printing a conductive material on the surface of the insulating substrate. The wiring electrodes 12 are composed of, for example, gold, silver, or copper.
[0035] A first hybrid bonding stack component 60A, which is composed of a first hybrid bonding structure component 40A and a first bump connection component 50A, is disposed on the substrate 10. The first hybrid bonding structure component 40A is attached to the substrate 10 by the first bump connection component 50A.
[0036] The first hybrid bonding structure component 40A includes a first semiconductor component 26A including a first semiconductor chip 20A, a first insulating film 22A provided on the first semiconductor chip 20A, and a plurality of first electrodes 24A, and a second semiconductor component 36A including a second semiconductor chip 30A, a second insulating film 32A provided on the second semiconductor chip 30A, and a plurality of second electrodes 34A. In the first hybrid bonding structure component 40A, the first insulating film 22A and the second insulating film 32A are bonded together, and the plurality of first electrodes 24A and the plurality of second electrodes 34A are bonded to each other. Since various conventional methods can be used for forming the plurality of first electrodes 24A in the first insulating film 22A and for forming the plurality of second electrodes 34A in the second insulating film 32A, detailed descriptions thereof will be omitted here.
[0037] The first semiconductor chip 20A and the second semiconductor chip 30A are not particularly limited, and various semiconductors can be used, such as elemental semiconductors composed of the same type of element, such as silicon and germanium, and compound semiconductors, such as gallium arsenide and indium phosphide. The first semiconductor chip 20A and the second semiconductor chip 30A may have terminal electrodes 21a, 31a for connecting the semiconductor chip to the outside and through-electrodes 21b, 31b penetrating the semiconductor chip. The terminal electrodes 21a of the first semiconductor chip 20A are connected to the terminal electrodes 31a of the fourth semiconductor chip 30B via second connection bumps 54B, which will be described later. The through-electrodes 21b of the first semiconductor chip 20A are connected to the terminal electrodes 21a and the first electrodes 24A. The terminal electrodes 31a of the second semiconductor chip 30A are connected to the wiring electrodes 12 of the substrate 10 via the first connection bumps 54A. The through-electrodes 31b of the second semiconductor chip 30A are connected to the terminal electrodes 31a and the second electrodes 34A. The thickness of the first semiconductor chip 20A and the second semiconductor chip 30A is, for example, in the range of 0.2 mm to 2.0 mm.
[0038] The first insulating film 22A and the second insulating film 32A are configured to contain an inorganic insulating material or an organic insulating material. The first insulating film 22A and the second insulating film 32A may be configured to contain both an inorganic insulating material and an organic insulating material. The inorganic insulating material used for the insulating film is, for example, silicon oxide (SiO 2 ) When an inorganic insulating material such as silicon oxide is used for the insulating film, it is possible to manufacture semiconductor devices with finer structures. In addition, since it is easy to bond inorganic insulating materials together, it is possible to increase the adhesive strength between semiconductor chips and improve the connection reliability of the semiconductor device.
[0039] The organic insulating material used for the first insulating film 22A and the second insulating film 32A is, for example, polyimide, a polyimide precursor (for example, polyimide ester or polyamic acid), polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These organic insulating materials are, for example, silicon oxide (SiO 2The organic insulating material has a lower elastic modulus than inorganic insulating materials such as silicon dioxide, making it a softer material. By using such an organic insulating material, even if fine debris is present on the insulating film when bonding the insulating films together, it is absorbed into the insulating film, preventing bonding defects caused by the debris and enabling reliable bonding of the insulating films together. The elastic modulus of the organic material constituting the first insulating film 22A and the second insulating film 32A may be, for example, 7.0 GPa or less, 5.0 GPa or less, 3.0 GPa or less, 2.0 GPa or less, or 1.5 GPa or less. The elastic modulus here refers to Young's modulus. The organic insulating material constituting the first insulating film 22A and the second insulating film 32A preferably has a thermal expansion coefficient of 70 ppm / K or less, more preferably 50 ppm / K or less.
[0040] The thickness of the first insulating film 22A and the second insulating film 32A is preferably 10 μm or less, more preferably 5 μm or less, and even more preferably 3 μm or less. By setting the thickness of the first insulating film 22A and the second insulating film 32A to such a thickness, the first electrode 24A and the second electrode 34A formed in the first insulating film 22A and the second insulating film 32A can be miniaturized. From the viewpoint of ensuring electrical reliability, the thickness of the first insulating film 22A and the second insulating film 32A is preferably 1 μm or more.
[0041] The first electrode 24A and the second electrode 34A are terminal electrodes provided on the inner surfaces 20a, 30a of the first semiconductor chip 20A and the second semiconductor chip 30A, and are made of, for example, copper or aluminum. The first electrode 24A penetrates the first insulating film 22A and is exposed on the surface of the first insulating film 22A opposite to the surface 20a to which the first semiconductor chip 20A is connected. The second electrode 34A penetrates the second insulating film 32A and is exposed on the surface of the second insulating film 32A opposite to the surface 30a to which the second semiconductor chip 30A is connected. In the first hybrid bonding structure component 40A, the first electrode 24A and the second electrode 34A are bonded to each other.
[0042] The first bump connection component 50A attached to the first hybrid bonding structure component 40A has a first adhesive film member 52A attached to the surface of the second semiconductor chip 30A opposite the second insulating film 32A, and first connection bumps 54A disposed in the first adhesive film member 52A and flip-chip connected to the terminal electrodes 31a of the second semiconductor chip 30A. The first connection bumps 54A contain gold, silver, copper, solder (the main components of which may be, for example, tin-silver, tin-lead, tin-bismuth, or tin-copper), nickel, tin, lead, or the like as their main components, and may also contain multiple metals.
[0043] The first adhesive film member 52A contains an epoxy resin, a thermoplastic resin, a curing agent, a fluxing agent, and an inorganic filler. The first adhesive film member 52A may be an insulating resin layer that does not contain a conductive filler (conductive particles). In the semiconductor device 1, the first adhesive film member 52A is a cured product of a resin composition that contains the above-mentioned epoxy resin, a thermoplastic resin, a curing agent, a fluxing agent, and an inorganic filler. Such a first adhesive film member 52A can be formed using, for example, an NCF (non-conductive film).
[0044] A second hybrid bonding stack component 60B consisting of a second hybrid bonding structure component 40B and a second bump connection component 50B is disposed on the first hybrid bonding stack component 60A having such a configuration, and the second hybrid bonding structure component 40B is attached to the first semiconductor chip 20A of the first hybrid bonding stack component 60A by the second bump connection component 50B. The second hybrid bonding stack component 60B has a configuration similar to that of the first hybrid bonding stack component 60A, and in the following description, some overlapping portions may be omitted.
[0045] The second hybrid bonding structure component 40B has a third semiconductor component 26B including a third semiconductor chip 20B, a third insulating film 22B provided on the third semiconductor chip 20B, and a plurality of third electrodes 24B, and a fourth semiconductor component 36B including a fourth semiconductor chip 30B, a fourth insulating film 32B provided on the fourth semiconductor chip 30B, and a plurality of fourth electrodes 34B. In the second hybrid bonding structure component 40B, the third insulating film 22B and the fourth insulating film 32B are bonded together, and the plurality of third electrodes 24B and the plurality of fourth electrodes 34B are respectively joined.
[0046] The third semiconductor chip 20B and the fourth semiconductor chip 30B are semiconductor chips similar to the first semiconductor chip 20A and the second semiconductor chip 30A. The third semiconductor chip 20B and the fourth semiconductor chip 30B may have terminal electrodes 21a, 31a for connecting the semiconductor chip to the outside and through-electrodes 21b, 31b that penetrate the semiconductor chip. The terminal electrodes 31a of the fourth semiconductor chip 30B are connected to the terminal electrodes 21a of the first semiconductor chip 20A via second connection bumps 54B. The through-electrodes 31b of the fourth semiconductor chip 30B are connected to the terminal electrodes 31a and the fourth electrodes 34B. The thickness of the third semiconductor chip 20B and the fourth semiconductor chip 30B is, for example, in the range of 0.2 mm to 2.0 mm, similar to the first semiconductor chip 20A, etc.
[0047] Like the first insulating film 22A and the second insulating film 32A, the third insulating film 22B and the fourth insulating film 32B are composed of an inorganic insulating material or an organic insulating material. The third insulating film 22B and the fourth insulating film 32B may be composed of both an inorganic insulating material and an organic insulating material. The inorganic insulating material or organic insulating material used for the insulating film is the same as that of the first insulating film 22A. Similarly, the thickness of the third insulating film 22B and the fourth insulating film 32B is preferably 10 μm or less, more preferably 5 μm or less, and even more preferably 3 μm or less. From the viewpoint of ensuring electrical reliability, the thickness of the third insulating film 22B and the fourth insulating film 32B is preferably 1 μm or more.
[0048] The third electrode 24B and the fourth electrode 34B are terminal electrodes provided on the inner surfaces 20a, 30a of the third semiconductor chip 20B and the fourth semiconductor chip 30B, and are made of, for example, copper or aluminum. The third electrode 24B penetrates the third insulating film 22B and is exposed on the surface of the third insulating film 22B opposite to the surface 20a to which the third semiconductor chip 20B is connected. The fourth electrode 34B penetrates the fourth insulating film 32B and is exposed on the surface of the fourth insulating film 32B opposite to the surface 30a to which the fourth semiconductor chip 30B is connected. In the second hybrid bonding structure component 40B, the third electrode 24B and the fourth electrode 34B are bonded to each other.
[0049] The second bump connection component 50B attached to the second hybrid bonding structure component 40B, like the first bump connection component 50A, has a second adhesive film member 52B attached to the surface of the fourth semiconductor chip 30B opposite the fourth insulating film 32B, and second connection bumps 54B disposed in the second adhesive film member 52B and flip-chip connected to the terminal electrodes 31a of the fourth semiconductor chip 30B. The second connection bumps 54B contain, as main components, gold, silver, copper, solder (main components being, for example, tin-silver, tin-lead, tin-bismuth, or tin-copper), nickel, tin, lead, or the like, and may contain multiple metals.
[0050] Referring again to FIG. 1 , the connection configuration of the semiconductor device 1 having the above-described configuration will be described. In the semiconductor device 1, a first hybrid bonding stack component 60A, which is a pair of a first hybrid bonding structure component 40A and a first bump connection component 50A, is disposed on a substrate 10. In this first hybrid bonding stack component 60A, the wiring electrodes 12 of the substrate 10 are connected to terminal electrodes 31a of a second semiconductor chip 30A of the first hybrid bonding structure component 40A via first connection bumps 54A. This terminal electrode 31a is connected to terminal electrodes 21a of the first semiconductor chip 20A via second electrodes 34A, first electrodes 24A, and through electrodes 21b of the first semiconductor chip 20A. Furthermore, a second hybrid bonding stack component 60B, which is a pair of a second hybrid bonding structure component 40B and a second bump connection component 50B, is disposed on the first hybrid bonding stack component 60A. In this second hybrid bonding laminate component 60B, the terminal electrodes 21a of the first semiconductor chip 20A are connected to the terminal electrodes 31a of the fourth semiconductor chip 30B of the second hybrid bonding structure component 40B via the second connection bumps 54B. The terminal electrodes 31a are connected to the through electrodes 21b of the third semiconductor chip 20B via the fourth electrodes 34B and the third electrodes 24B. In this semiconductor device 1, the hybrid bonding structure components and the bump connection components including the adhesive film members are alternately laminated.
[0051] Furthermore, in the semiconductor device 1, the first adhesive film member 52A and the second adhesive film member 52B of the first bump connection component 50A and the second bump connection component 50B protrude outward from the end of each semiconductor chip, forming a fillet 56. FIG. 2 is a plan view of the semiconductor device 1 viewed from the top. As shown in FIG. 2, the fillet 56 is an adhesive portion that protrudes outward beyond the entire outer periphery of the semiconductor chip (e.g., the third semiconductor chip 20B) and serves to protect the first semiconductor chip 20A, the second semiconductor chip 30A, the third semiconductor chip 20B, and the fourth semiconductor chip 30B in the semiconductor device 1. The maximum protrusion width T of the fillet 56 may be, for example, less than half the thickness (height) of the first hybrid bonding structure component 40A or the second hybrid bonding structure component 40B. Providing the fillet 56 with such a width prevents adjacent fillets 56 from sticking together in the vertical direction and also provides reliable protection for the semiconductor device 1.
[0052] (Method of Manufacturing Semiconductor Device) Next, a method of manufacturing the semiconductor device 1 will be described with reference to FIGS. 3 to 5. FIGS. 3(a) and 3(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1. FIGS. 4(a) and 4(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1, showing steps subsequent to the steps shown in FIG. 3. FIGS. 5(a) and 5(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1, showing steps subsequent to the steps shown in FIG. 4. FIGS. 6(a) and 6(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1, showing steps subsequent to the steps shown in FIG.
[0053] The semiconductor device 1 can be manufactured, for example, through the following steps (a) to (h): (a) preparing a first semiconductor substrate having a first substrate body including a plurality of first semiconductor elements, and a first insulating film and a plurality of first electrodes provided on the first substrate body; (b) preparing a second semiconductor substrate having a second substrate body including a plurality of second semiconductor elements, and a second insulating film and a plurality of second electrodes provided on the second substrate body; (c) bonding the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate to each other and joining the plurality of first electrodes of the first semiconductor substrate and the plurality of second electrodes of the second semiconductor substrate to obtain a hybrid bonding structure; (d) forming a plurality of connection bumps on the surface of the second substrate body opposite the second insulating film; and (e) bonding an adhesive film member to the surface of the second substrate body opposite the second insulating film. (f) dicing the hybrid bonding structure to which the adhesive film member has been attached to obtain a plurality of hybrid bonding laminate components, each of which includes at least one first semiconductor element, at least one first electrode, at least one second semiconductor element, at least one second electrode, and at least one connection bump; and (g) stacking and attaching a plurality of hybrid bonding laminate components together.
[0054] [Steps (a) and (b)] Step (a) is a step of preparing a first semiconductor substrate 70, which is a silicon substrate on which integrated circuits consisting of semiconductor elements and wiring connecting them are formed, corresponding to multiple semiconductor components including the first semiconductor component 26A and the third semiconductor component 26B. In step (a), as shown in FIG. 3A, multiple first electrodes 74 made of copper, aluminum, or the like are provided at predetermined intervals on one surface 72a of a first substrate body 72 made of silicon or the like, and a first insulating film 76 made of an inorganic or organic material is also provided. The first substrate body 72 may be, for example, a circular or rectangular semiconductor wafer. The first electrodes 74 are end electrodes that penetrate the first insulating film 76 to expose the integrated circuits and the like formed on the first semiconductor substrate 70 to the outside. The multiple first electrodes 74 may be provided after the first insulating film 76 is provided on the one surface 72a of the first substrate body 72, or the multiple first electrodes 74 may be provided on the one surface 72a of the first substrate body 72 before the first insulating film 76 is provided. The first substrate body 72 may be provided with terminal electrodes 72b connected to an integrated circuit or the like and through electrodes 72c that penetrate the substrate body.
[0055] Step (b) is a step of preparing a second semiconductor substrate 80, which is a silicon substrate on which integrated circuits consisting of semiconductor elements and wiring connecting them are formed, corresponding to multiple semiconductor components including the second semiconductor component 36A and the fourth semiconductor component 36B. In step (b), as shown in FIG. 3A, multiple second electrodes 84 made of copper, aluminum, or the like are provided at predetermined intervals on one surface 82a of a second substrate body 82 made of silicon or the like, and a second insulating film 86 made of an inorganic or organic material is provided. The second substrate body 82 may be, for example, a circular or rectangular semiconductor wafer, similar to the first substrate body 72. The second electrodes 84 are end electrodes that penetrate the second insulating film 86 to expose the integrated circuits and the like formed on the second semiconductor substrate 80 to the outside. The multiple second electrodes 84 may be provided after the second insulating film 86 is provided on the one surface 82a of the second substrate body 82, or the multiple second electrodes 84 may be provided on the one surface 82a of the second substrate body 82 before the second insulating film 86 is provided.
[0056] The first insulating film 76 and the second insulating film 86 used in the steps (a) and (b) correspond to the first insulating film 22A, the second insulating film 32A, the third insulating film 22B, and the fourth insulating film 32B described above, and are made of an inorganic material or an organic material. The inorganic material used for the insulating film is, for example, silicon oxide (SiO 2 ) and the like. When an inorganic material such as silicon oxide is used for the insulating film, a semiconductor device with a finer configuration can be manufactured. Furthermore, when insulating films are bonded together in the step (c) described below, the bonding strength between the semiconductor substrates can be increased, because the bonding strength between the inorganic materials is easily strengthened, and this makes it possible to improve the connection reliability of the semiconductor device.
[0057] The organic material used for the insulating film is, for example, polyimide, a polyimide precursor (e.g., polyimide ester or polyamic acid), polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These organic materials are, for example, silicon oxide (SiO 2 The organic material has a lower elastic modulus than inorganic materials such as silicon dioxide, making it a soft material. By using such an organic material, even if fine debris is present on the insulating film, it is absorbed into the insulating film when bonding the insulating films together in the step (c) described below, preventing bonding defects due to the debris and enabling reliable bonding of the insulating films together. The elastic modulus of the organic material constituting the first insulating film 76 and the second insulating film 86 may be, for example, 7.0 GPa or less, 5.0 GPa or less, 3.0 GPa or less, 2.0 GPa or less, or 1.5 GPa or less. The elastic modulus here refers to Young's modulus. The organic material constituting the first insulating film 76 and the second insulating film 86 preferably has a thermal expansion coefficient of 70 ppm / K or less, and more preferably 50 ppm / K or less.
[0058] Furthermore, since the organic materials used for the insulating films are liquid or soluble in a solvent, each insulating film can be easily formed as a thin film by spin coating or the like. Furthermore, since these organic materials are heat-resistant, they can withstand the temperatures (e.g., high temperatures of 300°C or higher) that are encountered when bonding the first electrode 74 and the second electrode 84 in step (c) described below, preventing the bonding between the insulating films from deteriorating due to high temperatures. Note that the first insulating film 76 and the second insulating film 86 may be insulating films containing both inorganic and organic materials.
[0059] The thickness of the first insulating film 76 and the second insulating film 86 may be 20 μm or less. By making the thickness of the first insulating film 76 and the second insulating film 86 sufficiently thin, the wiring formed by the first electrode 74 and the second electrode 84 can be made finer. The thickness of the first insulating film 76 and the second insulating film 86 may be greater than 20 μm. In this case, when the insulating films are bonded together, more debris can be embedded in the resin insulating film, allowing the insulating films to be more reliably bonded together. The thickness of the first insulating film 76 and the second insulating film 86 may be 4 μm or more. In this case, by embedding minute debris in the resin insulating film, it is possible to improve the connection between the first insulating film 76 and the second insulating film 86 even if minute debris remains.
[0060] In step (c), the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 are bonded together, and the multiple first electrodes 74 of the first semiconductor substrate 70 and the multiple second electrodes 84 of the second semiconductor substrate 80 are joined together to obtain a hybrid bonding structure S. Prior to step (c), as a pretreatment, the bonding surfaces 70 a of the first semiconductor substrate 70 and the bonding surfaces 80 a of the second semiconductor substrate 80 are polished using a chemical mechanical polishing (CMP) method. For example, the first semiconductor substrate 70 may be polished by the CMP method under conditions that selectively and deeply polish the first electrodes 74 made of copper or the like, or the CMP method may be used to polish the first electrodes 74 so that their surfaces coincide with the surfaces of the first insulating films 76. The second semiconductor substrate 80 is polished in a similar manner. By such polishing, debris on the surfaces of the first semiconductor substrate 70 and the second semiconductor substrate 80 is also removed.
[0061] In step (c), organic matter or metal oxide adhering to the bonding surface 70a of the first semiconductor substrate 70 and the bonding surface 80a of the second semiconductor substrate 80 is removed, and then, as shown in FIGS. 3A and 3B , the bonding surface 70a of the first semiconductor substrate 70 and the bonding surface 80a of the second semiconductor substrate 80 are brought into face-to-face relationship, and the first electrode 74 of the first semiconductor substrate 70 and the second electrode 84 are aligned. During this alignment step, the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 are spaced apart from each other and are not bonded. After the alignment is complete, the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 are bonded. At this time, the first insulating film 76 and the second insulating film 86 may be uniformly heated before bonding. The heating temperature when bonding the first insulating film 76 and the second insulating film 86 may be, for example, 30° C. or higher and 400° C. or lower, and the pressure may be 0.1 MPa or higher and 1 MPa or lower. By heat bonding at such a temperature, the first insulating film 76 and the second insulating film 86 are bonded to form an insulating bonded portion, and the first semiconductor substrate 70 and the second semiconductor substrate 80 are mechanically and firmly attached to each other.
[0062] After the insulating film bonding is completed, a predetermined heat or pressure, or both, is applied to bond the first electrode 74 of the first semiconductor substrate 70 and the second electrode 84 of the second semiconductor substrate 80. When the first electrode 74 and the second electrode 84 are made of copper, the heating temperature is 150°C to 400°C, or may be 200°C to 300°C, and the pressure may be 0.1 MPa to 1 MPa. This bonding process bonds the first electrode 74 and the corresponding second electrode 84 to form an electrode bonded portion, and the first electrode 74 and the second electrode 84 are mechanically and electrically firmly bonded. Note that the electrode bonding may be performed after the insulating film is bonded, or the electrode bonding and the insulating film bonding may be performed simultaneously. In this manner, a hybrid bonding structure S is obtained.
[0063] In step (d), a plurality of connection bumps 54 are formed on a surface 82d of the second substrate body 82 of the hybrid bonding structure S opposite the second insulating film 86. The connection bumps 54 contain gold, silver, copper, solder (the main component of which may be, for example, tin-silver, tin-lead, tin-bismuth, or tin-copper), nickel, tin, lead, or the like as a main component, and may contain a plurality of metals. In step (d), as shown in FIG. 4A, such connection bumps 54 are formed so as to connect to a plurality of connection terminals 82b of the second substrate body 82. A conventional manufacturing method can be used.
[0064] In step (e), after the plurality of connection bumps 54 are formed in step (d), as shown in FIG. 4B, an adhesive film member 52 is bonded to a surface 82d of the second substrate main body 82 opposite to the second insulating film 86. This bonding results in the plurality of connection bumps 54 being located within the adhesive film member 52. The plurality of connection bumps 54 may or may not be exposed from the surface of the adhesive film member 52.
[0065] The adhesive film member 52 used here corresponds to the first adhesive film member 52A and the second adhesive film member 52B described above, and contains an epoxy resin, a thermoplastic resin, a curing agent, a fluxing agent, and an inorganic filler. The adhesive film member 52 may be an insulating resin layer that does not contain a conductive filler (conductive particles).
[0066] (Epoxy Resin) The epoxy resin is not particularly limited as long as it has an epoxy group in the molecule, but an epoxy resin having two or more epoxy groups in the molecule can be preferably used. Examples of such epoxy resins include bisphenol A type epoxy resins, bisphenol F type epoxy resins, naphthalene type epoxy resins, phenol novolac type epoxy resins, cresol novolac type epoxy resins, phenol aralkyl type epoxy resins, biphenyl type epoxy resins, triphenolmethane type epoxy resins, and dicyclopentadiene type epoxy resins; and these polyfunctional epoxy resins. The epoxy resins may be used alone or in combination of two or more. Of these, the epoxy resin preferably includes a bisphenol type epoxy resin or a triphenolmethane type epoxy resin.
[0067] The epoxy resin is preferably one that can suppress decomposition and generation of volatile components during connection at high temperatures. Therefore, it is preferable to use an epoxy resin whose mass loss rate under heating conditions during connection is 5% by mass or less. For example, when the heating temperature during connection is 250°C, it is preferable to use an epoxy resin whose mass loss rate at 250°C is 5% by mass or less, and when the heating temperature is 300°C, it is preferable to use an epoxy resin whose mass loss rate at 300°C is 5% by mass or less.
[0068] The content of the epoxy resin is preferably 5 to 75 mass %, more preferably 10 to 55 mass %, and even more preferably 20 to 50 mass %, based on the total amount of the adhesive film member. When the content of the epoxy resin is within this range, the curability and adhesiveness tend to be excellent.
[0069] (Thermoplastic resin) From the viewpoint of obtaining excellent heat resistance, film formability and connection reliability, the thermoplastic resin preferably contains at least one selected from the group consisting of phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, polyethersulfone resin, polyetherimide resin, polyvinyl acetal resin, urethane resin and acrylic rubber. From the viewpoint of even better heat resistance and film formability, the thermoplastic resin more preferably contains at least one selected from the group consisting of phenoxy resin, polyimide resin, acrylic rubber, acrylic resin, cyanate ester resin and polycarbodiimide resin, and even more preferably contains at least one selected from the group consisting of phenoxy resin, polyimide resin, acrylic rubber and acrylic resin.
[0070] The weight average molecular weight of the thermoplastic resin is preferably 10,000 or more, more preferably 20,000 or more, and even more preferably 30,000 or more. When the weight average molecular weight of the thermoplastic resin is 10,000 or more, the heat resistance and film formability of the adhesive film member tend to be further improved. The weight average molecular weight of the thermoplastic resin is preferably 1,000,000 or less, more preferably 500,000 or less. When the weight average molecular weight of the thermoplastic resin is 1,000,000 or less, the effect of high heat resistance tends to be obtained.
[0071] The weight average molecular weight is a value measured using GPC (gel permeation chromatography) and converted using a calibration curve based on standard polystyrene. An example of the measurement conditions for the weight average molecular weight is shown below.
[0072] Apparatus name: HCL-8320GPC, UV-8320 (manufactured by Tosoh Corporation), or HPLC-8020 (manufactured by Tosoh Corporation) Column: TSKgel superMultiporeHZ-M x 2, or 2 pieces of GMHXL + 1 piece of G-2000XL Detector: RI or UV detector Column temperature: 25 to 40°C Eluent: A solvent in which the object to be measured dissolves can be selected. Examples of solvents include THF (tetrahydrofuran), DMF (N,N-dimethylformamide), DMA (N,N-dimethylacetamide), NMP (N-methyl-2-pyrrolidone), and toluene. When a polar solvent is selected, the concentration of phosphoric acid may be adjusted to 0.05 to 0.1 mol / L (usually 0.06 mol / L) and the concentration of LiBr may be adjusted to 0.5 to 1.0 mol / L (usually 0.63 mol / L). Flow rate: 0.30 to 1.5 mL / min. Standard material: polystyrene.
[0073] The mass ratio of the epoxy resin content to the thermoplastic resin content (epoxy resin content / thermoplastic resin content), based on the total amount of the adhesive film member, is preferably 0.01 to 20, more preferably 0.05 to 15, and even more preferably 0.1 to 10.
[0074] (Curing Agent) The curing agent is not particularly limited, but examples thereof include imidazole-based curing agents, phenolic resin-based curing agents, acid anhydride-based curing agents, amine-based curing agents, phosphine-based curing agents, etc. Among these, it is preferable that the curing agent contains an imidazole-based curing agent, from the viewpoint of exhibiting good flux performance and being superior in storage stability and heat resistance of the cured product of the adhesive film.
[0075] Examples of the imidazole curing agent include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6- Examples of such compounds include [2'-undecylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-s-triazine, an isocyanuric acid adduct of 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, an isocyanuric acid adduct of 2-phenylimidazole, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, and an adduct of an epoxy resin and an imidazole. These compounds may be used alone or in combination of two or more.
[0076] Among these, from the viewpoint of superior curing properties, storage stability, and connection reliability, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-ethyl- Preferably, the latent curing agent is at least one selected from the group consisting of 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, an isocyanuric acid adduct of 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, an isocyanuric acid adduct of 2-phenylimidazole, 2-phenyl-4,5-dihydroxymethylimidazole, and 2-phenyl-4-methyl-5-hydroxymethylimidazole. These may also be microencapsulated and used as latent curing agents.
[0077] The content of the curing agent is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass, per 100 parts by mass of the epoxy resin. When the content of the curing agent is 0.1 part by mass or more per 100 parts by mass of the epoxy resin, the curing property tends to be further improved, while when the content is 20 parts by mass or less, the adhesive film does not harden before the metal bond is formed, and connection defects tend to be less likely to occur.
[0078] (Fluxing Agent) The fluxing agent can be any compound having a carboxyl group, but dicarboxylic acids (compounds having two carboxyl groups) are preferred. Dicarboxylic acids are less likely to volatilize at high temperatures during connection than monocarboxylic acids (compounds having one carboxyl group), and tend to further suppress the occurrence of voids. Furthermore, the use of dicarboxylic acids tends to further suppress the increase in viscosity of the adhesive film during storage, connection work, etc., compared to the use of compounds having three or more carboxyl groups, and tends to further improve the connectivity of the semiconductor device.
[0079] The fluxing agent may be, for example, a dicarboxylic acid having a linear or branched alkylene group. Examples of such dicarboxylic acids include succinic acid (melting point: 184°C), glutaric acid (melting point: 95-98°C), adipic acid (melting point: 152°C), pimelic acid (melting point: 103-105°C), suberic acid (melting point: 141-144°C), azelaic acid (melting point: 109°C), sebacic acid (melting point: 133-137°C), undecanedioic acid (melting point: 28-31°C), and dodecanedioic acid (melting point: 127-129°C). Also included are branched alkylene dicarboxylic acids in which one or more hydrogen atoms at the second or third positions of these linear alkylene dicarboxylic acids are substituted with alkyl groups. An example of a dicarboxylic acid having a branched alkylene group is 2-methylglutaric acid (melting point: 80 to 82° C.). The fluxing agent preferably contains 2-methylglutaric acid or glutaric acid.
[0080] The melting point of the fluxing agent is preferably 150°C or lower, more preferably 140°C or lower, and even more preferably 130°C or lower. Such fluxing agents tend to exhibit sufficient fluxing performance before the curing reaction between the epoxy resin and the curing agent occurs. Therefore, by using an adhesive film containing such a fluxing agent, semiconductor devices with even more excellent connection reliability can be fabricated. Furthermore, the fluxing agent is preferably solid at room temperature (25°C), and the melting point of the fluxing agent is preferably 25°C or higher, more preferably 50°C or higher.
[0081] The content of the fluxing agent may be, for example, 0.5 to 10 mass % based on the total amount of the adhesive film.
[0082] (Inorganic Filler) When the adhesive film member contains an inorganic filler, the occurrence of voids during connection tends to be further suppressed, and the moisture absorption of the cured product of the adhesive film tends to be further reduced.
[0083] The inorganic filler is preferably an insulating material from the viewpoint of excellent insulation reliability (particularly HAST resistance). Examples of such inorganic fillers include glass, silica, alumina, titanium oxide, carbon black, mica, boron nitride, etc. These may be used alone or in combination of two or more. Among these, the inorganic filler is preferably at least one selected from the group consisting of silica, alumina, titanium oxide, and boron nitride, more preferably at least one selected from the group consisting of silica, alumina, and boron nitride. There are no particular restrictions on the shape and particle size of these. Furthermore, the inorganic filler may be surface-treated.
[0084] The content of the inorganic filler is preferably 20 to 70 mass %, more preferably 25 to 65 mass %, and even more preferably 30 to 60 mass %, based on the total amount of the adhesive film member. When the content of the inorganic filler is within this range, the adhesive film tends to have a smooth appearance and the components tend to be easily dispersed.
[0085] (Resin Filler) The adhesive film may further contain a resin filler. Examples of the resin filler include fillers made of resins such as polyurethane and polyimide. The content of the resin filler is preferably 1 to 30 mass %, more preferably 2 to 30 mass %, and even more preferably 3 to 15 mass %, based on the total amount of the adhesive film.
[0086] (Other Components) The adhesive film member may further contain other components such as a curing accelerator, a silane coupling agent, a titanium coupling agent, an antioxidant, a leveling agent, an ion trapping agent, etc. The content of the other components can be appropriately adjusted so that each component exerts its effect, and may be, for example, 0.1 to 20 mass% each based on the total amount of the adhesive film.
[0087] The adhesive film member can be formed, for example, by the following method. First, an organic solvent is added as needed to a resin composition containing the above-mentioned components constituting the adhesive film, and the resulting resin composition varnish is applied to a substrate film that has been subjected to a release treatment using a knife coater, roll coater, applicator, etc. Then, the applied resin composition varnish is heated to remove the organic solvent, thereby forming an adhesive film on the substrate film.
[0088] The organic solvent used in preparing the resin composition varnish is not particularly limited as long as it has the property of being able to uniformly dissolve or disperse each component, and examples thereof include dimethylformamide, dimethylacetamide, N-methyl-2-pyrrolidone, dimethyl sulfoxide, diethylene glycol dimethyl ether, toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, ethyl acetate, etc. These organic solvents can be used alone or in combination of two or more. Among these, the organic solvent preferably contains methyl ethyl ketone.
[0089] Stirring, mixing, kneading, etc. in the preparation of the resin composition varnish can be carried out using, for example, a stirrer, a kneading machine, a three-roll mill, a ball mill, a bead mill, a homodisper, or the like.
[0090] The substrate film is not particularly limited as long as it has heat resistance sufficient to withstand the heating conditions when drying the organic solvent. Examples of the substrate film include polyolefin films such as polypropylene film and polymethylpentene film, polyester films such as polyethylene terephthalate film and polyethylene naphthalate film, polyimide film, polyetherimide film, etc. The substrate film may be a single-layer film of one type or a multilayer film of two or more types.
[0091] The thickness of the resulting adhesive film can be adjusted, for example, based on the height of the bumps before connection. It is preferably 0.5 to 1.5 times, more preferably 0.6 to 1.3 times, and even more preferably 0.7 to 1.2 times the height of the bumps before connection. When the thickness of the adhesive film is 0.5 times or more the height of the bumps, the occurrence of voids due to unfilled adhesive film can be sufficiently suppressed, further improving connection reliability. Furthermore, when the thickness of the adhesive film is 1.5 times or less, the amount of adhesive film extruded from the chip connection area during connection can be sufficiently suppressed, and adhesion of the adhesive film to unnecessary areas can be sufficiently prevented. This eliminates the need to remove the adhesive film from the bumps, preventing poor conductivity and reducing damage caused by weakening of the bumps (miniaturization of the bump diameter) due to narrower pitches and increased pin counts. Since the bump height is generally 5 to 100 μm, the thickness of the adhesive film is preferably 2.5 to 150 μm, more preferably 3.5 to 120 μm.
[0092] The drying conditions for volatilizing the organic solvent from the resin composition varnish applied to the substrate film are not particularly limited as long as the conditions are such that the organic solvent is sufficiently volatilized, but heating at 50 to 200° C. for 0.1 to 90 minutes is preferred. The organic solvent is preferably removed to 1.5% by mass or less based on the total amount of the adhesive film.
[0093] In step (f), the hybrid bonding structure S to which the adhesive film member 52 made of the above-described material is attached is diced to obtain a plurality of hybrid bonding laminate components 60, each of which includes at least one first semiconductor element, at least one first electrode 74, at least one second semiconductor element, at least one second electrode 84, and at least one connection bump 54. After step (e) is completed, the hybrid bonding structure S to which the adhesive film member 52 is attached is diced into individual pieces using plasma dicing, stealth dicing, laser dicing, or the like. As a result, individual hybrid bonding laminate components 60 are obtained, as shown in FIG. 5A. These hybrid bonding laminate components 60 correspond to the first hybrid bonding laminate component 60A and the second hybrid bonding laminate component 60B described above.
[0094] In step (g), the individual hybrid bonding laminate components 60 are stacked and bonded together. In step (g), as shown in FIG. 5B, the first hybrid bonding laminate component 60A is first picked up by a bonding tool P and moved toward the substrate 10. The first hybrid bonding laminate component 60A is then placed on the substrate 10 and pressed while heated. During this process, as shown in FIG. 6A, each of the first connection bumps 54A is connected to the corresponding wiring electrode 12. In other words, the terminal electrode 31a of the second semiconductor chip 30A is connected to the wiring electrode 12 via the first connection bump 54A. During this pressing process, the first adhesive film member 52A protrudes from the end of the second semiconductor chip 30A, forming a fillet 56. The protruding width of this fillet 56 is the same as the protruding width T described above.
[0095] 6B, the second hybrid bonding laminate component 60B is picked up by the bonding tool P, placed on top of the first hybrid bonding laminate component 60A, and pressed against the second hybrid bonding laminate component 60B. At this time, the terminal electrodes 31a of the fourth semiconductor chip 30B are connected to the terminal electrodes 21a of the first semiconductor chip 20A via the second connection bumps 54B. The second bump connection component 50B is also attached to the first semiconductor chip 20A. In this manner, the semiconductor device 1 shown in FIG. 1 can be obtained.
[0096] Here, the effects of the semiconductor device 1 and the manufacturing method thereof according to this embodiment will be described in comparison with a semiconductor device 101 of a comparative example and its manufacturing method. FIGS. 7 and 8 are diagrams showing a semiconductor device according to the comparative example and its manufacturing method. As shown in FIG. 7A, connection bumps 152 and 154 are provided on the underside of a semiconductor chip 120, and an adhesive film member 150 is attached to the semiconductor chip 120 so as to cover the connection bumps 152 and 154, thereby preparing a member 160. The adhesive film member 150 corresponds to the adhesive film member 50, etc. Such a member is picked up by a bonding tool P and moved toward the substrate 110, and the connection bumps 152 and 154 are connected to the connection terminals 112, as shown in FIG. 7B. This connection causes the ends of the adhesive film member 150 to protrude outward, forming fillets 156.
[0097] 7(c) and 8(a) and 8(b), such members 160 are stacked to fabricate the semiconductor device 101. At this time, when each member 160 is pressed to attach it to the lower member 160, fillets 156 are formed, but the fillets 156 adjacent in the stacking direction stick to each other. As a result, a gap V, which is a closed space, is formed between the fillets 156. When the semiconductor device 101 having such a gap V is repeatedly heated and cooled, the fillets 156 expand and contract, generating internal stress, which may cause the adhesive or the like to peel off from the gap V.
[0098] In contrast, the semiconductor device 1 according to the embodiment is configured to include a first hybrid bonding structure component 40A using hybrid bonding technology, which bonds and connects semiconductor chips (or semiconductor wafers, etc.) without using a typical adhesive, and a first bump connection component 50A having a first adhesive film member 52A. This configuration allows the first hybrid bonding structure component 40A to be sandwiched (interposed) between the adhesive film members, thereby preventing the fillets 56 from adhering to each other. This prevents gaps from forming in the fillets 56 of the semiconductor device, preventing peeling originating from the gaps. As a result, the semiconductor device 1 can improve device reliability. Furthermore, connecting semiconductor chips using hybrid bonding technology can achieve a lower profile than connections using bumps, etc., allowing the semiconductor device 1 to be made lower-profile. Meanwhile, the adhesive film member 52 allows the fillets 56 to extend outside the semiconductor chips, thereby protecting the semiconductor chips in the semiconductor device 1. As a result, the semiconductor device 1 can achieve a lower profile and improved protective function.
[0099] The semiconductor device 1 further includes a substrate 10 having wiring electrodes 12, and the first connection bumps 54A of the first bump connection component 50A are connected to the wiring electrodes 12. This configuration allows for a more reliable connection between the first semiconductor component and the substrate.
[0100] In the semiconductor device 1, the first adhesive film member 52A protrudes outward from the end of the second semiconductor chip 30A to form a fillet 56. This configuration can more reliably protect the semiconductor chip included in the semiconductor device 1. In this case, it is preferable that the maximum protrusion width of the fillet 56 from the end of the second semiconductor chip 30A is equal to or less than half the thickness of the first hybrid bonding structure component 40A. This configuration can provide a more reliable semiconductor device by achieving a balance between protecting the semiconductor chip and preventing peeling.
[0101] In the semiconductor device 1, at least one of the first insulating film 22A and the second insulating film 32A may contain an inorganic insulating material. This configuration makes it possible to fabricate a semiconductor device with a finer configuration. Furthermore, because inorganic materials are easily bonded to each other, it is possible to increase the adhesive strength between semiconductor chips and further improve the connection reliability of the semiconductor device.
[0102] In the semiconductor device 1, at least one of the first insulating film 22A and the second insulating film 32A may contain an organic insulating material. With this configuration, the organic material, which is a relatively soft material, allows debris generated when the semiconductor chips are diced to be absorbed (embedded) in the insulating film portion made of the organic material, thereby reducing connection defects between semiconductor chips joined by hybrid bonding.
[0103] In the semiconductor device 1, the organic insulating material contained in at least one of the first insulating film 22A and the second insulating film 32A may include polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These materials are liquid or soluble in a solvent, making it easy to fabricate the first insulating film, for example, by spin coating, and to form a thin film. Furthermore, these materials have high heat resistance, so they can withstand high temperatures and other conditions that occur when bonding by hybrid bonding, enabling more reliable bonding of semiconductor chips.
[0104] In the semiconductor device 1, the first adhesive film member 52A preferably contains a cured product of a resin composition containing an epoxy resin, a thermoplastic resin, a curing agent, and an inorganic filler. This configuration allows for more reliable bonding of the first hybrid bonding structure component 40A and the like, thereby improving the reliability of the semiconductor device.
[0105] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the above embodiments. For example, in the above embodiments, two sets of hybrid bonding stack components 60 are stacked, but the present invention is not limited to this. Three or more sets of hybrid bonding stack components 60 may be stacked to form a semiconductor device.
[0106] REFERENCE SIGNS LIST 1...Semiconductor device, 10...Substrate, 12...Wiring electrode, 20A...First semiconductor chip, 20B...Third semiconductor chip, 21a...Terminal electrode, 21b...Through electrode, 22A...First insulating film, 22B...Third insulating film, 24A...First electrode, 24B...Third electrode, 26A...First semiconductor component, 26B...Third semiconductor component, 30A...Second semiconductor chip, 30B...Fourth semiconductor chip, 31a...Terminal electrode, 31b...Through electrode, 32A...Second insulating film, 32B...Fourth insulating film, 34A...Second electrode, 34B...Fourth electrode, 36A...Second semiconductor component, 36B...Fourth semiconductor component, 40 A...first hybrid bonding structure component, 40B...second hybrid bonding structure component, 50A...first bump connection component, 50B...second bump connection component, 52A...first adhesive film member, 52B...second adhesive film member, 54A...first connection bump, 54B...second connection bump, 56...fillet, 60...hybrid bonding laminate component, 60A...first hybrid bonding laminate component, 60B...second hybrid bonding laminate component, S...hybrid bonding structure, T...protrusion width (maximum protrusion width), V...gap.
Claims
1. a first hybrid bonding structure component including a first semiconductor component including a first semiconductor chip, a first insulating film and a first electrode provided on the first semiconductor chip, and a second semiconductor component including a second semiconductor chip, a second insulating film and a second electrode provided on the second semiconductor chip, in which the first insulating film and the second insulating film are bonded together and the first electrode and the second electrode are joined; a first adhesive film member attached to a surface of the second semiconductor chip of the first hybrid bonding structure component opposite to the second insulating film; and a first bump connection component having a first connection bump disposed in the first adhesive film member and connected to an electrode of the second semiconductor chip; The first adhesive film member protrudes outward from an end portion of the second semiconductor chip to form a fillet.
2. a second hybrid bonding structure component including a third semiconductor component including a third semiconductor chip, a third insulating film and a third electrode provided on the third semiconductor chip, and a fourth semiconductor component including a fourth semiconductor chip, a fourth insulating film and a fourth electrode provided on the fourth semiconductor chip, in which the third insulating film and the fourth insulating film are bonded together and the third electrode and the fourth electrode are joined; a second adhesive film member attached to a surface of the second hybrid bonding structure component opposite to the fourth insulating film of the fourth semiconductor chip; and a second bump connection component having a second connection bump disposed in the second adhesive film member and connected to an electrode of the fourth semiconductor chip, the second adhesive film member of the second bump connection component is attached to a surface of the first hybrid bonding structure component opposite to the first insulating film of the first semiconductor chip, and the second connection bumps are connected to electrodes of the first semiconductor chip. The semiconductor device according to claim 1 .
3. The second adhesive film member protrudes outward from an end of the fourth semiconductor chip to form a fillet. The semiconductor device according to claim 2 .
4. Further comprising a substrate having wiring electrodes; the first connection bump of the first bump connection component is connected to the wiring electrode; The semiconductor device according to claim 1 .
5. The maximum protruding width of the fillet of the first adhesive film member from the end of the second semiconductor chip is less than half the thickness of the first hybrid bonding structure component. The semiconductor device according to claim 1 .
6. At least one of the first insulating film and the second insulating film contains an inorganic insulating material. The semiconductor device according to claim 1 .
7. At least one of the first insulating film and the second insulating film contains an organic insulating material. The semiconductor device according to claim 1 .
8. The organic insulating material contained in at least one of the first insulating film and the second insulating film includes polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor; The semiconductor device according to claim 7.
9. The first adhesive film member includes a cured product of a resin composition containing an epoxy resin, a thermoplastic resin, a curing agent, and an inorganic filler. The semiconductor device according to claim 1 .
10. A step of preparing a first semiconductor substrate having a first substrate body including a plurality of first semiconductor elements, and a first insulating film and a plurality of first electrodes provided on the first substrate body; A step of preparing a second semiconductor substrate having a second substrate body including a plurality of second semiconductor elements, and a second insulating film and a plurality of second electrodes provided on the second substrate body; a step of bonding the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate to each other and bonding the first electrodes of the first semiconductor substrate to the second electrodes of the second semiconductor substrate to obtain a hybrid bonding structure; forming a plurality of connection bumps on a surface of the second substrate body opposite to the second insulating film; a step of attaching an adhesive film member to a surface of the second substrate body opposite to the second insulating film; A process of dicing the hybrid bonding structure to which the adhesive film member is attached to obtain a plurality of hybrid bonding laminate components, each of which includes at least one first semiconductor element, at least one first electrode, at least one second semiconductor element, at least one second electrode, and at least one connection bump, the plurality of hybrid bonding laminate components including a first hybrid bonding laminate component and a second hybrid bonding laminate component; pressing the first hybrid bonding laminate component after placing the first hybrid bonding laminate component on a substrate; and a step of pressing the first hybrid bonding laminate component, and then arranging the second hybrid bonding laminate component on the first hybrid bonding laminate component and pressing the second hybrid bonding laminate component, wherein the second hybrid bonding laminate component is attached onto a first semiconductor chip corresponding to the first substrate body in the first hybrid bonding laminate component, In the pressing step, a portion of at least one of the first hybrid bonding laminate component and the second hybrid bonding laminate component that corresponds to the adhesive film member is pushed outward from an end of the hybrid bonding laminate component along a direction intersecting the pressing direction; A method for manufacturing a semiconductor device, wherein the maximum extrusion amount by which the portion corresponding to the adhesive film member is extruded outward is less than half the thickness of the portion of the hybrid bonding laminate component corresponding to the hybrid bonding structure.
11. A step of preparing a first semiconductor substrate having a first substrate body including a plurality of first semiconductor elements, a first insulating film provided on the first substrate body, and a plurality of first electrodes; A step of preparing a second semiconductor substrate having a second substrate body including a plurality of second semiconductor elements, and a second insulating film and a plurality of second electrodes provided on the second substrate body; a step of bonding the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate to each other and bonding the first electrodes of the first semiconductor substrate to the second electrodes of the second semiconductor substrate to obtain a hybrid bonding structure; forming a plurality of connection bumps on a surface of the second substrate body opposite to the second insulating film; a step of attaching an adhesive film member to a surface of the second substrate body opposite to the second insulating film; A process of dicing the hybrid bonding structure to which the adhesive film member is attached to obtain a plurality of hybrid bonding laminate components, each of which includes at least one first semiconductor element, at least one first electrode, at least one second semiconductor element, at least one second electrode, and at least one connection bump, the plurality of hybrid bonding laminate components including a first hybrid bonding laminate component and a second hybrid bonding laminate component; and a step of pressing the first hybrid bonding laminate component and the second hybrid bonding laminate component together after disposing the second hybrid bonding laminate component on the first hybrid bonding laminate component, and attaching the second hybrid bonding laminate component onto a first semiconductor chip corresponding to the first substrate body in the first hybrid bonding laminate component. In the pressing step, a portion of at least one of the first hybrid bonding laminate component and the second hybrid bonding laminate component that corresponds to the adhesive film member is pushed outward from an end of the hybrid bonding laminate component along a direction intersecting the pressing direction; A method for manufacturing a semiconductor device, wherein the maximum extrusion amount by which the portion corresponding to the adhesive film member is extruded outward is less than half the thickness of the portion of the hybrid bonding laminate component corresponding to the hybrid bonding structure.
12. A step of preparing a substrate having wiring electrodes provided on a surface thereof; mounting the first hybrid bonding laminate component on the substrate such that the connection bumps of the first hybrid bonding laminate component are connected to the wiring electrodes; Equipped with The method for manufacturing a semiconductor device according to claim 10 or 11.
13. At least one of the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate contains an inorganic insulating material. The method for manufacturing a semiconductor device according to claim 10 or 11.
14. At least one of the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate contains an organic insulating material. The method for manufacturing a semiconductor device according to claim 10 or 11.
15. The organic insulating material contained in at least one of the first insulating film and the second insulating film includes polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor; The method for manufacturing a semiconductor device according to claim 14.
16. The adhesive film member contains an epoxy resin, a thermoplastic resin, a curing agent, and an inorganic filler. The method for manufacturing a semiconductor device according to claim 10 or 11.