Method for producing semiconductor device, and semiconductor device
Patent Information
- Application Number
- JP2024516045
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-04-22
- Filing Date
- 2022-04-22
- Publication Date
- 2025-04-22
- Estimated Expiration
- 2042-04-22
AI Technical Summary
The challenge is to reduce the height of semiconductor devices while maintaining reliable connections between stacked semiconductor chips, as conventional flip-chip bonding methods result in increased thickness due to the accumulation of connection bumps.
A hybrid bonding method is employed, where semiconductor chips are bonded without using connection bumps, and hybrid bonding structures are formed with insulating films and electrodes, allowing for the injection of curable liquids to fill gaps and secure the components, thereby reducing the device height and improving manufacturing efficiency.
This approach effectively reduces the thickness of semiconductor devices, enhances connection reliability, and shortens the manufacturing process, improving productivity and adhesive strength between chips.
Abstract
Description
Semiconductor device manufacturing method and semiconductor device
[0001] The present disclosure relates to a method for manufacturing a semiconductor device and a semiconductor device.
[0002] Conventionally, wire bonding, which uses thin metal wires such as gold wires, has been widely used to connect semiconductor chips to substrates. However, in order to meet the demands for higher performance, higher integration, and higher speeds for semiconductor devices, flip-chip connection (FC connection), which directly connects the semiconductor chip to the substrate by forming conductive protrusions called bumps on the semiconductor chip or substrate, is becoming more popular.
[0003] Known FC connection methods include a method of joining the connection parts by metal bonding using solder, tin, gold, silver, copper, etc., a method of joining the connection parts by metal bonding using ultrasonic vibrations, and a method of maintaining mechanical contact by the contraction force of resin.From the viewpoint of the reliability of the connection parts, a method of joining the connection parts by metal bonding using solder, tin, gold, silver, copper, etc. is common.
[0004] For example, the COB (Chip On Board) type connection method, which is widely used for connecting semiconductor chips and substrates in BGA (Ball Grid Array), CSP (Chip Size Package), etc., also falls under the FC connection method. The FC connection method is also widely used in COC (Chip On Chip) type connection methods, which form connection portions (bumps or wiring) on semiconductor chips to connect semiconductor chips (see, for example, Patent Document 1).
[0005] Furthermore, in packages where further miniaturization, thinning, and high functionality are strongly required, chip-stacked packages, POP (Package On Package), TSV (Through-Silicon Via), and other stacked and multi-tiered versions of the above-mentioned connection methods are beginning to become widely used. These stacking and multi-tiering technologies arrange semiconductor chips and other components three-dimensionally, allowing for smaller packages compared to methods that arrange them two-dimensionally. Furthermore, these stacking and multi-tiering technologies are also effective in improving semiconductor performance, reducing noise, reducing packaging area, and saving power, and are therefore attracting attention as next-generation semiconductor wiring technologies.
[0006] JP 2012-222038 A
[0007] However, as described in Patent Document 1, when manufacturing a semiconductor device by stacking a large number of semiconductor chips by flip-chip bonding, the height of each connection bump accumulates, resulting in a thick semiconductor device. In particular, when semiconductor chips are stacked in multiple layers, the impact of the height of the connection bumps on the thickness of the semiconductor device becomes significant. Therefore, a manufacturing method that can achieve a low profile semiconductor device is desired.
[0008] An object of the present disclosure is to provide a semiconductor device manufacturing method and a semiconductor device that can reduce the height of the semiconductor device.
[0009] The present disclosure relates to a method for manufacturing a semiconductor device, the method including the steps of: preparing a first semiconductor substrate having a first substrate body including a plurality of first semiconductor elements, a first insulating film provided on the first substrate body, and a plurality of first electrodes; preparing a second semiconductor substrate having a second substrate body including a plurality of second semiconductor elements, a second insulating film provided on the second substrate body, and a plurality of second electrodes; bonding the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate together and joining the plurality of first electrodes of the first semiconductor substrate and the plurality of second electrodes of the second semiconductor substrate to obtain a hybrid bonding structure; and forming a plurality of connecting wires on a surface of the second substrate body opposite to the second insulating film. The method includes the steps of: forming bumps; dicing the hybrid bonding structure on which the plurality of connection bumps are formed to obtain a plurality of hybrid bonding structure components, each of which includes at least one first semiconductor element, at least one first electrode, at least one second semiconductor element, at least one second electrode, and at least one connection bump; mounting a first hybrid bonding structure component of the plurality of hybrid bonding structure components on another component; injecting a curable first liquid material into the gap between the first hybrid bonding structure component and the other component; and curing the first liquid material.
[0010] In this semiconductor device manufacturing method, a first hybrid bonding structure is fabricated using a hybrid bonding technique that bonds and connects semiconductor chips (or semiconductor wafers, etc.) without using connection bumps. Connection bumps are then formed on the first hybrid bonding structure, which is then diced to obtain a plurality of hybrid bonding structure components. Then, the first hybrid bonding structure components with such connection bumps are used for mounting, and a first liquid material is injected into the gaps between the first hybrid bonding structure components and other components to be mounted and cured. This manufacturing method uses hybrid bonding technology to connect some of the semiconductor chips, thereby enabling a thinner and thinner semiconductor device compared to when all semiconductor chips are connected using connection bumps. Furthermore, while conventional manufacturing methods require long manufacturing processes because stacked semiconductor chips are connected one layer at a time using flip-chip bonding, this semiconductor device manufacturing method allows some of the semiconductor chips to be connected together using hybrid bonding technology, thereby shortening the manufacturing process and improving productivity.
[0011] The above-mentioned semiconductor device manufacturing method preferably further includes the steps of mounting a second hybrid bonding structure component of the plurality of hybrid bonding structure components on a first hybrid bonding structure component, injecting a curable second liquid material into a gap between the second hybrid bonding structure component and the first hybrid bonding structure component, and curing the second liquid material. This manufacturing method enables a semiconductor device to be thinned even when multiple semiconductor chips are stacked. Furthermore, it is possible to shorten the manufacturing process of the semiconductor device and improve productivity.
[0012] In the above-described method for manufacturing a semiconductor device, the step of injecting the first liquid material and the step of injecting the second liquid material may be performed separately. This manufacturing method makes it possible to more reliably inject the first liquid material and the second liquid material, thereby easily fabricating a highly reliable semiconductor device.
[0013] The above-described semiconductor device manufacturing method may further include a step of encapsulating the first and second hybrid bonding structure components, and the encapsulating step may include a step of injecting a first liquid material and a step of injecting a second liquid material. This manufacturing method not only encapsulates the first and second hybrid bonding structure components, but also protects the connection bumps by using the encapsulating material as an underfill material. Therefore, this manufacturing method can further improve the productivity of semiconductor devices.
[0014] In the above-described method for manufacturing a semiconductor device, the other member may be a substrate having wiring electrodes on its surface, and in the step of mounting the first hybrid bonding structure component, the first hybrid bonding structure component may be mounted on the substrate so that the connection bumps of the first hybrid bonding structure component are connected to the wiring electrodes. This manufacturing method allows for a reduction in the height of a semiconductor device having a semiconductor chip mounted on a substrate.
[0015] In the above-described method for manufacturing a semiconductor device, at least one of the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate may contain an inorganic insulating material. This manufacturing method enables the fabrication of semiconductor devices with finer configurations. Furthermore, since inorganic materials are easily bonded to each other, the adhesive strength between semiconductor chips can be increased, thereby further improving the connection reliability of the semiconductor device.
[0016] In the above-described method for manufacturing a semiconductor device, at least one of the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate may contain an organic insulating material. According to this manufacturing method, the organic material, which is a relatively soft material, allows debris generated when the semiconductor substrate is diced into semiconductor chips to be absorbed (embedded) in the insulating film made of the organic material, thereby reducing connection defects between semiconductor chips joined by hybrid bonding.
[0017] In the above-described semiconductor device manufacturing method, the organic insulating material contained in at least one of the first insulating film and the second insulating film may include polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. In this case, these materials are liquid or soluble in a solvent, making it easy to prepare the first insulating film, for example, by spin coating, and to form a thin film. Furthermore, these materials have high heat resistance, so they can withstand high temperatures, etc., that occur when bonding by hybrid bonding, enabling more reliable bonding of semiconductor chips to each other.
[0018] In the above-described method for manufacturing a semiconductor device, the first liquid material may be a liquid epoxy resin composition containing at least an epoxy resin and a curing agent.
[0019] Another aspect of the present disclosure relates to a semiconductor device, the semiconductor device comprising: a first semiconductor component including a first semiconductor chip and a first insulating film and a first electrode provided on the first semiconductor chip; a second semiconductor component including a second semiconductor chip and a second insulating film and a second electrode provided on a first surface of the second semiconductor chip; a first hybrid bonding structure component having first connection bumps provided on a second surface of the second semiconductor chip and connected to the electrodes of the second semiconductor chip, the first insulating film and the second insulating film being bonded to each other and the first electrode and the second electrode being joined to each other; another member on which the first hybrid bonding structure component is mounted; and a cured product of a first liquid material injected between the first hybrid bonding structure component and the other member and cured to cover the first connection bumps.
[0020] This semiconductor device uses a first hybrid bonding structure component that utilizes hybrid bonding technology to bond and connect semiconductor chips (or semiconductor wafers, etc.) together without using connection bumps, which allows the semiconductor device to be thinner and thinner than a semiconductor device in which all connections between semiconductor chips are made using connection bumps.
[0021] The semiconductor device may further include a second hybrid bonding structure component mounted on the first hybrid bonding structure component, the second hybrid bonding structure component having: a third semiconductor component including a third semiconductor chip and a third insulating film and a third electrode provided on the third semiconductor chip; a fourth semiconductor component including a fourth semiconductor chip and a fourth insulating film and a fourth electrode provided on a first surface of the fourth semiconductor chip; and second connection bumps provided on a second surface of the fourth semiconductor chip and connected to the electrodes of the fourth semiconductor chip, the third insulating film and the fourth insulating film being bonded together and the third electrode and the fourth electrode being joined together; and a cured product of the second liquid material injected between the second hybrid bonding structure component and the first hybrid bonding structure component and cured so as to cover the second connection bumps. This semiconductor device allows for a low profile even when multiple semiconductor chips are stacked.
[0022] In the semiconductor device described above, the other member may be a substrate having wiring electrodes, and the first connection bumps may be connected to the wiring electrodes. With this semiconductor device, it is possible to reduce the height of the semiconductor device in which the semiconductor chip is mounted on the substrate.
[0023] In the semiconductor device, at least one of the first insulating film and the second insulating film may contain an inorganic insulating material. This configuration makes it possible to fabricate a semiconductor device with a finer configuration. Furthermore, since inorganic materials are easily bonded to each other, it is possible to increase the adhesive strength between semiconductor chips and further improve the connection reliability of the semiconductor device.
[0024] In the semiconductor device, at least one of the first insulating film and the second insulating film may contain an organic insulating material. With this configuration, the organic material, which is a relatively soft material, allows debris generated when the semiconductor chips are diced to be absorbed (embedded) in the insulating film made of the organic material, thereby reducing connection defects between the semiconductor chips joined by hybrid bonding.
[0025] In the semiconductor device described above, the cured product of the first liquid material may be a cured product of a liquid epoxy resin composition containing at least an epoxy resin and a curing agent.
[0026] According to the present disclosure, the height of a semiconductor device can be reduced.
[0027] FIG. 1 is a cross-sectional view schematically illustrating a semiconductor device according to an embodiment of the present disclosure. FIGS. 2A and 2B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device shown in FIG. 1 . FIGS. 3A and 3B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device shown in FIG. 1 , illustrating steps subsequent to the steps shown in FIG. 2 . FIGS. 4A and 4B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device shown in FIG. 1 , illustrating steps subsequent to the steps shown in FIG. 3 . FIGS. 5A and 5B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device shown in FIG. 1 , illustrating steps subsequent to the steps shown in FIG. 4 . FIGS. 6A and 6B are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device shown in FIG. 1 , illustrating steps subsequent to the steps shown in FIG. 5 . FIGS. 7A and 7B are cross-sectional views illustrating another example of a method for manufacturing the semiconductor device shown in FIG. 1 .
[0028] Hereinafter, several embodiments of the present disclosure will be described in detail, with reference to the drawings as necessary. In the following description, identical or equivalent parts will be designated by the same reference numerals, and duplicate explanations will be omitted. Furthermore, positional relationships such as up, down, left, and right will be based on the positional relationships shown in the drawings unless otherwise specified. When terms such as "left," "right," "front," "back," "top," "bottom," "upper," and "lower" are used in the description and claims of this specification, these are intended for explanatory purposes and do not necessarily mean that these relative positions will always be the same. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.
[0029] In this specification, the term "layer" encompasses not only a structure with a shape formed over the entire surface when observed in a plan view, but also a structure with a shape formed on a portion of the surface. Furthermore, in this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes, as long as the intended effect of the process is achieved. Furthermore, a numerical range indicated using "to" indicates a range that includes the numerical values before and after "to" as the minimum and maximum values, respectively.
[0030] (Configuration of Semiconductor Device) Fig. 1 is a cross-sectional view schematically illustrating an example of a semiconductor device according to this embodiment. As shown in Fig. 1, the semiconductor device 1 is, for example, an example of a semiconductor package, and includes a substrate 10, a set of a first hybrid bonding structure component 40A and a first connecting body 55A disposed on the substrate 10, and another set of a second hybrid bonding structure component 40B and a second connecting body 55B disposed on the first hybrid bonding structure component 40A. In the semiconductor device 1, the first connecting body 55A, the first hybrid bonding structure component 40A, the second connecting body 55B, and the second hybrid bonding structure component 40B are stacked in this order on the substrate 10.
[0031] The substrate 10 has a plurality of wiring electrodes 12 on its surface 11. The substrate 10 is not particularly limited as long as it is a wired circuit board, and examples thereof include a circuit board in which wiring (wiring pattern) is formed by etching away unnecessary portions of a metal layer formed on the surface of an insulating substrate whose main component is glass epoxy, polyimide, polyester, ceramic, epoxy, bismaleimide triazine, polyimide, or the like; a circuit board in which wiring (wiring pattern) is formed on the surface of the insulating substrate by metal plating, or the like; and a circuit board in which wiring (wiring pattern) is formed by printing a conductive material on the surface of the insulating substrate. The wiring electrodes 12 are composed of, for example, gold, silver, or copper.
[0032] The first hybrid bonding structure component 40A includes a first semiconductor component 26A including a first semiconductor chip 20A, a first insulating film 22A, and a plurality of first electrodes 24A provided on the first semiconductor chip 20A; a second semiconductor component 36A including a second semiconductor chip 30A, a second insulating film 32A, and a plurality of second electrodes 34A provided on a first surface 30a of the second semiconductor chip 30A; and first connection bumps 50A provided on a second surface 30b of the second semiconductor chip 30A and connected to terminal electrodes 31a of the second semiconductor chip 30A. The first hybrid bonding structure component 40A, which is disposed on a substrate 10, is attached to the substrate 10 by the first connection bumps 50A. More specifically, the terminal electrodes 31a of the first hybrid bonding structure component 40A are connected to wiring electrodes 12 of the substrate 10 by the first connection bumps 50A. The first connection bump 50A is filled with a cured adhesive liquid resin composition (first liquid material) that forms the first connection body 55A.
[0033] In the first hybrid bonding structure component 40A, a first insulating film 22A and a second insulating film 32A are bonded together, and a plurality of first electrodes 24A and a plurality of second electrodes 34 are bonded to each other. The first electrodes 24A are electrically connected to wiring formed by the semiconductor elements included in the first semiconductor chip 20A. The second electrodes 34A are electrically connected to wiring formed by the semiconductor elements included in the second semiconductor chip 30A. Note that the method for forming the plurality of first electrodes 24A in the first insulating film 22A and the direction for forming the plurality of second electrodes 34A in the second insulating film 32A can be various conventional methods, and therefore detailed description thereof will be omitted here.
[0034] The first semiconductor chip 20A and the second semiconductor chip 30A are not particularly limited, and various semiconductors can be used, such as elemental semiconductors composed of the same type of element, such as silicon and germanium, and compound semiconductors, such as gallium arsenide and indium phosphide. The first semiconductor chip 20A and the second semiconductor chip 30A may have terminal electrodes 21a, 31a for connecting the semiconductor chip to the outside and through-electrodes 21b, 31b penetrating the semiconductor chip. The terminal electrodes 21a of the first semiconductor chip 20A are connected to the terminal electrodes 31a of the fourth semiconductor chip 30B via second connection bumps 50B, which will be described later. The through-electrodes 21b of the first semiconductor chip 20A are connected to the terminal electrodes 21a and the first electrodes 24A. The terminal electrodes 31a of the second semiconductor chip 30A are connected to the wiring electrodes 12 of the substrate 10 via the first connection bumps 50A. The through-electrodes 31b of the second semiconductor chip 30A are connected to the terminal electrodes 31a and the second electrodes 34A. The thickness of the first semiconductor chip 20A and the second semiconductor chip 30A is, for example, in the range of 0.2 mm to 2.0 mm.
[0035] The first insulating film 22A and the second insulating film 32A are configured to contain an inorganic insulating material or an organic insulating material. The first insulating film 22A and the second insulating film 32A may be configured to contain both an inorganic insulating material and an organic insulating material. The inorganic insulating material used for the insulating film is, for example, silicon oxide (SiO 2 ) When an inorganic insulating material such as silicon oxide is used for the insulating film, it is possible to manufacture semiconductor devices with finer structures. In addition, since it is easy to bond inorganic insulating materials together, it is possible to increase the adhesive strength between semiconductor chips and improve the connection reliability of the semiconductor device.
[0036] The organic insulating material used for the first insulating film 22A and the second insulating film 32A is, for example, polyimide, a polyimide precursor (for example, polyimide ester or polyamic acid), polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These organic insulating materials are, for example, silicon oxide (SiO 2The organic insulating material has a lower elastic modulus than inorganic insulating materials such as silicon dioxide, making it a softer material. By using such an organic insulating material, even if fine debris is present on the insulating film when bonding the insulating films together, it is absorbed into the insulating film, preventing bonding defects caused by the debris and enabling reliable bonding of the insulating films together. The elastic modulus of the organic material constituting the first insulating film 22A and the second insulating film 32A may be, for example, 7.0 GPa or less, 5.0 GPa or less, 3.0 GPa or less, 2.0 GPa or less, or 1.5 GPa or less. The elastic modulus here refers to Young's modulus. The organic insulating material constituting the first insulating film 22A and the second insulating film 32A preferably has a thermal expansion coefficient of 70 ppm / K or less, more preferably 50 ppm / K or less.
[0037] The thickness of the first insulating film 22A and the second insulating film 32A is preferably 10 μm or less, more preferably 5 μm or less, and even more preferably 3 μm or less. By setting the thickness of the first insulating film 22A and the second insulating film 32A to such a thickness, the first electrode 24A and the second electrode 34A formed in the first insulating film 22A and the second insulating film 32A can be miniaturized, and the thickness of the semiconductor device 1 can be reduced. From the viewpoint of ensuring electrical reliability, the thickness of the first insulating film 22A and the second insulating film 32A is preferably 1 μm or more.
[0038] The first electrode 24A and the second electrode 34A are terminal electrodes provided on the inner surfaces 20a, 30a of the first semiconductor chip 20A and the second semiconductor chip 30A, and are made of, for example, copper or aluminum. The first electrode 24A penetrates the first insulating film 22A and is exposed on the surface of the first insulating film 22A opposite to the surface 20a to which the first semiconductor chip 20A is connected. The second electrode 34A penetrates the second insulating film 32A and is exposed on the surface of the second insulating film 32A opposite to the surface 30a to which the second semiconductor chip 30A is connected. In the first hybrid bonding structure component 40A, the first electrode 24A and the second electrode 34A are bonded to each other.
[0039] The first connection bumps 50A are connecting members provided on the surface 30b of the second semiconductor chip 30A and connected to the terminal electrodes 31a of the second semiconductor chip 30A. The first connection bumps 50A contain gold, silver, copper, solder (the main component of which may be, for example, tin-silver, tin-lead, tin-bismuth, or tin-copper), nickel, tin, lead, or the like as a main component, and may contain multiple metals. The other end of the first connection bumps 50A is connected to the wiring electrodes 12 of the substrate 10.
[0040] The first connector 55A, located between the substrate 10 and the first hybrid bonding structure component 40A, is a cured product of a liquid adhesive resin composition, and covers the first connection bump 50A. The liquid adhesive resin composition used to form the first connector 55A is, for example, an adhesive resin composition containing an epoxy resin and a curing agent. The curing agent is, for example, an amine-based curing agent. The liquid resin composition used to form the first connector 55A may also contain an inorganic filler, a curing accelerator, rubber particles, or the like.
[0041] Furthermore, a second hybrid bonding structure component 40B is disposed on the first hybrid bonding structure component 40A. The second hybrid bonding structure component 40B is attached to the first semiconductor chip 20A by second connection bumps 50B. The second hybrid bonding structure component 40B has a similar configuration to the first hybrid bonding structure component 40A, and the following description may omit some overlapping portions.
[0042] The second hybrid bonding structure component 40B includes a third semiconductor component 26B including a third semiconductor chip 20B and a third insulating film 22B and a plurality of third electrodes 24B provided on the third semiconductor chip 20B, a fourth semiconductor component 36B including a fourth semiconductor chip 30B and a fourth insulating film 32B and a plurality of fourth electrodes 34B provided on a first surface 30a of the fourth semiconductor chip 30B, and second connection bumps 50B provided on a second surface 30b of the fourth semiconductor chip 30B and connected to terminal electrodes 31a of the fourth semiconductor chip 30B. The second hybrid bonding structure component 40B, which is disposed on the first hybrid bonding structure component 40A, is attached to the first hybrid bonding structure component 40A by the second connection bumps 50B. More specifically, the terminal electrodes 31a of the second hybrid bonding structure component 40B are connected to the terminal electrodes 21a of the first hybrid bonding structure component 40A by the second connection bumps 50B. The area around the second connection bump 50B is filled with a cured adhesive resin composition (second liquid material) that constitutes the second connector 55B. In the second hybrid bonding structure component 40B, the third insulating film 22B and the fourth insulating film 32B are bonded together, and the plurality of third electrodes 24B and the plurality of fourth electrodes 34B are respectively joined.
[0043] The third semiconductor chip 20B and the fourth semiconductor chip 30B are semiconductor chips similar to the first semiconductor chip 20A and the second semiconductor chip 30A. The third semiconductor chip 20B and the fourth semiconductor chip 30B may have terminal electrodes 21a, 31a for connecting the semiconductor chip to the outside and through-electrodes 21b, 31b that penetrate the semiconductor chip. The terminal electrodes 31a of the fourth semiconductor chip 30B are connected to the terminal electrodes 21a of the first semiconductor chip 20A via second connection bumps 54B. The through-electrodes 31b of the fourth semiconductor chip 30B are connected to the terminal electrodes 31a and the fourth electrodes 34B. The thickness of the third semiconductor chip 20B and the fourth semiconductor chip 30B is, for example, in the range of 0.2 mm to 2.0 mm, similar to the first semiconductor chip 20A, etc.
[0044] Like the first insulating film 22A and the second insulating film 32A, the third insulating film 22B and the fourth insulating film 32B are composed of an inorganic insulating material or an organic insulating material. The third insulating film 22B and the fourth insulating film 32B may be composed of both an inorganic insulating material and an organic insulating material. The inorganic insulating material or organic insulating material used for the insulating film is the same as that of the first insulating film 22A. Similarly, the thickness of the third insulating film 22B and the fourth insulating film 32B is preferably 10 μm or less, more preferably 5 μm or less, and even more preferably 3 μm or less. From the viewpoint of ensuring electrical reliability, the thickness of the third insulating film 22B and the fourth insulating film 32B is preferably 1 μm or more.
[0045] The third electrode 24B and the fourth electrode 34B are terminal electrodes provided on the inner surfaces 20a, 30a of the third semiconductor chip 20B and the fourth semiconductor chip 30B, and are made of, for example, copper or aluminum. The third electrode 24B penetrates the third insulating film 22B and is exposed on the surface of the third insulating film 22B opposite to the surface 20a to which the third semiconductor chip 20B is connected. The fourth electrode 34B penetrates the fourth insulating film 32B and is exposed on the surface of the fourth insulating film 32B opposite to the surface 30a to which the fourth semiconductor chip 30B is connected. In the second hybrid bonding structure component 40B, the third electrode 24B and the fourth electrode 34B are bonded to each other.
[0046] The second connection bumps 50B are connecting members provided on the surface 30b of the fourth semiconductor chip 30B and connected to the terminal electrodes 31a of the fourth semiconductor chip 30B. Like the first connection bumps 50A, the second connection bumps 50B primarily contain gold, silver, copper, solder (primarily composed of, for example, tin-silver, tin-lead, tin-bismuth, or tin-copper), nickel, tin, lead, or the like, and may also contain multiple metals. The other end of the second connection bump 50B is connected to the terminal electrodes 21a of the first semiconductor chip 20A. Similarly to the first connection bumps 55A, the second connection bumps 55B located between the first hybrid bonding structure component 40A and the second hybrid bonding structure component 40B are formed by curing a liquid adhesive resin composition, and cover the second connection bumps 50B.
[0047] 1 , the connection configuration of the semiconductor device 1 configured as described above will be described. In the semiconductor device 1, a first hybrid bonding structure component 40A is disposed on a substrate 10, and the wiring electrodes 12 of the substrate 10 are connected to terminal electrodes 31a of a second semiconductor chip 30A via first connection bumps 50A. The terminal electrodes 31a are connected to terminal electrodes 21a of the first semiconductor chip 20A via second electrodes 34A, first electrodes 24A, and through-hole electrodes 21b of the first semiconductor chip 20A. A second hybrid bonding structure component 40B is further disposed on the first hybrid bonding structure component 40A, and the terminal electrodes 21a of the first semiconductor chip 20A are connected to terminal electrodes 31a of a fourth semiconductor chip 30B via second connection bumps 50B. The terminal electrodes 31a are connected to through-hole electrodes 21b of the third semiconductor chip 20B via fourth electrodes 34B and third electrodes 24B. In this semiconductor device 1, hybrid bonding structure components having a similar configuration may be further stacked and connected to each other by connection bumps.
[0048] (Method of Manufacturing Semiconductor Device) Next, a method of manufacturing the semiconductor device 1 will be described with reference to FIGS. 2 to 6. FIGS. 2(a) and 2(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1. FIG. 3 is a cross-sectional view sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1, showing a step subsequent to the step shown in FIG. 2. FIGS. 4(a) and 4(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1, showing a step subsequent to the step shown in FIG. 3. FIGS. 5(a) and 5(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1, showing a step subsequent to the step shown in FIG. 4. FIGS. 6(a) and 6(b) are cross-sectional views sequentially showing a method of manufacturing the semiconductor device shown in FIG. 1, showing a step subsequent to the step shown in FIG.
[0049] The semiconductor device 1 can be manufactured, for example, through at least the following steps (a) to (h): (a) preparing a first semiconductor substrate having a first substrate body including a plurality of first semiconductor elements, and a first insulating film and a plurality of first electrodes provided on the first substrate body; (b) preparing a second semiconductor substrate having a second substrate body including a plurality of second semiconductor elements, and a second insulating film and a plurality of second electrodes provided on the second substrate body; (c) bonding the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate to each other and joining the plurality of first electrodes of the first semiconductor substrate and the plurality of second electrodes of the second semiconductor substrate to obtain a hybrid bonding structure; and (d) forming a plurality of connection bumps on the surface of the second substrate body opposite to the second insulating film. (e) dicing the hybrid bonding structure on which the plurality of connection bumps are formed to obtain a plurality of hybrid bonding structure components, each including at least one first semiconductor element, at least one first electrode, at least one second semiconductor element, at least one second electrode, and at least one connection bump; (f) mounting a first hybrid bonding structure component of the plurality of hybrid bonding structure components on another member; (g) injecting a curable first liquid material into a gap between the first hybrid bonding structure component and the other member; and (h) curing the first liquid material.
[0050] [Steps (a) and (b)] Step (a) is a step of preparing a first semiconductor substrate 70, which is a silicon substrate on which integrated circuits consisting of semiconductor elements and wiring connecting them are formed, corresponding to multiple semiconductor components including the first semiconductor component 26A and the third semiconductor component 26B. In step (a), as shown in FIG. 2A, multiple first electrodes 74 made of copper, aluminum, or the like are provided at predetermined intervals on one surface 72a of a first substrate body 72 made of silicon or the like, and a first insulating film 76 made of an inorganic or organic material is also provided. The first substrate body 72 may be, for example, a circular or rectangular semiconductor wafer. The first electrodes 74 are end electrodes that penetrate the first insulating film 76 to expose the integrated circuits and the like formed on the first semiconductor substrate 70 to the outside. The multiple first electrodes 74 may be provided after the first insulating film 76 is provided on the one surface 72a of the first substrate body 72, or the multiple first electrodes 74 may be provided on the one surface 72a of the first substrate body 72 before the first insulating film 76 is provided. The first substrate body 72 may be provided with terminal electrodes 72b connected to an integrated circuit or the like and through electrodes 72c that penetrate the substrate body.
[0051] Step (b) is a step of preparing a second semiconductor substrate 80, which is a silicon substrate on which integrated circuits consisting of semiconductor elements and wiring connecting them are formed, corresponding to multiple semiconductor components including the second semiconductor component 36A and the fourth semiconductor component 36B. In step (b), as shown in FIG. 2A, multiple second electrodes 84 made of copper, aluminum, or the like are provided at predetermined intervals on one surface 82a of a second substrate body 82 made of silicon or the like, and a second insulating film 86 made of an inorganic or organic material is provided. The second substrate body 82 may be, for example, a circular or rectangular semiconductor wafer, similar to the first substrate body 72. The second electrodes 84 are end electrodes that penetrate the second insulating film 86 and expose the integrated circuits and the like formed on the second semiconductor substrate 80 to the outside. The multiple second electrodes 84 may be provided after the second insulating film 86 is provided on the one surface 82a of the second substrate body 82, or the multiple second electrodes 84 may be provided on the one surface 82a of the second substrate body 82 before the second insulating film 86 is provided. The second substrate body 82 may be provided with terminal electrodes 82b connected to an integrated circuit or the like and through electrodes 82c that penetrate the substrate body. Note that Fig. 2A shows only a portion of the first semiconductor substrate 70 and the second semiconductor substrate 80 in the planar direction, and other portions have the same configuration but are not shown. The same applies to Figs. 2B and 3.
[0052] The first insulating film 76 and the second insulating film 86 used in the steps (a) and (b) correspond to the first insulating film 22A, the second insulating film 32A, the third insulating film 22B, and the fourth insulating film 32B of the semiconductor device 1 described above, and are made of an inorganic material or an organic material. The inorganic material used for the insulating film is, for example, silicon oxide (SiO 2 ) and the like. When an inorganic material such as silicon oxide is used for the insulating film, a semiconductor device with a finer configuration can be manufactured. Furthermore, when insulating films are bonded together in the step (c) described below, the bonding strength between the semiconductor substrates can be increased, because the bonding strength between the inorganic materials is easily strengthened, and this makes it possible to improve the connection reliability of the semiconductor device.
[0053] The organic material used for the insulating film is, for example, polyimide, a polyimide precursor (e.g., polyimide ester or polyamic acid), polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These organic materials are, for example, silicon oxide (SiO 2 The organic material has a lower elastic modulus than inorganic materials such as silicon dioxide, making it a soft material. By using such an organic material, even if fine debris is present on the insulating film, it is absorbed into the insulating film when bonding the insulating films together in the step (c) described below, preventing bonding defects due to the debris and enabling reliable bonding of the insulating films together. The elastic modulus of the organic material constituting the first insulating film 76 and the second insulating film 86 may be, for example, 7.0 GPa or less, 5.0 GPa or less, 3.0 GPa or less, 2.0 GPa or less, or 1.5 GPa or less. The elastic modulus here refers to Young's modulus. The organic material constituting the first insulating film 76 and the second insulating film 86 preferably has a thermal expansion coefficient of 70 ppm / K or less, and more preferably 50 ppm / K or less.
[0054] Furthermore, since the organic materials used for the insulating films are liquid or soluble in a solvent, each insulating film can be easily formed as a thin film by spin coating or the like. Furthermore, since these organic materials are heat-resistant, they can withstand the temperatures (e.g., high temperatures of 300°C or higher) that are encountered when bonding the first electrode 74 and the second electrode 84 in step (c) described below, preventing the bonding between the insulating films from deteriorating due to high temperatures. Note that the first insulating film 76 and the second insulating film 86 may be insulating films containing both inorganic and organic materials.
[0055] The thickness of the first insulating film 76 and the second insulating film 86 may be 20 μm or less. By making the thickness of the first insulating film 76 and the second insulating film 86 sufficiently thin, the wiring formed by the first electrode 74 and the second electrode 84 can be made finer. The thickness of the first insulating film 76 and the second insulating film 86 may be greater than 20 μm. In this case, when the insulating films are bonded together, more debris can be embedded in the resin insulating film, allowing the insulating films to be more reliably bonded together. The thickness of the first insulating film 76 and the second insulating film 86 may be 4 μm or more. In this case, by embedding minute debris in the resin insulating film, it is possible to improve the connection between the first insulating film 76 and the second insulating film 86 even if minute debris remains.
[0056] In step (c), the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 are bonded together, and the multiple first electrodes 74 of the first semiconductor substrate 70 and the multiple second electrodes 84 of the second semiconductor substrate 80 are joined together to obtain a hybrid bonding structure S. Prior to step (c), as a pretreatment, the bonding surfaces 70 a of the first semiconductor substrate 70 and the bonding surfaces 80 a of the second semiconductor substrate 80 are polished using a chemical mechanical polishing (CMP) method. For example, the first semiconductor substrate 70 may be polished by the CMP method under conditions that selectively and deeply polish the first electrodes 74 made of copper or the like, or the CMP method may be used to polish the first electrodes 74 so that their surfaces coincide with the surfaces of the first insulating films 76. The second semiconductor substrate 80 is polished in a similar manner. By such polishing, debris on the surfaces of the first semiconductor substrate 70 and the second semiconductor substrate 80 is also removed.
[0057] In step (c), organic matter or metal oxide adhering to the bonding surface 70a of the first semiconductor substrate 70 and the bonding surface 80a of the second semiconductor substrate 80 is removed, and then, as shown in FIGS. 2A and 2B , the bonding surface 70a of the first semiconductor substrate 70 and the bonding surface 80a of the second semiconductor substrate 80 are brought into face-to-face relationship, and the first electrode 74 of the first semiconductor substrate 70 and the second electrode 84 are aligned. During this alignment step, the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 are spaced apart from each other and are not bonded. After the alignment is complete, the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 are bonded. At this time, the first insulating film 76 and the second insulating film 86 may be uniformly heated before bonding. The heating temperature when bonding the first insulating film 76 and the second insulating film 86 may be, for example, 30° C. or higher and 400° C. or lower, and the pressure may be 0.1 MPa or higher and 1 MPa or lower. By heat bonding at such a temperature, the first insulating film 76 and the second insulating film 86 are bonded to form an insulating bonded portion, and the first semiconductor substrate 70 and the second semiconductor substrate 80 are mechanically and firmly attached to each other.
[0058] After the insulating film bonding is completed, a predetermined heat or pressure, or both, is applied to bond the first electrode 74 of the first semiconductor substrate 70 and the second electrode 84 of the second semiconductor substrate 80. When the first electrode 74 and the second electrode 84 are made of copper, the heating temperature is 150°C to 400°C, or may be 200°C to 300°C, and the pressure may be 0.1 MPa to 1 MPa. This bonding process bonds the first electrode 74 and the corresponding second electrode 84 to form an electrode bonded portion, and the first electrode 74 and the second electrode 84 are mechanically and electrically firmly bonded. Note that the electrode bonding may be performed after the insulating film is bonded, or the electrode bonding and the insulating film bonding may be performed simultaneously. In this manner, a hybrid bonding structure S is obtained.
[0059] In step (d), as shown in FIG. 3 , a plurality of connection bumps 50 are formed on a surface 82d of the second substrate body 82 of the hybrid bonding structure S opposite the second insulating film 86. The connection bumps 50 contain gold, silver, copper, solder (the main component of which may be, for example, tin-silver, tin-lead, tin-bismuth, or tin-copper), nickel, tin, lead, or the like as a main component, and may contain a plurality of metals. In step (d), such connection bumps 50 are formed so as to connect to a plurality of terminal electrodes 82b of the second substrate body 82. A conventional method can be used to manufacture the bumps.
[0060] In step (e), the hybrid bonding structure S provided with the connection bumps 50 is diced into a plurality of pieces to obtain a plurality of hybrid bonding structure components 40, each of which includes at least one first semiconductor element, at least one first electrode 74, at least one second semiconductor element, at least one second electrode 84, and at least one connection bump 50. In step (e), the hybrid bonding structure S is diced into individual pieces using plasma dicing, stealth dicing, laser dicing, or the like. As a result, individual hybrid bonding structure components 40 are obtained, as shown in FIG. 4A. These hybrid bonding structure components 40 correspond to the first hybrid bonding structure component 40A and the second hybrid bonding structure component 40B described above.
[0061] In step (f), a first hybrid bonding structure component 40A among the multiple individualized hybrid bonding structure components 40 is mounted on the substrate 10, which is another member. In step (f), as shown in FIG. 4B, the first hybrid bonding structure component 40A is first picked up by a bonding tool P and moved toward the substrate 10. After placing the first hybrid bonding structure component 40A on the substrate 10, the first hybrid bonding structure component 40A is heated and pressed. At this time, as shown in FIG. 5A, each of the first connection bumps 50A is connected to the corresponding wiring electrode 12. In other words, the terminal electrode 31a of the second semiconductor chip 30A is connected to the wiring electrode 12 via the first connection bump 50A. At this time, a gap V is formed between the first hybrid bonding structure component 40A and the substrate 10 in the area other than the first connection bumps 50A.
[0062] 5B, in step (g), a first liquid material made of a curable resin composition is injected into the gap V between the first hybrid bonding structure component 40A and the substrate 10 using a syringe or the like. In step (h), the injected first liquid material is cured by heat or ultraviolet light (light). This first liquid material protects the first connection bumps 50A and also protects the connection between the first hybrid bonding structure component 40A and the substrate 10.
[0063] Such a first liquid material may be an underfill agent (CUF: Capillary Underfill), which is a type of semiconductor encapsulant, and is, for example, a liquid epoxy resin composition containing an epoxy resin and a curing agent. The curing agent contained in the first liquid material is, for example, an amine-based curing agent. The first liquid material may also contain an inorganic filler. The average particle size of the inorganic filler may be within a range of 0.3 to 5 μm.
[0064] The epoxy resin used in the first liquid material is not particularly limited, and examples thereof include glycidyl ether type epoxy resins obtained by reacting bisphenol A, bisphenol F, bisphenol AD, bisphenol S, naphthalenediol, hydrogenated bisphenol A, or the like, with epichlorohydrin; epoxidized novolak resins obtained by condensing or co-condensing phenols, such as orthocresol novolak type epoxy resins, with aldehydes; glycidyl ester type epoxy resins obtained by reacting polybasic acids, such as phthalic acid and dimer acid, with epichlorohydrin; aminoglycidyl ether type epoxy resins obtained by reacting polyamines, such as diaminodiphenylmethane and isocyanuric acid, with epichlorohydrin; linear aliphatic epoxy resins obtained by oxidizing olefin bonds with peracids, such as peracetic acid; and alicyclic epoxy resins.
[0065] The epoxy resin used in the first liquid material preferably contains at least one liquid epoxy resin selected from bisphenol A epoxy resin, bisphenol F epoxy resin, bisphenol AD epoxy resin, bisphenol S epoxy resin, naphthalenediol epoxy resin, hydrogenated bisphenol A epoxy resin, and aminoglycidyl ether epoxy resin, and more preferably at least one liquid bisphenol F epoxy resin and aminoglycidyl ether epoxy resin. These may be used alone or in combination of two or more.
[0066] A reactive diluent having an epoxy group may also be mixed to adjust viscosity. Examples of reactive diluents having an epoxy group include n-butyl glycidyl ether, versatic acid glycidyl ether, styrene oxide, ethylhexyl glycidyl ether, phenyl glycidyl ether, butylphenyl glycidyl ether, 1,6-hexanediol diglycidyl ether, neopentyl glycol diglycidyl ether, diethylene glycol diglycidyl ether, and trimethylolpropane triglycidyl ether. One or more of these may be used in combination. It is preferable that these epoxy resins are sufficiently purified and contain minimal ionic impurities. For example, it is preferable that the free Na ions and free Cl ions are 500 ppm or less.
[0067] The curing agent used in the first liquid material is not particularly limited, and examples thereof include acid anhydrides, phenolic resins, aromatic amines, and various imidazole derivatives commonly used as curing agents for epoxy resins. From the viewpoint of low viscosity, it is preferable to use acid anhydrides. From the viewpoint of storage stability, it is preferable to use phenolic resins and imidazole derivatives. From the viewpoint of moisture-resistant adhesion, it is preferable to use aromatic amines. Among these, it is particularly preferable to include at least one compound selected from liquid acid anhydrides, liquid phenolic resins, and liquid aromatic amines as the curing agent, and it is even more preferable to include liquid aromatic amines as the curing agent. Note that if the composition is liquid, a solid compound may be used as the curing agent, or a combination of liquid and solid compounds may be used.
[0068] Examples of acid anhydrides include phthalic anhydride, tetrahydrophthalic anhydride, 3-methyltetrahydrophthalic anhydride, himic anhydride, succinic anhydride, trimellitic anhydride, and pyromellitic anhydride. These may be used alone or in combination of two or more.
[0069] The phenolic resin is not particularly limited as long as it has two or more phenolic hydroxyl groups in the molecule. Examples thereof include novolak phenolic resins obtained by condensing or co-condensing phenols such as phenol, cresol, resorcinol, catechol, bisphenol A, bisphenol F, phenylphenol, and aminophenol and / or naphthols such as α-naphthol, β-naphthol, and dihydroxynaphthalene with a compound having an aldehyde group such as formaldehyde under an acidic catalyst; allylated bisphenol A, allylated bisphenol F, allylated naphthalenediol, phenol novolak, and phenol-aralkyl resins and naphthol-aralkyl resins synthesized from phenols such as phenol and / or naphthols with dimethoxyparaxylene or bis(methoxymethyl)biphenyl; and the like. These may be used alone or in combination of two or more.
[0070] Examples of aromatic amines include Epicure W and Epicure Z (all trade names manufactured by Japan Epoxy Resins Co., Ltd.), Kayahard A-A, Kayahard A-B, and Kayahard A-S (all trade names manufactured by Nippon Kayaku Co., Ltd.), Tohtoamine HM-205 (trade name manufactured by Tohto Kasei Co., Ltd.), Adeka Hardener EH-101 (trade name manufactured by Asahi Denka Kogyo Co., Ltd.), Epomic Q-640 and Epomic Q-643 (trade names manufactured by Mitsui Chemicals, Inc.), and DETDA80 (trade name manufactured by Lonza), and these may be used alone or in combination of two or more.
[0071] Examples of imidazole derivatives include 2-methylimidazole, 2-undecylimidazole, 2-heptadecylimidazole, 1,2-dimethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-cyanoethyl-2-methylimidazole, 1-cyanoethyl-2-ethyl-4-methylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyanoethyl-2-phenolimidazole, 1-cyanoethyl-2-ethyl-4-methylimidazolium trimellitate, 1-cyanoethyl-2-undecylimidazole, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')] -ethyl-s-triazine, 2,4-diamino-6-(2'-undecylimidazolyl)-ethyl-s-triazine, 2,4-diamino-6-[2'-ethyl-4-methylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-methylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxydimethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, 1-cyanoethyl-2-phenyl-4,5-di(2-cyanoethoxy)methylimidazole, and the like, and these may be used in combination of two or more.
[0072] The equivalent ratio of the epoxy resin to the curing agent in the first liquid material is not particularly limited. However, to minimize unreacted components, the curing agent is preferably set in the range of 0.6 to 1.6 equivalents relative to the epoxy resin, more preferably 0.7 to 1.4 equivalents, and even more preferably 0.8 to 1.2 equivalents. Outside the 0.6 to 1.6 equivalent range, the unreacted components tend to increase, resulting in reduced reliability. Here, the equivalent of the phenolic resin is calculated as one epoxy group reacting with one phenolic hydroxyl group, the equivalent of the aromatic amine is calculated as one epoxy group reacting with one active hydrogen of an amino group, and the equivalent of the acid anhydride is calculated as one epoxy group reacting with one acid anhydride group. Because the imidazole derivative acts as a polymerization catalyst for the epoxy resin, the amount of the imidazole derivative to be added is determined taking into account the curing speed and pot life of the composition.
[0073] The first liquid material may contain an inorganic filler. The inorganic filler is blended to impart low thermal expansion, rigidity, and thermal conductivity to the epoxy resin composition. Typical examples of such inorganic fillers include fused silica, crystalline silica, alumina, silicon nitride, boron nitride, and silicon carbide. The addition of an inorganic filler can adjust the viscosity of the liquid epoxy resin composition. For example, spherical fused silica can be used. As the spherical fused silica, it is preferable to use substantially spherical fused silica produced by heat-treating natural or synthetic silica using a thermal spraying method or the like. Here, "substantially spherical" refers to the following: When natural or synthetic silica is heat-treated to spheroidize it, particles that are not completely melted may not have a perfectly spherical shape. Furthermore, multiple fused particles may be present. Furthermore, evaporated silica vapor may adhere to the surfaces of other particles and solidify, resulting in spherical silica particles with fine particles attached. "Substantially spherical" means that particles of such shapes can be mixed together, and for example, when the sphericity of the particles is expressed as Wardell's sphericity [(diameter of a circle equal to the projected area of the particle) / (diameter of the smallest circle circumscribing the projected image of the particle)], it is desirable that particles with this value of 0.9 or more account for 90% by weight or more of the total inorganic filler. The average particle size of the inorganic filler used in the liquid epoxy resin composition is preferably within the range of 0.3 μm to 5 μm.
[0074] The resin composition of the first liquid material may contain a curing accelerator, a coupling agent, a flexibilizer, a colorant, etc., as needed.
[0075] The curing accelerator is not particularly limited as long as it is one that is generally used in epoxy resin compositions and accelerates the curing reaction between the epoxy resin and the curing agent, and various amine-based compounds, imidazole-based compounds such as 2-ethyl-4-methylimidazole, organophosphine-based compounds, quaternary ammonium-based compounds or phosphonium-based compounds can be used.
[0076] For example, cycloamidine compounds such as 1,8-diazabicyclo[5.4.0]undecene-7, 1,5-diazabicyclo[4.3.0]nonene-5, 5,6-dibutylamino-1,8-diazabicyclo[5.4.0]undecene-7, and the like, and the combinations of these compounds with maleic anhydride, 1,4-benzoquinone, 2,5-toluquinone, 1,4-naphthoquinone, 2,3-dimethylbenzoquinone, 2,6-dimethylbenzoquinone, 2,3-dimethoxy-5-methyl-1,4-benzoquinone, 2, quinone compounds such as 3-dimethoxy-1,4-benzoquinone and phenyl-1,4-benzoquinone; compounds having intramolecular polarization obtained by adding a compound having a π bond such as diazophenylmethane and phenol resin; tertiary amines such as benzyldimethylamine, triethanolamine, dimethylaminoethanol, tris(dimethylaminomethyl)phenol and derivatives thereof; 2-methylimidazole, 2-phenylimidazole, 2-phenyl-4-methylimidazole, 2- Examples of suitable phosphine compounds include imidazoles such as heptadecylimidazole and derivatives thereof; phosphine compounds such as organic phosphines such as tributylphosphine, methyldiphenylphosphine, triphenylphosphine, tris(4-methylphenyl)phosphine, diphenylphosphine, and phenylphosphine; phosphorus compounds having intramolecular polarization obtained by adding a compound having a π bond such as the above-mentioned quinone compounds, maleic anhydride, diazophenylmethane, or a phenol resin to these phosphine compounds; tetra-substituted phosphonium tetra-substituted borates such as tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium ethyltriphenylborate, and tetrabutylphosphonium tetrabutylborate; tetraphenylboron salts such as 2-ethyl-4-methylimidazole tetraphenylborate and N-methylmorpholine tetraphenylborate; and derivatives thereof. These compounds may be used singly or in combination of two or more.
[0077] Coupling agents have the effect of improving the wetting of inorganic fillers and resins and the adhesion to adherends, and specific examples that can be used include γ-(2-aminoethyl)aminopropyltrimethoxysilane, γ-(2-aminoethyl)aminopropyldimethoxysilane, γ-glycidoxypropyltrimethoxysilane, γ-mercaptopropyltrimethoxysilane, γ-anilinopropyltrimethoxysilane, γ-ureidotrimethoxysilane, γ-dibutylaminopropyltrimethoxysilane, imidazole silane, etc. Flexibilizing agents that can be used include silicone and polyolefin elastomers or their powders, and colorants that can be used include carbon black, organic dyes, organic pigments, titanium oxide, red lead, red iron oxide, etc.
[0078] Next, the curable first liquid material injected into the gap V between the first hybrid bonding structure component 40A and the substrate 10 in step (g) is cured in step (h) to form the first connecting body 55A as shown in FIG. 5B. Then, as shown in FIGS. 6A and 6B, the second hybrid bonding structure component 40B is picked up with the bonding tool P, placed on top of the first hybrid bonding structure component 40A, and pressed while heated. This completes the mounting of the second hybrid bonding structure component 40B. At this time, the terminal electrodes 31a of the fourth semiconductor chip 30B are connected to the terminal electrodes 21a of the first semiconductor chip 20A via the second connection bumps 50B. A gap V is formed between the second hybrid bonding structure component 40B and the first hybrid bonding structure component 40A, except for the second connection bumps 50B.
[0079] Next, as shown in FIG. 6B, once the second hybrid bonding structure component 40B is mounted, a curable second liquid material is injected into the gap V between the second hybrid bonding structure component 40B and the first hybrid bonding structure component 40A using a syringe or the like, as in steps (g) and (h). The second liquid material thus injected is then cured. The second liquid material is the same material as the first liquid material. This liquid material protects the second connection bumps 50B and also protects the connection between the second hybrid bonding structure component 40B and the first hybrid bonding structure component 40A. In this way, the semiconductor device shown in FIG. 1 can be obtained. [Modification]
[0080] Next, a modified example of the method for manufacturing a semiconductor device according to the present disclosure will be described with reference to Fig. 7. In this modified example shown in Fig. 7, instead of filling the gap V each time a hybrid bonding structure component is mounted, multiple gaps V are filled together using a sealant that seals the stacked semiconductor chips.
[0081] Specifically, after completing step (f) shown in Fig. 5(a), the second hybrid bonding structure component 40B is picked up by the bonding tool P without injecting the first liquid material, and the second hybrid bonding structure component 40B is placed on the first hybrid bonding structure component 40A and pressed while being heated. As a result, the second hybrid bonding structure component 40B is mounted as shown in Fig. 7(a). At this time, no resin or the like has been injected into any of the gaps V.
[0082] Next, a process of collectively sealing the stacked semiconductor chips is performed. By sealing the semiconductor chips with such a sealing material, warping and other problems in the semiconductor device are suppressed. In this manufacturing method according to this modification, in this sealing process, a sealant is injected into the gap V between the substrate 10 and the first hybrid bonding structure component 40A and the gap V between the first hybrid bonding structure component 40A and the second hybrid bonding structure component 40B, and then hardened. This manufacturing method allows the process of injecting the first liquid material and the process of injecting the second liquid material to be performed simultaneously.
[0083] Such a sealant is also called MUF (Mold Underfill), and may be, for example, a liquid resin composition containing a liquid epoxy resin, a curing agent containing a liquid aromatic amine, rubber particles, and an inorganic filler. The rubber particles may be, for example, acrylic rubber.
[0084] As described above, in the semiconductor device manufacturing method according to this embodiment, a hybrid bonding structure S is fabricated using a hybrid bonding technique that bonds and connects semiconductor chips (or semiconductor wafers, etc.) without using connection bumps. Connection bumps are then formed on the hybrid bonding structure S, which is then diced to obtain multiple hybrid bonding structure components 40. Then, a first hybrid bonding structure component 40A with such connection bumps is used for mounting, and a first liquid material is injected into the gaps between the hybrid bonding structure component 40A and the other components to be mounted and then hardened. This manufacturing method uses hybrid bonding technology to connect some of the semiconductor chips, thereby enabling a thinner semiconductor device and a lower profile compared to when all semiconductor chips are connected using connection bumps. Furthermore, while conventional manufacturing methods require flip-chip bonding of stacked semiconductor chips one by one, resulting in a long manufacturing process, the above-described semiconductor device manufacturing method allows some of the semiconductor chips to be connected together at once using hybrid bonding technology, thereby shortening the manufacturing process and improving productivity.
[0085] The method for manufacturing a semiconductor device according to this embodiment further includes the steps of mounting a second hybrid bonding structure component 40B on a first hybrid bonding structure component 40A, injecting a curable second liquid material into the gap V between the second hybrid bonding structure component 40B and the first hybrid bonding structure component 40A, and curing the second liquid material. This manufacturing method makes it possible to reduce the height of a semiconductor device even when multiple semiconductor chips are stacked. Furthermore, the manufacturing process for a semiconductor device can be shortened, thereby improving productivity.
[0086] In the method for manufacturing a semiconductor device according to this embodiment, the step of injecting the first liquid material and the step of injecting the second liquid material may be performed separately. This manufacturing method makes it possible to more reliably inject the first liquid material and the second liquid material, thereby easily fabricating a highly reliable semiconductor device.
[0087] The semiconductor device manufacturing method according to this embodiment may further include a step of sealing the first hybrid bonding structure component 40A and the second hybrid bonding structure component 40B, and the steps of injecting the first liquid material and the second liquid material may be performed in this sealing step. This manufacturing method not only seals the first hybrid bonding structure component 40A and the second hybrid bonding structure component 40B, but also protects the connection bumps by using the sealing material as an underfill material. Therefore, this manufacturing method can further improve the productivity of semiconductor devices.
[0088] In the method for manufacturing a semiconductor device according to this embodiment, the other member is a substrate 10 having wiring electrodes 12 provided on its surface, and in the step of mounting the first hybrid bonding structure component 40A, the first hybrid bonding structure component 40A is mounted on the substrate 10 so that the first connection bumps 50A of the first hybrid bonding structure component 40A are connected to the wiring electrodes 12. This manufacturing method makes it possible to reduce the height of a semiconductor device in which a semiconductor chip is mounted on a substrate.
[0089] In the method for manufacturing a semiconductor device according to this embodiment, at least one of the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 may contain an inorganic insulating material. This manufacturing method makes it possible to fabricate semiconductor devices with finer structures. Furthermore, because inorganic materials are easily bonded to each other strongly, it is possible to increase the adhesive strength between semiconductor chips and further improve the connection reliability of the semiconductor device.
[0090] In the manufacturing method of the semiconductor device according to this embodiment, at least one of the first insulating film 76 of the first semiconductor substrate 70 and the second insulating film 86 of the second semiconductor substrate 80 may contain an organic insulating material. According to this manufacturing method, the organic material, which is a relatively soft material, allows debris generated when the semiconductor substrate is diced into semiconductor chips to be absorbed (embedded) in the insulating film portion made of the organic material, thereby reducing connection defects between semiconductor chips joined by hybrid bonding.
[0091] In the semiconductor device manufacturing method according to this embodiment, the organic insulating material contained in at least one of the first insulating film 76 and the second insulating film 86 may include polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. In this case, these materials are liquid or soluble in a solvent, which makes it easy to prepare the first insulating film, for example, by spin coating, and to form a thin film. Furthermore, these materials have high heat resistance, so they can withstand high temperatures and other conditions that may be encountered during hybrid bonding, enabling more reliable bonding of semiconductor chips.
[0092] 1...semiconductor device, 10...substrate (other component), 12...wiring electrode, 20A...first semiconductor chip, 20B...third semiconductor chip, 21a...terminal electrode, 21b...through electrode, 22A...first insulating film, 22B...third insulating film, 24A...first electrode, 24B...third electrode, 26A...first semiconductor component, 26B...third semiconductor component, 30A...second semiconductor chip, 30B...fourth semiconductor chip, 31a...terminal electrode, 31b...through electrode, 32A...second insulating film, 32B...fourth insulating film, 34A...second electrode, 34B...fourth electrode, 36A...second semiconductor component, 3 6B...fourth semiconductor component, 40...hybrid bonding structure component, 40A...first hybrid bonding structure component, 40B...second hybrid bonding structure component, 50...connection bump, 50A...first connection bump, 50B...second connection bump, 55A...first connection body, 55B...second connection body, 70...first semiconductor substrate, 72...first substrate body, 74...first electrode, 76...first insulating film, 80...second semiconductor substrate, 82...second substrate body, 84...second electrode, 86...second insulating film, S...hybrid bonding structure, V...gap.
Claims
1. A step of preparing a first semiconductor substrate having a first substrate body including a plurality of first semiconductor elements, and a first insulating film and a plurality of first electrodes provided on the first substrate body; A step of preparing a second semiconductor substrate having a second substrate body including a plurality of second semiconductor elements, and a second insulating film and a plurality of second electrodes provided on the second substrate body; a step of bonding the first insulating film of the first semiconductor substrate and the second insulating film of the second semiconductor substrate to each other and bonding the first electrodes of the first semiconductor substrate to the second electrodes of the second semiconductor substrate to obtain a hybrid bonding structure; forming a plurality of connection bumps on a surface of the second substrate body opposite to the second insulating film; Dicing the hybrid bonding structure on which the plurality of connection bumps are formed to obtain a plurality of hybrid bonding structure components, each of which includes at least one first semiconductor element, at least one first electrode, at least one second semiconductor element, at least one second electrode, and at least one connection bump; mounting a first hybrid bonding structure component of the plurality of hybrid bonding structure components on another member; Injecting a hardenable first liquid material into a gap between the first hybrid bonding structure component and the other member; hardening the first liquid material; The method for manufacturing a semiconductor device includes the steps of:
2. mounting a second hybrid bonding structure component of the plurality of hybrid bonding structure components to the first hybrid bonding structure component; injecting a curable second liquid material into a gap between the second hybrid bonding structure component and the first hybrid bonding structure component; hardening the second liquid material; The method for manufacturing a semiconductor device according to claim 1 , further comprising:
3. The step of injecting the first liquid material and the step of injecting the second liquid material are carried out separately. The method for manufacturing a semiconductor device according to claim 2 .
4. further comprising encapsulating the first hybrid bonding structure component and the second hybrid bonding structure component; the step of injecting the first liquid material and the step of injecting the second liquid material are performed in the step of sealing; The method for manufacturing a semiconductor device according to claim 2 .
5. the other member is a substrate having a wiring electrode provided on a surface thereof, In the step of mounting the first hybrid bonding structure component, the first hybrid bonding structure component is mounted on the substrate so that the connection bumps of the first hybrid bonding structure component are connected to the wiring electrodes; After mounting the first hybrid bonding structure component on the substrate, mounting the second hybrid bonding structure component on the first hybrid bonding structure component; The method for manufacturing a semiconductor device according to claim 2 .
6. The thermal expansion coefficient of the organic insulating material contained in at least one of the first insulating film and the second insulating film is 70 ppm / K or less. The method for manufacturing a semiconductor device according to claim 1 or 2.
7. The thermal expansion coefficient of the organic insulating material contained in at least one of the first insulating film and the second insulating film is 50 ppm / K or less. The method for manufacturing a semiconductor device according to claim 1 or 2.
8. The first liquid material is a liquid epoxy resin composition containing at least an epoxy resin and a curing agent. The method for manufacturing a semiconductor device according to claim 1 or 2.
9. The hardener contained in the first liquid material is an amine-based hardener. The method for manufacturing a semiconductor device according to claim 8 .
10. The first liquid material contains an inorganic filler, The average particle size of the inorganic filler is 0.3 μm to 5 μm. The method for manufacturing a semiconductor device according to claim 1 or 2.
11. a first semiconductor component including a first semiconductor chip, a first insulating film and a first electrode provided on the first semiconductor chip, a second semiconductor component including a second semiconductor chip, a second insulating film and a second electrode provided on a first surface of the second semiconductor chip, and a first connection bump provided on a second surface of the second semiconductor chip and connected to an electrode of the second semiconductor chip, wherein the first insulating film and the second insulating film are bonded together and the first electrode and the second electrode are joined; Another member on which the first hybrid bonding structure component is mounted; a hardened product of a first liquid material injected between the first hybrid bonding structure component and the other member so as to cover the first connection bumps and hardened; A semiconductor device comprising:
12. a second hybrid bonding structure component mounted on the first hybrid bonding structure component, the second hybrid bonding structure component having a third semiconductor component including a third semiconductor chip, a third insulating film and a third electrode provided on the third semiconductor chip, a fourth semiconductor component including a fourth semiconductor chip, a fourth insulating film and a fourth electrode provided on a first surface of the fourth semiconductor chip, and a second connection bump provided on a second surface of the fourth semiconductor chip and connected to an electrode of the fourth semiconductor chip, the third insulating film and the fourth insulating film being attached to each other and the third electrode being joined to the fourth electrode; a hardened second liquid material injected between the second hybrid bonding structure component and the first hybrid bonding structure component so as to cover the second connection bumps and hardened; The semiconductor device according to claim 11 , comprising:
13. The cured product of the first liquid material is a cured product of a liquid epoxy resin composition containing at least an epoxy resin and a curing agent. The semiconductor device according to claim 11 or 12.
14. At least one of the first insulating film and the second insulating film has a thermal expansion coefficient of 70 ppm / K or less. The semiconductor device according to claim 11 or 12.
15. The hardened product of the first liquid material contains an inorganic filler, The average particle size of the inorganic filler is 0.3 μm to 5 μm. The semiconductor device according to claim 11 or 12.