Electric power conversion circuit device

Abstract

In the present invention, an electric power conversion circuit device comprises an inverter circuit between input terminals (T01, T02) and output terminals (T11, T12). A first connection point (N11) is connected to the first output terminal (T11) via a first inductance (L21), and a second connection point (N12) is connected to the second output terminal (T12) via a second inductance (L22). A first impedance element (A1) is connected between the first connection point (N11) and the second input terminal (T02), a second impedance element (A2) is connected between the second connection point (N12) and the second input terminal (T02), a third impedance element (B1) is connected between the first output terminal (T11) and the second input terminal (T02), and a fourth impedance element (B2) is connected between the second output terminal (T12) and the second input terminal (T02).

Description

Power conversion circuit device

[0001] The present disclosure relates to a power conversion circuit device including, for example, an inverter circuit.

[0002] Industrial equipment such as processing machines and mounting machines are generally equipped with motor systems. The power section of a motor system consists of the following five blocks: (1) A power cable that connects to the AC power source in the factory; (2) A rectifier circuit that converts AC power to DC power; (3) An inverter circuit that generates a PWM (Pulse Width Modulation) signal from DC power; (4) A motor; and (5) A motor cable that connects the inverter circuit and motor.

[0003] Of these, the inverter circuit (3) achieves PWM control by switching an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor). As with power conversion circuits such as DC-DC converters, electromagnetic noise is generated during switching, so measures such as a noise filter must be taken.

[0004] Electromagnetic noise is classified into conducted noise and radiated noise. Of these, radiated noise is easily emitted into space from long conductors such as cables. In factories, there is little space within the equipment that houses motors, so racks to store inverter circuits are sometimes installed separately from the equipment. In such cases, the motor cables become long, and the dominant source of radiated noise becomes the motor cable.

[0005] It is also generally known that common mode noise components are more likely to contribute to radiated noise than differential mode noise. Therefore, in order to suppress radiated noise from motor systems in a factory environment, it is important to reduce the "common mode" noise components flowing in the "motor cable."

[0006] Patent Document 1 discloses a circuit configuration that uses active elements such as transistors to reduce common-mode noise in an inverter circuit.

[0007] Patent No. 6803478

[0008] The method of canceling noise using active elements is characterized by high noise reduction performance. However, due to the limits of the frequency response performance of active elements and the nonlinear frequency characteristics of the magnetic components used for noise detection, performance tends to deteriorate in the high frequency band where radiated noise is a problem. In addition, components with good frequency characteristics are expensive. Therefore, it is necessary to use "passive components" to reduce the "high frequency" "common mode" noise components flowing in the "motor cable."

[0009] An object of the present disclosure is to provide a power conversion circuit device that can reduce common-mode noise flowing in a motor cable, thereby suppressing radiated noise, without using expensive active components or large noise suppression components, for example, in a power conversion circuit device including an inverter circuit.

[0010] A power conversion circuit device according to one aspect of the present disclosure is a power conversion circuit device including an inverter circuit between first and second input terminals and first and second output terminals, the power conversion circuit device including a bridge circuit in which first and second switch elements connected in series to each other and third and fourth switch elements connected in series to each other are connected in parallel, wherein both ends of the series circuit of the first and second switch elements and both ends of the series circuit of the third and fourth switch elements are defined as first and second connection points and are connected to the first and second input terminals via first and second inductances, respectively, a third connection point of the first and second switch elements is connected to the first output terminal via a third inductance, and a fourth connection point of the third and fourth switch elements is connected to the second output terminal via a fourth inductance, the power conversion circuit device comprising: a first impedance element connected between the third connection point and the first or second input terminal; a second impedance element connected between the fourth connection point and the first or second input terminal; and a third impedance element connected between the first output terminal and the first or second input terminal. a fourth impedance element connected between the second output terminal and the first or second input terminal.

[0011] Therefore, the power conversion circuit device according to one aspect of the present disclosure can reduce common-mode noise flowing in a motor cable of a power supply circuit for an inverter circuit, thereby suppressing radiated noise, thereby reducing the number of noise suppression components and realizing smaller, lighter, and more cost-effective devices compared to conventional inverter circuits.

[0012] 4D is an equivalent circuit diagram showing a configuration example of the power conversion circuit device related to a single-phase inverter circuit according to Comparative Example 1. FIG. 5 is a circuit diagram showing a configuration example of the power conversion circuit device according to Embodiment 1. FIG. 6 is an equivalent circuit diagram in the radiation noise band of the power conversion circuit device of FIG. 2. FIG. 7 is a circuit diagram showing a configuration example 1 of the impedance element A1 of the power conversion circuit device of FIG. 2. FIG. 8 is a circuit diagram showing a configuration example 2 of the impedance element A1 of the power conversion circuit device of FIG. 2. FIG. 9 is a circuit diagram showing a configuration example 3 of the impedance element A1 of the power conversion circuit device of FIG. 2. FIG. 10 is a circuit diagram showing a configuration example 4 of the impedance element A1 of the power conversion circuit device of FIG. 2. FIG. 4D is an equivalent circuit diagram in the radiation noise band of the power conversion circuit device of FIG. 2. FIG. 11 is a spectral diagram showing a comparison of the common mode current suppression effect between the power conversion circuit devices of FIG. 1 and FIG. 2. FIG. 12 is a circuit diagram showing a configuration example of the power conversion circuit device according to a modification of Embodiment 1. FIG. 13 is an equivalent circuit diagram in the radiation noise band of the power conversion circuit device of FIG. 7. FIG. 14 is an equivalent circuit diagram in the radiation noise band of the power conversion circuit device of FIG. 7. FIG. 15 is a circuit diagram showing a configuration example of the power conversion circuit device according to Embodiment 2. 16 is an equivalent circuit diagram of the power conversion circuit device of FIG. 10 in the radiation noise band. FIG. 16 is an equivalent circuit diagram of the power conversion circuit device of FIG. 10 in the radiation noise band. FIG. 16 is a spectral diagram showing a comparison of the common-mode current suppression effects of the power conversion circuit devices of FIG. 1 and FIG. 10. FIG. 16 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to embodiment 3. FIG. 16 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to embodiment 4. FIG. 16 is a circuit diagram showing the configuration of a power conversion circuit device related to a three-phase inverter circuit of comparative example 2. FIG. 16 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to embodiment 5. FIG. 16 is an equivalent circuit diagram of the power conversion circuit device of FIG. 16 in the radiation noise band. FIG. 16 is an equivalent circuit diagram of the power conversion circuit device of FIG. 16 in the radiation noise band. FIG. 16 is a spectral diagram showing a comparison of the common-mode current suppression effects of the power conversion circuit devices of FIG. 16 and FIG. 16. FIG. 16 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to embodiment 6. FIG. 16 is an equivalent circuit diagram of the power conversion circuit device of FIG. 16 in the radiation noise band. FIG. 16 is an equivalent circuit diagram of the power conversion circuit device of FIG. 16 in the radiation noise band. FIG. 16 is an equivalent circuit diagram of the power conversion circuit device of FIG. 16 in the radiation noise band.Fig. 22 is an equivalent circuit diagram in a radiation noise band of the power conversion circuit device of Fig. 21. Fig. 23 is a spectrum diagram showing a comparison of the common mode current suppression effect of the power conversion circuit devices of Fig. 16 and Fig. 21. Fig. 24 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to a seventh embodiment.

[0013] Hereinafter, embodiments and modifications of the present disclosure will be described with reference to the drawings, in which the same or similar components are denoted by the same reference numerals.

[0014] (Inventor's Findings) Fig. 1 is a circuit diagram showing the configuration of a power conversion circuit device related to a single-phase inverter circuit according to Comparative Example 1. In Fig. 1, a smoothing circuit and, for example, a PWM switching inverter circuit are inserted between input terminals T01, T02 and output terminals T11, T12.

[0015] A DC voltage of DC power is applied between input terminals T01 and T02. Input terminal T01 is connected to node N01 via inductors L01 and L11, and input terminal T02 is connected to node N02 via inductors L02 and L12. The connection point between inductors L01 and L11 is connected to the connection point between inductors L02 and L12 via capacitor C1, and node N01 is connected to node N02 via capacitor C2. Input terminal T01 is grounded via capacitor C3, and input terminal T02 is grounded via capacitor C4.

[0016] Here, capacitors C1 and C2 are X capacitors, and for example, capacitor C1 is a smoothing capacitor and capacitor C2 is a snubber capacitor. Capacitors C3 and C4 are Y capacitors used to reduce noise. Inductors L01, L02, L11, L12, L21, and L22 are wiring inductances or choke coils. Switching elements S1 to S4 are, for example, N-channel MOS transistors, and switching elements S1 and S2, and S3 and S4 are connected in series to form a full-bridge circuit. Here, node N01 is connected to node N02 via the drain and source of switching element S1 and the drain and source of switching element S2, and node N01 is also connected to node N02 via the drain and source of switching element S3 and the drain and source of switching element S4. A node N11, which is the connection point between the source of the switch element S1 and the drain of the switch element S2, is connected to an output terminal T11 via an inductor L21, and a node N12, which is the connection point between the source of the switch element S3 and the drain of the switch element S4, is connected to an output terminal T12 via an inductor L22.

[0017] The control circuit 1 generates known command signals SS1 to SS4 for performing PWM switching (two-phase) and outputs them to the gates of the switch elements S1 to S4, respectively, which switches the switch elements S1 to S4 on or off and generates the desired PWM voltages at the output terminals T11 and T12.

[0018] In this case, a common-mode current flows in phase through inductors L21 and L22, and if this current propagates from output terminals T11 and T12 to, for example, a motor cable connected to the load motor, radiated noise increases. In order to suppress the common-mode current, measures such as inserting a ferrite core into the motor cable are required, which not only incurs additional costs but also increases the size and weight of the equipment.

[0019] In view of the findings of these problems, the present inventors have devised the power conversion circuit devices according to the following embodiments and modifications in order to solve the problems.

[0020] (Embodiment 1) Fig. 2 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to embodiment 1. The power conversion circuit device of Fig. 2 differs from the power conversion circuit device of Fig. 1 in the following respects: (1) It further includes impedance elements A1, A2, B1, and B2. The differences will be described below.

[0021] 2, impedance element A1 is connected between node N11 and input terminal T02, impedance element A2 is connected between node N12 and input terminal T02, impedance element B1 is connected between node N02 and output terminal T11, and impedance element B2 is connected between node N02 and output terminal T12.

[0022] In the frequency band of 30 MHz to 300 MHz (radiation noise band) where radiation noise becomes a problem, the impedance Z (= 1 / (2πfC)) of capacitors C1 to C4 is sufficiently small compared to other elements and can be approximated as a short circuit (Z ≈ 0).

[0023] FIG. 3 is an equivalent circuit diagram of the power conversion circuit device of FIG. 2 in this approximated state in the radiated noise band. In FIG. 2, when capacitor C2 is approximated as short-circuited, the potentials of nodes N01 and N02 are equal, so the drain-to-source voltage of switch element S1 and the source-to-drain voltage of switch element S2 are the same, which is represented in FIG. 3 by voltage source VS12. In FIG. 3, to focus on noise propagation from the pair of switch elements S1 and S2 of the first phase (hereinafter referred to as the "switch element pair"), the pair of switch elements S3 and S4 of the second phase are considered short-circuited. This is because, based on the principle of superposition, all voltage sources other than the one of interest can be considered short-circuited. Note that the symbol "X / / Y" in the figure represents a parallel circuit of element X and element Y. Furthermore, since capacitors C3 and C4 are approximated as short-circuited in FIG. 3, input terminals T01 and T02 are considered to be the same node in the radiated noise band, and so on.

[0024] As is clear from Figure 3, the addition of impedance elements A1 and B1 from the voltage source VS12 to the first-phase output terminal T11 forms a bridge circuit. Therefore, although the detailed principle will be described later, the impedance balancing method can reduce noise propagation from the voltage source VS12 to the output terminal T11. Similarly, noise propagation from the second-phase switch element pair S3 and S4 to the output terminal T12 can also be reduced. This suppresses common-mode current propagating through the wiring extending from the output terminals T11 and T12, reducing radiated noise and the number of countermeasure components, thereby enabling cost reduction and size and weight reduction.

[0025] 4A to 4D are circuit diagrams showing configuration examples 1 to 4 of the impedance element A1 of the power conversion circuit device of FIG. 2. A series circuit of an inductor and a capacitor is considered as a means for realizing the impedance elements A1, A2, B1, and B2. The impedance element A1 can be expressed, for example, as shown in FIG. 4A, and the impedance elements A2, B1, and B2 can be expressed in a similar manner.

[0026] 4A, impedance element A1 is represented by, for example, a series circuit of capacitor CA1 and inductor LA1. Similarly, (1) impedance element A2 is represented by, for example, a series circuit of capacitor CA2 and inductor LA2. (2) impedance element B1 is represented by, for example, a series circuit of capacitor CB1 and inductor LB1. (3) impedance element B2 is represented by, for example, a series circuit of capacitor CB2 and inductor LB2.

[0027] In Figure 4A, the presence of capacitor CA1 provides DC insulation between the terminals of impedance element A1, enabling the generation of a PWM voltage similar to that of the inverter circuit of Comparative Example 1. Furthermore, in the radiated noise band, the impedance of capacitor CA1 is sufficiently small compared to the other elements, so it can be approximated as a short circuit. Therefore, the impedance of inductor LA1 becomes dominant in the radiated noise band. In this case, the equivalent circuit of Figure 3 can be specifically expressed as shown in Figure 5.

[0028] In this specification, the inductance of each inductor L is represented by the same symbol L, and the capacitance of each capacitor C is represented by the same symbol C. In addition, inductance L01 is different from inductance L1, and inductance L02 is different from inductance L2.

[0029] Figure 5 is an equivalent circuit diagram of the power conversion circuit device of Figure 2 in the radiated noise band. In Figure 5, the bridge circuit consists only of inductors, so a significant noise reduction effect can be achieved over a wide band using the impedance balancing method. It also simplifies design. In order to make the impedance of inductor LA1 dominant in the radiated noise band as described above, it is necessary to design the series resonant frequency of capacitor CA1 and inductor LA1 to be below the radiated noise band.

[0030] The impedance elements A1, A2, B1, and B2 may each include a resistor connected in series or parallel to the inductor. That is, (1) the impedance element A1 may be configured as a series circuit of a resistor R1, an inductor LA1, and a capacitor CA1, as shown in Figure 4B, and the same is true for the impedance elements A2, B1, and B2. (2) the impedance element A1 may be configured as a series circuit of a resistor R1, an inductor LA1, and a capacitor CA1 connected in parallel, as shown in Figure 4C, and the same is true for the impedance elements A2, B1, and B2.

[0031] This makes it possible to stabilize the impedance at the self-resonant frequency of the impedance elements A1, A2, B1, and B2, and to prevent noise peaks from occurring, thereby achieving a noise reduction effect over a wide band.

[0032] Furthermore, a ferrite bead BD1 may be used as an impedance element including an inductor. That is, as shown in FIG. 4D, impedance element A1 may be configured as a series circuit of ferrite bead BD1 and capacitor CA1, and the same is true for impedance elements A2, B1, and B2. The equivalent circuit of ferrite bead BD1 is generally represented, for example, by a circuit (FIG. 4E) in which a parallel circuit of inductor LA1 and resistor R1 is connected in series with another resistor R2. Thus, when using ferrite bead BD1, a resistance component is included, allowing for stable noise reduction without the use of a resistive element.

[0033] Next, the conditions for maximizing the noise reduction effect will be shown.

[0034] In the equivalent circuit of FIG. 5 , the upper left component of the bridge circuit with respect to the output terminal T11 is represented by LA2 / / (L01 / / L02 + L11 / / L12). The inductance of this composite inductor is represented by inductors L1. The lower left, upper right, and lower right components of the bridge circuit are inductors LA1, LB1, and L21, respectively. Focusing on the circuit on the left side of the bridge circuit in FIG. 5 , the voltage source VS12 is divided by the upper left and lower left inductors of the bridge circuit. That is, a voltage of L1 / (L1+LA1)×VS12 is applied to the upper left inductor of the bridge circuit. Because the input terminals T01 and T02 are at ground potential in the radiation noise band, the potential of nodes N01, N02, and N12 is L1 / (L1+LA1)×VS12.

[0035] Next, looking at the circuit on the right side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top right and bottom right of the bridge circuit. That is, a voltage of LB1 / (LB1+L21)×VS12 is applied to the top right inductor of the bridge circuit. Here, when L1 / (L1+LA1)×VS12=LB1 / (LB1+L21)×VS12, the potential of the output terminal T11 is 0 V. Because the ground potential is 0 V, this means that no common-mode voltage is generated. Therefore, when this condition is met, a significant noise reduction effect can be expected.

[0036] The above design condition equation can be expressed in the form of an inductance ratio: L1:LA1 = LB1:L21. This is the impedance balance method. L01 / / L02 + L11 / / L12 can be rephrased as the effective inductance between the input terminal T01 and the node N01 when the input terminal T01 and the input terminal T02 are short-circuited and the node N01 and the node N02 are short-circuited.

[0037] Therefore, the above-mentioned optimum conditions can be explained as follows: Let L2 be the inductance of the impedance elements A1 and A2 or the inductance of the beads, L1 be the effective inductance between the input terminal T01 and the node N01 when the input terminal T01 and the input terminal T02 are short-circuited and the nodes N01 and N02 are short-circuited, and L1 be the inductance of a parallel inductor with the inductor L2, L3 be the inductance of the impedance elements B1 and B2 or the inductance of the beads, and L4 be the inductance of the inductors L21 and L22, then L1:L2=L3:L4.

[0038] In any of the embodiments, a common mode choke coil in which inductors L01 and L02 are coupled may be used, or a common mode choke coil in which inductors L11 and L12 are coupled may be used. In this case, too, the design may be based on the above-mentioned "effective inductance between input terminal T01 and node N01 when input terminal T01 and input terminal T02 are shorted and nodes N01 and N02 are shorted." For example, when using a common mode choke coil in which L01 and L02 (= L01) are coupled with a coupling degree k0 and a common mode choke coil in which L11 and L12 (= L11) are coupled with a coupling degree k1, the effective inductance between input terminal T01 and the nodes in the bridge circuit is L01 × (1 + k0) / 2 + L11 × (1 + k1) / 2.

[0039] Although not as effective as the above optimal conditions, noise reduction effects can also be expected under the following conditions. Consider the range in which the voltage applied to the upper right component of the bridge circuit in Figure 5 is 0.5 to 1.5 times the voltage applied to the upper left component of the bridge circuit. (1) When it is 0.5 times, L1 / (L1 + LA1) x VS12 = 0.5 x LB1 / (LB1 + L21) x VS12. (2) When it is 1.5 times, L1 / (L1 + LA1) x VS12 = 1.5 x LB1 / (LB1 + L21) x VS12. Therefore, in the formula L1 / (L1+LA1)×VS12=a×LB1 / (LB1+L21)×VS12, that is, in the formula L1 / (L1+LA1)=a×LB1 / (LB1+L21), when the coefficient a is 0.5≦a≦1.5 (when the formula is established with the element values ​​set in this manner), a noise reduction effect can be expected.

[0040] The effects of the power conversion circuit device according to the first embodiment will be shown using circuit simulation. The circuit parameters are as follows. However, the values ​​in parentheses are parasitic components taken into account in series. C1 = 1 mF (10 nH, 10 mΩ), C2 = 100 nF (1 nH, 10 mΩ), C3 = C4 = 4.7 nF (10 nH, 0.2 Ω), L01 = L02 = L11 = L12 = 0.5 μH, L21 = L22 = 0.5 μH.

[0041] Furthermore, impedance elements A1 and A2 were configured as a series circuit of 0.5 μH, 200 pF, and 30 Ω, and impedance elements B1 and B2 were configured as a series circuit of 0.25 μH, 200 pF, and 30 Ω. A DC voltage of 282 V was input between input terminals T01 and T02, and the switching frequency (carrier frequency) of switch elements S1 to S4 was set to 12 kHz. The common mode current was compared when a 5-m-long motor cable (T-type equivalent circuit) and a motor (winding inductance 1 μH, parasitic capacitance between the winding and the housing 0.5 nF) were connected to output terminals T11 and T12 of the inverter circuit.

[0042] FIG. 6 is a spectral diagram comparing the common-mode currents in the power conversion circuit devices of FIGS. 1 and 2. As is clear from FIG. 6, it can be seen that a suppression effect of 10 dB to 20 dB can be achieved at noise peaks that are likely to cause problems in the radiated noise band. In particular, a suppression effect DP11 (= P01 - P11) is observed at approximately 50 MHz, and a suppression effect DP12 (= P02 - P12) is observed at approximately 70 MHz. Here, P01 and P02 are the peaks of the common-mode current in Comparative Example 1, and P11 and P12 are the peaks of the common-mode current in Embodiment 1.

[0043] The same effect can be achieved when the impedance elements A1 and A2 are connected to the input terminal T01 instead of the input terminal T02. The same effect can be achieved when the impedance elements B1 and B2 are connected to the node N01 instead of the node N02.

[0044] (Modification of Embodiment 1) Fig. 7 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to a modification of Embodiment 1. The power conversion circuit device of Fig. 7 differs from the power conversion circuit device of Fig. 2 in the following respects: (1) It further includes impedance elements A3, A4, B3, and B4. The differences will be described below.

[0045] 7, impedance element A3 is connected between node N11 and input terminal T01, impedance element A4 is connected between node N12 and input terminal T01, impedance element B3 is connected between node N01 and output terminal T11, and impedance element B4 is connected between node N01 and output terminal T12.

[0046] In the modified example of Fig. 7 configured as above, a noise reduction effect can be obtained for the same reasons as in the first embodiment of Fig. 2. However, the design condition formula is different, which will be explained below.

[0047] Although the impedance elements A1 to A4 and B1 to B4 are connected to both the positive and negative poles, in the equivalent circuit, the input terminals T01 and T02 and the nodes N01 and N02 are considered to be at the same potential. Therefore, the equivalent circuit has the same circuit configuration as in the first embodiment, and is specifically shown in FIG.

[0048] Figure 8 is an equivalent circuit diagram of the power conversion circuit device of Figure 7 in the radiated noise band. As is clear from Figure 8, a bridge circuit is configured from the voltage source VS12 to the first-phase output terminal T11, as in Figure 3. Therefore, it is possible to reduce noise propagation from the voltage source VS12 to the output terminal T11 by using the impedance balancing method. Similarly, it is possible to reduce noise propagation from the second-phase switch element pair S3 and S4 to the output terminal T12. This makes it possible to suppress common-mode current propagating in the wiring extending from the output terminals T11 and T12, thereby reducing radiated noise and the number of countermeasure components, thereby enabling cost reduction, size reduction, and weight reduction.

[0049] As a means of realizing impedance elements A1 to A4 and B1 to B4, consider a series circuit of an inductor and a capacitor. For example, impedance element A1 can be represented in a circuit diagram as shown in Figure 4A, and impedance elements A2 to A4 and B1 to B4 can be represented similarly. Here, (1) impedance element A3 can be represented, for example, by a series circuit of capacitor CA3 and inductor LA3. (2) impedance element A4 can be represented, for example, by a series circuit of capacitor CA4 and inductor LA4. (3) impedance element B3 can be represented, for example, by a series circuit of capacitor CB3 and inductor LB3. (4) impedance element B4 can be represented, for example, by a series circuit of capacitor CB4 and inductor LB4.

[0050] The presence of capacitor CA1 in impedance element A1 provides DC insulation between the terminals of impedance element A1, enabling the generation of a PWM voltage similar to that of the inverter circuit of Comparative Example 1. Furthermore, in the radiation noise band, the impedance of capacitor CA1 is sufficiently small compared to the other elements, so it can be approximated as a short circuit. Therefore, the impedance of inductor LA1 becomes dominant in the radiation noise band. In this case, the equivalent circuit of FIG. 8 can be specifically expressed as shown in FIG. 9.

[0051] Fig. 9 is an equivalent circuit diagram of the power conversion circuit device of Fig. 7 in the radiation noise band. As is clear from Fig. 9, since the bridge circuit consists only of inductors, a large noise reduction effect can be obtained over a wide band by using the impedance balance method. This also simplifies the design.

[0052] In order to make the impedance of the inductor LA1 dominant in the radiation noise band as described above, it is necessary to design the series resonance frequency of the capacitor CA1 and inductor LA1 to be below the radiation noise band.

[0053] Here, as shown in Figures 4B to 4D, impedance elements A1 to A4 and B1 to B4 may further include a resistive element connected in series or parallel to the inductor. This stabilizes the impedance at the self-resonant frequency of the impedance element and prevents noise peaks. This results in a broadband noise reduction effect. Furthermore, ferrite bead BD1 may be used as the inductor-containing impedance elements A1 to A4 and B1 to B4. The equivalent circuit of ferrite bead BD1 is typically represented by a circuit (Figure 4E) in which a separate resistor R2 is connected in series to a parallel circuit of inductor LA1 and resistor R1. In this way, when using ferrite bead BD1, a resistive component is incorporated, allowing for stable noise reduction without the need for a resistive element.

[0054] Next, the conditions for maximizing the noise reduction effect will be shown.

[0055] In the equivalent circuit of Figure 9, the upper left component of the bridge circuit with respect to the output terminal T11 is represented by LA2 / / LA4 / / (L01 / / L02 + L11 / / L12). The inductance of this composite inductor is defined as inductance L1. The inductance of the composite inductor of the lower left component LA1 / / LA3 of the bridge circuit is defined as inductance L2. The inductance of the composite inductor of the upper right component LB1 / / LB3 of the bridge circuit is defined as inductance L3. The lower right component of the bridge circuit is inductor L21.

[0056] Looking at the circuit on the left side of the bridge circuit in Figure 9, the voltage source VS12 is divided by the inductors at the top and bottom left of the bridge circuit. That is, a voltage of L1 / (L1+L2) x VS12 is applied to the inductor at the top left of the bridge circuit. Because the input terminals T01 and T02 are at ground potential in the radiation noise band, the potential of nodes N01, N02, and N12 is L1 / (L1+L2) x VS12.

[0057] Next, looking at the circuit on the right side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top right and bottom right of the bridge circuit. That is, a voltage of L3 / (L3 + L21) x VS12 is applied to the top right inductor of the bridge circuit. Here, when L1 / (L1 + L2) x VS12 = L3 / (L3 + L21) x VS12, the potential of the output terminal T11 is 0 V. Because the ground potential is 0 V, this means that no common-mode voltage is generated. Therefore, when this condition is met, a significant noise reduction effect can be expected.

[0058] The above design condition equation can be expressed in the form of an inductance ratio, L1:L2 = L3:L21. This is the impedance balance method. L01 / / L02 + L11 / / L12 can be rephrased as the effective inductance between the input terminal T01 and the node N01 when the input terminal T01 and the input terminal T02 are short-circuited and the nodes N01 and N02 are short-circuited. Therefore, the above optimum condition can be explained as follows: Let the inductance of impedance elements A1 to A4 or the inductance of the beads be "2 x L2", let the effective inductance between input terminal T01 and node N01 when input terminal T01 and input terminal T02 are shorted and node N01 and node N02 are shorted and the parallel inductance of inductor L2 be L1, let the inductance of impedance elements B1 to B4 or the inductance of the beads be "2 x L3", and let the inductance of inductors L21 and L22 be L4, then L1:L2 = L3:L4.

[0059] Although not as effective as the above optimal conditions, noise reduction effects can also be expected under the following conditions. Consider the range in which the voltage applied to the upper right component of the bridge circuit in Figure 9 is 0.5 to 1.5 times the voltage applied to the upper left component of the bridge circuit. (1) When it is 0.5 times, L1 / (L1 + L2) x VS12 = 0.5 x L3 / (L3 + L21) x VS12. (2) When it is 1.5 times, L1 / (L1 + L2) x VS12 = 1.5 x L3 / (L3 + L21) x VS12. Therefore, in the formula L1 / (L1+L2)×VS12=a×L3 / (L3+L21)×VS12, that is, in the formula L1 / (L1+L2)=a×L3 / (L3+L21), when the coefficient a is 0.5≦a≦1.5 (when the formula is established with the element values ​​set in this way), a noise reduction effect can be expected.

[0060] In the first embodiment shown in FIG. 2, no impedance element is connected between the element terminals of switch element S1 (between the drain and source in the case of a MOS transistor, and between the collector and emitter in the case of an IGBT), and impedance elements A1 and B1 are connected between the terminals of switch element S2. On the other hand, in the modified example shown in FIG. 7, impedance elements A3 and B3 are connected between the element terminals of switch element S1 (between the drain and source in the case of a MOS transistor, and between the collector and emitter in the case of an IGBT), and impedance elements A1 and B1 are connected between the element terminals of switch element S2. Therefore, the elements connected to the high-side switch elements S1 and S3 and the low-side switch elements S2 and S4 are equalized, so that the switching times are approximately the same. This makes it possible to equalize switching losses and simplify control design, such as by adjusting dead time.

[0061] In the power conversion circuit device of FIG. 7, it is preferable to set the impedances of the impedance elements A1 to A4 and B1 to B4 to be substantially the same as each other.

[0062] (Embodiment 2) Fig. 10 is a circuit diagram showing an example of the configuration of a power conversion circuit device according to embodiment 2. The power conversion circuit device of Fig. 10 differs from the power conversion circuit device of Fig. 2 in the following respects: (1) It further includes impedance elements D1 and D2. The differences will be described below.

[0063] In FIG. 10, impedance element D1 is connected between node N11 and output terminal T12, and impedance element D2 is connected between node N12 and output terminal T11.

[0064] 10 configured as above, it is possible to obtain an even greater noise reduction effect than in embodiment 1. The principle behind this will be explained below.

[0065] Fig. 11 is an equivalent circuit diagram of the power conversion circuit device of Fig. 10 in the radiation noise band. As in the first embodiment, in the radiation noise band, the impedance of capacitors C1 to C4 is sufficiently small compared to other elements, so it is assumed that they can be approximated as short-circuited. However, in order to focus on noise propagation from the first-phase switch element pair S1, S2, the voltage of the switch element pair S1, S2 is represented by voltage source VS12, and the second-phase switch element pair S3, S4 is regarded as short-circuited.

[0066] 11, the addition of impedance elements A1 and B1 from the voltage source VS12 to the first-phase output terminal T11 forms a bridge circuit. Therefore, the impedance balancing method can reduce noise propagation from the voltage source VS12 to the output terminal T11. This suppresses the common-mode current propagating in the wiring extending from the output terminal T11, reducing radiated noise and the number of countermeasure components, thereby enabling cost reduction, size reduction, and weight reduction.

[0067] Furthermore, by adding impedance elements A1 and D1 to the connection from voltage source VS12 to second-phase output terminal T12, a bridge circuit configuration is formed. Therefore, the impedance balancing method can also reduce noise propagation from voltage source VS12 to output terminal T12. Similarly, noise propagation from the second-phase switch element pair S3 and S4 to output terminals T11 and T12 can also be reduced. This further suppresses the common-mode current propagating in the wiring extending from output terminals T11 and T12, further reducing radiated noise and reducing the number of countermeasure components, thereby enabling cost reduction and size and weight reduction.

[0068] As a means of realizing the impedance elements A1, A2, B1, B2, D1, and D2, consider a series circuit of an inductor and a capacitor. For example, the impedance element A1 can be represented in a circuit diagram as shown in Figure 4. The same is true for the impedance elements A2, B1, B2, D1, and D2. Here, (1) the impedance element D1 can be represented, for example, by a series circuit of a capacitor CD1 and an inductor LD1. (2) The impedance element D2 can be represented, for example, by a series circuit of a capacitor CD2 and an inductor LD2.

[0069] The presence of capacitor CA1 in impedance element A1 provides DC insulation between the terminals of the impedance element, enabling the generation of a PWM voltage similar to that of the inverter circuit of Comparative Example 1. Furthermore, in the radiation noise band, the impedance of capacitor CA1 is smaller than that of other elements, so it can be approximated as a short circuit. Therefore, the impedance of inductor LA1 becomes dominant in the radiation noise band. In this case, the equivalent circuit of FIG. 11 can be specifically expressed as shown in FIG. 12.

[0070] Fig. 12 is an equivalent circuit diagram of the power conversion circuit device of Fig. 10 in the radiation noise band. As is clear from Fig. 12, since the bridge circuit consists only of inductors, a large noise reduction effect can be obtained over a wide band by using the impedance balance method. This also simplifies the design.

[0071] In order to make the impedance of the inductor LA1 dominant in the radiation noise band as described above, it is necessary to design the series resonance frequency of the capacitor CA1 and inductor LA1 to be below the radiation noise band.

[0072] Here, as shown in Figures 4B to 4D, impedance elements A1, A2, B1, B2, D1, and D2 may be further configured with a resistive element in series or parallel with the inductor. This stabilizes the impedance at the self-resonant frequency of the impedance element and prevents noise peaks. This results in a broadband noise reduction effect. Furthermore, ferrite beads BD1 may be used as the inductor-containing impedance elements A1, A2, B1, B2, D1, and D2. The equivalent circuit of ferrite bead BD1 is typically represented by a circuit (Figure 4E) in which a parallel circuit of inductor LA1 and resistor R1 is connected in series with another resistor R2. Thus, when using ferrite bead BD1, a resistive component is incorporated, allowing for stable noise reduction without the need for a resistive element.

[0073] Next, the conditions for maximizing the noise reduction effect will be shown.

[0074] In the equivalent circuit of FIG. 12, first consider the bridge for output terminal T11. The upper left component of the bridge circuit for input terminal T11 is represented by LA2 / / (L01 / / L02 + L11 / / L12). The inductance of this composite inductor is represented by L1. The lower left component of the bridge circuit is LA1. The upper right component of the bridge circuit is represented by LB1 / / LD2. The lower right component of the bridge circuit is L21. Focusing on the circuit on the left side of the bridge circuit, the voltage source VS12 is divided by the upper and lower left inductors of the bridge circuit. In other words, a voltage of L1 / (L1+LA1)×VS12 is applied to the upper left inductor of the bridge circuit. Since input terminals T01 and T02 are at ground potential in the radiation noise band, the potential of nodes N01, N02, and N12 is L1 / (L1+LA1)×VS12.

[0075] Next, looking at the circuit on the right side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top right and bottom right of the bridge circuit. That is, a voltage of L3a / (L3a + L21) x VS12 is applied to the top right inductor of the bridge circuit. When L1 / (L1 + LA1) x VS12 = L3a / (L3a + L21) x VS12, the potential of the output terminal T11 is 0 V. This means that no common-mode voltage is generated because the ground potential is 0 V. Therefore, when this condition is met, a significant noise reduction effect can be expected.

[0076] Next, the bridge circuit for the output terminal T12 in the equivalent circuit of FIG. 12 will be considered.

[0077] The components at the top left and bottom left of the bridge circuit for input terminal T12 are the same as those at the bridge circuit for input terminal T11. The component L22 / / LB2 at the top right of the bridge circuit is L3b. The component at the bottom right of the bridge circuit is LD1. Looking at the circuit on the left side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top left and bottom left of the bridge circuit. That is, a voltage of L1 / (L1+LA1)×VS12 is applied to the inductor at the top left of the bridge circuit. Because T01 and T02 are at ground potential in the radiation noise band, the potential of nodes N01 and N02 is L1 / (L1+LA1)×VS12.

[0078] Next, looking at the circuit on the right side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top right and bottom right of the bridge circuit. That is, a voltage of L3b / (L3b + LD1) x VS12 is applied to the top right inductor. When L1 / (L1 + LA1) x VS12 = L3b / (L3b + LD1) x VS12, the potential of the output terminal T12 is 0 V. This means that no common-mode voltage is generated because the ground potential is 0 V. Therefore, when this condition is met, a significant noise reduction effect can be expected.

[0079] Here, when the inductances L21 and L22 of the output wiring are equal to the inductances of the impedance elements D1 and D2 or the inductances LD1 and LD2 of the beads, the above two conditions are met. That is, no common-mode voltage is generated at the output terminals T11 and T12 due to the voltage source VS12. Similarly, no common-mode voltage is generated at the output terminals T11 and T12 due to the voltage source VS34. While the first embodiment suppresses noise propagation from the switch elements S1 to S4 to the output terminal T11 or T12 of the own phase, the second embodiment can simultaneously suppress noise propagation from the switch elements S1 to S4 not only to the output terminal T11 or T12 of the own phase but also to the output terminal T12 or T11 of the other phase.

[0080] The above design condition equation can be expressed in the form of an inductance ratio: L1:LA1 = L3a:L21, or L1:LA1 = L3b:LD1. This is the impedance balance method. L01 / / L02 + L11 / / L12 can be rephrased as the effective inductance between the input terminal T01 and the node N01 when the input terminal T01 and the input terminal T02 are short-circuited and the node N01 and the node N02 are short-circuited.

[0081] Therefore, the above-mentioned optimum conditions can be explained as follows: Let L2 be the inductance of the impedance elements A1 and A2 or the inductance of the beads, L1 be the parallel inductance of the inductor L2 and the effective inductance between the input terminal T01 and the node N01 when the input terminal T01 and the input terminal T02 are short-circuited and the nodes N01 and N02 are short-circuited, L3 be the parallel inductance of the inductance of the inductor of the impedance element B1 or B2 and the inductance of the inductor of the impedance element D1 or D2, and L4 be the inductance of the inductors L21 and L22, then L1:L2=L3:L4.

[0082] Although inferior to the above optimal conditions, noise reduction effects can also be expected under the following conditions. Consider the range in which the voltage applied to the upper right component of the bridge circuit in Figure 12 is 0.5 to 1.5 times the voltage applied to the upper left component of the bridge circuit. When it is 0.5 times, L1 / (L1 + LA1) x VS12 = 0.5 x L3a / (L3a + L21) x VS12. When it is 1.5 times, L1 / (L1 + LA1) x VS12 = 1.5 x L3a / (L3a + L21) x VS12. Therefore, in the formula L1 / (L1+LA1)×VS12=a×L3a / (L3a+L21)×VS12, that is, in the formula L1 / (L1+LA1)=a×L3a / (L3a+L21), when the coefficient a is 0.5≦a≦1.5 (when the formula is established with the element values ​​set in this manner), a noise reduction effect can be expected.

[0083] Furthermore, the effect of the second embodiment will be shown by circuit simulation. The circuit parameters are as follows. However, the values ​​in parentheses are the parasitic components taken into account in series. C1 = 1 mF (10 nH, 10 mΩ), C2 = 100 nF (1 nH, 10 mΩ), C3 = C4 = 4.7 nF (10 nH, 0.2 Ω), L01 = L02 = L11 = L12 = 0.5 μH, L21 = L22 = 0.5 μH.

[0084] Furthermore, impedance elements A1, A2, B1, B2, D1, and D2 were all series circuits of 0.5 μH, 200 pF, and 30 Ω. A DC voltage of 282 V was input between input terminals T01 and T02, and the switching frequency (carrier frequency) of switch elements S1 to S4 was 12 kHz. The common mode current was compared when a 5-m-long motor cable (T-type equivalent circuit) and a motor (winding inductance 1 μH, parasitic capacitance between the winding and the housing 0.5 nF) were connected to output terminals T11 and T12 of the inverter circuit.

[0085] FIG. 13 is a spectral diagram comparing the common-mode current suppression effect of the power conversion circuit devices of FIG. 1 and FIG. 10. As is clear from FIG. 13, it can be confirmed that a stable suppression effect of approximately 20 dB can be obtained in the radiation noise band. In particular, there is a suppression effect DP21 (= P01 - P21) at approximately 50 MHz, and a suppression effect DP22 (= P02 - P22) at approximately 70 MHz. Here, P01 and P02 are the peaks of the common-mode current in Comparative Example 1, and P21 and P22 are the peaks of the common-mode current in Embodiment 2.

[0086] The above-described embodiments and modifications may be used in combination as appropriate. For example, the impedance elements A3, A4, B3, and B4 shown in the modification of the first embodiment may be added to the second embodiment. In this case, the same noise suppression effect can be obtained.

[0087] As described above, in the power conversion circuit device of FIG. 10, it is preferable that the inductances of the inductors L21 and L22 and the inductances included in the impedance elements D1 and D2 are set to be substantially equal to each other.

[0088] 14 is a circuit diagram showing a configuration example of a power conversion circuit device according to embodiment 3. In Fig. 14, the power conversion circuit device is configured to include a noise filter circuit 3, an inverter circuit 2, and a noise filter circuit 5.

[0089] 14, input terminals T01 and T02 of an inverter circuit 2 are connected to a DC power supply 4 via a noise filter circuit 3. Output terminals T11 and T12 of the inverter circuit 2 are connected to an AC power supply 6 (or an AC load) via a noise filter circuit 5.

[0090] The power conversion circuit device according to the third embodiment configured as described above is a single-phase DC-AC conversion circuit that performs unidirectional or bidirectional power conversion between DC power and AC power. Therefore, by applying any of the above-described embodiments to the inverter circuit 2, it is possible to suppress the AC-side common-mode current of the single-phase DC-AC conversion circuit. This reduces the radiation noise of the single-phase DC-AC conversion circuit and the number of countermeasure components, thereby enabling cost reduction, size reduction, and weight reduction.

[0091] 15 is a circuit diagram showing a configuration example of a power conversion circuit according to embodiment 4. The power conversion circuit of FIG. 15 includes an inverter circuit 2, an isolation transformer 7, and a rectifier circuit 8.

[0092] 15, output terminals T11 and T12 of an inverter circuit 2 are connected to a rectifier circuit 8 via an isolation transformer 7. Here, the rectifier circuit 8 has output terminals T21 and T22.

[0093] The power conversion circuit according to the fourth embodiment configured as described above is a DC-DC conversion circuit that converts a DC voltage in one direction or two directions. Therefore, by applying any of the above-described embodiments to the inverter circuit 2, the common-mode current of the DC-DC conversion circuit can be suppressed. This reduces the radiation noise of the DC-DC conversion circuit and the number of countermeasure components, thereby enabling cost reduction, size reduction, and weight reduction.

[0094] (Comparative Example 2) Fig. 16 is a circuit diagram showing the configuration of a power conversion circuit device related to a three-phase inverter circuit of Comparative Example 2. The power conversion circuit device of Fig. 16 differs from the power conversion circuit device of Fig. 1 in the following respects: (1) A control circuit 1A for a three-phase inverter circuit is provided instead of the control circuit 1 for a two-phase inverter circuit. (2) Switch elements S5 and S6, an inductor L23, and an output terminal T13 are further provided. The differences will be described below.

[0095] 16, node N01 is connected to node N02 via the drain and source of switch element S5 and the drain and source of switch element S6. Node N13, which is the connection point between the source of switch element S5 and the drain of switch element S6, is connected to output terminal T13 via inductor L23.

[0096] Here, a DC voltage of DC power is input between input terminals T01 and T02. Capacitors C1 and C2 are X capacitors, for example, C1 is a smoothing capacitor and C2 is a snubber capacitor. Capacitors C3 and C4 are Y capacitors for noise suppression. Inductors L01, L02, L11, L12, and L21 to L23 are wiring inductances or choke coils.

[0097] The switch elements S1 to S6 are, for example, N-channel MOS transistors, and form a full-bridge circuit. The control circuit 1A generates known command signals SS1 to SS6 for performing PWM switching (three phases) and outputs them to the gates of the switch elements S1 to S6, respectively, which switches the switch elements S1 to S6 on or off and generates desired PWM voltages at the output terminals T11, T12, and T13.

[0098] In this case, common-mode currents flowing in phase through inductors L21 to L23 are generated, and if they propagate from output terminals T11 to T13 to, for example, the motor cable, radiated noise increases. In order to suppress the common-mode currents, measures such as inserting a ferrite core into the motor cable are required, which not only incurs additional costs but also increases the size and weight of the equipment.

[0099] In view of the findings of these problems, the present inventors have devised the power conversion circuit devices according to the following embodiments and modifications in order to solve the problems.

[0100] Fifth Embodiment Fig. 17 is a circuit diagram showing a configuration example of a power conversion circuit device according to a fifth embodiment. The power conversion circuit device of Fig. 17 differs from the power conversion circuit device of Fig. 16 in the following respects: (1) It further includes impedance elements A1 to A3 and B1 to B3. The differences will be described below.

[0101] 17, node N11 is connected to input terminal T02 via impedance element A1, node N12 is connected to input terminal T02 via impedance element A2, and node N13 is connected to input terminal T02 via impedance element A3. In addition, output terminal T11 is connected to node N02 via impedance element B1, output terminal T12 is connected to node N02 via impedance element B2, and output terminal T13 is connected to node N02 via impedance element B3.

[0102] According to the fifth embodiment configured as described above, in the frequency band of 30 MHz to 300 MHz (radiation noise band) where radiation noise becomes a problem, the impedance of the capacitors C1 to C4 becomes small and can be approximated as a short circuit.

[0103] Fig. 18 is an equivalent circuit diagram in the radiated noise band of the power conversion circuit device of Fig. 17. Here, in order to focus on noise propagation from the first-phase switch element pair S1, S2, the voltage of the switch element pair S1, S2 is represented by a voltage source VS12, and the second-phase switch element pair S3, S4 and the third-phase switch element pair S5, S6 are considered to be short-circuited. This is because, according to the principle of superposition, everything other than the voltage source of interest can be considered to be short-circuited.

[0104] 18, the addition of impedance elements A1 and B1 from the voltage source VS12 to the first-phase output terminal T11 forms a bridge circuit. Therefore, although the detailed principle will be described later, the impedance balancing method can reduce noise propagation from the voltage source VS12 to the output terminal T11. This suppresses the common-mode current propagating through the wiring extending from the output terminal T11, reducing radiated noise and the number of countermeasure components, thereby enabling cost reduction and size / weight reduction.

[0105] To realize impedance elements A1-A3 and B1-B3, consider a series circuit of an inductor and a capacitor. For example, impedance element A1 can be represented as shown in FIG. 4A, and impedance elements A2, A3, and B1-B3 can be represented similarly. The presence of capacitor CA1 provides DC isolation between the terminals of the impedance elements, enabling the generation of a PWM voltage similar to that of the inverter circuit of Comparative Example 2. Furthermore, in the radiated noise band, the impedance of capacitor CA1 is sufficiently small compared to the other elements, so it can be approximated as a short circuit. Therefore, the impedance of inductor LA1 becomes dominant in the radiated noise band. In this case, the equivalent circuit of FIG. 18 can be specifically represented as shown in FIG. 19.

[0106] Fig. 19 is an equivalent circuit diagram in the radiation noise band of the power conversion circuit device of Fig. 17. As is clear from Fig. 19, since the bridge circuit consists only of inductors, a large noise reduction effect can be obtained over a wide band by the impedance balance method. In addition, the design is also simplified.

[0107] In order to make the impedance of the inductor LA1 dominant in the radiation noise band as described above, it is necessary to design the series resonance frequency of the capacitor CA1 and inductor LA1 to be below the radiation noise band.

[0108] Here, as shown in Figures 4B and 4C, impedance elements A1-A3 and B1-B3 may each include a resistive element connected in series or parallel to the inductor. This stabilizes the impedance at the self-resonant frequency of the impedance element, preventing noise peaks. This results in a broadband noise reduction effect. Furthermore, a ferrite bead BD1 may be used as the inductor-containing impedance elements A1-A3 and B1-B3. The equivalent circuit of the ferrite bead BD1 is typically represented by a circuit (Figure 4E) in which a parallel circuit of an inductor LA1 and a resistor R1 is connected in series with another resistor R2. Thus, when using the ferrite bead BD1, a resistive component is incorporated, allowing for stable noise reduction without the need for a resistive element.

[0109] Next, we will show the conditions for maximizing the noise reduction effect. In the equivalent circuit of FIG. 19, the components at the upper left of the bridge circuit relative to the output terminal T11 are represented by LA2 / / LA3 / / (L01 / / L02 + L11 / / L12). This combined inductance is designated L1. The components at the lower left, upper right, and lower right of the bridge circuit are inductors LA1, LB1, and L21, respectively. Focusing on the circuit on the left side of the bridge circuit, the voltage source VS12 is divided by the inductors at the upper and lower left of the bridge circuit. In other words, a voltage of L1 / (L1+LA1)×VS12 is applied to the inductor at the upper left of the bridge circuit. Because the input terminals T01 and T02 are at ground potential in the radiated noise band, the potential at nodes N01 and N02 is L1 / (L1+LA1)×VS12.

[0110] Next, looking at the circuit on the right side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top right and bottom right of the bridge circuit. That is, a voltage of LB1 / (LB1+L21)×VS12 is applied to the top right inductor of the bridge circuit. Here, when L1 / (L1+LA1)×VS12=LB1 / (LB1+L21)×VS12, the potential of the output terminal T11 is 0 V. Because the ground potential is 0 V, this means that no common-mode voltage is generated. Therefore, when this condition is met, a significant noise reduction effect can be expected.

[0111] The above design condition equation can be expressed in the form of an inductance ratio: L1:LA1 = LB1:L21. This is the impedance balance method. L01 / / L02 + L11 / / L12 can be rephrased as the effective inductance between input terminal T01 and node N01 when input terminal T01 and input terminal T02 are short-circuited and node N01 and node N02 are short-circuited. Therefore, the above optimal condition can be explained as follows: Let L2 be the inductance of the impedance elements A1 to A3 or the inductance of the beads, L1 be the effective inductance between the input terminal T01 and the node N01 when the input terminal T01 and the input terminal T02 are shorted and the node N01 and the node N02 are shorted, and the parallel inductance of L2 / 2, L3 be the inductance of the impedance elements B1 to B3 or the inductance of the beads, and L4 be the inductance of the inductors L21 to L23, then L1:L2=L3:L4.

[0112] Although inferior to the above optimal conditions, noise reduction effects can also be expected under the following conditions. Consider the range in which the voltage applied to the upper right component of the bridge circuit in Figure 19 is 0.5 to 1.5 times the voltage applied to the upper left component of the bridge circuit. When it is 0.5 times, L1 / (L1 + LA1) x VS12 = 0.5 x LB1 / (LB1 + L21) x VS12. When it is 1.5 times, L1 / (L1 + LA1) x VS12 = 1.5 x LB1 / (LB1 + L21) x VS12. Therefore, in the formula L1 / (L1+LA1)×VS12=a×LB1 / (LB1+L21)×VS12, that is, in the formula L1 / (L1+LA1)=a×LB1 / (LB1+L21), when the coefficient a is 0.5≦a≦1.5 (when the formula is established with the element values ​​set in this manner), a noise reduction effect can be expected.

[0113] The effect of the fifth embodiment is demonstrated by circuit simulation. The circuit parameters are as follows. However, the values ​​in parentheses are the parasitic components taken into account in series. C1 = 1 mF (10 nH, 10 mΩ), C2 = 100 nF (1 nH, 10 mΩ), C3 = C4 = 4.7 nF (10 nH, 0.2 Ω), L01 = L02 = L11 = L12 = 0.5 μH, L21 = L22 = 0.5 μH.

[0114] Furthermore, impedance elements A1 and A2 were a series circuit of 0.5 μH, 200 pF, and 30 Ω, while impedance elements B1 and B2 were a series circuit of 0.167 μH, 200 pF, and 30 Ω. A DC voltage of 282 V was input between input terminals T01 and T02, and the switching frequency (carrier frequency) of switch elements S1 to S6 was 12 kHz. The common mode current was compared when a 5-m-long motor cable (T-type equivalent circuit) and a motor (winding inductance 1 μH, parasitic capacitance between the winding and the housing 0.5 nF) were connected to output terminals T11 to T13 of the inverter circuit.

[0115] FIG. 20 is a spectral diagram comparing the common-mode current suppression effects of the power conversion circuit devices of FIG. 16 and FIG. 17. As is clear from FIG. 20, it can be seen that a suppression effect of 10 dB to 20 dB can be achieved at noise peaks that are likely to cause problems in the radiated noise band. In particular, there is a suppression effect DP51 (= P03 - P51) at approximately 50 MHz, and a suppression effect DP52 (= P03 - P52) at approximately 70 MHz. Here, P03 and P04 are the common-mode current peaks for Comparative Example 2, and P51 and P52 are the common-mode current peaks for Embodiment 5.

[0116] Sixth Embodiment Fig. 21 is a circuit diagram showing a configuration example of a power conversion circuit device according to a sixth embodiment. The power conversion circuit device of Fig. 21 differs from the power conversion circuit device of Fig. 17 in the following respects: (1) It further includes impedance elements D1 to D6. The differences will be described below.

[0117] 21, node N11 is connected to output terminal T13 via impedance element D1, node N11 is connected to output terminal T12 via impedance element D2, and node N12 is connected to output terminal T13 via impedance element D3. In addition, node N12 is connected to output terminal T11 via impedance element D4, node N13 is connected to output terminal T11 via impedance element D5, and node N13 is connected to output terminal T12 via impedance element D6.

[0118] According to the sixth embodiment configured as above, it is possible to obtain an even greater noise reduction effect than in the fifth embodiment. The principle behind this will be explained below.

[0119] In the radiation noise band, the impedance of capacitors C1 to C4 is sufficiently small compared to the other elements, so they can be approximated as short-circuited. Consider the equivalent circuit in Figure 21 in the radiation noise band. To focus on noise propagation from the first-phase switch element pair S1 and S2, the voltage of switch element pair S1 and S2 is represented by voltage source VS12, and the second-phase switch element pair S3 and S4 and the third-phase switch element pair S5 and S6 are considered to be short-circuited. In this case, the overall equivalent circuit becomes complex, so the equivalent circuit (bridge circuit) for output terminal T11 is shown in Figure 22, and the equivalent circuit for output terminal T12 is shown in Figure 23.

[0120] 22 and 23 are equivalent circuit diagrams of the power conversion circuit device of Fig. 21 for the output terminals T11 and T12, respectively, in the radiation noise band. The equivalent circuit for the output terminal T13 is the same as the equivalent circuit for the output terminal T12. That is, they are classified into an equivalent circuit for the output terminal of the own phase and an equivalent circuit for the output terminal of the other phase.

[0121] 22, the addition of impedance elements A1 and B1 from the voltage source VS12 to the first-phase output terminal T11 forms a bridge circuit. Therefore, the impedance balancing method can reduce noise propagation from the voltage source VS12 to the output terminal T11. This suppresses the common-mode current propagating in the wiring extending from the output terminal T11, reducing radiation noise and the number of countermeasure components, thereby enabling cost reduction and size and weight reduction.

[0122] 23, the addition of impedance elements B2 and D2 from voltage source VS12 to second-phase output terminal T12 also forms a bridge circuit. Therefore, the impedance balancing method can also reduce noise propagation from voltage source VS12 to output terminal T12. This further suppresses common-mode current propagating beyond the output terminal, further reducing radiated noise and the number of countermeasure components, thereby enabling cost reduction and size / weight reduction.

[0123] As a means for realizing impedance elements A1 to A3, B1 to B3, and D1 to D6, consider a series circuit of an inductor and a capacitor. For example, impedance element A1 can be represented in a circuit diagram as shown in Figure 4A, and impedance elements A2, A3, B1 to B3, and D1 to D6 can be represented similarly. Here, (1) impedance element D3 can be represented, for example, as a series circuit of capacitor CD3 and inductor LD3. (2) impedance element D4 can be represented, for example, as a series circuit of capacitor CD4 and inductor LD4.

[0124] The presence of capacitor CA1 in impedance element A1 provides DC insulation between the terminals of the impedance element, enabling the generation of a PWM voltage similar to that of the inverter circuit of Comparative Example 2. Furthermore, the impedance of capacitor CA1 is small in the radiated noise band, so it can be approximated as a short circuit. Therefore, the impedance of inductor LA1 becomes dominant in the radiated noise band. In this case, the equivalent circuits of Figures 22 and 23 can be specifically represented as in Figures 24 and 25, respectively.

[0125] 24 and 25 are equivalent circuit diagrams of the power conversion circuit device in the radiation noise band for the output terminals T11 and T12, respectively. As is clear from Fig. 24 and Fig. 25, since the bridge circuit consists only of inductors, a large noise reduction effect can be obtained over a wide band by using the impedance balance method. This also simplifies the design.

[0126] In order to make the impedance of the inductor LA1 dominant in the radiation noise band as described above, it is necessary to design the series resonance frequency of the capacitor CA1 and inductor LA1 to be below the radiation noise band.

[0127] Here, as shown in Figures 4B and 4C, impedance elements A1-A3, B1-B3, and D1-D6 may each include a resistive element connected in series or parallel to the inductor. This stabilizes the impedance at the self-resonant frequency of the impedance element and prevents noise peaks. This results in a broadband noise reduction effect. Furthermore, ferrite bead BD1 (Figure 4D) may be used as the inductor-containing impedance elements A1-A3, B1-B3, and D1-D6. The equivalent circuit of ferrite bead BD1 is typically represented by a circuit (Figure 4E) in which a parallel circuit of inductor LA1 and resistor R1 is connected in series with another resistor R2. Thus, when using ferrite bead BD1, a resistive component is incorporated, allowing for stable noise reduction without the need for a resistive element.

[0128] Next, the conditions for maximizing the noise reduction effect will be shown.

[0129] First, consider the equivalent circuit of FIG. 24, i.e., the bridge for output terminal T11. The upper left component of the bridge circuit for T11 is represented by LA2 / / LA3 / / (L01 / / L02 + L11 / / L12). This combined inductance is represented by L1. The lower left component of the bridge circuit is LA1. The upper right component of the bridge circuit is represented by LB1 / / LD4 / / LD5. The lower right component of the bridge circuit is L21. Focusing on the circuit on the left side of the bridge circuit, the voltage source VS12 is divided by the upper and lower left inductors of the bridge circuit. In other words, a voltage of L1 / (L1+LA1)×VS12 is applied to the upper left inductor of the bridge circuit. Because input terminals T01 and T02 are at ground potential in the radiation noise band, the potential of nodes N01 and N02 is L1 / (L1+LA1)×VS12.

[0130] Next, looking at the circuit on the right side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top right and bottom right of the bridge circuit. That is, a voltage of L3a / (L3a + L21) x VS12 is applied to the top right inductor of the bridge circuit. When L1 / (L1 + LA1) x VS12 = L3a / (L3a + L21) x VS12, the potential of the output terminal T11 is 0 V. This means that no common-mode voltage is generated because the ground potential is 0 V. Therefore, when this condition is met, a significant noise reduction effect can be expected.

[0131] Next, consider the equivalent circuit of FIG. 25, i.e., the bridge for output terminal T12. The components at the top left and bottom left of the bridge circuit for T12 are the same as those for T11. The component L22 / / LB2 / / LD6 at the top right of the bridge circuit is designated L3b. The component at the bottom right of the bridge circuit is LD2. Focusing on the circuit on the left side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top left and bottom left of the bridge circuit. That is, a voltage of L1 / (L1+LA1)×VS12 is applied to the inductor at the top left of the bridge circuit. Because T01 and T02 are at ground potential in the radiated noise band, the potential of N01 and N02 is L1 / (L1+LA1)×VS12.

[0132] Next, looking at the circuit on the right side of the bridge circuit, the voltage source VS12 is divided by the inductors at the top right and bottom right of the bridge circuit. That is, a voltage of L3b / (L3b + LD2) x VS12 is applied to the top right inductor of the bridge circuit. When L1 / (L1 + LA1) x VS12 = L3b / (L3b + LD2) x VS12, the potential of the output terminal T12 is 0 V. This means that no common-mode voltage is generated because the ground potential is 0 V. Therefore, when this condition is met, a significant noise reduction effect can be expected.

[0133] Here, when the inductances L21 to L23 of the output wiring are equal to the inductances of the impedance elements D1 to D6 or the inductances LD1 to LD6 of the beads, the above two conditions are met. That is, no common-mode voltage is generated at output terminals T11 and T12 (or T13) due to voltage source VS12. Similarly, no common-mode voltage is generated at output terminals T11, T12, or T13 due to voltage source VS34. The same is true for voltage source VS56. While embodiment 5 suppresses noise propagation from the switch element to the output terminal of its own phase, embodiment 6 can simultaneously suppress noise propagation from the switch element to output terminals of not only its own phase but also other phases.

[0134] The above design condition equation can be expressed in the form of an inductance ratio: L1:LA1 = L3a:L21, or L1:LA1 = L3b:LD2. This is the impedance balance method. L01 / / L02 + L11 / / L12 can be rephrased as the effective inductance between the input terminal T01 and the node N01 when the input terminal T01 and the input terminal T02 are short-circuited and the node N01 and the node N02 are short-circuited.

[0135] Therefore, the above optimum conditions can be explained as follows: Let L2 be the inductance of impedance elements A1 to A3 or the inductance of the beads, L1 be the parallel inductance of L2 / 2 and the effective inductance between input terminal T01 and node N01 when input terminal T01 and input terminal T02 are shorted and node N01 and node N02 are shorted, L3 be the parallel inductance of half the inductance of the inductors of impedance elements B1 to B3 and the inductance of the inductors of impedance elements D1 to D6, and L4 be the inductance of inductors L21 to L23, then L1:L2=L3:L4.

[0136] Here, let us consider the range in which the voltage applied to the upper right component of the bridge circuit is 0.5 to 1.5 times the voltage applied to the upper left component of the bridge circuit. When it is 0.5 times, L1 / (L1+LA1)×VS12=0.5×L3a / (L3a+L21)×VS12. When it is 1.5 times, L1 / (L1+LA1)×VS12=1.5×L3a / (L3a+L21)×VS12. Therefore, in the formula L1 / (L1+LA1)×VS12=a×L3a / (L3a+L21)×VS12, that is, in the formula L1 / (L1+LA1)=a×L3a / (L3a+L21), when the coefficient a is 0.5≦a≦1.5 (when the formula is established with the element values ​​set in this manner), a noise reduction effect can be expected.

[0137] The effects of the sixth embodiment will be shown using circuit simulation. The circuit parameters are as follows. However, the values ​​in parentheses are the parasitic components taken into account in series. C1 = 1 mF (10 nH, 10 mΩ), C2 = 100 nF (1 nH, 10 mΩ), C3 = C4 = 4.7 nF (10 nH, 0.2 Ω), L01 = L02 = L11 = L12 = 0.5 μH, L21 = L22 = 0.5 μH.

[0138] Furthermore, impedance elements A1 to A3, B1 to B3, and D1 to D6 were all series circuits of 0.5 μH, 200 pF, and 30 Ω. A DC voltage of 282 V was input between input terminals T01 and T02, and the switching frequency (carrier frequency) of switch elements S1 to S6 was 12 kHz. The common mode current was compared when a 5-m-long motor cable (T-type equivalent circuit) and a motor load (winding inductance 1 μH, parasitic capacitance between the winding and housing 0.5 nF) were connected to output terminals T11 to T13 of the inverter circuit.

[0139] FIG. 26 is a spectral diagram comparing the common-mode current suppression effect of the power conversion circuit devices of FIG. 16 and FIG. 21. As is clear from FIG. 26, it can be confirmed that a stable suppression effect of approximately 20 dB can be obtained in the radiation noise band. In particular, there is a suppression effect DP61 (= P03 - P61) at approximately 50 MHz, and a suppression effect DP62 (= P03 - P62) at approximately 70 MHz. Here, P03 and P04 are the peaks of the common-mode current in Comparative Example 2, and P61 and P62 are the peaks of the common-mode current in Embodiment 6.

[0140] 27 is a circuit diagram showing a configuration example of a power conversion circuit device according to embodiment 7. In FIG. 27, the power conversion circuit device is configured to include a noise filter circuit 3 and an inverter circuit 2.

[0141] 27, input terminals T01 and T02 of an inverter circuit 2 are connected to a DC power supply 4 via a noise filter circuit 3. Output terminals T11 to T13 of the inverter circuit 2 are connected to a three-phase motor 9, which is an example of a load.

[0142] The power conversion circuit device according to the seventh embodiment is a three-phase motor inverter device that drives a three-phase motor using DC power. Therefore, by applying any of the above-described embodiments to the inverter circuit 2, the motor-side common-mode current of the three-phase motor inverter device can be suppressed. This reduces the radiation noise of the three-phase motor inverter device and the number of countermeasure components, thereby enabling cost reduction, size reduction, and weight reduction.

[0143] In the seventh embodiment, the DC power supply 4 may be configured with an AC power supply and a rectifier circuit. In this case, the connection order of the rectifier circuit and the noise filter circuit 3 may be reversed. That is, the DC power supply 4 may be connected to the input terminal of the noise filter circuit 3, the output terminal of the noise filter circuit 3 may be connected to the input terminal of the rectifier circuit, and the output circuit of the rectifier circuit may be connected to T01 and T02. In this case, the three-phase motor inverter device drives a three-phase motor using AC power. Therefore, by applying any of the above-described embodiments to the inverter circuit 2, the motor-side common-mode current of the three-phase motor inverter device using AC power can be suppressed. This reduces the radiated noise of the three-phase motor inverter device using AC power and reduces the number of countermeasure components, thereby enabling cost reduction, size reduction, and weight reduction.

[0144] (Other Modifications) In the above-described embodiment and modifications, the ferrite bead BD1 is used, but the present disclosure is not limited to this, and other types of beads such as chip beads may also be used.

[0145] INDUSTRIAL APPLICABILITY The power conversion circuit device according to the present disclosure is useful for realizing a low-noise, small-sized, low-cost power conversion circuit device for use in in-vehicle equipment, industrial equipment, etc.

[0146] 1, 1A Control circuit 2 Inverter circuit 3, 5 Noise filter circuit 4 DC power supply 6 AC power supply 7 Isolation transformer 8 Rectifier circuit 9 Motor A1 to A4, B1 to B4, D1 to D6 Impedance element BD1 Ferrite beads C1 to C4, CA1 Capacitors L01 to L23, LA1 to LA4, LB1 to LB4, LD1 to LD6 Inductors N01 to N13 Nodes R1 to R2 Resistors S1 to S6 Switch elements T01 to T02 Input terminals T11 to T13, T21 to T22 Output terminals VS12 Voltage source

Claims

1. A power conversion circuit device including an inverter circuit including a bridge circuit between first and second input terminals and first and second output terminals, the bridge circuit is configured by connecting in parallel a first series circuit including first and second switch elements connected in series to each other, and a second series circuit including third and fourth switch elements connected in series to each other, Both ends of the first series circuit and both ends of the second series circuit are defined as first and second connection points, respectively, and are connected to first and second input terminals via first and second inductances; a third connection point between the first and second switch elements is connected to the first output terminal via a third inductance; a fourth connection point of the third and fourth switch elements is connected to the second output terminal via a fourth inductance; The power conversion circuit device includes: a first impedance element connected between the third connection point and the first or second input terminal; a second impedance element connected between the fourth connection point and the first or second input terminal; a third impedance element connected between the first output terminal and the first or second input terminal; a fourth impedance element connected between the second output terminal and the first or second input terminal; A power conversion circuit device comprising:

2. The first to fourth impedance elements are (1) a third series circuit of an inductor and a capacitor; (2) the third series circuit further includes a circuit including a resistor connected in series or parallel with the inductor; (3) a fourth series circuit of a bead and a capacitor; and Either of The power conversion circuit device according to claim 1 .

3. The inductance included in the first and second impedance elements is L2, A parallel inductance of an effective inductance between the first input terminal and the first connection point and an inductance L2 when the first and second input terminals are short-circuited and the first and second connection points are short-circuited is defined as L1, The inductance included in the third and fourth impedance elements is L3, When the third and fourth inductances are L4, Inductances L1 to L4 are set so that L1:L2=L3:L4.

3. The power conversion circuit device according to claim 1 or 2.

4. The inductance included in the first impedance element is L2, A parallel inductance of an effective inductance between the first input terminal and the third connection point and an inductance L2 when the first and second input terminals are short-circuited and the third and fourth connection points are short-circuited is defined as L1, The inductance included in the third impedance element is L3, The third and fourth inductances are L4, In the formula L1 / (L1+L2)=a×L3 / (L3+L4), the inductances L1 to L4 are set so that the coefficient a satisfies 0.5≦a≦1.

5.

3. The power conversion circuit device according to claim 1 or 2.

5. a fifth impedance element connected between the first input terminal and the third connection point; a sixth impedance element connected between the first input terminal and the fourth connection point; a seventh impedance element connected between the first connection point and the first output terminal; an eighth impedance element connected between the first connection point and the second output terminal; The power conversion circuit device of claim 1 further comprising:

6. the impedances of the first, second, fifth, and sixth impedance elements are substantially identical to one another, and the impedances of the third, fourth, seventh, and eighth impedance elements are substantially identical to one another; The power conversion circuit device according to claim 5 .

7. The inductance included in the first and second impedance elements and the fifth and sixth impedance elements is 2×L2, When the first and second input terminals are short-circuited and the first and second connection points are short-circuited, a parallel inductance of an effective inductance between the first input terminal and the first connection point and an inductance L2 is defined as L1; The inductance included in the third and fourth impedance elements and the seventh and eighth impedance elements is 2×L3, When the third and fourth inductances are L4, Set the inductances L1 to L4 so that L1:L2=L3:L4.

7. The power conversion circuit device according to claim 5 or 6.

8. The inductance included in the first and second impedance elements and the fifth and sixth impedance elements is 2×L2, When the first and second input terminals are short-circuited and the first and second connection points are short-circuited, a parallel inductance of an effective inductance between the first input terminal and the first connection point and an inductance L2 is defined as L1; The inductance included in the third and fourth impedance elements and the seventh and eighth impedance elements is 2×L3, When the third and fourth inductances are L4, In the formula L1 / (L1+L2)=a×L3 / (L3+L4), the inductances L1 to L4 are set so that the coefficient a satisfies 0.5≦a≦1.

5.

7. The power conversion circuit device according to claim 5 or 6.

9. a ninth impedance element connected between the third connection point and the second output terminal; a tenth impedance element connected between the fourth connection point and the first output terminal; The power conversion circuit device according to claim 1 .

10. The ninth and tenth impedance elements are respectively (1) a fifth series circuit of an inductor and a capacitor; (2) the fifth series circuit further includes a circuit including a resistor connected in series or parallel to the inductor; (3) a sixth series circuit of a bead and a capacitor; and Either of The power conversion circuit device according to claim 9.

11. the third and fourth inductances and the inductances included in the ninth and tenth impedance elements are substantially equal to each other; The power conversion circuit device according to claim 9 or 10.

12. The inductance included in the first and second impedance elements is L2, A parallel inductance of an effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted is defined as L1, and an inductance L2 is defined as a parallel inductance between the effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted. A parallel inductance of the inductances included in the third and fourth impedance elements and the inductances included in the ninth and tenth impedance elements is denoted by L3, When the third and fourth inductances are L4, Set the inductances L1 to L4 so that L1:L2=L3:L4. The power conversion circuit device according to claim 9 or 10.

13. The inductance included in the first and second impedance elements is L2, A parallel inductance of an effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted is defined as L1, and an inductance L2 is defined as a parallel inductance between the effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted. A parallel inductance of the inductances included in the third and fourth impedance elements and the inductances included in the ninth and tenth impedance elements is denoted by L3, When the third and fourth inductances are L4, In the formula L1 / (L1+L2)=a×L3 / (L3+L4), the inductances L1 to L4 are set so that the coefficient a satisfies 0.5≦a≦1.

5. The power conversion circuit device according to claim 9 or 10.

14. The power conversion circuit device according to any one of claims 1, 5 and 9 further comprises: a first noise filter circuit connected to first and second input terminals of the power conversion circuit device; a second noise filter circuit connected to the first and second output terminals of the power conversion circuit device.

15. The power conversion circuit device according to any one of claims 1, 5 and 9 further comprises: an isolation transformer having an input terminal connected to the first and second output terminals of the power conversion circuit device; a rectifier circuit connected to an output terminal of the isolation transformer; A power conversion circuit device comprising:

16. A power conversion circuit device including an inverter circuit including a bridge circuit between first and second input terminals and first, second and third output terminals, the bridge circuit is configured by connecting in parallel a first series circuit of first and second switch elements connected in series to each other, a second series circuit of third and fourth switch elements connected in series to each other, and a third series circuit of fifth and sixth switch elements connected in series to each other; Both ends of the first series circuit, both ends of the second series circuit, and both ends of the third series circuit are defined as first and second connection points, respectively, and are connected to first and second input terminals via first and second inductances; a third connection point between the first and second switch elements is connected to the first output terminal via a third inductance; a fourth connection point of the third and fourth switch elements is connected to the second output terminal via a fourth inductance; a fifth connection point of the fifth and sixth switch elements is connected to a third output terminal via a fifth inductance; The power conversion circuit device includes: a first impedance element connected between the third connection point and the first or second input terminal; a second impedance element connected between the fourth connection point and the first or second input terminal; a third impedance element connected between the fifth connection point and the first or second input terminal; a fourth impedance element connected between the first output terminal and the first or second input terminal; a fifth impedance element connected between the second output terminal and the first or second input terminal; a sixth impedance element connected between the third output terminal and the first or second input terminal; A power conversion circuit device comprising:

17. The first to sixth impedance elements are each (1) a fourth series circuit of an inductor and a capacitor; (2) the fourth series circuit further includes a circuit including a resistor connected in series or parallel with the inductor; (3) a fifth series circuit of a bead and a capacitor; and Either of 17. The power conversion circuit device according to claim 16.

18. The inductance included in the first to third impedance elements is L2, A parallel inductance of an effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted, and an inductance that is half the inductance L2, is defined as L1; The inductance included in the fourth to sixth impedance elements is L3, When the third to fifth inductances are L4, Set the inductances L1 to L4 so that L1:L2=L3:L4.

18. A power conversion circuit device according to claim 16 or 17.

19. The inductance included in the first to third impedance elements is L2, A parallel inductance of an effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted, and an inductance that is half the inductance L2, is defined as L1; The inductance included in the first to third impedance elements is L2, The inductance included in the fourth to sixth impedance elements is L3, When the third to fifth inductances are L4, In the formula L1 / (L1+L2)=a×L3 / (L3+L4), the inductances L1 to L4 are set so that the coefficient a satisfies 0.5≦a≦1.

5.

18. A power conversion circuit device according to claim 16 or 17.

20. The power conversion circuit device further comprises: a seventh impedance element connected between the third connection point and the third output terminal; an eighth impedance element connected between the third connection point and the second output terminal; a ninth impedance element connected between the fourth connection point and the third output terminal; a tenth impedance element connected between the fourth connection point and the first output terminal; an eleventh impedance element connected between the fifth connection point and the first output terminal; a twelfth impedance element connected between the fifth connection point and the second output terminal; The power conversion circuit arrangement of claim 16 .

21. The seventh to twelfth impedance elements are respectively: (1) a sixth series circuit of an inductor and a capacitor; (2) the sixth series circuit further includes a circuit including a resistor connected in series or parallel with the inductor; (3) a seventh series circuit of a bead and a capacitor; and Either of 21. The power conversion circuit arrangement according to claim 20.

22. the third to fifth inductances and the seventh to twelfth impedance elements have substantially the same inductance; 22. The power conversion circuit device according to claim 20 or 21.

23. The effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted is defined as L1, and the parallel inductance between L2 / 2 and the effective inductance between the first input terminal and the first connection point is defined as L1. The inductance included in the first to third impedance elements is L2, A parallel inductance of the inductance included in the fourth to sixth impedance elements and half of the inductance included in the seventh to twelfth impedance elements is denoted by L3, When the third to fifth inductances are L4, Set the inductances L1 to L4 so that L1:L2=L3:L4.

22. The power conversion circuit device according to claim 20 or 21.

24. The inductance included in the first to third impedance elements is L2, The effective inductance between the first input terminal and the first connection point when the first and second input terminals are shorted and the first and second connection points are shorted is defined as L1, and the parallel inductance between L2 / 2 and the effective inductance between the first input terminal and the first connection point is defined as L1. A parallel inductance of the inductance included in the fourth to sixth impedance elements and half of the inductance included in the seventh to twelfth impedance elements is denoted by L3, When the third to fifth inductances are L4, In the formula L1 / (L1+L2)=a×L3 / (L3+L4), the inductances L1 to L4 are set so that the coefficient a satisfies 0.5≦a≦1.

5.

22. The power conversion circuit device according to claim 20 or 21.

25. The power conversion circuit device according to claim 16 or 20, a noise filter circuit connected to an input terminal of the power conversion circuit device; a three-phase motor connected to an output terminal of the power conversion circuit device; A power conversion circuit device comprising: