Circuit component
Patent Information
- Application Number
- JP2024523093
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-11-08
- Publication Date
- 2025-01-21
- Estimated Expiration
- Not applicable · inactive patent
Abstract
Description
Circuit Components
[0001] The disclosed embodiments relate to circuit components.
[0002] Conventionally, wiring substrates having an insulating layer mainly composed of ceramics and a conductor layer mainly composed of metal have been known, for example, by simultaneously firing a conductor material, which is copper powder with a metal oxide added, and a glass ceramic as an insulating layer material (see, for example, Patent Document 1).
[0003] Japanese Patent Application Laid-Open No. 2003-277852
[0004] The circuit component of the present disclosure includes an insulating layer made of ceramic, and a conductor layer extending in at least one of a planar direction and a direction intersecting the planar direction within the insulating layer, the conductor layer having a metal phase and silica particles, the silica particles being surrounded by the metal phase.
[0005] Fig. 1 is an enlarged cross-sectional view showing an example of the configuration of a wiring board according to an embodiment. Fig. 2 is an enlarged view of region A shown in Fig. 1. Fig. 3 is a view showing an SEM observation photograph of a conductor layer of sample 1. Fig. 4 is a view showing an EPMA spectrum of measurement point 1 shown in Fig. 3. Fig. 5 is a view showing an EPMA spectrum of measurement point 2 shown in Fig. 3.
[0006] Hereinafter, embodiments of the circuit component disclosed in the present application will be described with reference to the accompanying drawings. Note that the present disclosure is not limited to the embodiments described below. Furthermore, the embodiments can be appropriately combined within the scope of not causing any contradiction in the processing content. Furthermore, the same components in the following embodiments will be assigned the same reference numerals, and redundant explanations will be omitted.
[0007] The circuit components described above are exemplified by wiring boards, electronic components, and fuel cells. However, the present disclosure is also applicable to other devices, such as filter elements, inductors, and piezoelectric elements, as long as they combine insulating layers and conductor layers and exhibit electrical properties.
[0008] Conventionally, wiring substrates having an insulating layer mainly composed of ceramics and a conductor layer mainly composed of metal have been known. Such wiring substrates are obtained, for example, by simultaneously firing a conductor material, which is copper powder with a metal oxide added, and a glass ceramic as an insulating layer material.
[0009] However, the conventional technology has room for further improvement in terms of reducing the electrical resistance of the conductor layer, and therefore, there is a need for a technology that can solve the above problems and reduce the electrical resistance of the conductor layer.
[0010] (Wiring board: when the conductor layer is copper) Fig. 1 is an enlarged cross-sectional view showing an example of a wiring board 1 according to an embodiment, and Fig. 2 is an enlarged view of an area A shown in Fig. 1. As shown in Figs. 1 and 2, the wiring board 1 according to the embodiment includes an insulating layer 10 and a conductor layer 20.
[0011] A glass ceramic sintered body can be cited as an example of the insulating layer 10. The glass ceramic sintered body may contain ceramics such as aluminum oxide, aluminum nitride, silicon carbide, silicon nitride, or mullite as a filler.
[0012] The insulating layer 10 may be made of, for example, glass ceramics. This allows the wiring board 1 to be manufactured by simultaneously firing the green sheet that is the raw material for the insulating layer 10 and the conductive paste that is the raw material for the conductor layer 20. Therefore, according to the embodiment, the manufacturing cost of the wiring board 1 can be reduced.
[0013] The insulating layer 10 may have a first layer 11 and a second layer 12 that face each other with the conductor layer 20 sandwiched therebetween. The first layer 11 and the second layer 12 are positioned, for example, so as to sandwich both sides of the conductor layer 20 in the thickness direction.
[0014] The conductor layer 20 is conductive and extends in a planar direction (horizontal direction in FIG. 1 ) inside the insulating layer 10. The conductor layer 20 is disposed in a predetermined pattern shape, for example, between the first layer 11 and the second layer 12. Note that in the present disclosure, the conductor layer 20 may be located so as to be exposed on the surface of the wiring board 1.
[0015] The conductor layer 20 has a metal phase and silica particles 22 (see FIG. 3). The metal phase includes a plurality of crystallites 21, as shown in FIG. 2. The crystallites 21 are made of a metal material such as copper, silver, palladium, gold, platinum-tungsten, molybdenum, or manganese, or an alloy material or a mixed material containing these metal materials as a main component.
[0016] In the embodiment, the silica particles 22 may be surrounded by a metal phase (i.e., crystallites 21). This allows electricity to easily flow through the metal phase in the conductor layer 20, thereby reducing the electrical resistance of the conductor layer 20.
[0017] The silica particles 22 are preferably spherical. In other words, the cross-sectional shape of the silica particles 22 obtained by cutting or polishing the circuit board or the conductor layer 20 is preferably circular.
[0018] It is preferable that the conductor layer 20 be in uniform contact with the entire periphery of the silica particle 22. Here, "uniform" means that when the compositions of the silica particle 22 and the conductor layer 20 are analyzed from the center of the silica particle 22 to the conductor layer 20, there is no change in the concentration of each main component in each region of the silica particle 22 and the conductor layer 20.
[0019] In the case of the silica particle 22, each region refers to a range (width) from the center to the periphery of the silica particle 22. In the case of the conductor layer 20, each region refers to a width on the conductor layer 20 side that corresponds to the range (width) in the silica particle 22 described above.
[0020] The conductor layer 20 may have a width of 10 or less, where the range from the center to the outer periphery of the silica particle 22 is set to 1. For example, when elemental mapping of the material of the conductor layer (e.g., Cu) and Si, which is a component of the silica particle 22, is performed from the conductor layer 20 to the center of the silica particle 22 using an analyzer (EPMA: Electron Probe Micro Analyzer) provided in an electron microscope, the state refers to a state in which, across the interface between the conductor layer 20 and the silica particle 22, no Cu counts are observed on the silica particle 22 side except for noise, and conversely, no Si counts are observed on the conductor layer 20 side except for noise.
[0021] In addition, in the embodiment, the silica particles 22 may be located at the interface between the conductor layer 20 and the insulating layer 10. In other words, in this wiring board 1, silica may be present on the surface of the conductor layer 20 in a particulate state.
[0022] Here, "the surface of the conductor layer 20" refers to the vicinity of the interface between the insulating layer 10 and the conductor layer 20 when the conductor layer 20 is formed on the surface of the insulating layer 10. This "vicinity of the interface" includes a small width range from the surface of the conductor layer 20 to the interior of the conductor layer 20. This "small width" is, for example, a range within 1 μm from the surface of the conductor layer 20.
[0023] In the embodiment, the presence of nano-sized silica particles 22 on the surface of the conductor layer 20 can enhance adhesion between the conductor layer 20 and the insulating layer 10. The silica particles 22 may be present over the entire surface of the conductor layer 20 facing the insulating layer 10, or may be present only on a portion of the surface of the conductor layer 20. When a plurality of silica particles 22 are present on the surface of the conductor layer 20, these silica particles 22 may be present as individual particles isolated from each other.
[0024] The presence of silica particles 22 on the surface of the conductor layer 20 or near the interface between the insulating layer 10 and the conductor layer 20 increases the adhesion between the insulating layer 10 and the conductor layer 20, partly because the shrinkage behavior of the metal material (e.g., copper) used in the conductor layer 20 during firing is similar to the shrinkage behavior of the silica particles 22.
[0025] Furthermore, the reason why the shrinkage behavior of the metal material used in the conductor layer 20 during firing is similar to the shrinkage behavior of the silica particles 22 is thought to be that the size of the silica particles 22 is very small (nano-sized).
[0026] If silica particles larger than nano-sized are used, the particle size distribution will broaden and the heat capacity will increase due to the size, which will affect the sintering behavior and adhesion.
[0027] In addition, when a glass powder of a composite oxide is used instead of nano-sized silica particles 22, the temperature range at which the glass powder becomes molten is wider than in the case of nano-sized silica particles 22, since the glass powder contains multiple components.
[0028] For example, glass powder may have a lower melting temperature than nano-sized silica particles 22. Also, glass powder often has a wide particle size distribution. When glass powder having these properties is used, the glass powder is likely to aggregate and move during firing within the printed pattern that will become the conductor layer 20 due to sintering.
[0029] As a result, when forming the conductor layer 20, the metal particles tend to grow and voids tend to form in the conductor layer 20. This is because the glass powder tends to diffuse from the printed pattern area into the area that will become the insulating layer 10.
[0030] On the other hand, when nano-sized silica particles 22 are used, the temperature range at which the conductor layer 20 melts is narrower than that in the case of glass powder because of the single composition, and as a result, the conductor layer 20 becomes dense, and gently shaped recesses are more likely to form on the surface along the insulating layer 10.
[0031] This is because the wiring board 1 is fired at a temperature range that is equal to or lower than the melting points of the main component metal and silica particles 22 contained in the conductor layer 20 and higher than the partial melting temperature of the insulating layer 10. In this case, it is particularly preferable to fire the wiring board 1 at a temperature that is 500°C or more, particularly 700°C or more lower than the melting point of the silica particles 22 (1710°C).
[0032] On the other hand, the melting temperature of the glass powder of a composite oxide varies depending on the composition, and the temperature range from the melting initiation temperature to the complete melting temperature is wide. In other words, the temperature at which the glass powder of a composite oxide partially melts may be lower than the firing temperature of the wiring substrate 1 (700°C or higher and 1000°C or lower).
[0033] When a glass powder of a composite oxide is used, unlike when silica particles 22 are used, the firing temperature is not set at a temperature that is 500° C. or more lower than the melting point of the glass powder, and therefore the glass powder is likely to diffuse in the conductor layer 20 and react with the insulating layer 10. The temperature at which each material of the insulating layer 10 and the conductor layer 20 begins to melt, its melting point, and softening point can be determined by, for example, differential thermal analysis.
[0034] In the embodiment, the content of the silica particles 22 in the conductor layer 20 may be 0.3 to 2.5 in mass ratio when the content of the metal phase is 100. This can improve the adhesion between the conductor layer 20 and the insulating layer 10.
[0035] In addition, in an embodiment, when a specific range (for example, region A) of the conductor layer 20 is specified in a cross-sectional view, the linear length in the planar direction (horizontal direction in Figure 2) is defined as L0, and the length of the contour 20a of the conductor layer 20 (i.e., the interface length between the conductor layer 20 and the insulating layer 10) is defined as L1, L1 / L0 may be in the range of 1.05 to 1.15.
[0036] Here, the specific range refers to a range in which the longitudinal width of the conductor layer 20 is 10 μm or more and 100 μm or less. The longitudinal width within this specific range can be selected from the range of 10 μm or more and 100 μm or less. Such a width is determined in consideration of the thickness of the conductor layer 20, the size of the crystallites 21 contained in the conductor layer 20, etc.
[0037] For example, the specific area may be the area where one conductor layer 20 is sandwiched between the upper and lower insulating layers 10. The specific area may be specified at multiple locations on the photograph. A specific area may be 100 (μm 2 ) or more and 10,000 (μm 2 ) Anything that falls under the following is acceptable.
[0038] In this manner, in the embodiment, by making the unevenness of the contour 20a of the conductor layer 20 relatively small, the interfacial conductivity of the conductor layer 20 can be increased.
[0039] The particle size of the silica particles 22 according to the embodiment is preferably 1 nm to 50 nm. Here, the particle size refers to the diameter. The diameter refers to the maximum diameter obtained when observing the silica particles 22.
[0040] Among these, the silica particles 22 preferably have an average particle size of 20 nm. Furthermore, the conductor layer 20 may contain silica particles 22 with particle sizes of 10 nm to 40 nm in an integrated amount ratio of 70% or more. In this case, the particle size refers to the diameter of the portion of the silica particle that exhibits the maximum length when the cross section of the conductor layer 20 is observed.
[0041] In the embodiment, the aspect ratio (major axis / minor axis) of the silica particles 22 may be 1.5 or less. The major axis is the longest part of the silica particles 22, and the minor axis is the shortest part of the length perpendicular to the major axis.
[0042] In an embodiment, the conductor layer 20 may have a microstructure formed by fine copper crystallites 21. In this case, the plurality of crystallites 21 may have a polygonal shape including straight sides, and the sides are in contact with each other as grain boundaries. The longest diameter of the crystallites 21 is preferably 1 μm or more and 10 μm or less. The plurality of crystallites 21 preferably have a number ratio of 70% or more of crystallites with two or more sides.
[0043] In addition, in the embodiment, the area ratio of the silica particles 22 in the conductor layer 20 may be 0.006(%) to 0.069(%). This can increase the interfacial conductivity of the conductor layer 20. A method for determining the area ratio of the silica particles 22 in the conductor layer 20 will be described later.
[0044] In the embodiment, the crystallites 21 may be composed mainly of copper, and the copper content in the conductor layer 20 may be 80 (wt %) to 99 (wt %). This can further increase the interfacial conductivity of the conductor layer 20.
[0045] In addition, in the embodiment, the crystallites 21 may have a polygonal shape as shown in Fig. 2. This can reduce the decrease in interfacial conductivity in the high frequency range (for example, 1 (GHz) to 49 (GHz)), thereby increasing the interfacial conductivity of the conductor layer 20 in the high frequency range.
[0046] Furthermore, in the embodiment, the bonding between adjacent crystallites 21 is strong and the crystallites 21 are dense, so that when the conductor layer 20 is divided in the length direction, the variation in electrical resistance can be reduced.
[0047] (Wiring board: when the conductor layer is silver) The present disclosure can also be applied to a wiring board using silver for the conductor layer. This wiring board can also have a structure such as that shown in FIG. 1 . That is, the conductor layer is disposed inside the insulating layer. In this case, the material of the conductor layer may be silver (Ag).
[0048] Even when the conductor layer is made of silver, the insulating layer is preferably made of the above-mentioned glass ceramic sintered body. In this case, the silver conductor layer is a metal sintered body having a plurality of crystallites. In this case, the silver conductor layer preferably contains silica particles in a metal sintered body. In other words, this conductor layer is preferably a composite metal film made by sintering silver powder containing silica particles.
[0049] The size of the silica particles is preferably equal to or smaller than the crystallites. Specifically, the silica particles preferably have an average particle size of 20 nm. Furthermore, the conductor layer may contain silica particles with particle sizes of 10 nm to 40 nm in an integrated amount of 70% or more. In this case, the particle size refers to the diameter of the portion of the silica particle that exhibits the maximum length when the cross section of the conductor layer is observed.
[0050] Here, the size refers to the diameter of the portion of the crystallite that exhibits the maximum length when the cross section of the conductor layer is observed.
[0051] When the conductor layer is a composite metal film made by sintering silver powder containing silica particles, the silver metal phase has a crystalline structure in which multiple crystallites are in contact with each other at their edges. This is thought to be due in part to the fact that when silver powder containing silica particles is sintered, the presence of the silica particles suppresses the growth of silver particles.
[0052] Normally, metal powder grains grow three-dimensionally, but when silica particles are present adjacent to silver powder, grain growth in the direction of the silica particles on the surface of the aggregate of multiple silver powders is suppressed. In the metal sintered body formed from silver powder, the grain growth direction is restricted by the silica particles.
[0053] The conductor layer, which is a sintered body of silver in which silica particles are present in silver powder, tends to have a crystalline structure in which multiple crystallites are in contact with each other at their edges.
[0054] The area ratio of the crystalline structure in which the edges of the multiple crystallites contained in the conductor layer are in contact with each other is preferably 70% or more per unit area. In this case, the shape of the multiple crystallites adjacent to each other in the conductor layer is preferably polygonal.
[0055] The portions where polygonal crystallites contact each other have straight edges. The straight edges are grain boundaries. Polygonal crystallites contact each other via straight grain boundaries.
[0056] This results in a conductor layer with a low resistance, high interfacial conductivity in the high frequency band, and a low void ratio in the conductor layer. This increases the conductor resistance (interfacial conductivity) of the conductor layer as well as the coverage of the conductor layer on the surface of the insulating layer.
[0057] For example, a silver conductor layer was applied to the same insulating layer as in the copper case shown below, and a sample was prepared under the same conditions. The electrical properties were measured, and the interfacial conductivity was 80%. Note that the firing in this case was performed in an air atmosphere. The average particle size of the silver powder was 2 μm. The average particle size of the silica particles was 20 nm.
[0058] The conductor layer of the fabricated wiring board had a crystalline structure in which multiple crystallites were in contact with each other along their edges. The area ratio of the crystalline structure in which multiple crystallites in the conductor layer were in contact with each other along their edges was about 75% per unit area. In this case, the shapes of the multiple crystallites adjacent to each other in the conductor layer were mostly polygonal.
[0059] The portions where the polygonal crystallites contacted each other had straight edges. The straight edges formed grain boundaries. The polygonal crystallites were in contact with each other via straight grain boundaries. The area ratio of silica particles in the conductor layer was similar to that of Sample 2 in Table 1 below.
[0060] (Electronic Component) The present disclosure can also be applied to the following electronic component. This electronic component also has a conductor layer inside an insulating layer. As with the wiring board 1 described above, when the insulating layer has a first layer and a second layer, the electronic component may have a configuration in which the conductor layer is sandwiched between the first layer and the second layer. Alternatively, the conductor layer may be disposed on both sides of the insulating layer.
[0061] In this case, the material of the conductor layer is preferably nickel. When the material of the conductor layer is nickel, the material of the insulating layer is preferably a ceramic material exhibiting dielectric properties. A ceramic material exhibiting dielectric properties may also be referred to as a dielectric ceramic.
[0062] An example of a dielectric ceramic is a ceramic material whose main component is barium titanate. Here, "main component" refers to a dielectric ceramic containing 80% or more (mol%) of barium titanate. Dielectric ceramics are used, for example, in the dielectric layers of multilayer ceramic capacitors.
[0063] The nickel conductor layer is a sintered metal body having a plurality of crystallites. In this case, the nickel conductor layer preferably contains silica particles in the sintered body. In other words, the conductor layer is preferably a composite metal film made by sintering nickel powder containing silica particles.
[0064] The size of the silica particles is preferably equal to or smaller than the size of the crystallites, where size refers to the diameter of the longest point in the crystallite when the cross section of the conductor layer is observed.
[0065] Specifically, the silica particles preferably have an average particle size of 20 nm. Furthermore, the conductor layer may contain silica particles with particle sizes of 10 to 40 nm in an integrated amount of 70% or more. In this case, the particle size refers to the diameter of the silica particle at the point that shows the maximum length when the cross section of the conductor layer is observed.
[0066] When the conductor layer is a composite metal film made by sintering nickel powder containing silica particles, the nickel metal phase has a crystalline structure in which multiple crystallites are in contact with each other at their edges. This is thought to be due in part to the fact that when nickel powder containing silica particles is sintered, the presence of the silica particles suppresses the grain growth of the nickel.
[0067] Normally, metal powder grains grow three-dimensionally, but when silica particles are present adjacent to nickel powder, grain growth in the direction of the silica particles on the surface of the nickel powder aggregate is suppressed. In the metal sintered body formed from nickel powder, the direction of grain growth is restricted by the silica particles.
[0068] Thus, the conductor layer, which is a sintered body of nickel in which silica particles are present in nickel powder, tends to have a crystalline structure in which multiple crystallites are in contact with each other at their edges.
[0069] The area ratio of the crystalline structure in which the edges of the multiple crystallites contained in the conductor layer are in contact with each other is preferably 70% or more per unit area. In this case, the shape of the multiple crystallites adjacent to each other in the conductor layer is preferably polygonal.
[0070] The portions where the polygonal crystallites contact each other have straight edges. The straight edges are grain boundaries. The polygonal crystallites contact each other via the straight grain boundaries. This results in a conductor layer with a low resistance.
[0071] Furthermore, in the case of a multilayer ceramic capacitor, the conductor layers have a low void ratio. This increases the conductor resistance of the conductor layers and the surface coverage of the dielectric ceramic (also called the dielectric layer). As a result, it becomes possible to increase the capacitance per unit volume of the multilayer ceramic capacitor.
[0072] For example, in the case of a capacitor having nickel conductor layers formed on both sides of a single-plate dielectric layer, if the capacitance of a sample (sample A) in which silica particles are not contained in the nickel conductor layer is taken as 1, the capacitance of a sample (sample B) in which silica particles are contained in the nickel conductor layer is 1.1 times or more.
[0073] Specifically, the capacitance of sample B was 1.2 times that of sample A. The composition of the dielectric layer when samples A and B were formed was such that 1 (part by molar) magnesium oxide powder, 1.5 (parts by molar) rare earth element (yttrium oxide), and 1 (part by molar) manganese oxide (MnO) were added to 100 (parts by molar) barium titanate powder.
[0074] The conductor layer was fabricated using 100 parts by mass of nickel powder and 1 part by mass of silica particles. The average particle size of the nickel powder was 0.1 μm. The average particle size of the silica particles was 20 nm.
[0075] The capacitor was fabricated by printing nickel conductor paste on both sides of a single-plate molded body with a diameter of 10 mm and a thickness of 1 mm as the dielectric layer, followed by firing under the firing conditions of a maximum temperature of 1200°C and a holding time at the maximum temperature of 2 hours.
[0076] An LCR meter (HP 4274A) was used to measure the capacitance of the prepared samples A and B. The measurement frequency was 1 kHz and the measurement voltage was 0.5 V. The conductor layer of the prepared capacitor had a crystalline structure in which multiple crystallites were in contact with each other at their edges.
[0077] The area ratio of the crystalline structure in which the edges of multiple crystallites in the conductor layer were in contact with each other was about 75% per unit area. In this case, the shapes of the multiple crystallites adjacent to each other in the conductor layer were mostly polygonal.
[0078] The portions where the polygonal crystallites contacted each other had straight edges. The straight edges formed grain boundaries. The polygonal crystallites were in contact with each other via straight grain boundaries. The area ratio of silica particles in the conductor layer was similar to that of Sample 2 in Table 1 below.
[0079] (Fuel Cell) The present disclosure can also be applied to the following fuel cell. The fuel cell has an anode and a support. The anode has a solid electrolyte material and nickel. In the fuel cell, the anode material is mainly composed of zirconia.
[0080] In this case, the conductor material is preferably nickel. In this case, the nickel conductor should also contain silica particles in the sintered body. In other words, this conductor should be a composite metal made by sintering nickel powder containing silica particles.
[0081] The size of the silica particles should be equal to or smaller than the crystallites that make up the sintered nickel conductor, where size refers to the diameter of the longest point in the crystallite when observing the cross section of the conductor.
[0082] Specifically, the silica particles preferably have an average particle size of 20 nm. Furthermore, the conductor may contain silica particles with particle sizes of 10 to 40 nm in an integrated amount of 70% or more. In this case, the particle size refers to the diameter of the silica particle at the point where it shows the maximum length when the cross section of the conductor is observed.
[0083] When the conductor is a composite metal film made by sintering nickel powder containing silica particles, the nickel metal phase has a crystalline structure in which multiple crystallites are in contact with each other at their edges. This is thought to be partly because, when nickel powder containing silica particles is sintered, the presence of the silica particles suppresses the grain growth of the nickel.
[0084] Normally, metal powder grains grow three-dimensionally, but when silica particles are present adjacent to nickel powder, grain growth in the direction of the silica particles on the surface of the aggregate of multiple nickel powders is suppressed.
[0085] In a metal sintered body formed from nickel powder, the direction of grain growth is restricted by silica particles. A conductor layer made of sintered nickel with silica particles in the nickel powder tends to have a crystalline structure in which multiple crystallites are in contact with each other at their edges.
[0086] The area ratio of the crystalline structure in which the edges of the multiple crystallites contained in the conductor are in contact with each other is preferably 70% or more per unit area. In this case, the shape of the multiple crystallites adjacent to each other in the conductor is preferably polygonal.
[0087] The portions where polygonal crystallites contact each other have straight edges. The straight edges are grain boundaries. The polygonal crystallites contact each other via straight grain boundaries. This results in a conductor with low resistance.
[0088] In the case of a fuel cell, the conductor also has a low void ratio. Thus, the conductor can increase the surface coverage of the zirconia sintered body while reducing the conductor resistance. As a result, a fuel cell with low conductor resistance can be obtained.
[0089] The conductor resistance is at temperatures above room temperature, and also contributes greatly to the reduction of conductor resistance at temperatures below 1000° C., below 700° C., and below 500° C. For example, a sample in the shape of a single plate was prepared.
[0090] Sample C was prepared by mixing 50 parts by mass of zirconia (stabilized zirconia with Y being 10 (mol %)) and 50 parts by mass of nickel powder to which no silica particles had been added, forming a compact, and then firing the compact.
[0091] Sample D was prepared by mixing 50 parts by mass of zirconia (stabilized zirconia with Y being 10 (mol %)) and 50 parts by mass of a composite metal powder in which nickel powder was coated with silica particles, forming a compact, and then firing the compact.
[0092] The molded body was a disk-shaped body with a diameter of 10 mm and a thickness of 1 mm. The zirconia powder used had an average particle size of 5 μm. The nickel powder used had an average particle size of 3 μm. The silica particles used had an average particle size of 20 nm. The amount of silica particles added was 1 part by mass per 100 parts by mass of nickel powder.
[0093] The firing was carried out in an oxygen-containing atmosphere at a maximum temperature of 1300°C for a holding time of 2 hours. After this, the resistance values of each sample were measured. The measurements were carried out with samples C and D heated to a temperature of 700°C.
[0094] Platinum wires were connected to the samples C and D and were drawn out from the heating furnace in which the samples C and D were held. The platinum wires were connected to the terminals of a resistance measuring device placed in a room temperature environment.
[0095] The resistance value (direct current resistance value) of the sample containing silica particles (sample D) was 0.95 times or less the resistance value (direct current resistance value) of the sample not containing silica particles (sample C). Specifically, the resistance value of sample D was 0.93 times the resistance value of sample C.
[0096] The cross section of the nickel conductor layer was observed using an electron microscope. The conductor had a crystalline structure in which multiple crystallites were in contact with each other. The crystallites were mostly polygonal in shape. The areas where the polygonal crystallites were in contact with each other had straight edges.
[0097] The straight edges were grain boundaries. The polygonal crystallites were in contact with each other via straight grain boundaries. The area ratio of silica particles in the conductor was similar to that of Sample 2 in Table 1 below.
[0098] Examples of the present disclosure will be specifically described below. Note that in the examples described below, a wiring substrate having an insulating layer made of glass ceramic and a conductor layer mainly composed of copper is shown, but the present disclosure is not limited to the following examples.
[0099] <Sample 1> First, a mixture of 40 wt % alumina particles and 60 wt % borosilicate glass was prepared as the material for the insulating layer. This mixture is a glass ceramic raw material that can be fired at a temperature of 900°C to 1000°C.
[0100] Further, as an organic binder, 20 parts by mass of isobutyl methacrylate resin and dibutyl phthalate were used for 100 parts by mass of the glass ceramic raw material, and a green sheet having a thickness of 100 μm was produced by doctor blade molding.
[0101] Copper powder (purity 99.9 wt%) with an average particle size of 2 μm and silica particles with an average particle size of 20 nm were prepared as raw materials for the conductor layer. The cumulative proportion of silica particles with diameters of 10 nm to 40 nm was 75%. The silica particle content was 0.3 parts by mass per 100 parts by mass of copper powder.
[0102] The organic binder was an isobutyl methacrylate resin and a mixed solvent of butyl carbitol acetate and dibutyl phthalate. The isobutyl methacrylate resin was added in a ratio of 5 parts by mass to 100 parts by mass of copper powder, and the mixed solvent of butyl carbitol acetate and dibutyl phthalate was further added to prepare a conductor paste containing copper powder and silica particles.
[0103] Next, a conductor paste was printed on both surfaces of the prepared green sheet in a predetermined area and then fired. The firing was carried out in a reducing atmosphere using a hydrogen-nitrogen mixed gas, with a maximum temperature of 930°C and a holding time of 2 hours. Multiple green sheets were stacked to a thickness of 500 μm. In this way, the wiring substrate 1 of sample 1 was obtained.
[0104] <Samples 2 to 5> Wiring substrates 1 of samples 2 to 5 were obtained using the same method and conditions as those for sample 1 described above, except for the content of silica particles in the conductive paste preparation process.
[0105] In the conductive paste preparation process for samples 2 to 5, the amounts of the copper powder and the copper powder were 1.0 (parts by mass), 2.0 (parts by mass), 2.5 (parts by mass), and 3.0 (parts by mass), respectively, relative to 100 (parts by mass) of copper powder.
[0106] <Sample 6> Except for the conductor paste preparation process, the wiring substrate 1 of Sample 6 was obtained using the same method and conditions as those of Sample 1 described above. For Sample 6, copper powder (purity 99.9 wt%) with an average particle size of 2 μm and borosilicate glass powder with an average particle size of 2 μm were prepared as raw materials for the conductor layer. The content of the glass powder was 1.0 parts by mass per 100 parts by mass of the copper powder.
[0107] The organic binder was an isobutyl methacrylate resin and a mixed solvent of butyl carbitol acetate and dibutyl phthalate. The isobutyl methacrylate resin was added in a ratio of 5 parts by mass to 100 parts by mass of copper powder, and the mixed solvent of butyl carbitol acetate and dibutyl phthalate was further added to prepare a conductor paste containing copper powder and glass powder.
[0108] <Samples 7 and 8> Wiring substrates 1 of Samples 7 and 8 were obtained by the same method and conditions as those of Sample 6 described above, except for the content of borosilicate glass powder in the conductive paste preparation process. Note that for Samples 7 and 8, the content of borosilicate glass powder was 3.0 (parts by mass) and 5.0 (parts by mass), respectively, per 100 (parts by mass) of copper powder in the conductive paste preparation process.
[0109] <Various Evaluations> Next, the wiring substrates 1 of Samples 1 to 8 obtained above were cut, the cut surfaces were mirror-polished, and the cross sections were observed with a scanning electron microscope (SEM) and an electron probe microanalyzer (EPMA).
[0110] Fig. 3 is a view showing an SEM observation photograph of the conductor layer 20 of Sample 1. Fig. 4 is a view showing an EPMA spectrum at measurement point 1 shown in Fig. 3, and Fig. 5 is a view showing an EPMA spectrum at measurement point 2 shown in Fig. 3.
[0111] 3 to 5, silica particles 22 (corresponding to measurement point 1 where a Si peak was observed) were observed between adjacent copper crystallites 21 (corresponding to measurement point 2 where no Si peak was observed) in Samples 1 to 5. In other words, in the embodiment, it was observed that the silica particles 22 were surrounded by the metal phase (i.e., the crystallites 21).
[0112] Although not shown, in Samples 1 to 5, it was observed that the silica particles 22 were also located at the interface between the conductor layer 20 and the insulating layer 10.
[0113] Furthermore, using the SEM observation photographs obtained above, the ratio L1 / L0 of the length L1 of the contour 20a of the conductor layer 20 to the linear length L0 in the planar direction was measured for each of Samples 1 to 8.
[0114] Specifically, first, points A and B were marked at both ends of one contour 20a of the conductor layer 20 shown in the cross-sectional photograph, and a straight line was drawn between points A and B, with the length of this line being designated L0. Next, an image processing device was used to determine the length of the contour 20a from point A to point B, and this length was designated L1. Finally, the ratio of both lengths, L1 / L0, was calculated.
[0115] Furthermore, the area ratio of the silica particles 22 was measured for each of the samples 1 to 8 using the SEM observation photographs obtained above. Specifically, first, a plurality of square areas each having a length of 1 / 10 to 1 / 2 of the thickness of the conductor layer 20 shown in the cross-sectional photograph were designated. For example, 8 to 10 such square areas were designated so as to be continuously arranged in the extension direction (planar direction) of the conductor layer 20.
[0116] Next, the area of the metal portion (corresponding to the crystallite 21) in the region divided by the square was defined as A0. Also, the area of the black portion (corresponding to the silica particle 22) shown in FIG. 3 was defined as A1.
[0117] The ratio A1 / A0 of the two areas was defined as the area ratio of the silica particles 22 in one square region. Finally, the average value of the area ratios of the silica particles 22 in the multiple square regions was defined as the area ratio of the silica particles 22 in the sample.
[0118] When using the SEM observation photograph, the silica particles 22 were identified by EPMA. When using the SEM observation photograph and the periphery of the silica particles 22 was blurred, the center between the position determined to be the silica component and the position determined to be the metal phase was taken as the boundary between the silica particles 22 and the metal phase.
[0119] The interfacial conductivity of the wiring substrate 1 of each of the samples 1 to 8 obtained above was measured. The interfacial conductivity was measured using the dielectric cylindrical resonator method described below. The measurement samples used had a diameter of 50 mm and had the conductor layer 20 formed over almost the entire surface of both sides.
[0120] The method for measuring interfacial conductivity using the dielectric rod resonator method is a method for measuring the conductivity at the interface between a conductor and an insulating layer, i.e., at the conductor interface, by attaching an insulating layer with the above-mentioned conductor formed inside to both end faces or one end face of a dielectric rod made of a dielectric material with known relative permittivity and dielectric loss in a predetermined relationship to form a dielectric resonator.
[0121] The principle of this measurement method is that when an electromagnetic resonator is constructed by sandwiching a conductor plate (usually a conductor plate having a diameter D about three times the diameter d of the dielectric cylinder) that is large enough to ignore the edge effect, parallel to both end faces of a dielectric cylinder having a predetermined dimensional ratio (height h / diameter d), the high-frequency current flowing in the conductor plate due to the TEomn resonance mode (hereinafter referred to as the TEomn mode) is distributed only on the short-circuit surface, i.e., the opposing surface between the dielectric and the conductor.
[0122] In a dielectric resonator, the high-frequency current flowing in the conductor due to the TEomn mode (m = 1, 2, 3 ..., n = 1, 2, 3 ...) is distributed only at the interface between the conductor and the dielectric substrate where the dielectric cylinder is in contact. By utilizing this, the interfacial conductivity can be calculated from the measured resonant frequency f0 of the TEomn mode (m = 1, 2, 3 ..., n = 1, 2, 3 ...) and the unloaded Q and Qu. The interfacial conductivity was measured at a frequency of 10 (GHz).
[0123] The wiring substrates 1 of the samples 1 to 8 obtained above were evaluated for the presence or absence of conductor peeling. The samples used for evaluation were those in which insulating layers 10 were laminated on both sides of conductor layers 20 each having a side length of 10 mm to 50 mm.
[0124] To evaluate conductor peeling, the evaluation sample was first cut at a position approximately halfway along one direction, and the cross section was observed at both interfaces between the insulating layer 10 and the conductor layer 20. If peeling was observed at even one location, it was judged as "peeling present," and if peeling was not observed at any interface, it was judged as "no peeling present."
[0125] In the above evaluation, the state of "peeling" was defined as a region where the insulating layer 10 and the conductor layer 20 were separated by 0.1 mm or more and the length of the region was 1 mm or more.
[0126] Furthermore, a thermal shock resistance test was conducted by immersing the wiring substrates 1 of Samples 1 to 8 obtained above in a heated solder bath for approximately 1 second. In this thermal shock resistance test, the temperature of the solder bath was set to two temperatures: 325°C (i.e., ΔT=300°C) and 355°C (i.e., ΔT=330°C).
[0127] Further, confirmation of cracks occurring in the wiring board 1 was carried out by a method of observing, under a stereomicroscope, samples of the wiring board 1 after cross-section polishing. Samples with no visible cracks were evaluated as "A," samples with few cracks were evaluated as "B," and samples with many cracks were evaluated as "C."
[0128] Here, for Samples 1 to 8, the contents of copper powder, silica particles, and glass powder in the conductor layer 20, the L1 / L0 value in the conductor layer 20, the area ratio of silica particles in the conductor layer 20, the measurement results of the interfacial conductivity at a frequency of 10 (GHz), the evaluation results for the presence or absence of conductor peeling, and the test results of the thermal shock resistance test are shown in Table 1. Note that the measurement results of the interfacial conductivity at a frequency of 10 (GHz) are relative values when the interfacial conductivity in direct current is set to 100 (%).
[0129]
[0130] As shown in Table 1, it can be seen that by adding nano-sized silica particles 22 to the conductor layer 20 and surrounding the silica particles 22 with a metal phase, the interfacial conductivity of the conductor layer 20 can be increased to 80% or more. That is, in the embodiment, it can be seen that by surrounding the silica particles 22 with a metal phase, the electrical resistance of the conductor layer 20 can be reduced.
[0131] Furthermore, as shown in Table 1, samples 1 to 5 were prepared using a conductor paste in which the content of silica particles 22 was 0.3 (parts by mass) to 3.0 (parts by mass) per 100 (parts by mass) of copper powder, and it was found that the interfacial conductivity of the conductor layer 20 could be increased and conductor peeling of the conductor layer 20 could be reduced.
[0132] Furthermore, samples 1 to 4 were prepared using a conductor paste in which the content of silica particles 22 was 0.3 (parts by mass) to 2.5 (parts by mass) per 100 (parts by mass) of copper powder, and it was found that the interfacial conductivity of the conductor layer 20 could be increased, conductor peeling of the conductor layer 20 could be reduced, and good thermal shock resistance could be obtained.
[0133] Furthermore, it can be seen that when samples 1 to 3 are prepared using a conductor paste in which the content of silica particles 22 is 0.3 (parts by mass) to 2.0 (parts by mass) per 100 (parts by mass) of copper powder, the interfacial conductivity of the conductor layer 20 can be further increased.
[0134] Furthermore, it can be seen that when samples 1 and 2 are prepared using a conductor paste in which the content of silica particles 22 is 0.3 (parts by mass) to 1.0 (parts by mass) per 100 (parts by mass) of copper powder, the interfacial conductivity of the conductor layer 20 can be further increased.
[0135] Furthermore, as shown in Table 1, by setting the value of L1 / L0 in the conductor layer 20 in the range of 1.05 to 1.42, the interfacial conductivity of the conductor layer 20 can be increased and conductor peeling of the conductor layer 20 can be reduced.
[0136] Furthermore, it can be seen that by setting the L1 / L0 value in the conductor layer 20 in the range of 1.05 to 1.21, the interfacial conductivity of the conductor layer 20 can be increased, conductor peeling in the conductor layer 20 can be reduced, and good thermal shock resistance can be obtained.
[0137] It is also understood that the interfacial conductivity of the conductor layer 20 can be further increased by setting the L1 / L0 value in the conductor layer 20 in the range of 1.05 to 1.15. It is also understood that the interfacial conductivity of the conductor layer 20 can be further increased by setting the L1 / L0 value in the conductor layer 20 in the range of 1.05 to 1.09.
[0138] Although not shown in Table 1, in a wiring board (so-called printed circuit board) having an insulating layer made of a resin such as epoxy resin and a conductor layer made of copper foil, the adhesion between the resin (insulating layer) and the copper foil (conductor layer) is low, so adhesion can only be ensured by increasing the unevenness of the contour of the conductor layer to create an anchor effect.
[0139] Therefore, in this printed circuit board, the value of L1 / L0 in the conductor layer is equal to or greater than 2. Furthermore, in this printed circuit board, the contour of the conductor layer is highly uneven, which reduces the interfacial conductivity of the conductor layer.
[0140] Furthermore, as shown in Table 1, by setting the area ratio of silica particles 22 in the conductor layer 20 in the range of 0.006 (%) to 0.069 (%), it can be seen that the interfacial conductivity of the conductor layer 20 can be increased and conductor peeling of the conductor layer 20 can be reduced.
[0141] Furthermore, it can be seen that by setting the area ratio of silica particles 22 in the conductor layer 20 to the range of 0.006 (%) to 0.052 (%), the interfacial conductivity of the conductor layer 20 can be increased, conductor peeling in the conductor layer 20 can be reduced, and good thermal shock resistance can be obtained.
[0142] Furthermore, it can be seen that by setting the area ratio of the silica particles 22 in the conductor layer 20 in the range of 0.006 (%) to 0.043 (%), the interfacial conductivity of the conductor layer 20 can be increased and the interfacial conductivity of the conductor layer 20 can be further increased.
[0143] It is also apparent that the interface conductivity of the conductor layer 20 can be further increased by setting the area ratio of the silica particles 22 in the conductor layer 20 in the range of 0.006(%) to 0.026(%).
[0144] Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the above embodiments and various modifications are possible without departing from the spirit of the present disclosure. For example, in the above embodiments, an example in which fine powder of silica particles is added to the conductive paste that is the raw material of the conductor layer 20 is shown, but the present disclosure is not limited to such an example.
[0145] For example, fine ceramic powder other than silica (such as fine alumina powder) may be added to the conductive paste, which also provides the same effects as those of the above embodiment.
[0146] Further advantages and other aspects may readily occur to those skilled in the art. Therefore, the disclosure in its broader aspects is not limited to the specific details and representative embodiments shown and described above. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
[0147] REFERENCE SIGNS LIST 1 Wiring board (an example of a circuit component) 10 Insulating layer 20 Conductor layer 20a Contour 21 Crystallite 22 Silica particle
Claims
1. An insulating layer made of ceramics; a conductor layer extending in at least one of a planar direction and a direction intersecting the planar direction within the insulating layer; Equipped with the conductor layer has a metal phase and silica particles; The silica particles are surrounded by the metal phase. Circuit components.
2. The content of the silica particles is 0.3 to 2.5 in terms of mass ratio, relative to the mass of the metal phase being 100. The circuit component according to claim 1 .
3. When a specific area of the conductor layer is designated in a cross-sectional view, the length of a straight line in the planar direction is L0, and the length of the contour of the conductor layer is L1, L1 / L0 is in the range of 1.05 to 1.
15. The circuit component according to claim 1 or 2.
4. The conductor layer contains silica particles having a diameter of 10 nm to 40 nm at a cumulative ratio of 70% or more. The circuit component according to claim 1 or 2.
5. The metal phase contains a plurality of crystallites composed mainly of one selected from the group consisting of copper, silver, and nickel, The plurality of crystallites include polygonal crystallites having straight edges, and the edges are in contact with each other as grain boundaries. The circuit component according to claim 1 or 2.