Wiring board and package structure using same

Abstract

A wiring board according to the present disclosure comprises a first insulating layer that has a first surface and a conductor layer that is arranged on the first surface. The first insulating layer comprises an insulating resin and a plurality of insulating particles that are dispersed in the insulating resin. The plurality of insulating particles include first insulating particles, each of which has a first region that is exposed from the insulating resin in the first surface when the first surface is viewed from above, and a second region other than the first region. The conductor layer is arranged on the surface of the first region and on the surface of the insulating resin, but is not arranged below the first region nor between the second region and the insulating resin.

Description

Wiring board and mounting structure using same

[0001] The present invention relates to a wiring board and a mounting structure using the same.

[0002] Conventionally, inorganic fillers (insulating particles) such as silica and alumina have been dispersed in insulating layers included in wiring boards in order to reduce the thermal expansion coefficient of the insulating layer, as described in Patent Document 1. As shown in Patent Document 1, some of the inorganic fillers may be exposed from the surface of the insulating layer.

[0003] Japanese Patent Application Laid-Open No. 2022-30289

[0004] The wiring board according to the present disclosure includes a first insulating layer having a first surface and a conductor layer located on the first surface. The first insulating layer includes an insulating resin and a plurality of insulating particles dispersed in the insulating resin. When the first surface is viewed from above, the plurality of insulating particles include first insulating particles having a first region exposed from the insulating resin on the first surface and a second region other than the first region. The conductor layer is located on the surface of the first region and on the surface of the insulating resin, but is not located below the first region or between the second region and the insulating resin.

[0005] Furthermore, a mounting structure according to the present disclosure includes the above wiring board and an electronic component located in a mounting area of ​​the wiring board.

[0006] Fig. 2 is a cross-sectional view showing a wiring board according to an embodiment of the present disclosure; Fig. 3 is an enlarged cross-sectional view for explaining region X (main part) of Fig. 1; Fig. 4 is an enlarged cross-sectional view for explaining other main parts of the wiring board according to an embodiment of the present disclosure; Fig. 5 is an explanatory view for explaining an embodiment of a method for forming a conductor layer on a first surface of a first insulating layer in a wiring board according to an embodiment of the present disclosure;

[0007] Typically, a conductor layer is located on the surface of an insulating layer. If an inorganic filler is exposed from the surface of the insulating layer, as shown in Patent Document 1, a conductor layer is also present in the gap between the insulating layer and the exposed inorganic filler that is buried in the insulating layer. Since adhesion between the inorganic filler and the conductor layer is weak, swelling or peeling of the conductor layer may occur if the conductor layer is present on the inorganic filler. Therefore, there is a demand for a wiring board that has excellent adhesion between the insulating layer and the conductor layer on the surface of the insulating layer in which insulating particles are dispersed.

[0008] The wiring board according to the present disclosure has a configuration as described in the section on means for solving the above problems, and thereby has excellent adhesion between the insulating layer and the conductor layer on the surface of the insulating layer in which insulating particles are dispersed.

[0009] A wiring board according to an embodiment of the present disclosure will be described with reference to Figures 1 to 3. As shown in Figure 1, the wiring board 1 according to the embodiment includes a first insulating layer 11, a second insulating layer 13, and a conductor layer 12. Figure 1 is a cross-sectional view showing the wiring board 1 according to the embodiment.

[0010] In the wiring board 1 according to one embodiment, the first insulating layer 11 corresponds to a build-up insulating layer as shown in FIG. 1. The first insulating layer 11 has a structure in which insulating particles 14 are dispersed as shown in FIG. 2. FIG. 2 is an enlarged cross-sectional view illustrating region X (main portion) in FIG. 1. The first insulating layer 11 is not particularly limited as long as it is an insulating resin 111. Examples of the insulating resin 111 include epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether resin, and liquid crystal polymer. Only one type of insulating resin 111 may be used, or two or more types may be used in combination.

[0011] Although not shown, the first insulating layer 11 may further include a reinforcing material. Examples of the reinforcing material include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more types of reinforcing materials may be used in combination. The thickness of the first insulating layer 11 is not particularly limited and is, for example, 2 μm or more and 100 μm or less.

[0012] The plurality of insulating particles 14 dispersed in the first insulating layer 11 have the function of reducing the thermal expansion coefficient of the first insulating layer 11. The insulating particles 14 are not limited, and examples thereof include inorganic insulating fillers such as silica, alumina, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of insulating particles 14 may be used, or two or more types may be used in combination.

[0013] The average particle size of the insulating particles 14 is not limited. The insulating particles 14 may have an average particle size of, for example, 0.1 μm or more and 2 μm or less, or may be 1 μm or less. The filling rate of the insulating particles 14 in the first insulating layer 11 is not limited. In order to sufficiently reduce the thermal expansion coefficient of the first insulating layer 11, the filling rate of the insulating particles 14 in the first insulating layer 11 may be 50 volume % or more and 90 volume % or less.

[0014] If the filling rate of the insulating particles 14 is 50% by volume or more and 90% by volume or less, the contact area between the conductor layer 12 (seed layer 121) described below and the insulating particles 14 (second insulating particles 14b described below) increases. As a result, the area having the amorphous structure 16 described below increases, allowing the conductor layer 12 (seed layer 121) and the insulating particles 14 to adhere more firmly to each other. The average particle diameter of the insulating particles 14 may be calculated, for example, by processing an image of the insulating particles 14 within a predetermined range taken by an electron microscope. The filling rate may also be detected by energy dispersive X-ray analysis.

[0015] Some of the insulating particles 14 are first insulating particles 14a. As shown in Fig. 2 , the first insulating particles 14a have first regions 141 exposed from the insulating resin 111 on the first surface 11a of the first insulating layer 11, and second regions 142 other than the first regions 141.

[0016] The top of the first region 141 is located farther from the second insulating layer 13 than the insulating resin 111 that is closest to the first region 141. The first surface 11a of the first insulating layer 11 corresponds to the main surface that is farther from the center in the thickness direction of the wiring substrate 1. In FIG. 1 , the first surface 11a of the first insulating layer 11 corresponds to the main surface that is farther from the second insulating layer 13, which will be described later.

[0017] 1, a conductor layer 12 is located on the first surface 11a of the first insulating layer 11. On the first surface 11a of the first insulating layer 11, the conductor layer 12 is located on the surfaces of the first regions 141 of the first insulating particles 14a and the insulating resin 111, as shown in FIG.

[0018] The conductor layer 12 is not particularly limited as long as it is a conductor. Examples of conductors include metals such as copper. Specifically, the conductor layer 12 is formed by metal plating such as copper plating. The thickness of the conductor layer 12 is not particularly limited, and is, for example, 2 μm or more and 50 μm or less at its thickest part.

[0019] As shown in FIG. 2 , the conductor layer 12 may include a seed layer 121 that covers the first regions 141 of the first insulating particles 14 a and the surface of the insulating resin 111. The seed layer 121 is formed for the purpose of improving the adhesion of the conductor layer 12 or for the purpose of serving as a conductive base metal when the conductor layer 12 is formed on an insulator by electrolytic plating. The seed layer 121 is formed, for example, of a transition metal of Groups 4, 5, 6, and 10 of the periodic table, such as titanium, nickel, or chromium, or an alloy containing such a transition metal, such as nichrome. The thickness of the seed layer 121 is not particularly limited and is, for example, 1 nm or more and 100 nm or less.

[0020] Via-hole conductors 12V are positioned to electrically connect the top and bottom of the laminated first insulating layer 11. The via-hole conductors 12V are positioned in via holes that penetrate the top and bottom surfaces of the first insulating layer 11. The via-hole conductors 12V are not limited to any particular metal (conductor), as long as they are made of a metal such as copper. The via-hole conductors 12V may be filled in the via holes as shown in FIG. 1, or may be formed only on the inner wall surfaces of the via holes. The via-hole conductors 12V are connected to the conductor layer 12 located on the surface of the first insulating layer 11.

[0021] In the wiring board 1 according to one embodiment, the conductor layer 12 is not located below the first region 141 of the first insulating particle 14a and is not located between the second region 142 of the first insulating particle 14a and the insulating resin 111. The conductor layer 12 is not located below the first region 141 of the first insulating particle 14a, in other words, means that the conductor layer 12 is not located in a position overlapping the first region 141 in a top perspective view, except for the region where the conductor layer 12 and the first region 141 are in direct contact. In other words, the conductor layer 12 is not located below the first insulating particle 14a (toward the center in the thickness direction of the wiring board 1).

[0022] If the conductor layer 12 is located below the first region 141 of the first insulating particle 14a, the conductor layer 12 may thermally expand, for example, under high-temperature conditions, and push up the conductor layer 12 above the first insulating particle 14a via the first insulating particle 14a, resulting in swelling. If the conductor layer 12 is located between the second region 142 of the first insulating particle 14a and the insulating resin 111, the first insulating particle 14a is more likely to fall off from the insulating resin 111. This may result in swelling or peeling of the conductor layer 12. Therefore, the wiring board 1 according to one embodiment in which the conductor layer 12 is not located below the first region 141 of the first insulating particle 14a or between the second region 142 of the first insulating particle 14a and the insulating resin 111 has excellent adhesion between the first insulating layer 11 and the conductor layer 12.

[0023] As shown in Fig. 1 , in the wiring board 1 according to one embodiment, the second insulating layer 13 is located approximately in the center in the thickness direction of the wiring board 1. In the wiring board 1 according to one embodiment, the second insulating layer 13 corresponds to a core insulating layer as shown in Fig. 1 . Specifically, in the wiring board 1 according to one embodiment, the first insulating layer 11 is located on each of two second surfaces 13a of the second insulating layer 13. The second surfaces 13a of the second insulating layer 13 correspond to the main surfaces of the second insulating layer 13.

[0024] Like the first insulating layer 11, the second insulating layer 13 is not particularly limited as long as it is made of insulating resin 111. Examples of insulating resin 111 include epoxy resin, bismaleimide-triazine resin, polyimide resin, polyphenylene ether resin, and liquid crystal polymer. Only one type of insulating resin 111 may be used, or two or more types may be used in combination. The insulating resin 111 contained in the second insulating layer 13 may be the same as or different from the insulating resin 111 contained in the first insulating layer 11. The thickness of the second insulating layer 13 is not particularly limited, and is, for example, 0.04 mm or more and 3 mm or less.

[0025] Although not shown, the second insulating layer 13 may further include a reinforcing material, insulating particles 14, etc. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more types of reinforcing materials may be used in combination. As described above, examples of insulating particles 14 include inorganic insulating fillers such as silica, alumina, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of insulating particles 14 may be used, or two or more types may be used in combination.

[0026] Through-hole conductors 12T are located in the second insulating layer 13 to electrically connect the top and bottom of the second insulating layer 13. The through-hole conductors 12T are located in through-holes that penetrate the top and bottom surfaces of the second insulating layer 13. The through-hole conductors 12T are not limited to any particular metal (conductor), as long as they are made of a metal such as copper. The through-hole conductors 12T may be formed only on the inner wall surfaces of the through-holes as shown in FIG. 1 , or may fill the through-holes. The through-hole conductors 12T are connected to the conductor layers 12 located on the top and bottom surfaces of the second insulating layer 13.

[0027] In the wiring board 1 according to one embodiment, the conductor layer 12 may include a protruding portion 12A that protrudes into the insulating resin 111, as shown in FIG. 3 . That is, the protruding portion 12A is located in a direction from the first surface 11a toward the second insulating layer 13. FIG. 3 is an enlarged cross-sectional view illustrating other essential parts of the wiring board 1 according to one embodiment. When the conductor layer 12 includes the protruding portion 12A, the contact area between the conductor layer 12 and the insulating resin 111 is increased, making the conductor layer 12 less likely to peel from the first insulating layer 11. The depth of the protruding portion 12A from the first surface 11a is not limited, and may be, for example, 30 nm to 1 μm at its deepest point, or 50 nm to 500 nm. A protruding portion 12A with a smaller depth is advantageous in terms of forming finer wiring.

[0028] As shown in FIG. 3 , the protrusion 12A may include voids 15. The inclusion of voids 15 in the protrusion 12A can provide a buffering effect. As a result, stress generated in the conductor layer 12 can be alleviated. The proportion of voids 15 may be, for example, 10% by volume or more and 60% by volume or less with respect to the volume of the protrusion 12A. The proportion of voids 15 can be calculated by performing image processing of cross-sectional observations from multiple directions using an electron microscope. Since the voids 15 are particularly fine, it is preferable to calculate the proportion using photographs taken with a transmission electron microscope.

[0029] As shown in FIG. 3 , in the wiring board 1 according to one embodiment, the contact portion between the conductor layer 12 (seed layer 121) and the insulating particles 14 may have an amorphous structure 16. The amorphous structure 16 is a structure that does not have a regular arrangement structure like a crystal. Specifically, at the contact portion between the conductor layer 12 (seed layer 121) and the insulating particles 14, the amorphous portion of the conductor layer 12 (seed layer 121) and the amorphous portion of the insulating particles 14 are mixed together. The presence of such an amorphous structure 16 allows the conductor layer 12 (seed layer 121) and the insulating particles 14 to adhere more firmly to each other.

[0030] As shown in FIG. 3 , when the first surface 11a of the wiring substrate 1 according to one embodiment is viewed in cross section, the plurality of insulating particles 14 may include second insulating particles 14b having a third region 143 that contacts the conductor layer 12 (seed layer 121) on the first surface 11a and a fourth region 144 that contacts the protrusion 12A (seed layer 121). In this structure, the second insulating particles 14b may be coated with insulating resin 111 between the third region 143 and the fourth region 144. Coating the third region 143 and the fourth region 144 with insulating resin 111 allows the insulating resin 111 to alleviate thermal stress caused by the difference in thermal expansion coefficient between the conductor layer 12 and the second insulating particles 14b. As a result, adhesion between the conductor layer 12 and the second insulating particles 14b is further improved.

[0031] Next, one embodiment of a method for forming a conductor layer 12 on the first surface 11a of the first insulating layer 11 will be described with reference to Figures 4A to 4E. Figures 4A to 4E are explanatory diagrams for describing one embodiment of a method for forming a conductor layer 12 on the first surface 11a of the first insulating layer 11 in a wiring board 1 according to one embodiment. Figures 4A to 4E illustrate an example of a method for forming a conductor layer 12 on the first surface 11a of the first insulating layer 11 located on the upper surface (second surface 13a) of the second insulating layer 13. Figures 4A to 4E illustrate an example in which no conductor layer 12 is present on the second surface 13a of the second insulating layer 13, and a conductor layer 12 is also located on the second surface 13a of the second insulating layer 13.

[0032] First, as shown in A of Fig. 4, an insulating sheet 111P made of insulating resin 111 having a plurality of insulating particles 14 dispersed therein is laminated on the second surface 13a of the second insulating layer 13. The lamination method may be, for example, thermocompression bonding of the insulating sheet 111P to the second surface 13a under vacuum. At this time, the insulating particles 14 are unevenly distributed on the second insulating layer 13 side, and a portion (layer) with a high proportion of the insulating resin 111 is formed near the surface on the opposite side. The thickness of the portion with a high proportion of the insulating resin 111 is, for example, approximately 10 nm or more and 100 µm or less.

[0033] Next, as shown in FIG. 4B, the resulting laminate is subjected to plasma treatment to reduce the thickness of the portion with a high proportion of insulating resin 111. Specifically, the plasma treatment may be performed so that the thickness becomes approximately 100 nm. After reducing the thickness of the portion with a high proportion of insulating resin 111, a permanganate solution treatment is performed. The permanganate solution treatment may be performed, for example, at 40° C. or higher and 60° C. or lower for 30 seconds or longer and 10 minutes or shorter. In this way, as shown in FIG. 4C, a portion of the insulating particles 14 is exposed from the surface of the insulating resin 111. The insulating particles 14 partially exposed from the surface of the insulating resin 111 correspond to first insulating particles 14a. The portion of the first insulating particles 14a exposed from the surface of the insulating resin 111 corresponds to the first region 141.

[0034] After the permanganate solution treatment, the substrate is again subjected to plasma treatment. This second plasma treatment is performed to roughen the surface of the insulating resin 111 exposed between the first insulating particles 14a. By performing the second plasma treatment, the adhesiveness of the seed layer 121 can be improved. The second plasma treatment is performed, for example, to remove a resin to a depth of approximately 100 nm to 300 nm from the surface of the insulating resin 111 exposed between the first insulating particles 14a.

[0035] 4D, a seed layer 121 is formed on the surface of the first region 141 of the first insulating particle 14a and on the surface of the insulating resin 111. As described above, the seed layer 121 is formed of a transition metal of Groups 4, 5, 6, and 10 of the periodic table, such as titanium, nickel, or chromium, or an alloy containing these transition metals, such as nichrome. The method for forming the seed layer 121 is not limited, and examples include sputtering and vapor deposition.

[0036] When sputtering is employed, the metal forming the seed layer 121 collides with the first region 141 of the first insulating particle 14a and the third region 143 and fourth region 144 of the second insulating particle 14b, which are exposed from the surface of the insulating resin 111, generating thermal energy. The generated thermal energy causes fluctuations and transitions in the atomic arrangement on the surfaces of the first region 141, the third region 143, and the fourth region 144. As a result, portions of the surfaces of the first region 141, the third region 143, and the fourth region 144 become amorphous, forming amorphous layers of the insulating particles 14.

[0037] In parallel with the formation of the amorphous layer of the insulating particles 14, a seed layer 121 is formed on the surface of the insulating resin 111 and on the surfaces of the first region 141, the third region 143, and the fourth region 144. At this time, since the insulating particles 14 are amorphous, a portion of the seed layer 121 (contact surfaces with the surfaces of the first region 141, the third region 143, and the fourth region 144) becomes amorphous, and an amorphous metal layer is formed. The formation of the amorphous metal layer reduces the intrusion of the conductor layer 12 between the insulating resin 111 and the insulating particles 14.

[0038] 4E, the conductor layer 12 is formed on the surface of the seed layer 121. Specifically, the conductor layer 12 is formed by depositing a metal such as copper by electrolytic plating. The thickness of the conductor layer 12 is as described above, and a detailed description thereof will be omitted.

[0039] Furthermore, another insulating sheet 111P made of insulating resin 111 having a plurality of insulating particles 14 dispersed therein is laminated on the upper surface, and the same procedure is repeated to obtain a wiring board 1 having a desired number of laminated layers.

[0040] The mounting structure according to the present disclosure includes a wiring board according to the present disclosure and an electronic component located in a mounting area of ​​the wiring board. Examples of the electronic component include a semiconductor integrated circuit element and an optoelectronic element. The electronic component is connected to the mounting area of ​​the wiring board via solder. The electronic component may be located on both sides of the wiring board, with the element located on one surface and, for example, a motherboard located on the other surface.

[0041] The wiring board of the present disclosure is not limited to the above-described embodiment. For example, the above-described wiring board 1 includes a second insulating layer 13 corresponding to a core insulating layer. However, in the wiring board of the present disclosure, the second insulating layer 13 is not an essential component but an optional component. Therefore, the wiring board of the present disclosure may be in the form of a so-called coreless substrate, which does not include the second insulating layer 13.

[0042] Furthermore, in the above-described wiring board 1, the amorphous structure 16 is shown only near the protrusion 12A shown in Fig. 3. However, in the wiring board 1 of the present disclosure, the amorphous structure 16 can be formed in any contact portion between the conductor layer 12 (seed layer 121) and the insulating particle 14. Therefore, the amorphous structure 16 can also be formed in at least a portion of the contact portion between the first region 141 of the first insulating particle 14a and the conductor layer 12 (seed layer 121) as shown in Fig. 2.

[0043] Although the embodiments of the present disclosure have been described above, the invention according to the present disclosure is not limited to the above-described embodiments, and various modifications and improvements are possible within the scope of the present disclosure as shown in (1) and (8) below.

[0044] (1) A wiring board according to the present disclosure includes a first insulating layer having a first surface and a conductor layer located on the first surface. The first insulating layer includes an insulating resin and a plurality of insulating particles dispersed in the insulating resin. When the first surface is viewed from above, the plurality of insulating particles include first insulating particles having a first region exposed from the insulating resin on the first surface and a second region other than the first region. The conductor layer is located on the surface of the first region and on the surface of the insulating resin, but is not located below the first region or between the second region and the insulating resin.

[0045] The present disclosure further discloses the following embodiments (2) to (7).

[0046] (2) The wiring board according to (1) above further includes a second insulating layer having a second surface, and at least one first insulating layer is located on the second surface. (3) The wiring board according to (1) or (2) above, wherein the conductor layer includes a protruding portion protruding into the insulating resin. (4) The wiring board according to (3) above, wherein the protruding portion includes a void. (5) The wiring board according to any one of (1) to (4) above, wherein the contact portion between the conductor layer and the insulating particles has an amorphous structure. (6) The wiring board according to any one of (3) to (5) above, wherein, in a cross-sectional view passing through the first surface, the plurality of insulating particles include second insulating particles having a third region in contact with the conductor layer on the first surface and a fourth region in contact with the protruding portion, and the second insulating particles are coated with insulating resin between the third and fourth regions. (7) The wiring board according to any one of (1) to (6) above, wherein the filling rate of the insulating particles is 50% by volume or more and 90% by volume or less.

[0047] (8) A mounting structure according to the present disclosure includes the wiring board according to any one of (1) to (7) above, and an electronic component located in a mounting area of ​​the wiring board.

[0048] REFERENCE SIGNS LIST 1 wiring substrate 11 first insulating layer 11a first surface 111 insulating resin 12 conductor layer 12A protrusion 12T through-hole conductor 12V via-hole conductor 121 seed layer (conductor layer) 13 second insulating layer 13a second surface 14 insulating particle 14a first insulating particle 14b second insulating particle 141 first region 142 second region 143 third region 144 fourth region 15 void 16 amorphous structure

Claims

1. a first insulating layer having a first surface; a conductor layer located on the first surface; having the first insulating layer has an insulating resin and a plurality of insulating particles dispersed in the insulating resin; the plurality of insulating particles include first insulating particles having a first region exposed from the insulating resin on the first surface when the first surface is viewed from above, and a second region other than the first region; the conductor layer is located on a surface of the first region and a surface of the insulating resin, and is not located below the first region or between the second region and the insulating resin; Wiring board.

2. a second insulating layer having a second surface; The wiring board according to claim 1 , wherein at least one of the first insulating layers is located on the second surface.

3. The wiring board according to claim 1 , wherein the conductor layer includes a protruding portion protruding into the insulating resin.

4. The wiring board according to claim 3 , wherein the protrusion includes a void.

5. The wiring board according to claim 1 , wherein a contact portion between said conductor layer and said insulating particles has an amorphous structure.

6. In a cross-sectional view passing through the first surface, the plurality of insulating particles include a second insulating particle having a third region on the first surface that contacts the conductor layer and a fourth region that contacts the protrusion; The wiring board according to claim 3 , wherein the second insulating particle is covered with the insulating resin between the third region and the fourth region.

7. 2. The wiring board according to claim 1, wherein a packing rate of the insulating particles is 50% by volume or more and 90% by volume or less.

8. A mounting structure comprising the wiring board according to any one of claims 1 to 7 and an electronic component located in a mounting area of ​​the wiring board.