Capacitor

Abstract

The capacitor (1A) includes an insulating substrate (10), a capacitance forming portion (20), a first external connection wiring, and a second external connection wiring. The insulating substrate (10) has a first main surface (10a) and a second main surface (10b) located on the opposite side of the first main surface (10a), and the capacitance forming portion (20) is provided to face the first main surface (10a). The first external connection wiring and the second external connection wiring are connected to the capacitance forming portion (20). The capacitance forming portion (20) includes a conductive metal porous body (21), a dielectric film (22) covering the surface of the metal porous body (21), and a conductive film (23) covering the dielectric film (22). Since the conductive film (23) includes the first conductive film (23A) and the second conductive films (23B) to (23E) which are discontinuous with each other, the capacitance forming portion (20) is a first capacitance defined by the first conductive film (23A), a first dielectric film (22A) which is the dielectric film (22) in a portion corresponding to the first conductive film (23A), and a first porous metal body (21A) which is the porous metal body (21) in a portion corresponding to the first dielectric film (22A). The first capacitance forming portion (20A) includes second capacitance forming portions (20B)-(20E) defined by second conductive films (23B)-(23E), second dielectric films (22B)-(22E) which are the dielectric film (22) in a portion corresponding to the second conductive films (23B)-(23E), and second porous metal bodies (21B)-(21E) which are the porous metal body (21) in a portion corresponding to the second dielectric films (22B)-(22E). The second capacitance forming portions (20B)-(20E) are located on the opposite side of the first capacitance forming portion (20A) from the first external connection wiring side. The second capacitance forming portion (20B)-(20E) is electrically connected to the first external connection wiring via the first capacitance forming portion (20A), and the first capacitance forming portion (20A) is electrically connected to the second external connection wiring via the second capacitance forming portions (20B)-(20E), such that at least the first capacitance forming portion (20A) and the second capacitance forming portions (20B)-(20E) are electrically connected in series between the first external connection wiring and the second external connection wiring.

Description

[Technical field]

[0001] The present invention relates to a capacitor having a capacitance forming portion made of a porous metal body, a dielectric film, and a conductive film. [Background technology]

[0002] For example, US Patent Publication No. 2018 / 0277306 (Patent Document 1) discloses a capacitor having a capacitance forming portion provided by a metal porous body, a dielectric film covering the surface of the metal porous body, and a conductive film covering the dielectric film. In this capacitor, the metal porous body is composed of a sintered body of metal particles, and both the dielectric layer and the conductive film are formed by atomic layer deposition (ALD). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Publication No. 2018 / 0277306 Summary of the Invention [Problem to be solved by the invention]

[0004] Here, since the capacitor disclosed in the above publication consists of a single capacitance forming portion, if electric field concentration occurs in this single capacitance forming portion, there is a problem that this will cause a short circuit, immediately impairing its function as a capacitor.

[0005] Therefore, the present invention has been made to solve the above-mentioned problems, and aims to improve the reliability after mounting in a capacitor having a capacitance forming portion consisting of a metal porous body, a dielectric film, and a conductive film. [Means for solving the problem]

[0006] A capacitor according to the present invention includes an insulating substrate, a capacitance forming portion, and first and second external connection wiring. The insulating substrate has a first main surface and a second main surface located on the opposite side to the first main surface, and the capacitance forming portion is provided to face the first main surface. The first and second external connection wirings are connected to the capacitance forming portion. The capacitance forming portion includes a conductive metal porous body, a dielectric film covering a surface of the metal porous body, and a conductive film covering the dielectric film. Since the conductive film includes a first conductive film and a second conductive film that are discontinuous with each other, the capacitance forming portion includes a first capacitance forming portion defined by the first conductive film, a first dielectric film that is the dielectric film in a portion corresponding to the first conductive film, and a first porous metal body that is the porous metal body in a portion corresponding to the first dielectric film, and a second capacitance forming portion defined by the second conductive film, a second dielectric film that is the dielectric film in a portion corresponding to the second conductive film, and a second porous metal body that is the porous metal body in a portion corresponding to the second dielectric film. The second capacitance forming portion is located on the opposite side to the first external connection wiring side as viewed from the first capacitance forming portion. In the capacitor based on the present invention, the second capacitance forming portion is electrically connected to the first external connecting wiring via the first capacitance forming portion, and the first capacitance forming portion is electrically connected to the second external connecting wiring via the second capacitance forming portion, such that at least the first capacitance forming portion and the second capacitance forming portion are electrically connected in series between the first external connecting wiring and the second external connecting wiring. Effect of the Invention

[0007] According to the present invention, in a capacitor having a capacitance forming portion made of a porous metal body, a dielectric film, and a conductive film, the reliability after mounting is improved. [Brief description of the drawings]

[0008] [Figure 1] 1A and 1B are a schematic front view and a schematic plan view of a capacitor in accordance with embodiment 1. [Diagram 2]FIG. 2 is a schematic cross-sectional view of the capacitor shown in FIG. [Diagram 3] 3 is a schematic cross-sectional view showing an enlarged view of the vicinity of a first main surface of the insulating substrate shown in FIG. 2. [Figure 4] 3 is an enlarged cross-sectional view of a main part of region III shown in FIG. 2. [Diagram 5] 3 is an enlarged cross-sectional view of a main part of an area V shown in FIG. 2. [Figure 6] 4 is a flow diagram showing a method for manufacturing the capacitor according to the first embodiment. [Figure 7] 7 is a schematic cross-sectional view showing a state after step S4 of the manufacturing flow shown in FIG. 6 is completed. [Figure 8] 7 is a schematic cross-sectional view for explaining step S5 of the manufacturing flow shown in FIG. 6. [Figure 9] 7 is a schematic cross-sectional view for explaining step S6 of the manufacturing flow shown in FIG. 6. [Figure 10] 7 is a schematic cross-sectional view for explaining step S7 of the manufacturing flow shown in FIG. 6. [Figure 11] 7 is a schematic cross-sectional view for explaining step S8 of the manufacturing flow shown in FIG. 6. [Figure 12] 7 is a schematic cross-sectional view for explaining step S9 in the manufacturing flow shown in FIG. 6. [Figure 13] 7 is a schematic cross-sectional view for explaining step S10 of the manufacturing flow shown in FIG. 6. [Figure 14] 7 is a schematic cross-sectional view for explaining step S11 of the manufacturing flow shown in FIG. 6. [Figure 15] 7 is a schematic cross-sectional view for explaining step S12 of the manufacturing flow shown in FIG. 6. [Figure 16] 7 is a schematic cross-sectional view for explaining step S13 in the manufacturing flow shown in FIG. 6. [Figure 17] 7 is a schematic cross-sectional view for explaining step S14 in the manufacturing flow shown in FIG. 6. [Figure 18] 7 is a schematic cross-sectional view for explaining step S15 in the manufacturing flow shown in FIG. 6. [Figure 19]7 is a schematic cross-sectional view for explaining step S16 in the manufacturing flow shown in FIG. 6. [Figure 20] 7 is a schematic cross-sectional view for explaining step S17 in the manufacturing flow shown in FIG. 6. [Figure 21] 7 is a schematic cross-sectional view for explaining step S18 in the manufacturing flow shown in FIG. 6. [Figure 22] 7 is a schematic cross-sectional view for explaining step S19 in the manufacturing flow shown in FIG. 6. [Figure 23] 7 is a schematic cross-sectional view for explaining step S20 of the manufacturing flow shown in FIG. 6. [Figure 24] FIG. 11 is a schematic cross-sectional view of a capacitor in accordance with a second embodiment. [Diagram 25] FIG. 11 is a schematic cross-sectional view of a capacitor in accordance with embodiment 3. [Figure 26] 1 is a graph showing the results of verification test 1. [Figure 27] 1 is a graph showing the results of verification test 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the embodiments described below, the same or common parts are denoted by the same reference numerals in the drawings, and the description thereof will not be repeated. In addition, in the embodiments described below, the terms "anode" and "cathode" are used for convenience of explanation, but the electrical polarity of the capacitor in the embodiments described below is not uniquely determined by these terms, and the electrical polarity is appropriately determined according to the usage environment of the capacitor.

[0010] (Embodiment 1) FIG. 1(A) is a schematic front view of a capacitor according to embodiment 1, and FIG. 1(B) is a schematic plan view of the capacitor as viewed from the direction of arrow IB shown in FIG. 1(A). FIG. 2 is a schematic cross-sectional view of the capacitor taken along line II-II shown in FIG. 1(B). FIG. 3 is a schematic cross-sectional view enlarging the vicinity of a first main surface of an insulating substrate shown in FIG. 2. FIG. 4 is an enlarged cross-sectional view of a main part of region IIII shown in FIG. 2. FIG. 5 is an enlarged cross-sectional view of a main part of region V shown in FIG. 2. First, the configuration of a capacitor 1A according to this embodiment will be described with reference to FIGS. 1 to 5.

[0011] 1 and 2, capacitor 1A has a flat, substantially rectangular parallelepiped outer shape, and is a so-called surface-mounted electronic component whose bottom surface is configured as a mounting surface for a wiring board or the like. Capacitor 1A mainly comprises an insulating substrate 10, a capacitance forming portion 20, and a sealing portion 30. Of these, capacitance forming portion 20 is provided so as to face insulating substrate 10. Capacitor forming portion 20 is located inside capacitor 1A by being sealed by insulating substrate 10 and sealing portion 30 provided on insulating substrate 10.

[0012] The insulating substrate 10 is provided with a first via conductor 13 and a second via conductor 14, a plurality of metal wall portions 15, a first bump 16 and a second bump 17, and a plurality of partition portions 18. The first via conductor 13, the second via conductor 14, the first bump 16, and the second bump 17 constitute a pair of external connection wirings as lead-out wirings for electrically connecting a capacitance forming portion 20 located inside the capacitor 1A to an external circuit. The pair of external connection wirings includes a first external connection wiring as an anode and a second external connection wiring as a cathode.

[0013] The insulating substrate 10 is a flat plate-shaped member having a first main surface 10a and a second main surface 10b located on the opposite side to the first main surface 10a. As the insulating substrate 10, it is preferable to use a substrate having electrical insulation properties, and it is preferable to use a substrate mainly composed of an inorganic material. More specifically, as the insulating substrate 10, it is possible to use a substrate mainly composed of any of Si, Al2O3, ZrO2, BN, Si3N4, AlN, MgO, Mg2SiO4, BaTiO3, SrTiO3, and CaTiO3.

[0014] The thickness and size of insulating substrate 10 are not particularly limited, but it is preferable to use an alumina substrate that is rectangular in plan view, for example, with a thickness of 5 μm or more and 75 μm or less and a side length of 500 μm or more and 2000 μm or less.

[0015] A first through hole 11 is provided in the insulating substrate 10, and the first through hole 11 penetrates the insulating substrate 10 so as to reach from the first main surface 10a to the second main surface 10b. The first through hole 11 is filled with a first via conductor 13. The shape of the first via conductor 13 is, for example, approximately cylindrical.

[0016] The insulating substrate 10 is provided with a second through hole 12, which penetrates the insulating substrate 10 from the first main surface 10a to the second main surface 10b. The second through hole 12 is filled with a second via conductor 14. The shape of the second via conductor 14 is, for example, approximately cylindrical.

[0017] The first via conductor 13 constitutes a part of the above-mentioned first external connection wiring. The second via conductor 14 constitutes a part of the above-mentioned second external connection wiring. In other words, the first via conductor 13 and the second via conductor 14 respectively constitute the first external connection wiring and the second external connection wiring having different polarities.

[0018] When viewed along the normal direction of first main surface 10a of insulating substrate 10, first via conductor 13 and second via conductor 14 are both provided within the region in which capacitance forming portion 20 is arranged.

[0019] The first via conductor 13 and the second via conductor 14 can be made of various wiring materials, but are preferably made of metal materials with particularly high electrical conductivity. The material of the first via conductor 13 and the second via conductor 14 can be a metal material mainly made of, for example, any of Ni, Ag, Cu, Au, Pt, Mo, and W. Here, the material of the first via conductor 13 and the second via conductor 14 can be appropriately changed according to the mounting environment of the capacitor 1A according to this embodiment, and the material of the first via conductor 13 and the material of the second via conductor 14 do not necessarily have to be the same. In this embodiment, the first via conductor 13 and the second via conductor 14 are made of Ni.

[0020] The axial length and size of the first via conductor 13 and the second via conductor 14 are not particularly limited and are appropriately set according to the thickness and size of the insulating substrate 10. Here, the axial length of the first via conductor 13 and the second via conductor 14 is preferably, for example, 5 μm or more and 75 μm or less, and their diameter is preferably, for example, 15 μm or more and 150 μm or less. In this embodiment, the first via conductor 13 and the second via conductor 14 are made of Ni and have an axial length of 75 μm and a diameter of 150 μm. The distance between the first via conductor 13 and the second via conductor 14 is 150 μm.

[0021] A first bump 16 is provided on the second main surface 10b of the insulating substrate 10 so as to cover the first via conductor 13. The first bump 16 serves as a bonding material for mounting the capacitor 1A as a surface mount electronic component on a wiring board or the like and for electrically connecting the capacitance forming portion 20 of the capacitor 1A to an external circuit, and is provided so as to protrude from the second main surface 10b of the insulating substrate 10. The shape of the first bump 16 is approximately semispherical.

[0022] Second bumps 17 are provided on the second main surface 10b of the insulating substrate 10 so as to cover the second via conductors 14. The second bumps 17 serve as a bonding material for mounting the capacitor 1A as a surface mount electronic component on a wiring board or the like and for electrically connecting the capacitance forming portion 20 of the capacitor 1A to an external circuit, and are provided so as to protrude from the second main surface 10b of the insulating substrate 10. The shape of the second bumps 17 is substantially semispherical.

[0023] The first bump 16 constitutes a part of the first external connection wiring described above. The second bump 17 constitutes a part of the second external connection wiring described above. In other words, the first bump 16 and the second bump 17 constitute the first external connection wiring and the second external connection wiring, respectively, which have different polarities.

[0024] The first bump 16 and the second bump 17 can be made of various wiring materials, but are preferably made of a metal material having particularly high electrical conductivity. The material of the first bump 16 and the second bump 17 can be a metal material mainly made of, for example, Ni, Ag, Cu, Au, or Sn. In this embodiment, the first bump 16 and the second bump 17 are made of Au.

[0025] The sizes of first bump 16 and second bump 17 are not particularly limited, and are set appropriately depending on the sizes of first via conductor 13 and second via conductor 14.

[0026] As a result, the first external connection wiring serving as the anode of the pair of external connection wirings is composed of the first via conductor 13 and the first bump 16, and the second external connection wiring serving as the cathode of the pair of external connection wirings is composed of the second via conductor 14 and the second bump 17.

[0027] The insulating substrate 10 is provided with a plurality of metal wall portions 15 standing from the first main surface 10a toward the capacitance forming portion 20. When viewed along the normal direction of the first main surface 10a, each of the plurality of metal wall portions 15 is located between the first external connection wiring and the second external connection wiring.

[0028] Hereinafter, the left-right direction in Fig. 2 is referred to as the first direction, the up-down direction in Fig. 2 is referred to as the second direction, and a direction perpendicular to both the first and second directions and perpendicular to the paper surface in Fig. 2 is referred to as the third direction. In this embodiment, the first direction coincides with the direction connecting the first external connection wiring and the second external connection wiring, and the second direction coincides with the direction parallel to the normal direction of the first main surface 10a.

[0029] The metal walls 15 extend along both the second direction and the third direction. In the present embodiment, two metal walls 15 extend linearly along both the second direction and the third direction.

[0030] The metal wall portion 15 does not necessarily have to extend linearly along the second direction. That is, the metal wall portion 15 may be erected from the first main surface 10a in a direction inclined to a considerable extent with respect to the second direction. The metal wall portion 15 does not necessarily have to extend linearly along the third direction. That is, as long as the capacitance forming portion 20 can be divided into a portion located on the first external connection wiring side and a portion located on the second external connection wiring side, the metal wall portion 15 may extend, for example, in a bent or curved shape.

[0031] The dimension (thickness) of metal wall portion 15 in the first direction is preferably, for example, 5 μm or more and 150 μm or less, and more preferably 5 μm or more and 75 μm or less, which makes it possible to effectively suppress warping that may occur in insulating substrate 10, which will be described later.

[0032] Moreover, the dimension (height) of the metal wall portion 15 in the second direction is preferably larger than the dimension (height) of the capacitance forming portion 20 in the same direction, and the dimension (width) of the metal wall portion 15 in the third direction is preferably larger than the dimension (width) of the capacitance forming portion 20 in the same direction. This also makes it possible to effectively suppress warping that may occur in the insulating substrate 10.

[0033] The material of the metal wall portion 15 may be a metal material mainly made of any one of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Ta, and Nb. The metal wall portion 15 may also be made of an alloy material mainly made of two or more selected from these metal materials. In this embodiment, the metal wall portion 15 is made of Cu.

[0034] The insulating substrate 10 is further provided with a plurality of partition walls 18 extending from the first main surface 10a toward the capacitance forming portion 20. When viewed along the normal direction of the first main surface 10a, each of the plurality of partition walls 18 is located between the first external connection wiring and the second external connection wiring.

[0035] The partition walls 18 extend along both the second direction and the third direction. In the present embodiment, two partition walls 18 extend linearly along both the second direction and the third direction.

[0036] By dividing the capacitance forming portion 20 by the partition portion 18 configured in this manner, the capacitance forming portion 20 includes a portion located on the first external connection wiring side and a portion located closer to the second external connection wiring side, which makes it possible to improve the voltage resistance of the capacitor 1A, as will be described in more detail later.

[0037] The partition wall 18 does not necessarily have to extend linearly along the second direction. That is, the partition wall 18 may be erected from the first main surface 10a in a direction inclined to a considerable extent with respect to the second direction. The partition wall 18 does not necessarily have to extend linearly along the third direction. That is, as long as the capacitance forming portion 20 can be divided into a portion located on the first external connection wiring side and a portion located on the second external connection wiring side, the partition wall 18 may extend, for example, in a bent or curved shape.

[0038] The dimension (thickness) in the first direction of the partition portion 18 is preferably, for example, 5 μm or more and 150 μm or less, and more preferably, 5 μm or more and 75 μm or less. This not only reliably prevents the conductive films 23 of the pair of capacitance forming portions separated by the partition portion 18 from being unintentionally formed continuously with each other, but also effectively suppresses warping that may occur in the insulating substrate 10.

[0039] Furthermore, the dimension (height) of the partition portion 18 in the second direction is preferably larger than the dimension (height) of the capacitance forming portion 20 in the same direction, and the dimension (width) of the partition portion 18 in the third direction is preferably larger than the dimension (width) of the capacitance forming portion 20 in the same direction. This not only reliably prevents the conductive films 23 of the pair of capacitance forming portions separated by the partition portion 18 from being unintentionally formed continuously with each other, but also effectively suppresses warping that may occur in the insulating substrate 10.

[0040] The partition wall portion 18 is preferably made of at least a part of the same material as that contained in the metal porous body 21 described later. The material of the partition wall portion 18 may be, for example, a metal material containing any one of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Ta, and Nb as a main material. The partition wall portion 18 may also be made of an alloy material containing two or more selected from these metal materials as main components. In this embodiment, the partition wall portion 18 is made of Ni.

[0041] As described above, the capacitor 1A according to the present embodiment includes two metal wall portions 15 and two partition portions 18. In the following, of the two metal wall portions 15, the one located on the first external connection wiring side is referred to as metal wall portion 15A, and the one located closer to the second external connection wiring side than the metal wall portion 15A is referred to as metal wall portion 15B. Similarly, of the two partition portions 18, the one located on the first external connection wiring side is referred to as partition portion 18A, and the one located closer to the second external connection wiring side than the partition portion 18A is referred to as partition portion 18B.

[0042] These two metal walls 15 and two partition walls 18 are arranged in the order of metal wall 15A, partition wall 18A, metal wall 15B, and partition wall 18B from the first external connection wiring side toward the second external connection wiring side (i.e., from the right side to the left side in FIG. 2). This configuration makes it possible to divide capacitance forming portion 20 into a plurality of capacitance forming portions, which will be described in detail later.

[0043] As shown in Figure 2, the capacitance forming portion 20 is arranged opposite the first main surface 10a of the insulating substrate 10, and includes a conductive metal porous body 21 having a plurality of fine pores therein, a dielectric film 22 covering the surface of the metal porous body 21, and a conductive film 23 further covering the surface of the dielectric film 22.

[0044] Although the capacitance forming portion 20 is provided so as to face the insulating substrate 10, it is not substantially directly bonded to the insulating substrate 10, or even if it is directly bonded, it is only slightly bonded to the insulating substrate 10. Here, a state in which the capacitance forming portion 20 is only slightly bonded to the insulating substrate 10 means a state in which a part of the capacitance forming portion 20 is bonded to the insulating substrate 10 at a predetermined ratio or less. In other words, a state in which the capacitance forming portion 20 is only slightly joined to the insulating substrate 10 means that, when looking at an arbitrary region on the first main surface 10a of the insulating substrate 10 in a cross section perpendicular to the extending direction of the first main surface 10a of the insulating substrate 10 as shown in Figure 3, the sum of the lengths of the line segments parallel to the first main surface 10a in the portion in which the metal porous body 21 is joined to the insulating substrate 10 directly or indirectly via the dielectric film 22 or the conductive film 23 in the arbitrary region (i.e., line segment length b1+b2 in the example shown in Figure 3) is 30% or less of the total line segment length in the arbitrary region of the first main surface 10a (i.e., line segment length a in the example shown in Figure 3).

[0045] At least some of the multiple fine pores provided inside the metal porous body 21 are not closed by the metal porous body itself, and preferably most or all of the multiple fine pores provided inside the metal porous body 21 are not closed by the metal porous body itself. Such a metal porous body is, for example, composed of a sintered body of metal particles.

[0046] The metal porous body 21 can be made of various conductive metal materials, but is preferably made of a metal material mainly made of any of Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au, and Ag. The metal porous body 21 may also be made of an alloy material mainly made of two or more selected from these metal materials. In this embodiment, the metal porous body 21 is made of Ni.

[0047] The thickness and size of the metal porous body 21 are not particularly limited, and the size is appropriately set according to the size of the insulating substrate 10. In the present embodiment, the metal porous body 21 used has a size of 1000 μm square and a thickness of 200 μm before the capacitance forming portion 20 is partitioned as described later.

[0048] Here, as described above, the metal porous body 21 is preferably composed of a sintered body of metal particles. In this case, the metal particles may have various shapes, such as a spherical shape, an oval spherical shape, a flat shape, a plate shape, a needle shape, etc. The particle size of the metal particles is not particularly limited, but the average particle size is preferably 600 nm or less, and more preferably 20 nm or more and 500 nm or less.

[0049] 2, a portion of the metal porous body 21 is joined to the second via conductor 14. Therefore, the second external connection wiring serving as the cathode described above is connected to the capacitance forming portion 20 through the second via conductor 14.

[0050] As described above, the dielectric film 22 covers the surface of the porous metal body 21. More specifically, the dielectric film 22 not only covers the surface of the porous metal body 21 in the portion located on the outermost side of the capacitance forming portion 20, but also covers the surface of the porous metal body 21 in the portion located inside the capacitance forming portion 20, which is defined by the above-mentioned fine pores that are not closed by the porous metal body itself. The dielectric film 22 also covers the surface of the partition portion 18 in the portion not joined to the porous metal body 21.

[0051] The dielectric film 22 can be made of various insulating materials, for example, AlO x , SiO x , HfO x , TiO x , TaO x , ZrO x , SiAlO x , HfAlO x , ZrAlO x , AlTiO x, SrTiO x , HfSiO x , ZrSiO x , TiZrO x , TiZrO x , TiZrWO x , SrTiO x , BaTiO x , PbTiO x , BaSrTiO x , BaCaTiO x Metal oxides such as AlN x , SiN x , AlScN x Metal nitrides such as AlO x N y , SiO x N y , HfO x N y , SiC x O y N z Among them, AlO x (e.g. Al2O3), SiO x (e.g. SiO2), HfO x , TiO x , SiAlO x , HfAlO x , ZrAlO x , HfSiO x and ZrSiO x It is preferable that the dielectric film 22 is made of any one of the above. Note that the above chemical formulas simply indicate the composition of the material and do not limit the composition. In other words, x, y, and z attached to O and N may be any value greater than 0, and the abundance ratio of each element including a metal element is arbitrary. The dielectric film 22 may be made of a laminated film consisting of a plurality of dielectric layers made of different materials. In this embodiment, the dielectric film 22 is made of AlSiO.

[0052] The dielectric film 22 can be preferably formed by a gas phase method, such as a vacuum deposition method, a chemical vapor deposition (CVD) method, a sputtering method, an atomic layer deposition (ALD) method, a pulsed laser deposition (PLD) method, or a method using a supercritical fluid, and is particularly preferably formed by an ALD method.

[0053] The thickness of the dielectric film 22 is not particularly limited, but is preferably 3 nm to 100 nm, and more preferably 5 nm to 50 nm. When the thickness of the dielectric film 22 is 3 nm or more, the withstand voltage of the capacitor 1A can be improved.

[0054] As described above, the conductive film 23 covers the surface of the dielectric film 22. More specifically, the conductive film 23 not only covers the surface of the dielectric film 22 in the portion located on the outermost side of the capacitance forming portion 20, but also covers the surface of the dielectric film 22 in the portion located inside the capacitance forming portion 20.

[0055] Here, the conductive film 23 does not cover the surface of the dielectric film 22 in the portion covering the partition wall 18 and in the portion located in the vicinity thereof. This makes the conductive film 23 in the portion on the first external connection wiring side as viewed from the partition wall 18 and the conductive film 23 in the portion on the second external connection wiring side as viewed from the partition wall 18 discontinuous with each other. This configuration makes it possible to improve the withstand voltage of the capacitor 1A, the details of which will be described later.

[0056] The conductive film 23 can be made of various conductive materials, including metal materials mainly made of any of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Zn, Ta, and Nb, alloy materials mainly made of two or more selected from these metal materials, metal nitrides such as TiN, TiAlN, TiSiN, TaN, NbN, and WN, metal oxynitrides such as TiON and TiAlON, conductive polymers such as PEDOT (poly(3,4-ethylenedioxythiophene)), polypyrrole, and polyaniline, and conductive oxide films such as RuO2, ZnO, (Zn,Al)O, and NiO. Among these, it is preferable to make the conductive film 23 of an oxide semiconductor such as TiN, TiON, ZnO, or RuO. In this embodiment, the conductive film 23 is made of TiN.

[0057] The conductive film 23 can be preferably formed by a CVD method, an ALD method, a PLD method, a plating method, a bias sputtering method, a sol-gel method, a method using conductive polymer filling, or a method using a supercritical fluid, and is particularly preferably formed by an ALD method. The conductive film 23 may also be configured as a laminated film consisting of multiple conductive layers made of different materials. In that case, a film can be formed by another method after the film is formed by the ALD method.

[0058] The thickness of the conductive film 23 is not particularly limited, but is preferably 3 nm or more, and more preferably 10 nm or more.

[0059] Here, the dielectric film 22 and the conductive film 23 cover not only the surface of the metal porous body 21 but also a predetermined portion on the first main surface 10a side of the insulating substrate 10. Furthermore, as shown in FIG. 4, the dielectric film 22 and the conductive film 23 also cover the surface of the insulating substrate 10 in a portion that defines the first through hole 11 provided in the insulating substrate 10. More specifically, at the boundary between the first via conductor 13 and the base material of the insulating substrate 10, the base material of the insulating substrate 10 is covered with the dielectric film 22, and the dielectric film 22 is covered with the conductive film 23, which is further covered with the first via conductor 13. Furthermore, the end of the first via conductor 13 on the first main surface 10a side is covered with the capacitance forming portion 20.

[0060] As a result, the conductive film 23 is joined to the first via conductor 13. Therefore, the first external connection wiring serving as the anode described above is connected to the capacitance forming portion 20 through the first via conductor 13.

[0061] 2, the sealing portion 30 is provided on the first main surface 10a of the insulating substrate 10, and seals the capacitance forming portion 20 together with the insulating substrate 10, while defining an outer surface 30a located on the opposite side to the insulating substrate 10 side as viewed from the capacitance forming portion 20. More specifically, the sealing portion 30 is located so as to cover the upper, side, and lower sides of the capacitance forming portion 20 provided to face the first main surface 10a of the insulating substrate 10, and further is located so as to fill a hole provided inside the capacitance forming portion 20.

[0062] The sealing portion 30 can be made of various insulating materials, but is preferably made of an insulating material having excellent weather resistance. The material of the sealing portion 30 can be a resin material such as polyimide resin, polybenzoxazole resin, polyethylene terephthalate resin, benzocyclobutene resin, or epoxy resin. The resin material can contain various additives, and for example, SiO2 filler or Al2O3 filler may be contained to adjust the thermal expansion coefficient. In this embodiment, the sealing portion 30 is made of epoxy resin.

[0063] In addition, when it is difficult to ensure moisture resistance with only the sealing portion 30, a moisture-resistant protective film may be formed between the capacitance forming portion 20 and the sealing portion 30. The moisture-resistant protective film can be formed, for example, by providing an inorganic insulator made of SiN, SiO2, Al2O3, HfO2, ZrO2, or the like so as to cover the capacitance forming portion 20 by a CVD method, an ALD method, or the like, before forming the sealing portion 30, or by providing an organic insulator having water repellency, such as a fluorine-based resin or a silane coupling agent resin, so as to cover the capacitance forming portion 20. Here, the moisture-resistant protective film does not necessarily need to be formed inside the capacitance forming portion 20, and it is sufficient if it is formed so as to cover only the outer surface.

[0064] The sealing portion 30 can be formed by various coating methods, such as a method using a vacuum laminator, a method using an air dispenser, a method using a jet dispenser, a screen printing method, a vacuum printing method, an electrostatic coating method, an inkjet method, a photolithography method, etc.

[0065] The thickness and size of sealing portion 30 are not particularly limited, and the size is set appropriately depending on the size of insulating substrate 10. Here, the thickness of sealing portion 30 is preferably, for example, 5 μm or more and 50 μm or less, and the size is preferably such that it covers the entire first main surface 10a of insulating substrate 10, for example.

[0066] The thickness of the sealing portion 30 described above is measured, for example, by observing a cross section perpendicular to the extending direction of the first main surface 10a of the insulating substrate 10 using an optical microscope.

[0067] Specifically, when the capacitor 1A is viewed from above, the longitudinal direction of the capacitor 1A is Lx, the lateral direction is Ly, and the thickness direction of the capacitor 1A (i.e., the normal direction of the first main surface 10a) is Lz, the capacitor 1A is first polished so that the Lx-Lz cross section of the capacitor 1A at the center in the Ly direction is exposed. The polishing is performed so that the exposed cross section is located within an error range of ±100 μm in the Ly direction with respect to the center position.

[0068] Next, a portion of the exposed cross section near the outer surface 30a is observed using an optical microscope at a magnification of 1000. The observation range of the cross section in the Lx direction is a range of ±50 μm from the center position of the cross section in the Lx direction, and is a range in which neither the metal wall portion 15 nor the partition portion 18 is provided.

[0069] Next, in the observation range of the cross section, the thickness of the sealing portion 30 in the Lz direction is measured at 10 points equally spaced in the Lx direction, and the average value is calculated. The average value thus calculated is the thickness of the sealing portion 30. Here, in FIG. 5, three of the thicknesses of the sealing portion 30 in the Lz direction measured at these 10 points are illustrated as line segment lengths e1, e2, and e3.

[0070] By virtue of the above-described configuration, in the capacitor 1A of this embodiment, the capacitance forming portion 20 consisting of the metal porous body 21, the dielectric film 22 and the conductive film 23 is sealed by the insulating substrate 10 and the sealing portion 30, and the electrical extraction of the capacitance forming portion 20 is realized by a pair of external connection wiring.

[0071] Here, as shown in FIG. 2, in the capacitor 1A of this embodiment, the capacitance forming portion 20 is partitioned into a plurality of capacitance forming portions by a plurality of metal wall portions 15 and a plurality of partition portions 18, and these multiple capacitance forming portions are arranged side by side from the first external connection wiring side toward the second external connection line side (i.e., from the right side to the left side in FIG. 2).

[0072] In this embodiment, the capacitance forming portion 20 is divided into five portions, and for ease of explanation, these five capacitance forming portions will be referred to as capacitance forming portion 20A, capacitance forming portion 20B, capacitance forming portion 20C, capacitance forming portion 20D and capacitance forming portion 20E, in that order from the one closest to the first external connection wiring.

[0073] In the present embodiment, the porous metal body 21, the dielectric film 22 and the conductive film 23 that define the capacitance generating portion 20A are referred to as the porous metal body 21A, the dielectric film 22A and the conductive film 23A, respectively. Similarly, the metal porous body 21, dielectric film 22 and conductive film 23 in the portions defining capacitance forming portion 20B are referred to as metal porous body 21B, dielectric film 22B and conductive film 23B, respectively; the metal porous body 21, dielectric film 22 and conductive film 23 in the portions defining capacitance forming portion 20C are referred to as metal porous body 21C, dielectric film 22C and conductive film 23C, respectively; the metal porous body 21, dielectric film 22 and conductive film 23 in the portions defining capacitance forming portion 20D are referred to as metal porous body 21D, dielectric film 22D and conductive film 23D, respectively; and the metal porous body 21, dielectric film 22 and conductive film 23 in the portions defining capacitance forming portion 20E are referred to as metal porous body 21E, dielectric film 22E and conductive film 23E, respectively.

[0074] In this embodiment, capacitance forming portion 20A corresponds to the first capacitance forming portion, and capacitance forming portions 20B-20E correspond to the second capacitance forming portion. Therefore, porous metal body 21A corresponds to the first porous metal body, dielectric film 22A corresponds to the first dielectric film, conductive film 23A corresponds to the first conductive film, porous metal bodies 21B-21E correspond to the second porous metal body, dielectric films 22B-22E correspond to the second dielectric film, and conductive films 23B-23E correspond to the second conductive film.

[0075] In the present embodiment, capacitance forming portion 20B corresponds to the third capacitance forming portion, and capacitance forming portions 20C-20E correspond to the fourth capacitance forming portion. Therefore, metal porous body 21B corresponds to the third metal porous body, dielectric film 22B corresponds to the third dielectric film, conductive film 23B corresponds to the third conductive film, metal porous bodies 21C-21E correspond to the fourth metal porous body, dielectric films 22C-22E correspond to the fourth dielectric film, and conductive films 23C-23E correspond to the fourth conductive film.

[0076] Furthermore, in this embodiment, the capacitance forming portion 20C corresponds to the fifth capacitance forming portion, and the capacitance forming portions 20D and 20E correspond to the sixth capacitance forming portion. Therefore, the metal porous body 21C corresponds to the fifth metal porous body, the dielectric film 22C corresponds to the fifth dielectric film, the conductive film 23C corresponds to the fifth conductive film, the metal porous bodies 21D and 21E correspond to the sixth metal porous body, the dielectric films 22D and 22E correspond to the sixth dielectric film, and the conductive films 23D and 23E correspond to the sixth conductive film.

[0077] In the present embodiment, the capacitance forming portion 20D corresponds to the seventh capacitance forming portion, and the capacitance forming portion 20E corresponds to the eighth capacitance forming portion. Therefore, the metal porous body 21D corresponds to the seventh metal porous body, the dielectric film 22D corresponds to the seventh dielectric film, the conductive film 23D corresponds to the seventh conductive film, the metal porous body 21E corresponds to the eighth metal porous body, the dielectric film 22E corresponds to the eighth dielectric film, and the conductive film 23E corresponds to the eighth conductive film.

[0078] Furthermore, in this embodiment, metal wall portion 15A and metal wall portion 15B correspond to the first metal wall portion and the second metal wall portion, respectively, and partition portion 18A and partition portion 18B correspond to the first partition portion and the second partition portion, respectively.

[0079] In the following, the configuration of the plurality of capacitance generating portions 20A to 20E and the relationship between the plurality of capacitance generating portions 20A to 20E and the metal wall portion 15 and the partition portion 18 will be described in detail.

[0080] 2 and 5, in the capacitor 1A according to this embodiment, the conductive film 23 of the capacitance forming portion 20 is configured to be discontinuous with the partition portion 18A and its vicinity as the boundary. More specifically, the conductive film 23A of the capacitance forming portion 20A, which is a portion on the first external connection wiring side as viewed from the partition portion 18A, and the conductive film 23B of the capacitance forming portion 20B, which is a portion on the second external connection wiring side as viewed from the partition portion 18A and adjacent to the partition portion 18A, are configured to be discontinuous with each other. In other words, since the conductive film 23 includes conductive films 23A and 23B which are discontinuous with each other, the capacitance forming portion 20 includes capacitance forming portion 20A defined by conductive film 23A, dielectric film 22A which is the dielectric film 22 in the portion corresponding to conductive film 23A, and metal porous body 21A which is the metal porous body 21 in the portion corresponding to dielectric film 22A, and capacitance forming portion 20B defined by conductive film 23B, dielectric film 22B which is the dielectric film 22 in the portion corresponding to conductive film 23B, and metal porous body 21B which is the metal porous body 21 in the portion corresponding to dielectric film 22B.

[0081] The conductive film 23A of the capacitance generating portion 20A is joined to the first via conductor 13, and the porous metal body 21E of the capacitance generating portion 20E is joined to the second via conductor .

[0082] The partition portion 18A divides the metal porous bodies 21A-21E into metal porous bodies 21A and metal porous bodies 21B-21E, divides the dielectric films 22A-22E into dielectric films 22A and dielectric films 22B-22E, and further divides the conductive films 23A-23E into conductive films 23A and conductive films 23B-23E.

[0083] Moreover, the partition portion 18A is not joined to the conductive film 23A and the conductive film 23B. On the other hand, the partition portion 18A is joined to the porous metal body 21A of the capacitance formation portion 20A at a side surface facing the first external connection wiring, and is joined to the porous metal body 21B of the capacitance formation portion 20B at a side surface facing the second external connection wiring.

[0084] With this configuration, the capacitance forming portions 20B to 20E are electrically connected to the first external connection wiring via the capacitance forming portion 20A, and the capacitance forming portion 20A is electrically connected to the second external connection wiring via the capacitance forming portions 20B to 20E. As a result, the capacitance forming portions 20A and the capacitance forming portions 20B to 20E are electrically connected in series between the first external connection wiring and the second external connection wiring via the partition portion 18A.

[0085] In capacitor 1A, metal wall portion 15A is provided on insulating substrate 10, so that capacitance forming portion 20B-20E of capacitance forming portion 20 is divided into capacitance forming portion 20B and capacitance forming portions 20C-20E which are the remaining portions. Capacitance forming portion 20B is located on the first external connection wiring side, and capacitance forming portions 20C-20E are located on the second external connection wiring side of capacitance forming portion 20B.

[0086] Here, in capacitor 1A, metal wall portion 15A is joined to conductive film 23B of capacitance forming portion 20B, but is not joined to porous metal body 21B and dielectric film 22B. Also, metal wall portion 15A is joined to conductive film 23C of capacitance forming portion 20C, which is a portion of capacitance forming portions 20C-20E adjacent to metal wall portion 15A, but is not joined to porous metal body 21C and dielectric film 22C.

[0087] With this configuration, the capacitance forming portions 20C to 20E are electrically connected to the first external connection wiring via the capacitance forming portions 20B, and the capacitance forming portion 20B is electrically connected to the second external connection wiring via the capacitance forming portions 20C to 20E. As a result, the capacitance forming portions 20B and the capacitance forming portions 20C to 20E are electrically connected in series between the first external connection wiring and the second external connection wiring.

[0088] Furthermore, in capacitor 1A, conductive film 23 in portions of capacitance forming portion 20 corresponding to capacitance forming portions 20C-20E is configured to be discontinuous with partition portion 18B and its vicinity as the boundary. More specifically, conductive film 23C of capacitance forming portion 20C, which is the portion on the first external connection wiring side as viewed from partition portion 18B, and conductive film 23D of capacitance forming portion 20D, which is the portion on the second external connection wiring side as viewed from partition portion 18B, are configured to be discontinuous with each other. In other words, since the conductive film 23 includes conductive film 23C and conductive film 23D which are discontinuous with each other, the capacitance forming portion 20 includes capacitance forming portion 20C defined by conductive film 23C, dielectric film 22C which is the dielectric film 22 in the portion corresponding to conductive film 23C, and metal porous body 21C which is the metal porous body 21 in the portion corresponding to dielectric film 22C, and capacitance forming portion 20D defined by conductive film 23D, dielectric film 22D which is the dielectric film 22 in the portion corresponding to conductive film 23D, and metal porous body 21D which is the metal porous body 21 in the portion corresponding to dielectric film 22D.

[0089] The partition portion 18B divides the metal porous bodies 21C-21E into metal porous body 21C and metal porous bodies 21D, 21E, divides the dielectric films 22C-22E into dielectric film 22C and dielectric films 22D, 22E, and further divides the conductive films 23C-23E into conductive film 23C and conductive films 23D, 23E.

[0090] Moreover, the partition portion 18B is not joined to the conductive film 23C and the conductive film 23D. On the other hand, the partition portion 18B is joined to the porous metal body 21C of the capacitance formation portion 20C at a side surface facing the first external connection wiring, and is joined to the porous metal body 21D of the capacitance formation portion 20D at a side surface facing the second external connection wiring.

[0091] With this configuration, the capacitance forming portions 20D and 20E are electrically connected to the first external connection wiring via the capacitance forming portion 20C, and the capacitance forming portion 20C is electrically connected to the second external connection wiring via the capacitance forming portions 20D and 20E. As a result, the capacitance forming portions 20C and the capacitance forming portions 20D and 20E are electrically connected in series between the first external connection wiring and the second external connection wiring via the partition portion 18B.

[0092] In capacitor 1A, metal wall portion 15B is provided on insulating substrate 10, so that capacitance forming portion 20D, 20E of capacitance forming portion 20 is divided into capacitance forming portion 20D and capacitance forming portion 20E. Capacitance forming portion 20D is located on the first external connection wiring side, and capacitance forming portion 20E is located closer to the second external connection wiring side than capacitance forming portion 20D.

[0093] Here, in capacitor 1A, metal wall portion 15B is joined to conductive film 23D of capacitance forming portion 20D, but is not joined to porous metal body 21D and dielectric film 22D. Also, metal wall portion 15B is joined to conductive film 23E of capacitance forming portion 20E, but is not joined to porous metal body 21E and dielectric film 22E.

[0094] With this configuration, the capacitance forming portion 20E is electrically connected to the first external connection wiring via the capacitance forming portion 20D, and the capacitance forming portion 20D is electrically connected to the second external connection wiring via the capacitance forming portion 20E. As a result, the capacitance forming portion 20D and the capacitance forming portion 20E are electrically connected in series between the first external connection wiring and the second external connection wiring.

[0095] Due to the above-mentioned configuration, in capacitor 1A of this embodiment, capacitance forming portion 20A, capacitance forming portion 20B, capacitance forming portion 20C, capacitance forming portion 20D and capacitance forming portion 20E are electrically connected in series in this order between the first external connection wiring and the second external connection wiring.

[0096] In the present embodiment, as described above, five capacitance forming parts 20A-20E are connected in series. However, the number of capacitance forming parts connected in series (i.e., the number of partitions of the capacitance forming part 20) is not limited to five as long as it is plural, and may be two or more, four or less, or six or more. When the number of capacitance forming parts connected in series is changed, the number of discontinuous parts of the conductive film 23 added to a capacitor having one discontinuous part of the conductive film 23 and the number of metal wall parts 15 may be appropriately changed. In this case, the discontinuous parts of the conductive film 23 and the metal wall parts 15 need to be alternately arranged from the first external connection wiring side toward the second external connection line side.

[0097] In the capacitor 1A according to the present embodiment, the conductive film 23A and the conductive film 23B are formed so as to be discontinuous with each other, and the metal porous body 21A and the metal porous body 21B are joined to the partition wall 18A provided between the capacitance forming portion 20A and the capacitance forming portion 20B, thereby partitioning the capacitance forming portion 20A and the capacitance forming portion 20B from each other and electrically connecting them in series. However, the partition wall 18A is not necessarily provided in the capacitor 1A. That is, even when the metal porous body 21A and the metal porous body 21B are joined to each other without providing the partition wall 18A, it is possible to partition the capacitance forming portion 20A and the capacitance forming portion 20B from each other and electrically connect them in series as described above, as long as the conductive film 23A and the conductive film 23B are configured so as to be discontinuous with each other. This point is also true for the relationship between the partition wall 18B and the capacitance forming portion 20C and the capacitance forming portion 20D.

[0098] Fig. 6 is a flow diagram showing a method for manufacturing a capacitor according to this embodiment. Figs. 7 to 23 are schematic cross-sectional views for explaining each step of the manufacturing flow shown in Fig. 6. Next, an example of a specific manufacturing method for manufacturing the capacitor 1A according to this embodiment described above will be described with reference to Figs. 6 to 23.

[0099] The manufacturing method of capacitor 1A described below is a method in which an assembly of in-process capacitors is produced by performing processing all at once up to a mid-point of the manufacturing process, the assembly is then cut into individual pieces, and the individual pieces are further processed to mass-produce multiple capacitors 1A simultaneously.

[0100] First, as shown in Fig. 6, in step S1, a green sheet is produced. In detail, Al2O3 powder and glass powder are weighed, and the Al2O3 powder and glass powder are mixed with an organic solvent such as toluene or ethanol, and a binder such as polyvinyl butyral. Then, the mixture is formed into a sheet, and a green sheet that is the base of an insulating substrate is produced. After the green sheet is produced, it is cut to prepare a plurality of green sheets.

[0101] Next, in step S2, a first through hole and a second through hole are formed in some of the green sheets as shown in Fig. 6. In detail, a first through hole 11 to be filled later with a first via conductor which is a part of an anode is provided at a predetermined position of the green sheet, and a second through hole 12 to be filled later with a second via conductor which is a part of a cathode is provided.

[0102] Here, the method of forming the first through hole 11 and the second through hole 12 is not particularly limited, but for example, the first through hole 11 and the second through hole 12 can be formed by irradiating a green sheet with a laser beam. Additionally, the first through hole 11 and the second through hole 12 may be formed by processing using a mechanical puncher or sandblasting.

[0103] 6, in step S3, second via conductors are formed in the green sheet in which the first through holes and the second through holes are formed. In detail, a conductive paste is applied to the green sheet so as to fill the second through holes 12. At this time, the first through holes 11 are prevented from being filled with the conductive paste.

[0104] Here, the method for applying the conductive paste is not particularly limited, but for example, a screen printing method can be used.

[0105] Next, as shown in Fig. 6, in step S4, the green sheet is fired. In detail, a green sheet not provided with the first through hole and the second through hole is superimposed on the green sheet after the conductive paste is applied in step S3, and the superimposed green sheets are pressed together. Then, the laminate of the pressed green sheets is degreased, and then the laminate of the degreased green sheets is fired.

[0106] Here, when stacking the green sheets, a green sheet not provided with the first through hole 11 and the second through hole 12 is stacked on the other main surface opposite to the one main surface of the green sheet coated with the conductive paste. In addition, when pressing the green sheets, for example, a uniaxial press machine can be used. Furthermore, the green sheets are fired, for example, in the air at a temperature condition of 700°C to 1000°C.

[0107] By going through steps S1 to S4 described above, an insulating substrate as shown in Fig. 7 is obtained. Here, the insulating substrate is a so-called multi-substrate in which insulating substrates that will ultimately be included in each of a plurality of capacitors are connected in a matrix form, but in Fig. 7, attention is focused on only one of them, insulating substrate 10, and its surrounding area is omitted and shown by dashed lines.

[0108] In addition, in the above, an example was given of the case where the first through hole and the second through hole are formed in step S2, and then the second via conductor is provided in step S3, but it is also possible to form only the second through hole first, and then form the first through hole after the second via conductor is formed.

[0109] In the above, the case where the green sheet and the conductive paste are fired at the same time has been described as an example, but the second via conductor 14 and the first through hole 11 may be provided after firing an insulating substrate without through holes, etc. In that case, the first through hole 11 and the second through hole 12 may be provided in the fired insulating substrate by, for example, a sandblasting method, a wet etching method, a dry etching method, etc., and then the conductive paste may be applied and fired. In addition, the second via conductor 14 may be formed by sputtering, vapor deposition, plating, etc.

[0110] Next, as shown in FIG. 6, in step S5, a conductive paste for forming the metal porous body 21 constituting the capacitance forming portion 20 is applied.

[0111] More specifically, as shown in Fig. 8, a conductive paste 21p for forming a metal porous body 21 described later is applied onto the first main surface 10a of the insulating substrate 10. The conductive paste 21p is prepared by weighing and mixing conductive metal particles 21a and a binder 21b made of an organic solvent such as terpineol and an ethyl cellulose varnish, and then using a rolling machine. The conductive paste 21p thus prepared is applied onto the first main surface 10a of the insulating substrate 10 so as to have a pattern shape that is rectangular in plan view as a whole, and is then dried.

[0112] At this time, the conductive paste 21p is applied on the first main surface 10a in a layer shape having a predetermined thickness by being applied in multiple applications. The conductive paste 21p applied on the first main surface 10a is subjected to a firing process described later to become the above-mentioned metal porous body 21. In this embodiment, the conductive paste 21p containing the metal particles 21a made of Ni is used.

[0113] Here, prior to application of the conductive paste 21p, it is preferable that a blocking portion for blocking the first through hole 11 provided in the insulating substrate 10 is provided by applying an epoxy resin or the like (not shown) to the first through hole 11. This makes it possible to prevent the conductive paste 21p from penetrating into the inside of the first through hole 11.

[0114] Next, in step S6, a partition groove is formed as shown in Fig. 6. More specifically, as shown in Fig. 9, a plurality of partition grooves 18h extending in a direction intersecting a direction connecting the first through hole 11 and the second via conductor 14 (i.e., a direction perpendicular to the paper surface in Fig. 9) are formed in the conductive paste 21p in a portion located between the first through hole 11 and the second via conductor 14 when viewed along the normal direction of the first main surface 10a, thereby dividing the conductive paste 21p into a plurality of portions. The plurality of partition grooves 18h will be filled with the partition in a partition formation step described later.

[0115] In the present embodiment, two partition grooves 18h are formed so as to be positioned side by side from the first through hole 11 side toward the second via conductor 14 side (i.e., from the right side to the left side in FIG. 9). As a result, the conductive paste 21p is partitioned into a portion corresponding to the above-mentioned porous metal body 21A, a portion corresponding to porous metal body 21B and porous metal body 21C, and a portion corresponding to porous metal body 21D and porous metal body 21E.

[0116] Here, the method for forming the partition groove 18h is not particularly limited, but for example, the partition groove 18h can be formed by irradiating the conductive paste 21p with a laser beam. Alternatively, the partition groove 18h may be formed by processing using a mechanical puncher or sandblasting.

[0117] Next, as shown in Fig. 6, in step S7, a partition wall is formed. More specifically, as shown in Fig. 10, a conductive paste is filled into the partition wall grooves 18h so as to fill the partition wall grooves 18h. The two partition wall portions 18 thus formed are provided standing from the first main surface 10a toward the conductive paste 21p. Of these two partition wall portions 18, the one located on the first external connection wiring side corresponds to the above-mentioned partition wall portion 18A, and the one located on the second external connection wiring side of the partition wall portion 18A corresponds to the partition wall portion 18B.

[0118] In the present embodiment, Ni paste is used as the conductive paste filled in the partition grooves 18h. In this configuration, it is possible to form the metal wall 15 containing the same material as the material contained in the metal particles 21a (i.e., the material contained in the porous metal body 21), and thus the partition 18 and the porous metal body 21 are firmly metal-bonded to each other through a firing process described later.

[0119] Here, the method of applying the conductive paste to be filled into the partition groove 18h is not particularly limited, but for example, an inkjet method can be used.

[0120] Next, in step S8, a metal wall groove is formed as shown in Fig. 6. More specifically, as shown in Fig. 11, a metal wall groove 15h extending in a direction intersecting a direction connecting the first through hole 11 and the second via conductor 14 is formed in a portion of the conductive paste 21p located between the partition wall 18A and the partition wall 18B when viewed along the normal direction of the first main surface 10a (i.e., a portion of the conductive paste 21p corresponding to the porous metal body 21B and the porous metal body 21C), thereby dividing the conductive paste 21p in the above-mentioned portion into a portion corresponding to the porous metal body 21B and a portion corresponding to the porous metal body 21C. Similarly, a groove 15h for a metal wall portion is formed in the conductive paste 21p in a portion located between the partition portion 18A and the second via conductor 14 when viewed along the normal direction of the first main surface 10a (i.e., the conductive paste 21p in the portion corresponding to the metal porous body 21D and the metal porous body 21E), extending along a direction intersecting the direction connecting the first through hole 11 and the second via conductor 14, thereby dividing the conductive paste 21p in the above portion into a portion corresponding to the metal porous body 21D and a portion corresponding to the metal porous body 21E.

[0121] These two metal wall grooves 15h will be filled with the metal wall in a metal wall forming step described later.

[0122] Here, the method of forming the metal wall groove 15h is not particularly limited, but for example, the metal wall groove 15h can be formed by irradiating the conductive paste 21p with a laser beam. Alternatively, the metal wall groove 15h may be formed by processing using a mechanical puncher or sandblasting.

[0123] Next, in step S9, the conductive paste and the partition wall are fired as shown in Fig. 6. More specifically, as shown in Fig. 12, the conductive paste 21p and the partition wall 18 are fired, whereby adjacent metal particles 21a contained in the conductive paste 21p are sintered to be metallically bonded, and the partition wall 18 is bonded to the metal particles 21a adjacent thereto. This firing also bonds the second via conductor 14 to the metal particles 21a adjacent thereto.

[0124] As a result, in the present embodiment, partition portion 18A is joined to adjacent porous metal body 21A and porous metal body 21B, and partition portion 18B is joined to adjacent porous metal body 21C and porous metal body 21D. Furthermore, second via conductor 14 is joined to adjacent porous metal body 21E.

[0125] During the above-mentioned baking, the blocking portion made of epoxy resin or the like that blocks the first through hole 11 is also burned away by the heat.

[0126] Prior to the above-mentioned firing, the insulating substrate 10 is degreased, and then the above-mentioned conductive paste 21p and the partition portion 18 are fired at a temperature of 400°C to 900°C in a reducing atmosphere containing, for example, a mixture of nitrogen and hydrogen.

[0127] The firing atmosphere is preferably a reducing atmosphere as described above, but may be set to an atmosphere having an equilibrium oxygen partial pressure or lower of the metal selected as the main component of the metal particles 21a.

[0128] Here, as described above, the partition wall 18 is configured to contain Ni, which is the same material as that contained in the metal particles 21a in the conductive paste 21p. In this configuration, the metal particles 21a and the partition wall 18 are sintered by the above-mentioned firing to form a metallic bond, and this improves the mechanical strength of the bond between the metal particles 21a and the partition wall 18.

[0129] Next, in step S10, a dielectric film is formed as shown in Fig. 6. More specifically, as shown in Fig. 13, a dielectric film 22 is formed so as to cover the first main surface 10a, the porous metal body 21, and the surface of the partition portion 18 in a portion not joined to the porous metal body 21, and to cover the surface of the insulating substrate 10 in a portion defining the first through hole 11 provided in the insulating substrate 10.

[0130] Here, the method for forming the dielectric film 22 is not particularly limited, but preferably, the ALD method is used. By using the ALD method, the raw material of the dielectric film 22 can be supplied by gas, which makes it possible to select the material and adjust the film thickness at the atomic layer level. Therefore, even if the fine holes provided inside the metal porous body 21 are extremely small, a homogeneous and dense dielectric film 22 can be formed. Furthermore, by using the ALD method, it becomes possible to easily cover with the dielectric film 22 the surface of the insulating substrate 10 in the portion that defines the first through hole 11 provided in the insulating substrate 10.

[0131] When the dielectric film 22 is formed by using this ALD method, it is preferable to use a source gas that has a high vapor pressure and is easy to gasify, as well as high thermal stability and high reactivity, so that the source gas can reach the fine holes provided inside the metal porous body 21 and the inside of the first through hole 11 provided in the insulating substrate 10. From this viewpoint, for example, AlO x When forming a film, it is preferable to use TMA (trimethylaluminum) as a raw material, and SiO x When forming a film, it is preferable to use TDMAS (trisdimethylaminosilane) as a raw material. In this embodiment, the dielectric film 22 is formed by using the ALD method.

[0132] The dielectric film 22 is formed under temperature conditions of, for example, 150° C. or higher and 400° C. or lower, although this varies depending on the film formation method and film formation materials.

[0133] Next, in step S11, a first resist film is formed as shown in Fig. 6. More specifically, in step S10, a first resist film 24 is formed so as to cover a portion of the dielectric film 22 formed in step S10 that covers the surface of the partition wall portion 18 and a portion adjacent thereto as shown in Fig. 14.

[0134] Here, the method for forming the first resist film 24 is not particularly limited to this. In this embodiment, a photosensitive liquid resist is uniformly applied to a predetermined surface of the dielectric film 22 by a spin coat method, and this is locally exposed to light using a photomask. Next, unnecessary photosensitive liquid resist is removed by immersing in a developer, and the remaining photosensitive liquid resist is dried in an oven or the like, thereby forming the first resist film 24.

[0135] Next, a conductive film is formed in step S12 as shown in Fig. 6. More specifically, a conductive film 23 is formed so as to cover the dielectric film 22 formed in step S10 and the first resist film 24 formed in step S11 as shown in Fig. 15.

[0136] Here, the method for forming the conductive film 23 is not particularly limited as described above, but preferably, the ALD method is used. By using the ALD method, the raw material of the conductive film 23 can be supplied as a gas, so that it is possible to select the material and adjust the film thickness at the atomic layer level. Therefore, even if the fine holes provided inside the metal porous body 21 are extremely small, a homogeneous and dense conductive film 23 can be formed. In addition, by using the ALD method, it is possible to easily cover the dielectric film 22 provided inside the first through hole 11 of the insulating substrate 10 with the conductive film 23. The conductive film 23 is formed at a temperature condition of, for example, 200° C. or more and 600° C. or less, although it varies depending on the film forming method and the film forming material.

[0137] Next, in step S13, the first resist film is peeled off as shown in Fig. 6. More specifically, as shown in Fig. 16, the first resist film 24 and the conductive film 23 formed on the surface of the first resist film 24 are peeled off using a stripping solution or the like. By peeling off a part of the conductive film 23 in this manner, a discontinuous part is formed in the conductive film 23 at that part.

[0138] Next, in step S14, a second resist film is formed as shown in Fig. 6. More specifically, as shown in Fig. 17, a second resist film 25 is formed so as to cover the dielectric film 22 in a portion exposed to the outside by removing the first resist film 24 and the conductive film 23 in a portion other than the portion formed at the positions corresponding to the plurality of metal wall grooves 15h. The method of forming the second resist film 25 is similar to the method of forming the first resist film 24 described above.

[0139] By forming the second resist film 25 in this manner, it is possible to prevent a base material constituting the metal wall portion from being unintentionally formed in a portion other than the metal wall portion groove 15h in the process of forming the metal wall portion described later.

[0140] Next, as shown in Fig. 6, in step S15, a metal wall portion is formed. More specifically, as shown in Fig. 18, two metal wall portions 15 are formed so as to fill two metal wall portion grooves 15h. The two metal wall portions 15 are erected from the first main surface 10a toward the capacitance forming portion 20. Of these two metal wall portions 15, the one located on the first external connection wiring side corresponds to the above-mentioned metal wall portion 15A, and the one located on the second external connection wiring side of the metal wall portion 15A corresponds to the metal wall portion 15B.

[0141] The metal wall portion 15 thus formed is joined to the conductive film 23 at a portion formed at a position corresponding to the metal wall groove 15h. As a result, in this embodiment, the metal wall portion 15A is joined to the adjacent conductive films 23B and 23C, and the metal wall portion 15B is joined to the adjacent conductive films 23D and 23E.

[0142] Here, the metal wall portion 15 may be formed by a thick film forming method such as electrolytic plating or a screen printing method, etc. In the present embodiment, the metal wall portion 15 made of Cu is formed by electrolytic plating.

[0143] Next, in step S16, the second resist film is stripped off as shown in Fig. 6. More specifically, as shown in Fig. 19, the second resist film 25 is stripped off by using a stripping liquid or the like.

[0144] Next, in step S17, a sealing portion is formed as shown in Fig. 6. More specifically, a sealing portion 30 is provided on the first main surface 10a of the insulating substrate 10 on which the capacitance forming portion 20 is provided, so as to cover the capacitance forming portion 20, as shown in Fig. 20.

[0145] The sealing portion 30 is formed, for example, by so-called compression molding. More specifically, a resin sheet is placed on the first main surface 10a of the insulating substrate 10, and in this state, a vacuum laminator is used to draw a vacuum, so that the resin sheet is adhered to the first main surface 10a of the insulating substrate 10. Then, in this state, the resin sheet is heated to 50°C to 100°C to laminate the capacitance forming portion 20, and thereafter, the resin sheet is heated to 100°C to 200°C to perform full curing, thereby forming the sealing portion 30. Note that the method of forming the sealing portion 30 is not limited to the above-mentioned compression molding, and may be performed by so-called transfer molding.

[0146] As a result, the capacitance forming portion 20 is sealed by the insulating substrate 10 and the sealing portion 30, preventing the intrusion of moisture into the capacitance forming portion 20 from the outside and ensuring moisture resistance. In addition, the capacitance forming portion 20 is covered by the sealing portion 30, and the capacitance forming portion 20 is physically protected by the sealing portion 30. Note that the curing conditions shown above are merely examples and can be changed in various ways.

[0147] Next, in step S18, the insulating substrate is ground, as shown in Fig. 6. More specifically, as shown in Fig. 21, a flat cutting is performed on the second main surface 10b side of the insulating substrate 10, which is located opposite to the side on which the capacitance forming portion 20 is provided.

[0148] Here, when grinding is performed, a grinding tape (not shown) is attached to the capacitance forming portion 20 side, and the insulating substrate 10 in the portions blocking the second via conductors 14 and the first through holes 11 is removed by plane cutting. As a result, the ends of the second via conductors 14 are exposed on the second main surface 10b side.

[0149] Next, in step S19, the insulating substrate is divided into individual pieces, as shown in Fig. 6. More specifically, as shown in Fig. 22, the insulating substrate 10 is cut into individual pieces into a plurality of capacitors 1A that are connected to each other.

[0150] Here, when singulating, a groove is formed in at least one of the insulating substrate 10 and the sealing portion 30, and a force is applied to the insulating substrate 10 and the sealing portion 30 so as to bend the insulating substrate 10 and the sealing portion 30 from the groove, thereby breaking the insulating substrate 10 and the sealing portion 30. Note that diamond scribing, laser scribing, dicing, etc. can be used as a method for forming the groove. Alternatively, singulation may be performed by directly cutting the insulating substrate 10 and the sealing portion 30 by scribing or dicing.

[0151] Next, in step S20, a first via conductor is formed in the insulating substrate as shown in Fig. 6. More specifically, a first via conductor 13 is formed so as to fill a first through hole 11 provided in the insulating substrate 10 as shown in Fig. 23.

[0152] The first via conductor 13 can be formed by, for example, electrolytic plating. In this case, the portion other than the first through hole 11 is covered with an ultraviolet-curable resin film as a mask (not shown), and electrolytic plating is performed in this state, so that only the inside of the first through hole 11 can be covered with a plating film. After the electrolytic plating is completed, the ultraviolet-curable resin film as a mask is removed.

[0153] The first via conductor 13 thus formed is joined to the conductive film 23 at its side surface and at the end surface of the first via conductor 13 facing the capacitance forming portion 20 (see FIG. 4). As a result, the first via conductor 13 is connected to the capacitance forming portion 20 via the conductive film 23 that covers it.

[0154] Next, in step S21, a first bump and a second bump are formed on the insulating substrate as shown in Fig. 6. More specifically, a first bump 16 and a second bump 17 are formed on the second main surface 10b of the insulating substrate 10 so as to cover the first via conductor 13 and the second via conductor 14 provided on the insulating substrate 10 as shown in Fig. 2.

[0155] The first bump 16 and the second bump 17 can be formed simultaneously by, for example, electrolytic plating. In this case, the portions other than the vicinity of the portions where the first via conductor 13 and the second via conductor 14 are exposed are covered with an ultraviolet-curable resin film as a mask (not shown), and electrolytic plating is performed in this state, whereby the first bump 16 and the second bump 17 can be formed to protrude from the second main surface 10b. After the electrolytic plating is completed, the ultraviolet-curable resin film as a mask is removed.

[0156] The method of forming the second via conductor 14, the first bump 16, and the second bump 17 described above is not limited to the method using electrolytic plating described above, but may also be a combination of a screen printing method, an inkjet method, a dispenser method, or the like using a conductive paste and firing. In this case, it is preferable that the conductive paste contains a metal or a sintering aid that can be fired at a low temperature so that firing can be performed under temperature conditions that do not affect the resin that constitutes the sealing portion 30.

[0157] By going through the steps S1 to S21 described above, the capacitor 1A of the above-mentioned embodiment 1 is manufactured, i.e., a capacitor in which capacitance forming portion 20A, capacitance forming portion 20B, capacitance forming portion 20C, capacitance forming portion 20D and capacitance forming portion 20E are electrically connected in series in this order.

[0158] In the above-described method for manufacturing the capacitor 1A according to the present embodiment, the sealing portion is formed before the grinding process, but the sealing portion may be formed after the grinding process. Also, the grinding process may be performed after the individual pieces are separated.

[0159] Here, in the capacitor 1A according to the present embodiment, as described above, the conductive film 23 includes the conductive film 23A and the conductive film 23B which are discontinuous with each other, so that the capacitance forming portion 20 includes the capacitance forming portion 20A defined by the conductive film 23A, the dielectric film 22A, and the porous metal body 21A, and the capacitance forming portion 20B defined by the conductive film 23B, the dielectric film 22B, and the porous metal body 21B. The capacitance forming portions 20B-20E are electrically connected to the first external connection wiring via the capacitance forming portion 20A, and the capacitance forming portion 20A is electrically connected to the second external connection wiring via the capacitance forming portions 20B-20E, so that the capacitance forming portions 20A and the capacitance forming portions 20B-20E are electrically connected in series between the first external connection wiring and the second external connection wiring via the partition portion 18A.

[0160] In this way, by providing discontinuous portions of the conductive film 23, the capacitance forming portion 20 is divided into multiple portions, and by electrically connecting these divided capacitance forming portions in series, it is possible to improve the voltage resistance of the capacitor 1A.

[0161] In other words, if a voltage is applied to a capacitor having a single capacitance forming portion, causing an electric field concentration in the single capacitance forming portion, this will cause a short circuit and immediately impair its function as a capacitor.

[0162] In this regard, in the capacitor 1A according to the present embodiment, the capacitance forming portion 20 is divided into a plurality of portions, and these divided capacitance forming portions are electrically connected in series. This configuration makes it possible to disperse the electric field concentration occurring when a voltage is applied to the capacitor 1A to each of the divided capacitance forming portions, thereby improving the withstand voltage of the capacitor 1A. This makes it possible to improve the reliability of the capacitor 1A after it is mounted.

[0163] Furthermore, because capacitance forming portion 20 is divided into a plurality of portions and electrically connected in series as described above, even if an electric field concentration occurs in one of the divided capacitance forming portions 20 and the portion is short-circuited (i.e., damaged by voltage), the capacitance of the remaining capacitance forming portion 20 can be secured as the capacitance of capacitor 1A. Therefore, a certain capacitance can be secured even after voltage damage, resulting in capacitor 1A with improved reliability after mounting.

[0164] Therefore, by making the capacitor 1A in this embodiment, the reliability after mounting is improved in a capacitor having a capacitance forming portion 20 consisting of a metal porous body 21, a dielectric film 22, and a conductive film 23.

[0165] The effect of improving the withstand voltage of the capacitor 1A described above has been confirmed by Verification Test 1, which will be described later.

[0166] In addition, in the capacitor 1A according to the present embodiment, the volume of the metal porous body of any one of the capacitance forming parts 20A-20E may be configured to be smaller than the volume of the metal porous body of the other capacitance forming parts adjacent thereto, and the thickness of the dielectric film of the capacitance forming part may be configured to be thinner than the thickness of the dielectric film of the other capacitance forming parts. In this case, by configuring the volume of the metal porous body to be small, it is possible to intentionally make it easier for electric field concentration to occur in the capacitance forming part configured to have a small capacitance, so that the capacitance of the capacitor 1A after voltage damage can be maximized.

[0167] In addition, when manufacturing a capacitor 1A in which the thickness of the dielectric film 22 varies for each of the multiple capacitance forming portions as described above, a resist film can be formed between the above-mentioned step S10 (i.e., forming the dielectric film) and step S11 (i.e., forming the first resist film) so as to cover the dielectric film 22 in the portions other than the portions to be formed thick, and in this state, the dielectric film 22 can be formed again and then the resist film can be peeled off.

[0168] Furthermore, in the capacitor 1A of this embodiment, as described above, the partition portion 18 is joined to a portion of the metal porous body 21 of the capacitance forming portion 20 in a state in which it stands from the first main surface 10a toward the capacitance forming portion 20.

[0169] In this configuration, when insulating substrate 10 is warped due to stress caused by the difference in thermal expansion coefficient between insulating substrate 10 and capacitance forming portion 20 during a manufacturing process involving heat treatment of capacitor 1A (i.e., a firing process, a dielectric film forming process, a conductive film forming process, etc.), the so-called anchor effect obtained by partition portion 18 can effectively suppress warping of insulating substrate 10 and peeling of dielectric film 22 and conductive film 23 from insulating substrate 10 caused by the warping of insulating substrate 10. This makes it possible to improve the mounting stability and post-mounting reliability of capacitor 1A.

[0170] Furthermore, in capacitor 1A according to the present embodiment, a plurality of partition walls 18 are provided. This can further suppress the warping of insulating substrate 10. The effect of suppressing warping of insulating substrate 10 by providing partition walls 18 has been confirmed by verification test 2, which will be described later.

[0171] Furthermore, in capacitor 1A according to the present embodiment, as described above, capacitance forming portion 20 is not substantially directly joined to insulating substrate 10, or even if it is directly joined, it is only slightly joined. This also makes it possible to suppress the warping that occurs in insulating substrate 10 described above.

[0172] In addition, in capacitor 1A according to this embodiment, as described above, a plurality of metal wall portions 15 are provided standing from first main surface 10a toward capacitance forming portion 20, and are joined to a portion of conductive film 23 of capacitance forming portion 20. These metal wall portions 15 also provide an anchor effect similar to that of partition portion 18, and therefore can suppress warping of insulating substrate 10 as described above. The effect of providing metal wall portions 15 in suppressing warping of insulating substrate 10 has been confirmed by verification test 2 described below.

[0173] In capacitor 1A according to the present embodiment, the distance between partition portion 18A and first via conductor 13 is set shorter than the distance between partition portion 18A and metal wall portion 15A, thereby disposing partition portion 18A and metal wall portion 15A at a considerable distance from each other, thereby further suppressing warpage occurring in insulating substrate 10. Similarly, the distance between metal wall portion 15B and second via conductor 14 is set shorter than the distance between metal wall portion 15B and partition portion 18B, thereby disposing metal wall portion 15B and partition portion 18B at a considerable distance from each other, thereby further suppressing warpage occurring in insulating substrate 10.

[0174] Furthermore, in capacitor 1A of this embodiment, as described above, when viewed along the normal direction of first main surface 10a of insulating substrate 10, first via conductor 13 and second via conductor 14 are both arranged within the area in which capacitance forming portion 20 is arranged.

[0175] In this configuration, neither the first external connection wiring nor the second external connection wiring is disposed to the side of the capacitance forming portion 20, so that it is possible to minimize the sealing portion 30 in the portion disposed to the side of the capacitance forming portion 20. As a result, not only can the capacitor 1A be made smaller than conventional capacitors, but the volume occupied by the portions of the capacitor 1A other than the capacitance forming portion 20 is reduced, so that the capacitance is increased.

[0176] In addition, in the above configuration, the first via conductor 13 and the second via conductor 14 are positioned so as to penetrate the insulating substrate 10 in the thickness direction, and therefore, the via conductors with different polarities are arranged close to each other with their current paths facing in opposite directions. Therefore, the magnetic fields generated in these via conductors by the current flow act to cancel each other out, so that the so-called ESL (equivalent series inductance) can be reduced.

[0177] Furthermore, in capacitor 1A of this embodiment, as described above, at the boundary between first via conductor 13 and the base material of insulating substrate 10, the base material of insulating substrate 10 is covered with dielectric film 22, which is in turn covered with conductive film 23, and conductive film 23 is further covered by first via conductor 13.

[0178] With this configuration, the adhesion between the base material of insulating substrate 10 and first via conductor 13 is improved compared to when the base material of insulating substrate 10 and first via conductor 13 are directly bonded, and therefore the intrusion of moisture through this portion is suppressed, resulting in a capacitor with excellent moisture resistance.

[0179] In the capacitor 1A according to the present embodiment, the metal porous body 21 is made of a sintered body of metal particles, as described above. In this case, the metal particles are metallically bonded to each other, improving the mechanical strength of the capacitance forming portion 20, and the bonding area between the metal particles is also increased, so that a so-called low ESR (equivalent series resistance) can be achieved. Furthermore, there is an effect that a metal porous body having open pores can be formed relatively easily.

[0180] Here, the capacitor 1A according to the present embodiment may be configured such that when the capacitance of any one of the capacitance forming parts 20A-20E is compared with the capacitance of the remaining capacitance forming parts, the capacitance of the capacitance forming part is 5% to 50% of the capacitance of the remaining capacitance forming parts. That is, in the capacitor 1A, the capacitance forming parts 20 may be partitioned such that the capacitances of these five capacitance forming parts 20A-20E are substantially equal, and in this case, even if a short circuit occurs in any capacitance forming part, the fluctuation in the capacitance of the capacitor 1A before and after the short circuit can be made to be approximately the same.

[0181] Furthermore, capacitor 1A according to this embodiment may be configured so that the thickness of the dielectric film of any one of capacitance forming portions 20A-20E is at least twice as thick as the thickness of the dielectric film of the other capacitance forming portion adjacent thereto. In this configuration, it is possible to make it difficult for electric field concentration to occur in the capacitance forming portion having the thick dielectric film.

[0182] (Embodiment 2) 24 is a schematic cross-sectional view of a capacitor according to embodiment 2. Hereinafter, a capacitor 1B according to the present embodiment will be described with reference to FIG.

[0183] As shown in FIG. 24, when compared with capacitor 1A of embodiment 1 described above, capacitor 1B of this embodiment differs in the number of compartments in capacitance forming portion 20 due to the fact that there is only one metal wall portion 15.

[0184] More specifically, in capacitor 1B of the present embodiment, partition portion 18C, metal wall portion 15C and partition portion 18D are arranged in this order from the first external connecting wiring side to the second external connecting line side (i.e., from the right side to the left side in FIG. 24).

[0185] As a result, in this embodiment, the capacitance forming portion 20 is divided into four. For convenience of explanation, these four capacitance forming portions are referred to as capacitance forming portion 20F, capacitance forming portion 20G, capacitance forming portion 20H, and capacitance forming portion 20I in order from the one closest to the first external connection wiring. In this embodiment, the capacitance forming portion 20F corresponds to the first capacitance forming portion, and the capacitance forming portions 20G to 20I correspond to the second capacitance forming portion. Furthermore, the capacitance forming portion 20G corresponds to the third capacitance forming portion, and the capacitance forming portions 20H and 20I correspond to the fourth capacitance forming portion. Furthermore, the capacitance forming portion 20H corresponds to the fifth capacitance forming portion, and the capacitance forming portion 20I corresponds to the sixth capacitance forming portion.

[0186] In the present embodiment, the partition wall portion 18C and the partition wall portion 18D correspond to the first partition wall portion and the second partition wall portion, respectively, and the metal wall portion 15C corresponds to the first metal wall portion.

[0187] Here, the relationship between the partition wall portion 18C and the capacitance forming portion 20F and the capacitance forming portion 20G is similar to the relationship between the partition wall portion 18A and the capacitance forming portion 20A and the capacitance forming portion 20B in the above-mentioned embodiment 1. Moreover, the relationship between the metal wall portion 15C and the capacitance forming portion 20G and the capacitance forming portion 20H is similar to the relationship between the metal wall portion 15A and the capacitance forming portion 20B and the capacitance forming portion 20C in the above-mentioned embodiment 1. Moreover, the relationship between the partition wall portion 18D and the capacitance forming portion 20H and the capacitance forming portion 20I is similar to the relationship between the partition wall portion 18B and the capacitance forming portion 20C and the capacitance forming portion 20D in the above-mentioned embodiment 1.

[0188] In the capacitor 1B, the second via conductor 14 is joined to the conductive film 23 of the capacitance forming portion 20. More specifically, the second via conductor 14 is joined to the conductive film 23I of the capacitance forming portion 20I.

[0189] Due to the above-mentioned configuration, in capacitor 1B of this embodiment, capacitance forming portion 20F, capacitance forming portion 20G, capacitance forming portion 20H and capacitance forming portion 20I are electrically connected in series in this order between the first external connection wiring and the second external connection wiring.

[0190] Even when configured in this manner, the same effects as those described in the above-mentioned embodiment 1 can be obtained, and the reliability after mounting is improved in a capacitor having a capacitance forming portion 20 consisting of a metal porous body 21, a dielectric film 22, and a conductive film 23.

[0191] Capacitor 1B according to the present embodiment can be manufactured by a method similar to the manufacturing method of capacitor 1A according to the first embodiment described above.

[0192] (Embodiment 3) 25 is a schematic cross-sectional view of a capacitor according to embodiment 3. Hereinafter, a capacitor 1C according to the present embodiment will be described with reference to this FIG.

[0193] As shown in FIG. 25, when compared with capacitor 1A of embodiment 1 described above, capacitor 1C of this embodiment has a different number of compartments in capacitance forming portion 20 due to the fact that there is only one partition portion 18 and that no metal wall portion 15 is provided.

[0194] More specifically, in the capacitor 1C according to this embodiment, when viewed along the normal direction of the first main surface 10a, one partition wall portion 18E is located between the first external connection wiring and the second external connection wiring. As a result, in the capacitor 1C, the capacitance forming portion 20 is divided into two. For convenience of explanation, these two capacitance forming portions are referred to as capacitance forming portion 20J and capacitance forming portion 20K in order from the one closest to the first external connection wiring. In this embodiment, the capacitance forming portion 20J corresponds to the first capacitance forming portion, and the capacitance forming portion 20K corresponds to the second capacitance forming portion. In addition, the partition wall portion 18E corresponds to the first partition wall portion.

[0195] Here, the relationship between the partition wall portion 18E and the capacitance forming portions 20J and 20K is similar to the relationship between the partition wall portion 18A and the capacitance forming portions 20A and 20B in the first embodiment described above.

[0196] In the capacitor 1C, the second via conductor 14 is joined to the conductive film 23 of the capacitance forming portion 20. More specifically, the second via conductor 14 is joined to the conductive film 23K of the capacitance forming portion 20K.

[0197] Due to the above-mentioned configuration, in the capacitor 1C of this embodiment, the capacitance forming portion 20J and the capacitance forming portion 20K are electrically connected in series between the first external connection wiring and the second external connection wiring, in this order.

[0198] Even when configured in this manner, the same effects as those described in the above-mentioned embodiment 1 can be obtained, and the reliability after mounting is improved in a capacitor having a capacitance forming portion 20 consisting of a metal porous body 21, a dielectric film 22, and a conductive film 23.

[0199] Capacitor 1C of the present embodiment can be manufactured by a manufacturing method that excludes the steps related to the metal wall portion (i.e., steps S8, S14 to S16 in FIG. 6) from the manufacturing method of capacitor 1A of embodiment 1 described above.

[0200] (Verification test 1) In verification test 1, several types of capacitors with different numbers of metal walls and partitions (i.e., the number of compartments in the capacitance forming portion) were prepared, and the withstand voltages of these capacitors when voltage was applied were measured to verify the effect that dividing the capacitance forming portion and connecting them in series has on the withstand voltage of the capacitor.

[0201] In the verification test 1, a total of four types of capacitors were prepared: a capacitor in which the capacitance forming portion is divided into two by providing one metal wall portion (hereinafter, for convenience of explanation, referred to as a two-continuous type); a capacitor in which the capacitance forming portion is divided into four by providing two metal wall portions and one partition portion (four-continuous type); a capacitor in which the capacitance forming portion is divided into six by providing three metal wall portions and two partition portions (six-continuous type); and a capacitor in which the capacitance forming portion is divided into eight by providing four metal wall portions and three partition portions (eight-continuous type). In addition, a capacitor in which the capacitance forming portion is not divided (i.e., neither the metal wall portion nor the partition portion is provided) was prepared as a comparative example. The four-continuous type capacitor has the same configuration as the capacitor 1B according to the above-mentioned second embodiment (see FIG. 24). In the six-continuous type and eight-continuous type capacitors, the metal wall portions and the partition portions are alternately arranged from the first external connection wiring side toward the second external connection line side.

[0202] The insulating substrate of the capacitor prepared in the verification test 1 is made of Al2O3 and has a size of 1000 μm square and a thickness of 75 μm. The first via conductor and the second via conductor are made of Ni and are cylindrical with a diameter of 150 μm and an axial length of 75 μm. The distance between the first via conductor 13 and the second via conductor 14 is 150 μm. The first bump 16 and the second bump 17 are made of Au. The metal porous body is made of Ni and has a size of 1000 μm square and a thickness of 200 μm before the capacitance forming portion is partitioned. The dielectric film is made of AlSiO, and the conductive film is made of TiN.

[0203] The metal wall portion prepared in the verification test 1 was made of Cu and had a height (vertical dimension in FIG. 2) of 200 μm, a thickness (horizontal dimension in FIG. 2) of 70 μm, and a width (dimension perpendicular to the paper surface in FIG. 2) of 1000 μm. The partition portion was made of Ni and had a height of 200 μm, a thickness of 70 μm, and a width of 1000 μm.

[0204] The effect of dividing the capacitance forming parts and connecting them in series on the withstand voltage of the capacitor was verified using a withstand voltage tester (B1500A, Keysight) according to the method described below. Note that the number of samples for each type of capacitor mentioned above in this verification was five.

[0205] First, both terminals of the capacitor were connected to the terminals of the voltage resistance tester. Next, a voltage was applied to the capacitor at a current value of 0.05A and a voltage rise speed of 0.67mV / sec. Next, the voltage when the current value fell below 0.05A was measured as the voltage resistance.

[0206] FIG. 26 is a graph showing the results of the verification test 1 performed by the above-mentioned method. The graph shows the withstand voltage of each type of capacitor. As a result of the verification test 1, it was found that by dividing the capacitance forming portion by providing a partition portion and connecting them in series, the withstand voltage of the capacitor is improved compared to the case where the capacitance forming portion is a single portion that is not divided (i.e., the comparative example). Furthermore, it was found that the effect of improving the withstand voltage of the capacitor becomes more remarkable by increasing the number of metal walls and partition portions to increase the number of capacitance forming portions electrically connected in series (i.e., the number of partitions of the capacitance forming portion). From the above, it was found that the withstand voltage of the capacitor is improved by dividing the capacitance forming portion and connecting them in series.

[0207] (Verification test 2) In verification test 2, several types of capacitors with different numbers of metal walls and partitions (i.e., the number of partitions in the capacitance forming portion) were prepared, and the amount of deflection of the insulating substrate when a load was applied to these capacitors was confirmed to verify the effect of the metal walls and partitions on the bending strength (mechanical strength) of the capacitor. Note that the types of capacitors prepared in verification test 2 were the same as those prepared in the above-mentioned verification test 1.

[0208] The effect of the metal wall and the partition on the bending strength of the capacitor was verified using a deflection tester (DFT-30, manufactured by Oyo Denki Co., Ltd.) according to the method described below. The number of samples for each type of capacitor mentioned above in the verification was five.

[0209] First, a glass epoxy board with a long side length of 100 mm, a short side length of 40 mm, and a thickness of 1.6 mm was prepared. Next, a 10 μm thick solder paste was printed on the land of the glass epoxy board using a metal mask. Next, a capacitor was mounted on the land on which the solder paste was printed, and the board was heat treated at 250°C for 15 minutes.

[0210] Next, the glass epoxy board on which the capacitor was mounted was set on the mounting table of the deflection test device. Next, the terminals for measuring the capacitor capacitance were brought into contact with the lands of the glass epoxy board. The frequency for measuring the capacitor capacitance was 1 kHz. Next, a pressure tool was placed on the main surface of the pair of main surfaces of the glass epoxy board on which the capacitor was not mounted, and pressure was applied to the glass epoxy board. The pressure conditions were a rise and fall speed of the pressure tool of 0.1 mm / sec and a load of 0.003 N.

[0211] Next, the amount of deflection of the capacitor was measured when the capacitance of the capacitor became 10% or less of the capacitance before the pressure was applied (i.e., when the capacitor was short-circuited). The amount of deflection means the amount of displacement of the insulating substrate, at the part located at the center when viewed from above, from the initial position along the normal direction of the first main surface of the insulating substrate (i.e., the amount of displacement along the up-down direction in FIG. 2).

[0212] FIG. 27 is a graph showing the results of verification test 2 conducted by the above-mentioned method. The graph shows the amount of deflection of each type of capacitor. As a result of verification test 2, it was found that the provision of the partition wall on the insulating substrate increases the amount of deflection of the insulating substrate compared to when the partition wall is not provided (i.e., the comparative example). Furthermore, it was found that the effect of increasing the amount of deflection becomes more pronounced by increasing the number of metal wall parts and partition wall parts. In this way, since the amount of deflection increases when an external force is applied to the capacitor and it shorts out, it was found that the bending strength of the capacitor is improved by providing the metal wall parts and partition wall parts.

[0213] (Additional Note) The characteristic configurations of the capacitors disclosed in the above-mentioned embodiments can be summarized as follows.

[0214] [Appendix 1] an insulating substrate having a first main surface and a second main surface located on the opposite side to the first main surface; a capacitance generating portion provided so as to face the first main surface; a first external connection wiring and a second external connection wiring connected to the capacitance forming portion; the capacitance forming portion includes a conductive porous metal body, a dielectric film covering a surface of the porous metal body, and a conductive film covering the dielectric film; Since the conductive film includes a first conductive film and a second conductive film that are discontinuous with each other, the capacitance forming portion includes a first capacitance forming portion defined by the first conductive film, a first dielectric film that is the dielectric film in a portion corresponding to the first conductive film, and a first porous metal body that is the porous metal body in a portion corresponding to the first dielectric film, and a second capacitance forming portion defined by the second conductive film, a second dielectric film that is the dielectric film in a portion corresponding to the second conductive film, and a second porous metal body that is the porous metal body in a portion corresponding to the second dielectric film, the second capacitance forming portion is located on an opposite side to the first external connection wiring side as viewed from the first capacitance forming portion, A capacitor in which the second capacitance forming portion is electrically connected to the first external connecting wiring via the first capacitance forming portion, and the first capacitance forming portion is electrically connected to the second external connecting wiring via the second capacitance forming portion, such that at least the first capacitance forming portion and the second capacitance forming portion are electrically connected in series between the first external connecting wiring and the second external connecting wiring.

[0215] [Appendix 2] a first partition wall made of metal that divides the metal porous body into the first metal porous body and the second metal porous body, divides the dielectric film into the first dielectric film and the second dielectric film, and further divides the conductive film into the first conductive film and the second conductive film; The capacitor described in Appendix 1, wherein the first partition portion is bonded to the first metal porous body and the second metal porous body, but is not bonded to the first conductive film and the second conductive film, such that at least the first capacitance forming portion and the second capacitance forming portion are electrically connected in series between the first external connection wiring and the second external connection wiring via the first partition portion.

[0216] [Appendix 3] 3. The capacitor according to claim 2, wherein the first partition wall is provided upright from the first main surface.

[0217] [Appendix 4] 4. The capacitor according to claim 2 or 3, wherein the first partition portion has a thickness of 5 μm or more.

[0218] [Appendix 5] 5. The capacitor according to claim 4, wherein the first partition portion has a thickness of 75 μm or less.

[0219] [Appendix 6] A capacitor described in any one of Appendix 2 to 5, wherein a height of the first partition portion in a direction parallel to a normal direction of the first main surface is greater than a height of the capacitance forming portion in a direction parallel to the normal direction of the first main surface.

[0220] [Appendix 7] A capacitor described in any one of Appendix 2 to 6, wherein a width of the first partition portion in a direction intersecting both the thickness direction and the height direction of the first partition portion is larger than a width of the capacitance forming portion in a direction intersecting both the thickness direction and the height direction of the first partition portion.

[0221] [Appendix 8] 8. The capacitor according to claim 1, wherein the thickness of the first dielectric film is at least twice as thick as the thickness of the second dielectric film, or the thickness of the second dielectric film is at least twice as thick as the first dielectric film.

[0222] [Appendix 9] 8. The capacitor according to claim 1, wherein the capacitance of the first capacitance forming portion is 5% to 50% of the capacitance of the second capacitance forming portion.

[0223] [Appendix 10] the first external connection wiring has a first via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface; the second external connection wiring has a second via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface; when viewed along a normal direction of the first main surface, the first via conductor is provided within a region in which the first capacitance forming portion is disposed, A capacitor described in any of Appendix 1 to 9, wherein, when viewed along the normal direction of the first main surface, the second via conductor is provided within an area in which the second capacitance forming portion is arranged.

[0224] [Appendix 11] a first metal wall portion partitioning the second capacitance forming portion so that the second capacitance forming portion includes a third capacitance forming portion located on the first external connection wiring side and a fourth capacitance forming portion located on the second external connection wiring side with respect to the third capacitance forming portion; the third capacitance-forming portion includes a third metal porous body which is the second metal porous body in a portion defining the third capacitance-forming portion, a third dielectric film which is the second dielectric film in a portion corresponding to the third metal porous body, and a third conductive film which is the second conductive film in a portion corresponding to the third dielectric film, the fourth capacitance forming portion includes a fourth metal porous body which is the second metal porous body in a portion defining the fourth capacitance forming portion, a fourth dielectric film which is the second dielectric film in a portion corresponding to the fourth metal porous body, and a fourth conductive film which is the second conductive film in a portion corresponding to the fourth dielectric film, A capacitor as described in any of Appendix 1 to 10, wherein the first metal wall portion is joined to the third conductive film and the fourth conductive film, so that the fourth capacitance forming portion is electrically connected to the first external connection wiring via the third capacitance forming portion, and the third capacitance forming portion is electrically connected to the second external connection wiring via the fourth capacitance forming portion, thereby at least the third capacitance forming portion and the fourth capacitance forming portion are electrically connected in series between the first external connection wiring and the second external connection wiring.

[0225] [Appendix 12] Since the fourth conductive film includes a fifth conductive film and a sixth conductive film that are discontinuous with each other, the fourth capacitance forming portion includes a fifth capacitance forming portion defined by the fifth conductive film, a fifth dielectric film which is the fourth dielectric film in a portion corresponding to the fifth conductive film, and a fifth porous metal body which is the fourth porous metal body in a portion corresponding to the fifth dielectric film, and a sixth capacitance forming portion defined by the sixth conductive film, a sixth dielectric film which is the fourth dielectric film in a portion corresponding to the sixth conductive film, and a sixth porous metal body which is the fourth porous metal body in a portion corresponding to the sixth dielectric film, the sixth capacitance forming portion is located on an opposite side to the first external connection wiring side as viewed from the fifth capacitance forming portion, The capacitor described in Appendix 11, wherein the sixth capacitance forming portion is electrically connected to the first external connecting wiring via the fifth capacitance forming portion, and the fifth capacitance forming portion is electrically connected to the second external connecting wiring via the sixth capacitance forming portion, such that at least the fifth capacitance forming portion and the sixth capacitance forming portion are electrically connected in series between the first external connecting wiring and the second external connecting wiring.

[0226] [Appendix 13] a second partition wall made of metal that divides the fourth metal porous body into the fifth metal porous body and the sixth metal porous body, divides the fourth dielectric film into the fifth dielectric film and the sixth dielectric film, and further divides the fourth conductive film into the fifth conductive film and the sixth conductive film, The capacitor described in Appendix 12, wherein the second partition portion is bonded to the fifth metal porous body and the sixth metal porous body, but is not bonded to the fifth conductive film and the sixth conductive film, such that at least the fifth capacitance forming portion and the sixth capacitance forming portion are electrically connected in series between the first external connection wiring and the second external connection wiring via the second partition portion.

[0227] [Appendix 14] a second metal wall portion partitioning the sixth capacitance-forming portion so that the sixth capacitance-forming portion includes a seventh capacitance-forming portion located on the first external connection wiring side and an eighth capacitance-forming portion located on the second external connection wiring side relative to the seventh capacitance-forming portion, the seventh capacitance-forming portion includes a seventh metal porous body which is the sixth metal porous body in a portion defining the seventh capacitance-forming portion, a seventh dielectric film which is the sixth dielectric film in a portion corresponding to the seventh metal porous body, and a seventh conductive film which is the sixth conductive film in a portion corresponding to the seventh dielectric film, the eighth capacitance-forming portion includes an eighth metal porous body which is the sixth metal porous body in a portion defining the eighth capacitance-forming portion, an eighth dielectric film which is the sixth dielectric film in a portion corresponding to the eighth metal porous body, and an eighth conductive film which is the sixth conductive film in a portion corresponding to the eighth dielectric film, The capacitor described in Appendix 12 or 13, wherein the second metal wall portion is joined to the seventh conductive film and the eighth conductive film, so that the eighth capacitance forming portion is electrically connected to the first external connection wiring via the seventh capacitance forming portion, and the seventh capacitance forming portion is electrically connected to the second external connection wiring via the eighth capacitance forming portion, thereby at least the seventh capacitance forming portion and the eighth capacitance forming portion are electrically connected in series between the first external connection wiring and the second external connection wiring.

[0228] (Other forms, etc.) The shape, configuration, size, number, material, and the like of each part shown in the above-mentioned embodiment of the present invention can be modified in various ways without departing from the spirit of the present invention.

[0229] Furthermore, the characteristic configurations shown in the above-mentioned embodiments of the present invention can naturally be combined with each other within the scope permitted in light of the spirit of the present invention.

[0230] As such, the above-described embodiments disclosed herein are illustrative in all respects and are not restrictive. The technical scope of the present invention is defined by the claims, and includes all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0231] 1A to 1C capacitors, 10 insulating substrate, 10a first main surface, 10b second main surface, 11 first through hole, 12 second through hole, 13 first via conductor, 14 second via conductor, 15, 15A to 15C metal wall portion, 15h groove for metal wall portion, 16 first bump, 17 second bump, 18, 18A to 18E partition portion, 18h groove for partition portion, 20, 20A to 20K capacitance forming portion, 21, 21A to 21K metal porous body, 21a metal particles, 21b binder, 21p conductive paste, 22, 22A to 22K dielectric film, 23, 23A to 23K conductive film, 24 first resist film, 25 second resist film, 30 sealing portion, 30a outer surface.

Claims

1. an insulating substrate having a first main surface and a second main surface located opposite to the first main surface; a capacitance generating portion provided so as to face the first main surface; a first external connection wiring and a second external connection wiring connected to the capacitance forming portion; the capacitance forming portion includes a conductive porous metal body, a dielectric film covering a surface of the porous metal body, and a conductive film covering the dielectric film; Since the conductive film includes a first conductive film and a second conductive film that are discontinuous with each other, the capacitance forming portion includes a first capacitance forming portion defined by the first conductive film, a first dielectric film that is the dielectric film in a portion corresponding to the first conductive film, and a first porous metal body that is the porous metal body in a portion corresponding to the first dielectric film, and a second capacitance forming portion defined by the second conductive film, a second dielectric film that is the dielectric film in a portion corresponding to the second conductive film, and a second porous metal body that is the porous metal body in a portion corresponding to the second dielectric film, the second capacitance forming portion is located on an opposite side to the first external connection wiring side as viewed from the first capacitance forming portion, the second capacitance forming portion is electrically connected to the first external connection wiring via the first capacitance forming portion, and the first capacitance forming portion is electrically connected to the second external connection wiring via the second capacitance forming portion, whereby at least the first capacitance forming portion and the second capacitance forming portion are electrically connected in series between the first external connection wiring and the second external connection wiring; a metal partition wall that divides the metal porous body into the first metal porous body and the second metal porous body, divides the dielectric film into the first dielectric film and the second dielectric film, and further divides the conductive film into the first conductive film and the second conductive film, A capacitor in which the partition portion is bonded to the first metal porous body and the second metal porous body, but is not bonded to the first conductive film and the second conductive film, such that at least the first capacitance forming portion and the second capacitance forming portion are electrically connected in series via the partition portion between the first external connection wiring and the second external connection wiring.

2. The capacitor according to claim 1 , wherein the partition portion is provided upright on the first main surface.

3. The capacitor according to claim 1 , wherein the partition portion has a thickness of 5 μm or more.

4. The capacitor according to claim 3 , wherein the partition portion has a thickness of 75 μm or less.

5. The capacitor according to claim 1 , wherein a height of the partition portion in a direction parallel to a normal direction of the first main surface is greater than a height of the capacitance generating portion in a direction parallel to the normal direction of the first main surface.

6. 2. The capacitor according to claim 1, wherein a width of the partition portion in a direction intersecting both a thickness direction and a height direction of the partition portion is larger than a width of the capacitance forming portion in a direction intersecting both the thickness direction and the height direction of the partition portion.

7. the first external connection wiring has a first via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface; the second external connection wiring has a second via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface; When viewed along a normal direction of the first main surface, the first via conductor is provided within a region in which the first capacitance forming portion is disposed, The capacitor according to claim 1 , wherein, when viewed along a normal direction of the first main surface, the second via conductor is provided within a region in which the second capacitance forming portion is disposed.

8. An insulating substrate having a first main surface and a second main surface located opposite the first main surface; a capacitance generating portion provided so as to face the first main surface; a first external connection wiring and a second external connection wiring connected to the capacitance forming portion; the capacitance forming portion includes a conductive porous metal body, a dielectric film covering a surface of the porous metal body, and a conductive film covering the dielectric film; Since the conductive film includes a first conductive film and a second conductive film that are discontinuous with each other, the capacitance forming portion includes a first capacitance forming portion defined by the first conductive film, a first dielectric film that is the dielectric film in a portion corresponding to the first conductive film, and a first porous metal body that is the porous metal body in a portion corresponding to the first dielectric film, and a second capacitance forming portion defined by the second conductive film, a second dielectric film that is the dielectric film in a portion corresponding to the second conductive film, and a second porous metal body that is the porous metal body in a portion corresponding to the second dielectric film, the second capacitance forming portion is located on an opposite side to the first external connection wiring side as viewed from the first capacitance forming portion, the second capacitance forming portion is electrically connected to the first external connection wiring via the first capacitance forming portion, and the first capacitance forming portion is electrically connected to the second external connection wiring via the second capacitance forming portion, whereby at least the first capacitance forming portion and the second capacitance forming portion are electrically connected in series between the first external connection wiring and the second external connection wiring; the first external connection wiring has a first via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface; the second external connection wiring has a second via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface; When viewed along a normal direction of the first main surface, the first via conductor is provided within a region in which the first capacitance forming portion is disposed, A capacitor, wherein when viewed along a normal direction of the first main surface, the second via conductor is provided within a region in which the second capacitance forming portion is arranged.

9. 9. The capacitor according to claim 1, wherein the thickness of the first dielectric film is at least twice as thick as the thickness of the second dielectric film, or the thickness of the second dielectric film is at least twice as thick as the first dielectric film.

10. 9. The capacitor according to claim 1, wherein the capacitance of the first capacitance forming portion is 5% to 50% of the capacitance of the second capacitance forming portion.

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