Display device, and method for manufacturing same

Abstract

According to the present invention, a TFT layer (20a) on a resin substrate (10) has a polysilicon semiconductor layer (12) formed from a polysilicon film. In conductor regions (12b, 12c), first TFTs (9aa) electrically connected to each other via a source line (18f) are provided corresponding to a plurality of sub-pixels (P) that constitute a display region (D). A transparent back gate layer (BGa), which is formed from an oxide semiconductor film and has a conductive portion (BGac) obtained by making at least a portion thereof conductive, is provided in a lower layer of the TFT layer (20a). The conductive portion (BGac) overlaps at least a channel region (12a) in a plane view, and is electrically connected to the source line (18f).

Description

Display device and manufacturing method thereof

[0001] The present invention relates to a display device and a manufacturing method thereof.

[0002] In recent years, self-luminous organic electroluminescence (EL) display devices using organic electroluminescence (EL) elements have been attracting attention as display devices that can replace liquid crystal display devices. For example, flexible organic EL display devices have been proposed, which include a flexible resin substrate as a base substrate and a thin film transistor (TFT) layer formed on the TFT layer. The TFTs drive the organic EL elements for each subpixel constituting the display area. Well-known examples of semiconductor layers constituting the TFTs include a polysilicon semiconductor layer made of polysilicon with high mobility and an oxide semiconductor layer made of an oxide semiconductor such as In—Ga—Zn—O with low leakage current.

[0003] In flexible organic EL display devices, TFTs (hereinafter also referred to as "polysilicon TFTs") having a polysilicon semiconductor layer, particularly polysilicon TFTs having a top-gate structure in which a gate electrode is formed above the polysilicon semiconductor layer, may have unstable threshold (Vth) characteristics due to polarization of the resin substrate. To stabilize the threshold of the polysilicon TFT, a metal film or the like is formed below the polysilicon TFT via an inorganic film, and this metal film serves as a back gate. For example, in the display device described in Patent Document 1, an additional film is disposed below the polysilicon TFT (switching element) to suppress characteristic changes due to light intrusion from the backside of the channel and to provide a back gate effect.

[0004] Japanese Patent Application Laid-Open No. 2020-27862

[0005] However, in flexible organic EL display devices, when a fingerprint sensor, a camera, or the like is placed under the panel, a high panel aperture ratio (transmittance) is required. However, metal films and the additional film having a light-blocking property for suppressing changes in characteristics due to light intrusion, etc., as described in Patent Document 1, reduce the panel transmittance, and are therefore unsuitable as materials for forming the back gate.

[0006] The present invention has been made in consideration of these points, and its purpose is to achieve both stabilization of the threshold voltage of a TFT having a polysilicon semiconductor layer provided on a base substrate, particularly a resin substrate, and maintenance of the panel transmittance.

[0007] In order to achieve the above object, the display device of the present invention comprises a base substrate and a thin film transistor layer provided on the base substrate, the thin film transistor layer having a polysilicon semiconductor layer formed of a polysilicon film and defining a channel region and a conductor region, a plurality of thin film transistors electrically connected to each other via signal wiring in the conductor region are provided corresponding to a plurality of sub-pixels constituting a display region, and a transparent back gate layer formed of an oxide semiconductor film and having a conductorized portion in which at least a portion of the oxide semiconductor film is conductorized is provided below the thin film transistor layer, the conductorized portion overlaps at least the channel region in a planar view and is electrically connected to the signal wiring.

[0008] A method for manufacturing a display device according to the present invention is a method for manufacturing a display device, comprising: a base substrate; and a thin film transistor layer provided on the base substrate, the thin film transistor layer having a polysilicon semiconductor layer formed of a polysilicon film and having a channel region and a conductor region defined therein; a plurality of thin film transistors electrically connected to each other in the conductor region via signal wiring, the plurality of thin film transistors being provided corresponding to a plurality of sub-pixels constituting a display region; and a transparent back gate layer formed of an oxide semiconductor film and having a conductive portion in which at least a portion of the oxide semiconductor film is conductive, provided below the thin film transistor layer. The thin film transistor layer forming step for forming the thin film transistor layer includes a first base coat film forming step for forming a first base coat film on the base substrate; a back gate layer forming step for forming the back gate layer by patterning the oxide semiconductor film after forming the oxide semiconductor film on the substrate surface on which the first base coat film has been formed; and a second base coat film forming step for forming a second base coat film on the substrate surface on which the back gate layer has been formed. a gate insulating film forming step of forming a gate insulating film on the surface of the substrate on which the polysilicon semiconductor layer is formed so as to cover the polysilicon semiconductor layer; a gate electrode forming step of forming a lower metal film on the surface of the substrate on which the gate insulating film is formed and then patterning the lower metal film to form a plurality of gate electrodes; a doping step of performing doping using the gate electrodes as a mask to form the channel region and the conductor region of the polysilicon semiconductor layer; an interlayer insulating film forming step of forming at least one interlayer insulating film on the surface of the substrate on which the plurality of gate electrodes are formed; a contact hole forming step of forming contact holes in the surface of the substrate on which the at least one interlayer insulating film is formed, exposing at least a part of the conductor region in the polysilicon semiconductor layer and at least a part of the conductor portion in the back gate layer;and a signal wiring forming step of forming the signal wiring to cover the exposed surface of the conductor portion exposed in the contact hole, wherein in the second base coat film forming step, a heat treatment after forming the second base coat film is performed to conductorize at least a region of the back gate layer that overlaps with the channel region in a plan view, thereby forming the conductor portion, and in the signal wiring forming step, the conductor portion and the signal wiring are electrically connected.

[0009] According to the present invention, it is possible to stabilize the threshold value of a TFT having a polysilicon semiconductor layer provided on a base substrate, particularly a resin substrate, while maintaining the transmittance of the panel.

[0010] FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a display region of the organic EL display device according to the first embodiment of the present invention. FIG. 3 is an equivalent circuit diagram showing a pixel circuit of the organic EL display device according to the first embodiment of the present invention. FIG. 4 is a schematic plan view showing an arrangement of pixel circuits of the organic EL display device according to the first embodiment of the present invention. FIG. 5 is an enlarged plan view of the area surrounded by the two-dot chain line in FIG. 4, showing a first TFT constituting a pixel circuit of the organic EL display device according to the first embodiment of the present invention. FIG. 6 is an enlarged plan view of the area surrounded by the two-dot chain line in FIG. 4, showing a modified example of the first TFT constituting a pixel circuit of the organic EL display device according to the first embodiment of the present invention, and is a view corresponding to FIG. 5. FIG. 7 is an enlarged plan view of the area surrounded by the two-dot chain line in FIG. 4, showing a modified example of the first TFT constituting a pixel circuit of the organic EL display device according to the first embodiment of the present invention, and is a view corresponding to FIG. 5. FIG. 8 is a cross-sectional view of the display region and the frame region of the organic EL display device according to the first embodiment of the present invention. FIG. 9 is a cross-sectional view showing an organic EL layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 10 is a cross-sectional view of a display region and a frame region of an organic EL display device according to a second embodiment of the present invention, corresponding to FIG. 8 . FIG. 11 is a cross-sectional view of a display region and a frame region of an organic EL display device according to a third embodiment of the present invention, corresponding to FIG. 8 . FIG. 12 is a schematic plan view showing the arrangement of pixel circuits of an organic EL display device according to a fourth embodiment of the present invention, corresponding to FIG. 4 . FIG. 13 is an enlarged plan view of the area within the two-dot chain line in FIG. 12 , showing a first TFT constituting a pixel circuit of an organic EL display device according to the fourth embodiment of the present invention. FIG. 14 is a cross-sectional view of the display region of an organic EL display device according to the fourth embodiment of the present invention, taken along line XIV-XIV in FIG. 13 . FIG. 15 is an enlarged plan view of the area within the two-dot chain line in FIG. 12 , showing a first TFT constituting a pixel circuit of an organic EL display device according to a fifth embodiment of the present invention. FIG. 16 is a cross-sectional view of the display region of an organic EL display device according to the fifth embodiment of the present invention, taken along line XVI-XVI in FIG. 15 .

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

[0012] First Embodiment FIGS. 1 to 9 illustrate a first embodiment of a display device according to the present invention. In the following embodiments, an organic EL display device including organic EL elements will be exemplified as a display device including light-emitting elements. FIG. 1 is a plan view showing a schematic configuration of an organic EL display device 50a according to this embodiment. FIG. 2 is a plan view of a display region D of the organic EL display device 50a. FIG. 3 is an equivalent circuit diagram showing pixel circuits C of the organic EL display device 50a. FIG. 4 is a schematic plan view showing the arrangement of pixel circuits C of the organic EL display device 50a. FIG. 5 is an enlarged plan view of the area surrounded by the two-dot chain line in FIG. 4 , showing a first TFT 9aa constituting the pixel circuit C of the organic EL display device 50a. FIG. 6 is an enlarged plan view of the area surrounded by the two-dot chain line in FIG. 4 , showing a modified example of the first TFT 9aa constituting the pixel circuit C of the organic EL display device 50a, and corresponds to FIG. 5 . Fig. 7 is an enlarged plan view of the area within the two-dot chain line in Fig. 4, showing a modified example of the first TFT 9aa constituting the pixel circuit C of the organic EL display device 50a, and corresponds to Fig. 5. Fig. 8 is a cross-sectional view of the display region D and frame region F of the organic EL display device 50a. Fig. 9 is a cross-sectional view showing the organic EL layer 23 constituting the organic EL display device 50a. Note that the upper layer of the gate electrode 14a is omitted in Figs. 5 to 7.

[0013] 1, the organic EL display device 50a includes, for example, a rectangular display area D for displaying an image, and a frame area F provided in a frame shape around the display area D. Note that, although the present embodiment illustrates a rectangular display area D, this rectangular shape also includes, for example, a substantially rectangular shape with arc-shaped sides, arc-shaped corners, or a shape with a notch in one of the sides.

[0014] In the display region D, a plurality of sub-pixels P are arranged in a matrix, as shown in Fig. 2. In the display region D, for example, a sub-pixel P having a red light-emitting region Lr for displaying red, a sub-pixel P having a green light-emitting region Lg for displaying green, and a sub-pixel P having a blue light-emitting region Lb for displaying blue are arranged adjacent to one another, as shown in Fig. 2. In the display region D, one pixel is formed by, for example, three adjacent sub-pixels P each having a red light-emitting region Lr, a green light-emitting region Lg, and a blue light-emitting region Lb. The arrangement of the sub-pixels P is not particularly limited, and examples thereof include a pentatile arrangement and a stripe arrangement.

[0015] A terminal portion T is provided to extend in one direction (the vertical direction in FIG. 1 ) at one end (the right end in FIG. 1 ) of the frame region F. Also, as shown in FIG. 1 , a folding portion B that can be folded, for example, 180° (in a U-shape) with the vertical direction in FIG. 1 as the folding axis is provided in the frame region F between the terminal portion T and the display region D and that extends in one direction (the vertical direction in FIG. 1 ).

[0016] As shown in FIG. 8, the organic EL display device 50 a includes a flexible resin substrate 10 provided as a base substrate, and a TFT layer 20 a provided on the resin substrate 10 .

[0017] The resin substrate 10 is made of an organic resin material such as polyimide resin, etc. The base substrate is not limited to the resin substrate 10, and may be, for example, a glass substrate.

[0018] In the TFT layer 20a, as shown in Fig. 3, a first TFT 9aa, a second TFT 9b, and a capacitor 9c are provided as a pixel circuit C in each subpixel P. As shown in Fig. 4, the pixel circuits C are arranged in a matrix corresponding to each subpixel P. Note that black circles (●) shown in Figs. 3 and 4 indicate nodes.

[0019] As shown in FIG. 8 , the TFT layer 20a includes a first base coat film 11a and a second base coat film 11b provided on the resin substrate 10, a plurality of first TFTs 9aa, a plurality of second TFTs 9b (see FIG. 3 ), and a plurality of capacitors 9c (see FIG. 3 ) provided on the second base coat film 11b for each subpixel P, and a planarization film 19 provided on each of the first TFTs 9aa, each of the second TFTs 9b, and each of the capacitors 9c. As shown in FIGS. 2 to 4 , the TFT layer 20a is provided with a plurality of gate lines 14 as signal wirings, extending parallel to each other in the horizontal direction in the drawings. Furthermore, as shown in FIGS. 2 to 4 , the TFT layer 20a is provided with a plurality of source lines 18f as signal wirings, extending parallel to each other in a direction intersecting (orthogonal to) the plurality of gate lines 14, i.e., in the vertical direction in the drawings. 2 and 3, the TFT layer 20a is provided with a plurality of power supply lines 18g extending parallel to one another in the vertical direction in the drawings. Each power supply line 18g is provided adjacent to a corresponding source line 18f as shown in Fig. 2. Each source line 18f is connected to, for example, a source driver SD as shown in Fig. 4.

[0020] 8, in the TFT layer 20a, a first base coat film 11a and a second base coat film 11b, a semiconductor film that will become the semiconductor layer, a gate insulating film 13, a first metal film (lower metal film) that will become the first wiring layer such as the gate line 14 (see also FIGS. 2 to 4), the gate electrode 14a, and the lower conductive layer, a first interlayer insulating film 15, a second metal film that will become the second wiring layer such as the upper conductive layer, a second interlayer insulating film 17, a third metal film (upper metal film) that will become the third wiring layer such as the source line 18f (see also FIGS. 2 to 4), the source electrode 18a, the drain electrode 18b, and the power line 18g, and a planarizing film 19 are laminated in this order on the resin substrate 10.

[0021] The first base coat film 11a, the second base coat film 11b, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 may be made of, for example, silicon nitride (SiNx (x is a positive number)), silicon oxide (SiO ２ The first base coat film 11a is composed of a single layer or a multilayer film of inorganic insulating films such as silicon oxynitride (SiON). ２The second base coat film 11b is preferably composed of a laminated film such as a SiO ２ It is preferable that the insulating film be made of a laminated film such as (upper layer) / SiNx (lower layer).

[0022] The first metal film, the second metal film, and the third metal film are each composed of, for example, a metal single layer film of molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), tungsten (W), or the like, or a metal laminate film such as Mo (upper layer) / Al (middle layer) / Mo (lower layer), Ti / Al / Ti, Al (upper layer) / Ti (lower layer), Cu / Mo, or Cu / Ti.

[0023] 3, the first TFT 9aa is electrically connected to the corresponding gate line 14 and source line 18f (signal wiring) in each subpixel P. Also, as shown in Fig. 8, the first TFT 9aa includes a polysilicon semiconductor layer 12 (first semiconductor layer), a gate insulating film 13, a gate electrode 14a, a first interlayer insulating film 15, a second interlayer insulating film 17, a source electrode 18a, and a drain electrode 18b, which are provided in this order on a second base coat film 11b. In other words, the first TFT 9aa can be said to be a top-gate polysilicon TFT.

[0024] The polysilicon semiconductor layer 12 is composed of a low-temperature polysilicon film such as LTPS (low-temperature polysilicon). As shown in FIG. 8, the polysilicon semiconductor layer 12 is provided on the second base coat film 11b in an island shape in a plan view. The polysilicon semiconductor layer 12 is doped with impurity ions to make a portion conductive. As a result, the polysilicon semiconductor layer 12 has a source region 12b and a drain region 12c that are defined as conductive regions and spaced apart from each other, and a channel region 12a defined between the source region 12b and the drain region 12c. A plurality of first TFTs 9aa are electrically connected to the source region 12b and the drain region 12c via corresponding gate lines 14 and source lines 18f (signal wiring).

[0025] As shown in FIG. 8, the gate insulating film 13 is provided so as to cover the polysilicon semiconductor layer 12 .

[0026] 8, the gate electrode 14a (first wiring layer) is provided on the gate insulating film 13 so as to overlap the channel region 12a of the polysilicon semiconductor layer 12. The gate electrode 14a is configured to control conduction between the source region 12b and the drain region 12c of the polysilicon semiconductor layer 12. The gate electrode 14a is formed of a first metal film.

[0027] As shown in FIG. 8, the first interlayer insulating film 15 and the second interlayer insulating film 17 are provided in this order so as to cover the gate electrode 14a.

[0028] 8, the source electrode 18a and the drain electrode 18b (third wiring layer) are provided on the second interlayer insulating film 17 so as to be spaced apart from each other. Also, as shown in Fig. 8, the source electrode 18a and the drain electrode 18b are electrically connected to the source region 12b and the drain region 12c of the polysilicon semiconductor layer 12, respectively, through contact holes Ha and Hb formed in the stacked film of the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17. The source electrode 18a and the drain electrode 18b are formed of a third metal film.

[0029] 4 to 8, in the organic EL display device 50a, a back gate layer BGa is provided below the first TFT 9aa constituting the TFT layer 20a. Specifically, the back gate layer BGa is provided between the first base coat film 11a and the second base coat film 11b constituting the first TFT 9aa. The back gate layer BGa may be provided in the display region D and the frame region F so as to cover the entire surface of the TFT layer 20a, or may be provided only in a region required as a conductive portion BGac, which will be described later. The thickness of the back gate layer BGa is, for example, approximately 10 to 100 nm.

[0030] The back gate layer BGa is made of the above-mentioned In—Ga—Zn—O-based oxide semiconductor film and has transparency. Therefore, even when a fingerprint sensor, a camera, or the like is disposed under the panel (display region D) of the organic EL display device 50a, the back gate layer BGa (and its conductive portion BGac) only slightly affects the panel transmittance, making it difficult for the panel transmittance to decrease.

[0031] An In—Ga—Zn—O-based oxide semiconductor is a ternary oxide of In (indium), Ga (gallium), and Zn (zinc), and the ratio (composition ratio) of In, Ga, and Zn is not particularly limited. The In—Ga—Zn—O-based semiconductor may be amorphous or crystalline. Note that, as the crystalline In—Ga—Zn—O-based semiconductor, a crystalline In—Ga—Zn—O-based semiconductor in which the c-axis is oriented approximately perpendicular to the layer surface is preferred. Furthermore, instead of the In—Ga—Zn—O-based semiconductor, another oxide semiconductor may be contained. Examples of other oxide semiconductors include In—Sn—Zn—O-based semiconductors (e.g., In ２ O ３ -SnO ２ In—ZnO; InSnZnO). Here, the In—Sn—Zn—O based semiconductor is a ternary oxide of In (indium), Sn (tin), and Zn (zinc). Other oxide semiconductors include In—Al—Zn—O based semiconductors, In—Al—Sn—Zn—O based semiconductors, Zn—O based semiconductors, In—Zn—O based semiconductors, Zn—Ti—O based semiconductors, Cd—Ge—O based semiconductors, Cd—Pb—O based semiconductors, CdO (cadmium oxide), Mg—Zn—O based semiconductors, In—Ga—Sn—O based semiconductors, In—Ga—O based semiconductors, Zr—In—Zn—O based semiconductors, Hf—In—Zn—O based semiconductors, Al—Ga—Zn—O based semiconductors, Ga—Zn—O based semiconductors, In—Ga—Zn—Sn—O based semiconductors, InGaO ３ (ZnO) ５ , magnesium zinc oxide (Mg ｘ Zn １－ｘ O), cadmium zinc oxide (Cd ｘ Zn １－ｘThe Zn—O-based semiconductor may be ZnO in an amorphous state, a polycrystalline state, a microcrystalline state in which the amorphous state and the polycrystalline state are mixed, or a semiconductor in which no impurity element is added, to which one or more impurity elements selected from the group 1 elements, the group 13 elements, the group 14 elements, the group 15 elements, the group 17 elements, etc. are added.

[0032] 4 to 8, the back gate layer BGa has a conductive portion BGac in which the oxide semiconductor film is made conductive. The conductive portion BGac can be considered a transparent conductive layer. Note that at least a part of the back gate layer BGa may be the conductive portion BGac, or the entire back gate layer BGa may be the conductive portion BGac.

[0033] As shown in Figure 4, the conductive portion BGac (back gate layer BGa) is integrally (band-shaped) arranged across multiple sub-pixels P (pixel circuits C that constitute them) along the direction in which the source line 18f (signal wiring) extends in a planar view.

[0034] In the organic EL display device 50a, as shown in FIG. 8, the conductive portion BGac overlaps the channel region 12a of the polysilicon semiconductor layer 12 constituting the first TFT 9aa in a planar view. It is sufficient that the conductive portion BGac overlaps at least the channel region 12a of the polysilicon semiconductor layer 12 in a planar view. For example, as shown in FIGS. 5 and 6, the back-gate layer BGa and its conductive portion BGac (dot portions in the figure) may be provided in a mesh pattern corresponding to the pattern shape of the polysilicon semiconductor layer 12 in a planar view. In this case, the conductive portion BGac may be formed in at least a portion of the mesh pattern of the back-gate layer BGa (see FIG. 5), or may be formed over the entire pattern (see FIG. 6). On the other hand, as shown in FIG. 7, the back-gate layer BGa and its conductive portion BGac may be provided so as to entirely cover each sub-pixel P (and the pixel circuits C constituting each sub-pixel P) in a planar view. In this case as well, the conductive portion BGac may be formed on at least a part of the pattern of the back gate layer BGa, or may be formed on the entire pattern (see FIG. 7).

[0035] The first TFT 9aa configured as described above may be, for example, a p-channel TFT such as a writing TFT, a driving TFT, a power supply TFT, or a light-emission control TFT. The writing TFT is configured to apply the voltage of the source line 18f to one terminal electrode (hereinafter referred to as the "first terminal electrode") of the driving TFT in response to the selection of the gate line 14. The driving TFT is configured to apply a driving current corresponding to the voltage applied between its gate electrode and its first terminal electrode to one terminal electrode of the light-emission control TFT. Here, the driving TFT is configured to control the current of an organic EL element 25 (described later). The power supply TFT is configured to apply the voltage of the power supply line 18g to the first terminal electrode of the driving TFT. The light-emission control TFT is configured to apply the driving current to the organic EL element 25. Among these, the first TFT 9aa is preferably a driving TFT. In other words, the driving TFT preferably includes a first TFT 9aa including a back gate layer BGa having a conductive portion BGac, since the driving TFT affects the brightness of the organic EL element 25. Note that the writing TFT, power supply TFT, and light emission control TFT other than the driving TFT are switching TFTs, and therefore may or may not include a back gate layer BGa.

[0036] 3, the second TFT 9b is electrically connected to the corresponding first TFT 9aa and power supply line 18g in each sub-pixel P. The second TFT 9b also includes a second semiconductor layer, a gate insulating film 13, a gate electrode, a first interlayer insulating film 15, a second interlayer insulating film 17, and a source electrode and a drain electrode, and has the same structure as the first TFT 9aa described above. The second semiconductor layer is formed, for example, of a low-temperature polysilicon film or an In—Ga—Zn—O-based oxide semiconductor film. The In—Ga—Zn—O-based oxide semiconductor may be the same as the In—Ga—Zn—O-based oxide semiconductor described above.

[0037] The second TFT 9b configured as described above may be, for example, an n-channel TFT such as an initialization TFT, a compensation TFT, or an anode discharge TFT. The initialization TFT is configured to initialize the voltage applied to the gate electrode of the drive TFT. The compensation TFT is configured to compensate the threshold voltage of the drive TFT by diode-connecting the drive TFT in response to the selection of the gate line 14. The anode discharge TFT is configured to reset the charge accumulated in a first electrode 21 (described later) of the organic EL element 25 in response to the selection of the gate line 14. Note that the initialization TFT, the compensation TFT, and the anode discharge TFT are switching TFTs, and therefore may or may not include a back gate layer BGa.

[0038] In this embodiment, the first TFT 9aa and the second TFT 9b are illustrated as top-gate type TFTs, but the first TFT 9aa and the second TFT 9b may be bottom-gate type TFTs. The first TFT 9aa is preferably a top-gate type TFT.

[0039] 3, the capacitor 9c is electrically connected to the corresponding first TFT 9aa and power supply line 18g in each subpixel P. Here, the capacitor 9c includes, for example, a lower conductive layer (first wiring layer) formed of a first metal film, a first interlayer insulating film 15 provided so as to cover the lower conductive layer, and an upper conductive layer (second wiring layer) formed of a second metal film and provided on the first interlayer insulating film 15 so as to overlap the lower conductive layer. Note that the upper conductive layer 16 is electrically connected to the power supply line 18g via, for example, a contact hole formed in the second interlayer insulating film 17.

[0040] Here, in the organic EL display device 50a, as shown in Figure 8, the back gate layer BGa and its conductive portion BGac are arranged not only in the area where multiple sub-pixels P are arranged in the display area D (hereinafter also referred to as the "active area"), but also in the frame area F.

[0041] 4 and 8, in the organic EL display device 50a, the conductive portion BGac is electrically connected to the source line 18f (signal wiring) in an area of ​​the frame region F where no subpixels P are arranged (hereinafter also referred to as an "inactive region"). Specifically, as shown in Fig. 8, the conductive portion BGac and the source line 18f are electrically connected via a contact hole Hf formed in a stacked film of the second base coat film 11b, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17, which serves as at least one inorganic insulating film provided between the conductive portion BGac and the source line 18f. As a result, the conductive portion BGac is fixed to the potential of the source line 18f.

[0042] In a conventional flexible organic EL display device that has a back gate separated by an inorganic insulating film (base coat film) below a top-gate polysilicon TFT, the back gate is electrically connected to a potential fixing wiring (signal wiring) through a contact hole formed in the inorganic insulating film within the pixel circuit C (active region), which causes the TFT's threshold characteristics to become unstable due to impurities from the resin substrate located directly below the back gate. This is thought to be due to the fact that the contact hole is provided near the TFT, and hydrogen atoms generated from the base coat film by the opening of the contact hole adhere to the channel portion of the TFT.

[0043] In contrast, in the organic EL display device 50a, the conductive portion BGac in the back gate layer BGa is electrically connected to the source line 18f via the contact hole Hf outside the pixel circuit C (inactive region), so the above-mentioned inconvenience is less likely to occur.

[0044] The planarization film 19 has a flat surface in the display region D, and is made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG (spin on glass) material.

[0045] As shown in FIG. 8, the organic EL display device 50a includes an organic EL element layer 31 provided as an upper layer of the TFT layer 20a as a light-emitting element layer constituting the display region D, and a sealing film 35 provided on the organic EL element layer 31.

[0046] As shown in FIG. 8, the organic EL element layer 31 includes a plurality of organic EL elements 25 as a plurality of light-emitting elements arranged in a matrix corresponding to a plurality of sub-pixels P.

[0047] 8, the organic EL element 25 includes a plurality of first electrodes 21 provided in order on the planarization film 19, a plurality of organic EL layers 23 provided on the first electrodes 21 in respective sub-pixels P, and a second electrode 24 provided on the organic EL layer 23 in common to the plurality of sub-pixels P. In addition, as shown in FIG. 8, the organic EL element 25 is covered with a sealing film 35.

[0048] As shown in Fig. 8 , the first electrodes 21 are provided in a matrix on the planarization film 19 so as to correspond to a plurality of sub-pixels P. As shown in Fig. 8 , each first electrode 21 is electrically connected to the drain electrode 18d (or source electrode 18c) of each second TFT 9b via a contact hole formed in the planarization film 19. The first electrodes 21 also have the function of injecting holes into the organic EL layer 23. In order to improve the efficiency of hole injection into the organic EL layer 23, it is more preferable that the first electrodes 21 be made of a material with a large work function. Here, examples of materials constituting the first electrode 21 include metal materials such as silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), titanium (Ti), ruthenium (Ru), manganese (Mn), indium (In), ytterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), and tin (Sn). Examples of materials constituting the first electrode 21 include astatine (At) / astatine oxide (AtO ２) or an alloy thereof. Furthermore, the material constituting the first electrode 21 may be, for example, a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The first electrode 21 may also be formed by stacking multiple layers made of the above materials. Examples of compound materials with a large work function include indium tin oxide (ITO) and indium zinc oxide (IZO).

[0049] The peripheral edge of the first electrode 21 is covered with an edge cover 22 provided in a lattice pattern and shared by multiple sub-pixels P. Examples of materials that form the edge cover 22 include positive photosensitive resin materials such as polyimide resin, acrylic resin, polysiloxane resin, and novolac resin, as well as polysiloxane-based SOG materials. As shown in FIG. 8 , a portion of the surface of the edge cover 22 protrudes upward in the drawing to form island-shaped pixel photospacers.

[0050] 8, the organic EL layer 23 is disposed on each first electrode 21, and is provided in a matrix so as to correspond to a plurality of sub-pixels P. Here, each organic EL layer 23 includes a hole injection layer 1, a hole transport layer 2, a light-emitting layer 3, an electron transport layer 4, and an electron injection layer 5, which are provided in this order on the first electrode 21, as shown in FIG.

[0051] The hole injection layer 1 is also called an anode buffer layer, and has the function of bringing the energy levels of the first electrode 21 and the organic EL layer 23 closer to each other, thereby improving the efficiency of hole injection from the first electrode 21 to the organic EL layer 23. Examples of materials constituting the hole injection layer 1 include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.

[0052] The hole transport layer 2 has a function of improving the efficiency of transporting holes from the first electrode 21 to the organic EL layer 23. Examples of materials constituting the hole transport layer 2 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, and zinc selenide.

[0053] The light-emitting layer 3 is a region into which holes and electrons are injected from the first electrode 21 and the second electrode 24, respectively, and where the holes and electrons recombine when a voltage is applied between the first electrode 21 and the second electrode 24. The light-emitting layer 3 is made of a material with high luminous efficiency. Examples of materials that can be used for the light-emitting layer 3 include metal oxinoid compounds (8-hydroxyquinoline metal complexes), naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinylacetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzthiazole derivatives, styryl derivatives, styrylamine derivatives, bisstyrylbenzene derivatives, trisstyrylbenzene derivatives, perylene derivatives, perinone derivatives, aminopyrene derivatives, pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylenevinylene, and polysilane.

[0054] The electron transport layer 4 has a function of efficiently transferring electrons to the light-emitting layer 3. Examples of materials constituting the electron transport layer 4 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxinoid compounds.

[0055] The electron injection layer 5 has a function of bringing the energy levels of the second electrode 24 and the organic EL layer 23 closer to each other and improving the efficiency of electron injection from the second electrode 24 to the organic EL layer 23, and this function can reduce the driving voltage of the organic EL element 25. The electron injection layer 5 is also called a cathode buffer layer. Here, examples of materials constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF ２ ), calcium fluoride (CaF ２ ), strontium fluoride (SrF ２ ), barium fluoride (BaF ２ inorganic alkali compounds such as aluminum oxide (Al ２ O ３ ), strontium oxide (SrO), etc.

[0056] As shown in FIG. 8 , the second electrode 24 is provided to cover each organic EL layer 23 and the edge cover 22. The second electrode 24 has a function of injecting electrons into the organic EL layer 23. The second electrode 24 is preferably made of a material with a small work function to improve the efficiency of electron injection into the organic EL layer 23. Examples of materials that can be used for the second electrode 24 include silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), calcium (Ca), titanium (Ti), yttrium (Y), sodium (Na), ruthenium (Ru), manganese (Mn), indium (In), magnesium (Mg), lithium (Li), ytterbium (Yb), and lithium fluoride (LiF). The second electrode 24 may be made of, for example, magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), or astatine (At) / astatine oxide (AtO ２ The second electrode 24 may be formed of an alloy such as lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), or lithium fluoride (LiF) / calcium (Ca) / aluminum (Al). The second electrode 24 may be formed of a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The second electrode 24 may be formed by stacking multiple layers made of the above materials. Examples of materials with a low work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), and lithium fluoride (LiF) / calcium (Ca) / aluminum (Al).

[0057] 8, the sealing film 35 includes a first sealing inorganic insulating film 32 provided to cover the second electrode 24, a sealing organic film 33 provided on the first sealing inorganic insulating film 32, and a second sealing inorganic insulating film 34 provided to cover the sealing organic film 33, and has a function of protecting the organic EL layer 23 from moisture, oxygen, etc. Here, the first sealing inorganic insulating film 32 and the second sealing inorganic insulating film 34 are made of, for example, silicon oxide (SiO ２ ) and aluminum oxide (Al ２ O ３ ), trisilicon tetranitride (Si ３ N ４ The sealing organic film 33 is made of an inorganic material such as silicon nitride (SiNx (x is a positive number)) or silicon carbonitride (SiCN). The sealing organic film 33 is made of an organic material such as acrylic resin, polyurea resin, parylene resin, polyimide resin, or polyamide resin.

[0058] The organic EL display device 50a described above is configured such that, in each subpixel P, a gate signal is input to the first TFT 9aa via the gate line 14 to turn the first TFT 9aa on, a data signal is written to the gate electrode of the second TFT 9b and the capacitor 9c via the source line 18f, and a current from the power supply line 18g corresponding to the gate voltage of the second TFT 9b is supplied to the organic EL layer 23, causing the light-emitting layer 3 of the organic EL layer 23 to emit light, thereby displaying an image. Note that in the organic EL display device 50a, even if the first TFT 9aa is turned off, the gate voltage of the second TFT 9b is held by the capacitor 9c, so that light emission by the light-emitting layer 3 is maintained until a gate signal for the next frame is input.

[0059] Next, a method for manufacturing the organic EL display device 50a of this embodiment will be described. The method for manufacturing the organic EL display device 50a of this embodiment includes a TFT layer forming step.

[0060] <TFT Layer Forming Process> The TFT layer forming process is a process of forming the TFT layer 20a, and includes a first base coat film forming process, a back gate layer forming process, a second base coat film forming process, a polysilicon semiconductor layer forming process, a gate insulating film forming process, a gate electrode forming process, a doping process, an interlayer insulating film forming process, a contact hole forming process, and a signal wiring forming process.

[0061] (First base coat film forming process) First, a silicon oxide film (thickness: about 250 nm) and a silicon nitride film (thickness: about 50 nm) are sequentially formed on the resin substrate 10 formed on the glass substrate by, for example, a plasma CVD (Chemical Vapor Deposition) method, thereby forming a SiNx (upper layer) / SiO ２ A first base coat film 11a is formed by stacking films such as a first base coat film (lower layer) and a second base coat film (lower layer).

[0062] (Back-gate layer forming step) On the surface of the substrate on which the first base coat film 11a has been formed, a back-gate layer of InGaZnO is formed by, for example, a sputtering method. ４ After forming an oxide semiconductor film made of an oxide semiconductor such as a film (thickness: about 30 nm), the oxide semiconductor film is patterned to form a strip-shaped back gate layer BGa extending parallel to the direction in which the source line 18f, which will be formed in a subsequent process, extends.

[0063] (Second base coat film forming step) A silicon nitride film (thickness: about 50 nm) and a silicon oxide film (thickness: about 250 nm) are sequentially formed on the substrate surface on which the back gate layer BGa is formed, for example, by a plasma CVD method, thereby forming a SiO ２ A second base coat film 11b is formed by stacking films such as SiNx (upper layer) / SiNx (lower layer).

[0064] In the manufacturing method of the organic EL display device 50a, a heat treatment after the formation of the second base coat film 11b converts a part of the back gate layer BGa into a conductor to form a conductor portion BGac. Specifically, the conductor portion BGac is formed in the back gate layer BGa in a region that overlaps in plan view with at least the channel region 12a of the polysilicon semiconductor layer 12 formed in a subsequent process.

[0065] (Polysilicon semiconductor layer formation process) An amorphous silicon film (thickness: about 50 nm) is formed on the substrate surface on which the second base coat film 11b is formed, for example, by plasma CVD, and the amorphous silicon film is crystallized by laser annealing or the like to form a polysilicon film made of polysilicon.The polysilicon film is then patterned to form the polysilicon semiconductor layer 12.

[0066] (Gate insulating film forming process) After a silicon oxide film (about 100 nm thick) is formed on the substrate surface on which the polysilicon semiconductor layer 12 is formed, for example, by plasma CVD, the silicon oxide film is patterned so as to cover the polysilicon semiconductor layer, thereby forming the gate insulating film 13.

[0067] (Gate electrode formation process) A first metal film (lower metal film) such as a molybdenum film (thickness: about 200 nm) is formed on the surface of the substrate on which the gate insulating film 13 is formed, for example, by sputtering, and then the first metal film is patterned to form a first wiring layer such as the gate electrode 14 a and the gate line 14.

[0068] (Doping Process) Using the gate electrode 14a as a mask, the polysilicon semiconductor layer 12 is doped with impurity ions to make a part of the polysilicon semiconductor layer 12 conductive, thereby forming a source region 12b, a drain region 12c, and a channel region 12a in the polysilicon semiconductor layer 12.

[0069] (Interlayer insulating film forming process) At least one interlayer insulating film is formed on the substrate surface on which the gate electrode 14a is formed (the substrate surface on which a portion of the polysilicon semiconductor layer 12 is made conductive). A silicon nitride film (about 150 nm thick) and a silicon oxide film (about 100 nm thick) are sequentially formed on the substrate surface by, for example, plasma CVD, to form the first interlayer insulating film 15. Subsequently, a silicon oxide film (about 100 nm thick) is formed on the substrate surface on which the first interlayer insulating film 15 has been formed by, for example, plasma CVD, to form the second interlayer insulating film 17.

[0070] (Contact Hole Forming Process) In the display region D (active region) of the substrate surface where the second interlayer insulating film 17 is formed, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are appropriately patterned by, for example, dry etching to form contact holes Ha and Hb that expose at least a portion of the surface of the source region 12b and the drain region 12c in the polysilicon semiconductor layer 12. Furthermore, in the frame region F (inactive region) of the substrate surface, the second base coat film 11b, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are appropriately patterned by, for example, dry etching to form contact holes Hf that expose at least a portion of the surface of the conductive portion BGac in the back gate layer BGa.

[0071] (Signal Wiring Forming Process) On the substrate surface on which the contact holes Ha, Hb, and Hf are formed, a titanium film (thickness: about 50 nm), an aluminum film (thickness: about 400 nm), and a titanium film (thickness: about 200 nm) are sequentially formed by, for example, a sputtering method to form a third metal film (upper metal film), and then the third metal film is patterned to form a third wiring layer including the source line 18f, the source electrode 18a, the drain electrode 18b, and the power line 18g.

[0072] In this manner, in the method for manufacturing the organic EL display device 50a, the conductorized portion BGac and the source line 18f are electrically connected in the signal wiring formation step.

[0073] <Other Steps in the TFT Layer Forming Step> The TFT layer forming step may include a second wiring layer forming step, a planarizing film forming step, and the like, as required.

[0074] (Second wiring layer formation process) A second metal film such as a molybdenum film (thickness: approximately 200 nm) is formed on the substrate surface on which the first interlayer insulating film 15 has been formed in the interlayer insulating film formation process, for example, by sputtering, and then the second metal film is patterned to form a second wiring layer such as an upper conductive layer.

[0075] (Planarization film formation process) An acrylic photosensitive resin film (about 2 μm thick) is applied to the substrate surface on which the source lines 18 f and the like are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form the planarization film 19.

[0076] The method for manufacturing the organic EL display device 50a includes an organic EL element layer forming step and a sealing film forming step.

[0077] <Organic EL element layer forming process> On the planarization film 19 of the TFT layer 20 a formed in the TFT layer forming process, a first electrode 21, an edge cover 22, an organic EL layer 23 (hole injection layer 1, hole transport layer 2, light-emitting layer 3, electron transport layer 4, electron injection layer 5), and a second electrode 24 are formed using a well-known method to form an organic EL element 25, and an organic EL element layer 31 is formed.

[0078] <Sealing Film Forming Process> First, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is deposited by plasma CVD using a CMM as a deposition mask on the substrate surface on which the organic EL element layer 31 formed in the organic EL element layer forming process is formed, covering each organic EL element 25, to form a first sealing inorganic insulating film 32. Subsequently, an organic resin material such as an acrylic resin is deposited on the first sealing inorganic insulating film 32 by, for example, an inkjet method, to form a sealing organic film 33. Thereafter, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is deposited by plasma CVD using a CMM as a deposition mask, covering the sealing organic film 33, to form a second sealing inorganic insulating film 34, thereby forming a sealing film 35. Through the above processes, a sealing film 35 can be formed in the display region D, in which the first sealing inorganic insulating film 32, the sealing organic film 33, and the second sealing inorganic insulating film 34 are stacked in this order.

[0079] Finally, a protective sheet (not shown) is attached to the surface of the substrate, and then laser light is irradiated from the glass substrate side of the resin substrate 10 to peel the glass substrate from the underside of the resin substrate 10, and a protective sheet (not shown) is attached to the underside of the resin substrate 10 from which the glass substrate has been peeled. In this manner, the organic EL display device 50a can be manufactured.

[0080] <Effects> As described above, the organic EL display device 50a of this embodiment can achieve the following effects. The organic EL display device 50a includes a back-gate layer BGa having a conductive portion BGac, separated by a second base coat film 11b, between the resin substrate 10 and a TFT layer 20a in which top-gate first TFTs 9aa (polysilicon TFTs) having a polysilicon semiconductor layer 12 are provided corresponding to a plurality of subpixels P. The conductive portion BGac is integrally provided across the plurality of subpixels P (the pixel circuits C constituting the subpixels P) along the direction in which the source lines 18f (signal wirings) extend in a planar view, overlapping at least the channel portion 12a in a planar view and electrically connected to the source lines 18f. This prevents deviations in the threshold voltage (Vth) of the first TFTs 9aa due to polarization of the resin substrate 10, stabilizing the threshold characteristics. In the organic EL display device 50a, the back gate layer BGa is made of a transparent oxide semiconductor film, and the conductive portion BGac is made of an oxide semiconductor layer at least partially conductive, ensuring panel transmittance. Thus, the organic EL display device 50a can stabilize the threshold voltage of TFTs (particularly top-gate polysilicon TFTs) while maintaining panel transmittance. In the organic EL display device 50a, the conductive portion BGac and the source line 18f are electrically connected via the contact hole Hf outside the pixel circuit C (inactive region), which prevents hydrogen atoms generated from the first base coat film 11a from adhering to the channel portion 12a, further stabilizing the threshold characteristics of the first TFT 9aa.

[0081] Second Embodiment Next, a second embodiment of the present invention will be described with reference to Fig. 10. Fig. 10 is a cross-sectional view of the display region D and frame region F of an organic EL display device 50b of this embodiment, and corresponds to Fig. 8. The overall configuration of the organic EL display device 50b is the same as that of the first embodiment described above, except for the configuration of the TFT layer 20b, and therefore a detailed description thereof will be omitted here. Furthermore, components similar to those of the first embodiment described above will be assigned the same reference numerals and their description will be omitted.

[0082] 10 , in the organic EL display device 50b, a metal layer M having an island shape in a plan view is provided between the lower end of the contact hole Hf and the conductive portion BGac in the frame region F (inactive region). The metal layer M is disposed between the back gate layer BGa and the second base coat film 11b. As a result, the conductive portion BGac and the source line 18f are electrically connected via the metal layer M.

[0083] The metal layer M, like the first metal film, second metal film, third metal film, etc., is composed of a metal single layer film such as molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), tungsten (W), etc., or a metal laminate film such as Mo (upper layer) / Al (middle layer) / Mo (lower layer), Ti / Al / Ti, Al (upper layer) / Ti (lower layer), Cu / Mo, Cu / Ti, etc.

[0084] The organic EL display device 50b can be fabricated by adding the following metal layer formation process after the back gate layer formation process and before the second base coat film formation process in the TFT layer formation process of the above-described organic EL display device 50a.

[0085] (Metal Layer Forming Process) After the above-described metal film is formed by, for example, sputtering on the substrate surface on which the back gate layer BGa is formed, the metal film is patterned to form the metal layer M.

[0086] <Effects> In addition to the effects of the organic EL display device 50a described above, the organic EL display device 50b can achieve the following effects: In the organic EL display device 50b, a metal layer M is provided between the conductor portion BGac and the second base coat film 11b in the frame region F (inactive region), specifically in the region that overlaps in plan view with the contact hole Hf that electrically connects the conductor portion BGac to the source line 18f. This metal layer M makes it possible to prevent penetration of the conductor portion BGac when forming the contact hole Hf.

[0087] Third Embodiment Next, a third embodiment of the present invention will be described with reference to FIG. 11. FIG. 11 is a cross-sectional view of the display region D and frame region F of an organic EL display device 50c of this embodiment, and corresponds to FIG. 8. The overall configuration of the organic EL display device 50c is the same as that of the first embodiment described above, except for the configuration of the TFT layer 20c, and therefore a detailed description thereof will be omitted here. Furthermore, components similar to those of the first embodiment described above will be assigned the same reference numerals, and their description will be omitted.

[0088] In the organic EL display device 50c, as shown in FIG. 11, in the display region D (active region), the back gate layer BGc has a non-conductive portion BGcn where the oxide semiconductor film is not made conductive.

[0089] The non-conductive portions BGcn are provided as signal wiring between a plurality of sub-pixels P adjacent to each other in the direction in which the source lines 18f extend (see FIG. 4). In other words, as shown in FIG. 11, in the display region D (active region), the conductive portions BGcc in the back gate layer BGc are provided separately for each sub-pixel P. The conductive portions BGcc overlap the entire first TFT 9ac (the entire surface of the polysilicon semiconductor layer 12 that constitutes it) in a planar view. In this way, in the organic EL display device 50c, the conductive portions BGcc and the non-conductive portions BGcn are alternately arranged along the direction in which the source lines 18f extend.

[0090] The organic EL display device 50c may be configured to include a metal layer M, similar to the organic EL display device 50b described above.

[0091] The organic EL display device 50c may be obtained by modifying the second base coat film formation process in the TFT layer formation process of the organic EL display device 50a described above as follows: For example, a heat treatment is performed after the second base coat film 11b is formed so that the back gate layer BGc in the region between the plurality of sub-pixels P (first TFTs 9ac) adjacent to each other in the direction in which the source lines 18f extend is not affected by heat or is only slightly affected by heat.

[0092] <Effects> In addition to the effects of the organic EL display device 50a described above, the organic EL display device 50c can achieve the following effects: In the organic EL display device 50c, non-conductive portions BGcn are provided in the back gate layer BGc in the display region D (active region) between multiple sub-pixels P (first TFTs 9ac) that are adjacent in the direction in which the source lines 18f extend. These non-conductive portions BGcn separate the conductive portions BGcc for each sub-pixel P, making it difficult for a potential difference to occur between the conductive portions BGcc and the polysilicon semiconductor layer 12. As a result, the threshold characteristics of the first TFTs 9ac can be more stabilized.

[0093] Fourth Embodiment Next, a fourth embodiment of the present invention will be described with reference to FIGS. 12 to 14. FIG. 12 is a schematic plan view illustrating the arrangement of pixel circuits C of an organic EL display device 50d according to this embodiment, corresponding to FIG. 4. FIG. 13 is an enlarged plan view of the area within the two-dot chain line in FIG. 12, showing a first TFT 9ad constituting the pixel circuit C of the organic EL display device 50d. FIG. 14 is a cross-sectional view of the display region D of the organic EL display device 50d taken along line XIV-XIV in FIG. 13. Note that the upper layer of the gate electrode 14a is omitted in FIG. 13. The overall configuration of the organic EL display device 50d is the same as that of the first embodiment described above, except for the configuration of the TFT layer 20d, and therefore a detailed description thereof will be omitted here. Components similar to those of the first embodiment will be designated by the same reference numerals and will not be described again.

[0094] 12 to 14, in the organic EL display device 50d, the conductive portion BGdc (back gate layer BGd) is provided in an island shape in plan view for each sub-pixel P so as to cover the entire sub-pixel P. Specifically, as shown in FIGS. 13 and 14, the island-shaped conductive portion BGdc overlaps the entire first TFT 9ad (the entire surface of the polysilicon semiconductor layer 12 that constitutes it) in plan view.

[0095] In the organic EL display device 50d, as shown in FIG. 14, in the display region D (active region), the conductive portion BGdc is electrically connected to the source line 18f via the contact hole Hf.

[0096] The organic EL display device 50d may be configured to include a metal layer M, similar to the organic EL display device 50b described above.

[0097] The organic EL display device 50d can be obtained by modifying the back-gate layer formation process and the contact hole formation process in the TFT layer formation process of the organic EL display device 50a described above as follows. For example, in the back-gate layer formation process, the pattern shape of the oxide semiconductor film is modified to form an island-shaped back-gate layer BGd that overlaps in plan view with the entire surface of the polysilicon semiconductor layer 12 (the entire first TFT 9ad) formed in a subsequent process. In the contact hole formation process, contact holes Hf that expose at least a portion of the surface of the conductive portion BGdc are formed in the second base coat film 11b, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 in the display region D (active region).

[0098] <Effects> According to the organic EL display device 50d described above, it is possible to obtain the same effects as the organic EL display device 50a described above.

[0099] Fifth Embodiment Next, a fifth embodiment of the present invention will be described with reference to FIGS. 15 and 16. FIG. 15 is an enlarged plan view of the area within the two-dot chain line in FIG. 12, showing the first TFT 9ae constituting the pixel circuit C of an organic EL display device 50e of this embodiment. FIG. 16 is a cross-sectional view of the display region D of the organic EL display device 50e taken along line XVI-XVI in FIG. 15. Note that the upper layer of the gate electrode 14a is omitted in FIG. 15. The overall configuration of the organic EL display device 50e is the same as that of the fourth embodiment described above, except for the configuration of the TFT layer 20e, and therefore a detailed description thereof will be omitted here. Furthermore, components similar to those of the fourth embodiment will be assigned the same reference numerals and their description will be omitted.

[0100] 15 and 16 , in the organic EL display device 50e, similarly to the above-described organic EL display device 50d, the conductive portion BGec (back gate layer BGe) is provided in an island shape in plan view for each sub-pixel P so as to cover the entire sub-pixel P. Specifically, the conductive portion BGec overlaps the entire surface of the polysilicon semiconductor layer 12 (the entire first TFT 9ae) in plan view.

[0101] Here, in the organic EL display device 50e, similarly to the above-described organic EL display device 50c, in the display region D (active region), the back gate layer BGe has a non-conductive portion BGen where the oxide semiconductor film is not made conductive.

[0102] The non-conductive portions BGen are provided in a frame shape along the periphery of the island-shaped conductive portions BGec in plan view. The frame-shaped non-conductive portions BGen cause the conductive portions BGec in the back gate layer BGe to be provided in an isolated pattern separated for each sub-pixel P in the display region D (active region).

[0103] The organic EL display device 50e may be configured to include a metal layer M, similar to the organic EL display device 50b described above.

[0104] The organic EL display device 50e can be obtained by modifying the second base coat film formation process in the TFT layer formation process of the organic EL display device 50d described above as follows: For example, a heat treatment is performed after the second base coat film 11b is formed so that the back gate layer BGe around each subpixel P (first TFT 9ae) is not affected by heat or is only slightly affected by heat.

[0105] <Effects> In addition to the effects of the organic EL display device 50a described above, the organic EL display device 50e can achieve the following effects: In the organic EL display device 50e, a frame-shaped non-conductive portion BGen is provided in the back gate layer BGe along the periphery of the sub-pixel P (first TFT 9ae). The frame-shaped non-conductive portion BGen separates the conductive portion BGec for each sub-pixel P, making it difficult for a potential difference to occur between the conductive portion BGec and the polysilicon semiconductor layer 12. As a result, it is possible to improve the stability of the threshold characteristics of the first TFT 9ae.

[0106] Other Embodiments In the above embodiments, the conductor portion is integrally provided as a signal wiring across multiple sub-pixels along the direction in which the source line extends, but is not limited to this. The conductor portion may be integrally provided as a signal wiring across multiple sub-pixels along the direction in which the gate line extends. In this case, the conductor portion may be electrically connected to the gate line.

[0107] In each of the above embodiments, an organic EL layer having a five-layer stacked structure of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer has been exemplified. However, the organic EL layer may have a three-layer stacked structure of, for example, a hole injection layer / hole transport layer, a light-emitting layer, and an electron transport layer / electron injection layer.

[0108] In addition, in each of the above embodiments, an organic EL display device in which the first electrode is an anode and the second electrode is a cathode is exemplified. However, the present invention can also be applied to an organic EL display device in which the stacked structure of the organic EL layer is reversed, and the first electrode is a cathode and the second electrode is an anode.

[0109] In each of the above embodiments, an organic EL display device is exemplified in which the electrode of the TFT connected to the first electrode is used as the drain electrode, but the present invention can also be applied to an organic EL display device in which the electrode of the TFT connected to the first electrode is called the source electrode.

[0110] In the above embodiments, an organic EL display device is used as the display device, but the present invention can also be applied to display devices such as an active matrix driving liquid crystal display device.

[0111] In the above embodiments, an organic EL display device has been described as an example of a display device, but the present invention is not limited to organic EL display devices and can be applied to any flexible display device. For example, the present invention can be applied to a flexible display device including a quantum-dot light emitting diode (QLED), which is a light emitting element using a quantum dot-containing layer.

[0112] As described above, the present invention is useful for flexible display devices.

[0113] BGa, BGc, BGd, BGe Back gate layer BGac, BGcc, BGdc, BGec Conductive portion BGcn, BGen Non-conductive portion D Display region D F Frame region M Metal layer P Sub-pixel 9aa, 9ac, 9ad, 9ae First TFT 10 Resin substrate (base substrate) 11a First base coat film 11b Second base coat film 12 Polysilicon semiconductor layer 12a Channel region 12b Source region (conductor region) 12c Drain region (conductor region) 18f Source line (signal wiring) 20a, 20b, 20c, 20d, 20e TFT (thin film transistor) layer 25 Organic EL element (organic electroluminescence element, light-emitting element) 31 Organic EL element layer (light-emitting element layer) 35 Sealing film 50a, 50b, 50c, 50d, 50e Organic EL display device

Claims

1. a base substrate; and a thin film transistor layer provided on the base substrate; the thin film transistor layer has a polysilicon semiconductor layer formed of a polysilicon film, in which a channel region and a conductor region are defined, and a plurality of thin film transistors electrically connected to each other via signal wiring in the conductor region are provided corresponding to a plurality of sub-pixels constituting the display region; a display device in which a transparent back gate layer is provided under the thin film transistor layer, the back gate layer being formed of an oxide semiconductor film and having a conductive portion in which at least a part of the oxide semiconductor film is conductive; The display device is characterized in that the conductor portion overlaps at least the channel region in a plan view and is electrically connected to the signal wiring.

2. 2. The display device according to claim 1, The display device is characterized in that the conductor portion is integrally provided across the plurality of sub-pixels in a direction in which the signal wiring extends in a plan view.

3. 3. The display device according to claim 2, a frame area is provided around the display area, the conductive portion is disposed in the frame region, The display device, wherein the conductor portion is electrically connected to the signal wiring in an area of ​​the frame region where the plurality of sub-pixels are not arranged.

4. 3. The display device according to claim 2, the back gate layer in the display region has a non-conductive portion in which the oxide semiconductor film is not made conductive, The display device, wherein the non-conductive portion is provided between the plurality of sub-pixels adjacent to each other.

5. 2. The display device according to claim 1, The display device is characterized in that the conductive portion is provided in an island shape for each of the sub-pixels in a plan view.

6. 6. The display device according to claim 5, the back gate layer in the display region has a non-conductive portion in which the oxide semiconductor film is not made conductive, The display device is characterized in that the non-conductive portion is provided in a frame shape along the periphery of the island-shaped conductive portion in a plan view.

7. 6. The display device according to claim 5, A display device characterized in that, in the display region, the island-shaped conductor portion is electrically connected to the signal wiring.

8. The display device according to any one of claims 1 to 7, The display device is characterized in that the conductor portion and the signal wiring are connected via a contact hole formed in at least one inorganic insulating film provided between the conductor portion and the signal wiring.

9. 9. The display device according to claim 8, The display device is characterized in that a metal layer having an island shape in a plan view is provided between the lower end of the contact hole and the conductive portion.

10. The display device according to any one of claims 1 to 7, The display device is characterized in that the conductive portion in the display region is provided in a mesh pattern in a plan view so as to correspond to the shape of the polysilicon semiconductor layer.

11. The display device according to any one of claims 1 to 7, The display device, wherein the conductive portion in the display region is provided so as to entirely cover each of the sub-pixels in a plan view.

12. The display device according to any one of claims 1 to 7, The display device is characterized in that the back gate layer is provided on the entire surface of the thin film transistor layer.

13. The display device according to any one of claims 1 to 7, The display device is characterized in that the signal wiring is a source wiring or a gate wiring.

14. The display device according to any one of claims 1 to 7, the thin film transistor layer includes a first base coat film and a second base coat film stacked in this order on the base substrate; The display device is characterized in that the back gate layer is provided between the first base coat film and the second base coat film.

15. 15. The display device according to claim 14, The thin film transistor layer is the polysilicon semiconductor layer provided on the second base coat film; a gate insulating film provided to cover the polysilicon semiconductor layer; a plurality of gate electrodes provided on the gate insulating film;

16. The display device according to any one of claims 1 to 7, a light emitting element layer provided on the thin film transistor layer, in which a plurality of light emitting elements are arranged corresponding to the plurality of sub-pixels; a sealing film provided so as to cover the light-emitting element layer.

17. 17. The display device according to claim 16, The display device is characterized in that each of the light-emitting elements is an organic electroluminescence element.

18. 17. The display device according to claim 16, The display device is characterized in that the plurality of thin film transistors are driving thin film transistors configured to control current of each of the light emitting elements.

19. The display device according to any one of claims 1 to 7, The display device is characterized in that the base substrate is a resin substrate.

20. a base substrate; and a thin film transistor layer provided on the base substrate; the thin film transistor layer has a polysilicon semiconductor layer formed of a polysilicon film, in which a channel region and a conductor region are defined, and a plurality of thin film transistors electrically connected to each other via signal wiring in the conductor region are provided corresponding to a plurality of sub-pixels constituting the display region; a transparent back gate layer formed of an oxide semiconductor film and having a conductive portion in which at least a portion of the oxide semiconductor film is conductive, provided below the thin film transistor layer, The thin film transistor layer forming step of forming the thin film transistor layer includes: a first base coat film forming step of forming a first base coat film on the base substrate; a back-gate layer forming step of forming the oxide semiconductor film on the surface of the substrate on which the first base coat film has been formed, and then patterning the oxide semiconductor film to form the back-gate layer; a second base coat film forming step of forming a second base coat film on the surface of the substrate on which the back gate layer is formed; a polysilicon semiconductor layer forming step of forming the polysilicon film on the surface of the substrate on which the second base coat film has been formed, and then patterning the polysilicon film to form the polysilicon semiconductor layer; a gate insulating film forming step of forming a gate insulating film on the surface of the substrate on which the polysilicon semiconductor layer is formed so as to cover the polysilicon semiconductor layer; a gate electrode forming step of forming a lower metal film on the surface of the substrate on which the gate insulating film has been formed, and then patterning the lower metal film to form a plurality of gate electrodes; a doping step of performing doping using the gate electrodes as a mask to form the channel region and the conductor region of the polysilicon semiconductor layer; an interlayer insulating film forming step of forming at least one interlayer insulating film on the surface of the substrate on which the plurality of gate electrodes are formed; a contact hole forming step of forming contact holes in the surface of the substrate on which the at least one interlayer insulating film is formed, the contact holes exposing at least a part of the conductive region in the polysilicon semiconductor layer and the conductive portion in the back gate layer; a signal wiring forming step of forming an upper metal film on the surface of the substrate on which the contact hole is formed, and then patterning the upper metal film to form the signal wiring that covers the exposed surface of the conductor portion exposed in the contact hole, In the second base coat film forming step, a heat treatment is performed after the second base coat film is formed to convert at least a region of the back gate layer that overlaps with the channel region in a plan view into a conductor, thereby forming the conductor portion; The method for manufacturing a display device, wherein the signal wiring forming step electrically connects the conductor portion and the signal wiring.

21. 21. The method for manufacturing a display device according to claim 20, the thin film transistor layer forming step includes a metal layer forming step that is performed after the back gate layer forming step and before the second base coat film forming step; The metal layer forming process is a method for manufacturing a display device, characterized in that a metal film is formed on the surface of the substrate on which the back gate layer is formed, and then the metal film is patterned to form a metal layer that is island-shaped in plan view between the lower end of the contact hole and the conductive portion.