Substrate for mounting semiconductor element
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-03-21
- Publication Date
- 2026-04-08
AI Technical Summary
Conventional semiconductor element mounting substrates face issues with corrosion of the metal base material, particularly when exposed to salt water or corrosive solutions during use and manufacturing, leading to potential defects and increased manufacturing costs.
A substrate design featuring a metal base material with a protective layer made of higher corrosion-resistant materials like nickel, gold, or titanium, applied between the base material and the electrode, which also includes an adhesive layer to enhance adhesion and prevent peeling of insulating layers, while maintaining a thickness that supports heat dissipation without compromising performance.
The protective layer effectively suppresses corrosion of the base material, reducing the risk of defects and manufacturing costs, while ensuring reliable adhesion and heat dissipation performance, even in environments with salt water or corrosive solutions.
Abstract
Description
Semiconductor device mounting board
[0001] The present invention relates to a semiconductor device mounting board.
[0002]
[0003] Conventionally, semiconductor element mounting boards for mounting semiconductor elements have been known. For example, Patent Document 1 discloses a semiconductor element mounting board including a metal substrate, an insulating layer, and an intermediate layer disposed between the substrate and the insulating layer.
[0003] Japanese Patent Application Publication No. 6-29533
[0004] However, even with prior art such as that disclosed in Patent Document 1, there was still room for improvement in the technology for suppressing corrosion of the substrate in a semiconductor device mounting board. In the semiconductor device mounting board described in Patent Document 1, the substrate is formed of metal, and therefore there was a risk of the substrate corroding if saltwater adheres to the substrate when a semiconductor device is mounted on the semiconductor device mounting board and used. For this reason, a technology for suppressing corrosion of the substrate was desired.
[0005] An object of the present invention is to provide a technique for suppressing corrosion of a substrate in a semiconductor element mounting board.
[0006] The present invention has been made to solve at least part of the above-mentioned problems, and can be realized in the following aspects.
[0007] (1) According to one aspect of the present invention, there is provided a semiconductor device mounting board including a metal substrate, electrodes connected to a semiconductor device, and a protective layer disposed between the substrate and the electrodes, the protective layer being made of a material that is more corrosion-resistant than the metal forming the substrate.
[0008] According to this configuration, the protective layer disposed between the metal substrate and the electrode is made of a material that has higher corrosion resistance than the metal that forms the substrate, thereby making it possible to suppress corrosion of the substrate.
[0009] (2) In the semiconductor element mounting board of the above embodiment, the base material may be formed in a flat plate shape, and the protective layer may cover a pair of main surfaces of the base material and a side surface formed between the pair of main surfaces. According to this configuration, the base material formed in a flat plate shape has the pair of main surfaces and the side surface formed between the pair of main surfaces covered by the protective layer. This prevents the surface of the base material from being exposed, thereby further suppressing corrosion of the base material.
[0010] (3) In the semiconductor device mounting board of the above aspect, the thickness of the protective layer may be smaller than the thickness of the base material. With this configuration, when the semiconductor device mounting board is used as a heat dissipation board for dissipating heat generated in the semiconductor device, corrosion of the base material can be suppressed without reducing heat dissipation properties.
[0011] (4) In the semiconductor device mounting board of the above embodiment, the protective layer may be formed of a metal containing one of nickel, gold, palladium, titanium, molybdenum, tungsten, platinum, silver, lead, and tin as a main component. According to this configuration, the metal containing one of nickel, gold, palladium, titanium, molybdenum, tungsten, platinum, silver, lead, and tin as a main component that forms the protective layer can be easily formed by plating. This makes it possible to form the protective layer relatively easily in the manufacturing process of the semiconductor device mounting board.
[0012] (5) The semiconductor element mounting board of the above embodiment may further include an insulating layer disposed between the base material and the electrode, and an adhesion layer disposed between the insulating layer and the protective layer and in close contact with the insulating layer and the protective layer. According to this configuration, the adhesion layer can adhere the insulating layer to the protective layer, thereby suppressing corrosion of the base material by the protective layer and suppressing peeling of the insulating layer from the base material.
[0013] (6) In the semiconductor element mounting substrate of the above embodiment, the adhesion layer may be formed of a metal containing one of titanium, chromium, and molybdenum as a main component. According to this configuration, by using an adhesion layer formed of a metal containing one of titanium, chromium, and molybdenum as a main component, it is possible to further suppress peeling of the insulating layer from the base material while suppressing corrosion of the base material by the protective layer.
[0014] The present invention can be realized in various aspects, for example, in the form of a product including a semiconductor mounting board, a method for manufacturing a semiconductor mounting board, and the like.
[0015] Fig. 3 is a schematic cross-sectional view of a semiconductor device mounting board according to a first embodiment; Fig. 4 is a schematic cross-sectional view of a semiconductor package according to the first embodiment; Fig. 5 is a schematic cross-sectional view of a semiconductor device mounting board according to a second embodiment; Fig. 6 is a cross-sectional view taken along line A-A in Fig. 3; Fig. 7 is a schematic cross-sectional view of a modified example of the semiconductor device mounting board according to the first embodiment;
[0016] First Embodiment FIG. 1 is a schematic cross-sectional view of a semiconductor device mounting board 1 according to a first embodiment. FIG. 2 is a schematic cross-sectional view of a semiconductor package 5 according to the first embodiment. The semiconductor device mounting board 1 according to this embodiment supports an optical semiconductor, such as a light-emitting diode (LED) or a semiconductor laser (LD), as a semiconductor device 5a, and functions as a heat dissipation substrate that dissipates heat generated during light emission. The semiconductor device mounting board 1 includes a base material 10, a protective layer 20, an adhesion layer 30, an insulating layer 40, an adhesion layer 50, a bonding layer 60, and electrodes 70. Note that, for ease of explanation, the thickness relationships among the base material 10, the protective layer 20, the adhesion layer 30, the insulating layer 40, the adhesion layer 50, the bonding layer 60, the electrodes 70, and the semiconductor device 5a in FIGS. 1 and 2 are illustrated differently from the actual thickness relationships.
[0017] The substrate 10 is a member having a flat plate shape and serves as the base of the semiconductor element mounting board 1. In this embodiment, the thickness of the substrate 10 is 1 mm. The substrate 10 is made of a metal. In this embodiment, the substrate 10 is made of copper (Cu). The substrate 10 may be formed of a material containing copper as a main component, aluminum (Al), or a material containing aluminum as a main component. Here, "main component" refers to a component that accounts for more than 50% by mass of the target material. The substrate 10 may be made of an alloy of copper and aluminum. By forming the substrate 10 from these metals, heat generated in the semiconductor element 5a can be efficiently dissipated to the outside via the substrate 10.
[0018] The protective layer 20 is formed on each of the pair of main surfaces 11, 12 of the substrate 10. The protective layer 20 has a protective layer 21 formed on one main surface 11 of the pair of main surfaces 11, 12, and a protective layer 22 formed on the other main surface 12. The protective layer 21 is disposed between the substrate 10 and the electrode 70, more specifically, between the substrate 10 and the adhesion layer 30.
[0019] The protective layer 20 is formed of a material that is more resistant to corrosion by saltwater than the copper that forms the base material 10. Here, "corrosion resistance by saltwater" refers to the resistance to corrosion by saltwater, and "saltwater" refers to water with a mass concentration of sodium chloride (NaCl) of 5% or less. In this embodiment, the resistance to corrosion by saltwater is determined by the magnitude relationship of the natural potential in saltwater. The natural potential of an object in saltwater can be determined by measuring the potential of the object immersed in saltwater. Specifically, the natural potential of gold (Au), palladium (Pd), titanium (Ti), and nickel (Ni) in saltwater is greater than that of copper. Therefore, these metals can be said to have higher corrosion resistance by saltwater than copper. The protective layer 20 is formed of a metal primarily composed of any one of nickel, gold, palladium, titanium, molybdenum (Mo), tungsten (W), platinum (Pt), silver (Ag), lead (Pb), and tin (Sn). In this embodiment, the protective layer 20 is formed of nickel. The protective layer 20 may be formed of a metal containing nickel as a main component, or may be formed of a metal containing any of a nickel-cobalt alloy (Ni-Co), a nickel-phosphorus alloy (Ni-P), or a nickel-boron alloy (Ni-B).
[0020] The nickel forming the protective layer 20 has a higher natural potential in an iodine-potassium iodide solution used to etch the bonding layer 60 and the electrodes 70, which will be described later, than copper. That is, it can be said that the protective layer 20 has higher corrosion resistance to an iodine-potassium iodide solution than copper. Furthermore, the nickel forming the protective layer 20 has a higher natural potential in a hydrogen peroxide solution used to etch the adhesion layers 30 and 50, which will be described later, than copper. That is, it can be said that the protective layer 20 has higher corrosion resistance to a hydrogen peroxide solution than copper. Thus, it can be said that the protective layer 20 formed of nickel has higher corrosion resistance than copper in salt water, an iodine-potassium iodide solution, and a hydrogen peroxide solution.
[0021] The thickness of each of the protective layers 21 and 22 of the protective layer 20 is smaller than the thickness of the base material 10. In this embodiment, the thickness of each of the protective layers 21 and 22 is, for example, 3 μm. As a result, when the semiconductor element mounting board 1 is used as a heat dissipation substrate for the semiconductor element 5 a, the protective layers 21 and 22 are less likely to act as a resistance to heat dissipation.
[0022] The adhesion layer 30 is disposed between the protective layer 20 and the insulating layer 40. The adhesion layer 30 is formed of a metal containing one of titanium, chromium (Cr), and molybdenum as its main component. In this embodiment, the adhesion layer 30 is formed of a metal containing titanium as its main component, such as titanium or titanium oxide (TiO2). The thickness of the adhesion layer 30 is, for example, 0.5 μm. The adhesion layer 30 adheres to both the protective layer 20 and the insulating layer 40, and prevents cracks from forming in the insulating layer 40 due to differences in thermal expansion coefficients.
[0023] The insulating layer 40 is disposed between the substrate 10 and the electrode 70, more specifically, between the adhesion layer 30 and the adhesion layer 50. The insulating layer 40 is made of alumina (Al2O3). In this embodiment, the insulating layer 40 has a thickness of 50 μm or less. The insulating layer 40 insulates the substrate 10, which is made of metal, from the electrode 70. The insulating layer 40 is not limited to alumina, and may be made of a ceramic material such as silicon nitride (SiNx), aluminum nitride (AlN), aluminum oxynitride (AlON), silicon oxynitride (SiON), yttrium oxide (YO3), silicon carbide (SiC), silicon dioxide (SiO2), SiOCN, or SiBCN.
[0024] The adhesion layer 50 is disposed between the insulating layer 40 and the bonding layer 60. In this embodiment, the adhesion layer 50 is formed of a metal containing titanium as a main component, such as titanium or titanium oxide (TiO2). The thickness of the adhesion layer 50 is, for example, 0.2 μm. The adhesion layer 50 adheres to both the insulating layer 40 and the bonding layer 60, and prevents cracks from forming in the insulating layer 40 due to differences in thermal expansion coefficients.
[0025] The bonding layer 60 is disposed between the adhesion layer 50 and the electrode 70. The bonding layer 60 is made of palladium and has a thickness of, for example, 0.07 μm. The bonding layer 60 improves the bonding strength between the adhesion layer 50 and the electrode 70.
[0026] The electrodes 70 are connected to the semiconductor element 5a via the bumps 6 (see FIG. 2). The electrodes 70 are made of gold (Au) and have a thickness of, for example, 3.0 μm.
[0027] The semiconductor package 5 includes a semiconductor element mounting substrate 1, a semiconductor element 5a, a phosphor 5b, and a resin portion 5c (see FIG. 2). In the semiconductor package 5, the semiconductor element 5a is connected to the semiconductor element mounting substrate 1 by bumps 6, and the phosphor 5b is provided on the opposite side of the semiconductor element mounting substrate 1. The phosphor 5b converts the wavelength of light emitted by the semiconductor element 5a, which is an optical semiconductor, and emits the converted light to the outside. The resin portion 5c seals the semiconductor element 5a and the phosphor 5b.
[0028] Next, a method for manufacturing the semiconductor device mounting board 1 of this embodiment will be described. First, a nickel layer is formed by plating, sputtering, or the like on each of a pair of main surfaces of a copper flat plate member that will serve as the base material 10. After the nickel layer is formed, a titanium layer corresponding to the adhesion layer 30, an alumina layer corresponding to the insulating layer 40, a titanium layer corresponding to the adhesion layer 50, a palladium layer corresponding to the bonding layer 60, and a gold layer corresponding to the electrode 70 are formed in this order on the nickel layer. After a metal layer including the gold layer is formed on the nickel layer, the metal layer including the gold layer is etched into a predetermined pattern, and the flat plate member is cut to manufacture the semiconductor device mounting board 1.
[0029] Next, the features of the semiconductor device mounting board 1 of this embodiment will be described, while touching on the problems of a comparative semiconductor device mounting board that does not have a configuration equivalent to the protective layer 20 of this embodiment. For example, when the semiconductor device mounting board is used as a heat dissipation substrate for a semiconductor device, copper, which has relatively high heat dissipation properties, is used as the base material. However, because copper has relatively low corrosion resistance, the semiconductor device mounting board of the comparative example that does not have a configuration equivalent to the protective layer 20 of this embodiment may corrode the base material when saltwater adheres to it in an environment where saltwater is present, for example.
[0030] In the semiconductor device mounting board 1 of this embodiment, the protective layer 20 formed on each of the pair of main surfaces 11, 12 of the base material 10 is made of nickel. Nickel has a higher natural potential in salt water than the copper that forms the base material 10, and is more corrosion-resistant to salt water than copper. This makes it possible to suppress corrosion of the base material 10 even in an environment where salt water is present, when the semiconductor package 5 including the semiconductor device mounting board 1 is actually used. This makes it possible to suppress the occurrence of problems during actual use.
[0031] Generally, in the manufacturing process of a semiconductor device mounting board, as described above, multiple layers are formed on a substrate, and then a predetermined pattern is formed by etching. However, because the copper forming the substrate has relatively low corrosion resistance, the substrate in the comparative example of the semiconductor device mounting board may be subject to galvanic corrosion by the iodine potassium iodide solution used for etching. If the substrate corrodes, not only will it be difficult to support the semiconductor device, but in a semiconductor package in which the semiconductor device is sealed with resin, the adhesion between the resin and the substrate will decrease, making it impossible to seal the semiconductor device. Furthermore, preventing the substrate from corroding due to etching is time-consuming, which increases manufacturing costs.
[0032] On the other hand, the semiconductor device mounting board 1 of this embodiment includes a protective layer 20 disposed between the substrate 10 and the electrode 70 and formed of nickel, which has higher corrosion resistance to iodine potassium iodide solution and hydrogen peroxide solution than the copper forming the substrate 10. This prevents the substrate 10 from being corroded by the iodine potassium iodide solution and hydrogen peroxide solution during the manufacturing process of the semiconductor device mounting board 1, thereby enabling the semiconductor device 5a to be encapsulated and supported in the semiconductor package 5. Furthermore, because corrosion of the substrate 10 is suppressed, it is not necessary to protect the substrate 10 during the manufacturing process of the semiconductor device mounting board 1, thereby reducing manufacturing costs. Furthermore, in the semiconductor device mounting board 1 of this embodiment, the surface of the copper substrate 10, which serves as the base, is hardened by being covered with the nickel of the protective layer 20. This prevents the substrate 10 from being scratched during handling during the manufacturing of the semiconductor device mounting board 1. Furthermore, preventing scratches on the surface of the substrate 10 facilitates process control of the surface roughness of the substrate 10, etc.
[0033] Furthermore, when the substrate provided in the semiconductor device mounting board of the comparative example is formed of nickel, there is a risk that the insulating layer will peel off from the substrate due to poor adhesion between the alumina forming the insulating layer and the nickel. In the semiconductor device mounting board 1 of this embodiment, an adhesion layer 30 formed of a metal containing titanium as a main component is disposed between the insulating layer 40 and the protective layer 20. The adhesion layer 30 adheres to both the protective layer 20 and the insulating layer 40, thereby preventing the insulating layer 40 from peeling off from the substrate 10. This prevents the occurrence of short circuits between the copper substrate 10 and the electrode 70.
[0034] According to the semiconductor element mounting board 1 of this embodiment described above, the protective layer 20 disposed between the substrate 10 and the electrode 70 is made of nickel, which has higher corrosion resistance to saltwater than the copper that forms the substrate 10. This makes it possible to suppress corrosion of the substrate 10 due to adhesion of saltwater during actual use.
[0035] Furthermore, according to the semiconductor device mounting board 1 of this embodiment, the nickel forming the protective layer 20 has higher corrosion resistance to the potassium iodide solution and hydrogen peroxide solution used in manufacturing the semiconductor device mounting board 1 than the copper forming the base material 10. This makes it possible to suppress corrosion of the base material 10 due to etching during manufacturing the semiconductor device mounting board 1.
[0036] Furthermore, according to the semiconductor device mounting board 1 of this embodiment, the thickness of the protective layer 20 is smaller than the thickness of the base material 10. This allows the protective layer 20 to suppress corrosion of the base material 10 without reducing the heat dissipation performance of the semiconductor device mounting board 1.
[0037] Furthermore, according to the semiconductor device mounting board 1 of this embodiment, the nickel that forms the protective layer 20 can be easily formed by plating. This allows the protective layer 20 to be formed relatively easily in the manufacturing process of the semiconductor device mounting board 1.
[0038] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, the insulating layer 40 and the protective layer 20 can be adhered to each other by the adhesion layer 30, so that the protective layer 20 can suppress corrosion of the base material 10 while also suppressing peeling of the insulating layer 40 from the base material 10.
[0039] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, by using the adhesion layer 30 formed of titanium, the protective layer 20 can suppress corrosion of the base material 10 while further suppressing peeling of the insulating layer 40 from the base material 10.
[0040] 3 is a cross-sectional view of a semiconductor device mounting board 2 according to a second embodiment. The semiconductor device mounting board 2 according to the second embodiment is different from the semiconductor device mounting board 1 according to the first embodiment (FIG. 1) in that the position at which the protective layer is disposed relative to the substrate is different.
[0041] The semiconductor element mounting board 2 of the second embodiment includes a base material 10, a protective layer 20, an adhesion layer 30, an insulating layer 40, an adhesion layer 50, a bonding layer 60, an electrode 70, and a protective layer 80. Note that, for convenience of explanation, the thickness relationships among the base material 10, the protective layer 20, the adhesion layer 30, the insulating layer 40, the adhesion layer 50, the bonding layer 60, the electrode 70, and the protective layer 80 in Fig. 3 are illustrated as being different from the actual thickness relationships.
[0042] The protective layer 20 covers the pair of main surfaces 11, 12 of the base material 10 and the side surface 13 formed between the pair of main surfaces 11, 12. The protective layer 20 provided in the semiconductor element mounting board 2 has a protective layer 21 formed on one main surface 11 of the pair of main surfaces 11, 12, a protective layer 22 formed on the other main surface 12, and a protective layer 23 formed on the side surface 13. As shown in Fig. 3 , the protective layer 23 is formed so as to connect to the protective layer 21 and the protective layer 22. The thickness of the protective layer 23 is smaller than the thickness of the base material 10.
[0043] 4 is a cross-sectional view taken along line A-A in FIG. 3 , showing the base material 10 and the protective layer 23. The protective layer 23 is formed on each of the four side surfaces 13 of the base material 10, which has a rectangular cross section perpendicular to the stacking direction of the layers in the semiconductor device mounting board 1. In this embodiment, the four protective layers 23 are connected to each other at the four corner portions 10a of the base material 10, as shown in FIG. 4 . That is, the protective layer 23 is formed so as to cover the entire side surface 13 of the base material 10. As a result, the protective layer 20 covers the entire surface of the base material 10.
[0044] According to the semiconductor element mounting board 2 of this embodiment described above, the protective layer 20 disposed between the base material 10 and the electrode 70 is made of nickel, which has higher corrosion resistance to saltwater than copper, which forms the base material 10. This makes it possible to suppress corrosion of the base material 10 due to adhesion of saltwater.
[0045] Furthermore, according to the semiconductor element mounting board 2 of this embodiment, the base material 10 formed in a flat plate shape has the pair of main surfaces 11, 12 and the side surface 13 formed between the pair of main surfaces 11, 12 covered by the protective layer 20. This prevents the surface of the base material 10 from being exposed, further suppressing corrosion of the base material 10.
[0046] <Modifications of this embodiment> The present invention is not limited to the above-described embodiment, and can be implemented in various forms without departing from the spirit of the present invention. For example, the following modifications are also possible.
[0047] [Modification 1] In the above-described embodiment, the semiconductor device mounting board supports the optical semiconductor and functions as a heat dissipation board that dissipates heat generated during light emission to the outside. However, the semiconductor device mounted on the semiconductor device mounting board is not limited to an optical semiconductor.
[0048] [Variation 2] In the above-described embodiment, the protective layer 20 is formed of nickel, which has higher corrosion resistance to saltwater, iodine potassium iodide solution, and hydrogen peroxide solution than the copper forming the substrate 10. However, the liquids for which the protective layer 20 is corrosion-resistant are not limited to these. For example, the protective layer may be formed of a material that is more corrosion-resistant to iodine potassium iodide solution than copper, or a material that is more corrosion-resistant to hydrogen peroxide solution than the material forming the substrate. Specifically, the protective layer may be formed of gold, palladium, titanium, or the like, which have a higher natural potential in iodine potassium iodide solution than copper, or gold, palladium, or the like, which have a higher natural potential in hydrogen peroxide solution than copper. As described above, gold and palladium both have higher corrosion resistance to saltwater than copper. Therefore, forming the protective layer from gold or palladium, similar to the protective layer 20 of this embodiment, can suppress both corrosion due to saltwater adhesion during actual use and corrosion due to etching during the manufacturing of the semiconductor device mounting substrate 1. The natural potential of an object in an iodine potassium iodide solution or hydrogen peroxide solution can be determined by measuring the potential of the object immersed in the iodine potassium iodide solution or hydrogen peroxide solution.
[0049] [Modification 3] In the first embodiment, the protective layer 20 is formed on each of the pair of main surfaces 11, 12 of the substrate 10. In the second embodiment, the protective layer 20 covers the pair of main surfaces 11, 12 of the substrate 10 and the side surface 13 formed between the pair of main surfaces 11, 12. However, the position at which the protective layer 20 is formed on the substrate 10 is not limited to this. It is sufficient that at least a portion of the protective layer 20 is disposed between the substrate 10 and the electrode 70.
[0050] Fig. 5 is a cross-sectional view of a modified example of the semiconductor device mounting board 1 of the first embodiment. In the modified example of the semiconductor device mounting board 1 shown in Fig. 5, the protective layer 20 only has a protective layer 21 formed on one main surface 11 on the side on which the insulating layer 40 and the electrodes 70 are formed. The semiconductor device mounting board 1 shown in Fig. 5 can also suppress corrosion of the base material 10 due to salt water.
[0051] [Modification 4] In the above-described embodiment, the thickness of each of the protective layers 21, 22, and 23 of the protective layer 20 is smaller than the thickness of the base material 10. The thickness of each of the protective layers 21, 22, and 23 may be equal to or greater than the thickness of the base material 10. If the thickness of each of the protective layers 21, 22, and 23 is smaller than the thickness of the base material 10, when the semiconductor element mounting board 1 is used as a heat dissipation board for the semiconductor element 5a, the protective layers are less likely to act as a resistance to heat dissipation, and therefore, a decrease in the heat dissipation efficiency of the semiconductor element mounting board 1 can be suppressed.
[0052] [Variation 5] In the above embodiment, the protective layer 20 is formed from nickel, but the material forming the protective layer 20 is not limited to this. The protective layer 20 may be formed from a metal containing any one of nickel, gold, palladium, titanium, molybdenum, tungsten, platinum, silver, lead, and tin as a main component. The protective layer 20 may also be formed from a metal containing any one of a nickel-cobalt alloy (Ni—Co), a nickel-phosphorus alloy (Ni—P), or a nickel-boron alloy (Ni—B). The protective layer 20 may be formed from any material that has higher corrosion resistance than the metal forming the base material 10.
[0053] [Variation 6] In the above-described embodiment, the base material 10 is made of copper. However, the material for the base material 10 is not limited to this. When the semiconductor element mounting board is used as a heat dissipation board for dissipating heat generated in the semiconductor element, a metal with relatively high thermal conductivity is desirable, but the material is not limited to metal.
[0054] [Variation 7] In the above-described embodiment, the semiconductor element mounting board includes an adhesion layer 30 that adheres the insulating layer 40 and the protective layer 20 to each other. The adhesion layer may be omitted. By providing the adhesion layer 30 between the insulating layer 40 and the protective layer 20, it is possible to prevent the insulating layer 40 from peeling off from the base material 10. Furthermore, the material for forming the adhesion layer 30 is not limited to a metal containing titanium as a main component. The material for forming the adhesion layer 30 may also be a metal containing chromium or molybdenum as a main component. Any material may be used as long as it adheres to both the protective layer 20 and the insulating layer 40.
[0055] This aspect has been described above based on embodiments and modifications. However, the above-described embodiments are intended to facilitate understanding of this aspect and are not intended to limit this aspect. This aspect may be modified or improved without departing from the spirit and scope of the claims, and equivalents thereof are included in this aspect. Furthermore, if a technical feature is not described as essential in this specification, it may be deleted as appropriate.
[0056] (Application Example 1) A semiconductor device mounting board comprising: a base made of metal; electrodes connected to a semiconductor device; and a protective layer disposed between the base and the electrodes, the protective layer being formed of a material having higher corrosion resistance than the metal forming the base. (Application Example 2) The semiconductor device mounting board according to Application Example 1, wherein the base is formed in a flat plate shape, and the protective layer covers a pair of main surfaces of the base and a side surface formed between the pair of main surfaces. (Application Example 3) The semiconductor device mounting board according to Application Example 1 or Application Example 2, wherein the protective layer is thinner than the thickness of the base. (Application Example 4) The semiconductor device mounting board according to any one of Application Examples 1 to 3, wherein the protective layer is formed of a metal containing any one of nickel, gold, palladium, titanium, molybdenum, tungsten, platinum, silver, lead, and tin as a main component. (Application Example 5) The semiconductor device mounting board according to any one of Application Examples 1 to 4, further comprising: an insulating layer disposed between the base material and the electrode; and an adhesion layer disposed between the insulating layer and the protective layer and in close contact with the insulating layer and the protective layer. (Application Example 6) The semiconductor device mounting board according to any one of Application Examples 1 to 5, wherein the adhesion layer is formed of a metal containing any one of titanium, chromium, and molybdenum as a main component.
[0057] DESCRIPTION OF SYMBOLS 1, 2... Semiconductor element mounting substrate 5a... Semiconductor element 10... Base material 11, 12... Main surface 13... Side surface 20, 21... Protective layer 30... Adhesion layer 40... Insulating layer 70... Electrode
Claims
1. A substrate for mounting semiconductor devices, A base material made of metal, semiconductor element cross-electrode, An insulating layer disposed between the substrate and the electrode, A protective layer disposed between the substrate and the insulating layer, the protective layer being made of a material with higher corrosion resistance than the metal forming the substrate, The thickness of the insulating layer is 50 μm or less. A substrate for mounting semiconductor devices, characterized by the following features.
2. A semiconductor element mounting substrate according to claim 1, The substrate is formed in a flat plate shape, The protective layer covers the pair of main surfaces of the substrate and the side surfaces formed between the pair of main surfaces. A substrate for mounting semiconductor devices, characterized by the following features.
3. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The thickness of the protective layer is less than the thickness of the substrate. A substrate for mounting semiconductor devices, characterized by the following features.
4. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The protective layer is formed of a metal whose main component is one of the following: nickel, gold, palladium, titanium, molybdenum, tungsten, platinum, silver, lead, or tin. A substrate for mounting semiconductor devices, characterized by the following features.
5. The semiconductor element mounting substrate according to claim 1 or claim 2 further, The device comprises an adhesion layer disposed between the insulating layer and the protective layer, and adhering closely to both the insulating layer and the protective layer. A substrate for mounting semiconductor devices, characterized by the following features.
6. A semiconductor element mounting substrate according to claim 5, The aforementioned adhesion layer is formed of a metal whose main component is one of titanium, chromium, or molybdenum. A substrate for mounting semiconductor devices, characterized by the following features.