Substrate for mounting semiconductor element
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-03-21
- Publication Date
- 2026-04-08
AI Technical Summary
Conventional semiconductor element mounting substrates face issues with deformation of the base material during handling and inspections, leading to defects such as cracks in the insulating layer, due to the metal base material's susceptibility to deformation.
Incorporating a protective layer made of a material harder than the base material, such as a nickel-cobalt alloy, between the base material and the electrode, which also provides corrosion resistance against salt water and sulfide gas, and is formed before the insulating layer to prevent deformation and crack formation.
The protective layer effectively suppresses deformation of the base material, reducing the occurrence of defects and improving the insulation properties of the substrate while maintaining heat dissipation performance.
Abstract
Description
Semiconductor device mounting board
[0001] The present invention relates to a semiconductor device mounting board.
[0002]
[0003] Conventionally, semiconductor element mounting boards for mounting semiconductor elements have been known. For example, Patent Document 1 discloses a semiconductor element mounting board including a metal substrate, an insulating layer, and an intermediate layer disposed between the substrate and the insulating layer.
[0003] Japanese Patent Application Publication No. 7-240570
[0004] However, even with prior art such as that disclosed in Patent Document 1, there is still room for improvement in the technology for suppressing defects caused by deformation of the substrate in a semiconductor device mounting board. In the semiconductor device mounting board described in Patent Document 1, the substrate is formed from a metal that is relatively easily deformed, and therefore there is a risk that the substrate may be deformed due to forces acting on it during handling and various inspections in the manufacturing process. Deformation of the substrate can cause defects such as cracks forming in the insulating layer, so a technology for suppressing deformation of the substrate has been desired.
[0005] An object of the present invention is to provide a technique for suppressing defects caused by deformation of a substrate in a semiconductor element mounting board.
[0006] The present invention has been made to solve at least part of the above-mentioned problems, and can be realized in the following aspects.
[0007] (1) According to one aspect of the present invention, there is provided a semiconductor device mounting board including a metal substrate, electrodes connected to a semiconductor device, and a protective layer disposed between the substrate and the electrodes, the protective layer being made of a material harder than the metal forming the substrate.
[0008] According to this configuration, the protective layer disposed between the metal substrate and the electrode is made of a material harder than the metal forming the substrate. This makes it possible to suppress deformation of the substrate even when a force that would deform the substrate acts on the semiconductor element mounting board. Therefore, it is possible to suppress the occurrence of defects due to deformation of the substrate.
[0009] (2) In the semiconductor element mounting board of the above embodiment, the protective layer may be formed of a metal. According to this configuration, the protective layer is formed of, for example, a metal that is less likely to crack than ceramic. This further suppresses deformation of the base material, thereby further suppressing defects caused by deformation of the base material.
[0010] (3) In the semiconductor device mounting board of the above embodiment, the material forming the protective layer may have a natural potential in salt water higher than that of the metal forming the base material. With this configuration, for example, when the semiconductor device mounting board having the semiconductor device mounted thereon is actually used, the protective layer can suppress corrosion of the base material due to exposure to salt water.
[0011] (4) In the semiconductor device mounting board of the above embodiment, the protective layer may be formed of a material that is corrosion-resistant against sulfide gas. According to this configuration, when the semiconductor device mounting board on which the semiconductor device is mounted is actually used, the protective layer can suppress corrosion of the base material due to sulfide gas present in the usage environment.
[0012] (5) The semiconductor mounting board of the above embodiment may further include an insulating layer disposed between the substrate and the electrode, and the protective layer may be disposed between the substrate and the insulating layer. According to this configuration, the protective layer is formed before the insulating layer is formed in the manufacturing process of the semiconductor mounting board, so that deformation of the substrate can be suppressed before the insulating layer is formed. This can suppress, for example, the occurrence of cracks in the insulating layer due to deformation of the substrate.
[0013] (6) In the semiconductor element mounting board of the above embodiment, the insulating layer may be made of any one of Al2O3, SiO2, Y2O3, AlN, Si3N4, and SIC. According to this configuration, the insulating layer is made of any one of Al2O3, SiO2, Y2O3, AlN, Si3N4, and SIC. This can improve the insulating properties of the insulating layer.
[0014] (7) The semiconductor element mounting board of the above aspect may further include an insulating layer disposed between the base material and the electrode, and the protective layer may be disposed between the insulating layer and the electrode. With this configuration, for example, the protective layer can prevent a force acting on the electrode from acting on the insulating layer. Therefore, damage to the insulating layer can be prevented.
[0015] (8) In the semiconductor element mounting board of the above embodiment, the insulating layer may be made of any one of Al2O3, SiO2, Y2O3, AlN, Si3N4, and SIC. According to this configuration, the insulating layer is made of any one of Al2O3, SiO2, Y2O3, AlN, Si3N4, and SIC. This can improve the insulating properties of the insulating layer.
[0016] (9) In the semiconductor element mounting board of the above aspect, the base material may be formed in a flat plate shape, and the protective layer may be formed on each of a pair of main surfaces of the base material. With this configuration, even if a force that would deform the base material acts on the main surface on which the electrodes are not formed, the protective layer can suppress deformation of the base material.
[0017] (10) In the semiconductor device mounting board of the above aspect, the protective layer may have a thickness of 0.5 μm to 10 μm. With this configuration, when the semiconductor device mounting board is used as a heat dissipation board for dissipating heat generated in a semiconductor device, deformation of the base material can be suppressed without reducing heat dissipation performance due to the protective layer.
[0018] (11) In the semiconductor device mounting board of the above embodiment, the protective layer may contain any one of a nickel-cobalt alloy, a nickel-phosphorus alloy, and a nickel-boron alloy. According to this configuration, any of the nickel-cobalt alloy, nickel-phosphorus alloy, and nickel-boron alloy contained in the protective layer can be formed by plating. This allows the protective layer to be formed relatively easily in the manufacturing process of the semiconductor device mounting board.
[0019] (12) In the semiconductor device mounting board of the above embodiment, the base material may be formed of a material containing copper or aluminum as a main component. With this configuration, the base material is formed of a material containing copper or aluminum as a main component, which has high heat dissipation properties, thereby improving the heat dissipation properties of the semiconductor device mounting board.
[0020] The present invention can be realized in various forms, for example, in the form of a product including a semiconductor mounting board, a method for manufacturing a semiconductor mounting board, a method for inspecting a semiconductor mounting board, etc.
[0021] It is a cross-sectional view of a semiconductor device mounting board of a first embodiment, a cross-sectional view of a semiconductor package, a cross-sectional view of a semiconductor device mounting board of a second embodiment, and a cross-sectional view of a semiconductor device mounting board of a third embodiment.
[0022] First Embodiment Fig. 1 is a schematic cross-sectional view of a semiconductor device mounting board 1 according to a first embodiment. Fig. 2 is a schematic cross-sectional view of a semiconductor package 5 including the semiconductor device mounting board 1 according to the first embodiment. The semiconductor device mounting board 1 according to this embodiment supports an optical semiconductor such as a light-emitting diode (LED) or a semiconductor laser (LD) as a semiconductor device 5a, and functions as a heat dissipation substrate that dissipates heat generated during light emission to the outside. The semiconductor device mounting board 1 includes a base material 10, a protective layer 20, an adhesion layer 30, an insulating layer 40, an adhesion layer 50, a bonding layer 60, and an electrode 70. In addition, in Figures 1 and 2, the thickness relationships between the substrate 10, protective layer 20, adhesion layer 30, insulating layer 40, adhesion layer 50, bonding layer 60, electrode 70, and semiconductor element 5a are illustrated to differ from the actual thickness relationships for the sake of convenience of explanation.
[0023] The substrate 10 is a member having a flat plate shape and serves as the base of the semiconductor element mounting board 1. In this embodiment, the thickness of the substrate 10 is 1 mm. The substrate 10 is made of a metal. In this embodiment, the substrate 10 is made of copper (Cu). The substrate 10 may be formed of a material containing copper as a main component, aluminum (Al), or a material containing aluminum as a main component. Here, "main component" refers to a component that accounts for more than 50% by mass of the target material. The substrate 10 may be made of an alloy of copper and aluminum. By forming the substrate 10 from these metals, heat generated in the semiconductor element 5a can be efficiently dissipated to the outside via the substrate 10.
[0024] The protective layer 20 is disposed between the substrate 10 and the electrode 70, more specifically, between the substrate 10 and the adhesive layer 30. In this embodiment, the protective layer 20 is provided on one of the pair of main surfaces 11, 12 of the substrate 10. The protective layer 20 is formed of a material harder than the metal forming the substrate 10. Here, "a material harder than the metal forming the substrate 10" refers to, for example, a material having a Vickers hardness greater than the Vickers hardness of the metal forming the substrate 10. In this embodiment, the protective layer 20 is formed of a metal that is less likely to crack than ceramics, etc. Specifically, the protective layer 20 is formed of a metal containing a nickel-cobalt alloy (Ni-Co). In this embodiment, the thickness of the protective layer 20 is 0.5 μm or more and 10 μm or less. As a result, the protective layer 20 can transmit heat generated in the semiconductor element 5a to the substrate 10 while suppressing deformation of the substrate 10. The protective layer 20 may be formed of a metal containing either a nickel-phosphorus alloy (Ni-P) or a nickel-boron alloy (Ni-B), or may be formed of tungsten (W) or molybdenum (Mo).
[0025] The material forming the protective layer 20 is a material that has a higher natural potential in salt water than the copper forming the base material 10. Here, "salt water" refers to water with a mass concentration of sodium chloride (NaCl) of 5% or less. This makes the protective layer 20 less susceptible to corrosion even when it comes into contact with metal materials that may be in electrical contact with the semiconductor element mounting board 1, such as copper, titanium (Ti), nickel, and cobalt, in salt water.
[0026] The protective layer 20 is formed of a material that is more corrosion-resistant to sulfide gas (HS) than the copper that forms the base material 10. Here, "corrosion resistance to sulfide gas" refers to the property of making corrosion by sulfide gas less likely to progress in an environment where the volume concentration of sulfide gas is 15 ppm or less. This allows the protective layer 20 to suppress corrosion of the base material 10 by sulfide gas in the environment during actual use.
[0027] The adhesion layer 30 is disposed between the protective layer 20 and the insulating layer 40. In this embodiment, the adhesion layer 30 is made of titanium and has a thickness of, for example, 0.5 μm. The adhesion layer 30 adheres the protective layer 20 and the insulating layer 40 to each other and also suppresses the formation of cracks in the insulating layer 40 due to a difference in thermal expansion coefficients.
[0028] The insulating layer 40 is disposed between the substrate 10 and the electrode 70, more specifically, between the adhesion layer 30 and the adhesion layer 50. The insulating layer 40 is formed of any one of Al2O3, SiO2, YO3, AlN, Si3N4, and SIC. In this embodiment, the insulating layer 40 is made of Al2O3 and has a thickness of, for example, 5 μm. The insulating layer 40 insulates the substrate 10, which is made of metal, from the electrode 70.
[0029] The adhesion layer 50 is disposed between the insulating layer 40 and the bonding layer 60. In this embodiment, the adhesion layer 50 is made of titanium and has a thickness of, for example, 0.2 μm. The adhesion layer 50 adheres the insulating layer 40 and the bonding layer 60 to each other and also suppresses the formation of cracks in the insulating layer 40 due to a difference in thermal expansion coefficient.
[0030] The bonding layer 60 is disposed between the adhesion layer 50 and the electrode 70. The bonding layer 60 is made of palladium (Pd) and has a thickness of, for example, 0.07 μm. The bonding layer 60 improves the bonding strength between the adhesion layer 50 and the electrode 70.
[0031] The electrodes 70 are connected to the semiconductor element 5a via the bumps 6 (see FIG. 2). The electrodes 70 are made of gold (Au) and have a thickness of, for example, 3.0 μm.
[0032] The semiconductor package 5 includes a semiconductor element mounting board 1, a semiconductor element 5a, a phosphor 5b, and a resin portion 5c (see FIG. 2). In the semiconductor package 5, the semiconductor element 5a is connected to the semiconductor element mounting board 1 by bumps 6, and the phosphor 5b is provided on the opposite side of the semiconductor element mounting board 1. The phosphor 5b converts the wavelength of light emitted by the semiconductor element 5a, which is an optical semiconductor, and emits the converted light to the outside. The resin portion 5c seals the semiconductor element 5a and the phosphor 5b.
[0033] Next, a method for manufacturing the semiconductor device mounting board 1 of this embodiment will be described. First, a nickel-cobalt alloy film is formed on one side of a copper flat plate member that will become the base material 10, to form the protective layer 20. Thereafter, an adhesion layer 30, an insulating layer 40, an adhesion layer 50, a bonding layer 60, and an electrode 70 are formed in this order on the protective layer 20, to manufacture the semiconductor device mounting board 1.
[0034] Next, the features of the semiconductor mounting board 1 of this embodiment will be described, while touching on the issues of a semiconductor mounting board not provided with a protective layer 20 as a comparative example. In the manufacturing process of a semiconductor mounting board, loads are applied to the electrodes of the semiconductor mounting board during processes such as probe testing and chip mounting, which may cause the substrate to dent in the area where the load is applied. Furthermore, since a handling tool comes into contact with the semiconductor mounting board during handling, a force from the tool is applied. Therefore, in the semiconductor mounting board of the comparative example, the substrate may deform. When the substrate deforms, the insulating layer laminated on the substrate also deforms, which may result in cracks forming in the insulating layer. Cracks in the insulating layer may cause dielectric breakdown in the semiconductor mounting board.
[0035] The semiconductor device mounting board 1 of this embodiment includes a protective layer 20 between the substrate 10 and the electrodes 70, the protective layer 20 being formed of a material harder than the metal forming the substrate 10. As a result, even if a load is applied to the electrodes 70 of the semiconductor device mounting board 1 during the manufacturing process of the semiconductor device mounting board 1, the protective layer 20 is less likely to deform, making the substrate 10 less likely to dent. Similarly, even if a force is applied from a tool when the substrate 10 comes into contact with the substrate 10 during handling, the protective layer 20 is less likely to deform, making the substrate 10 less likely to deform. As a result, the insulating layer 40 is also less likely to deform, making it less likely that dielectric breakdown will occur in the insulating layer 40 due to deformation of the substrate 10.
[0036] Furthermore, when the semiconductor device mounting substrate of the comparative example includes a layer made of chromium as an intermediate layer, the natural potential of chromium in salt water is relatively low, so electrons tend to move easily at the interface with the metal contained in the semiconductor device mounting substrate of the comparative example. This may cause galvanic corrosion. Furthermore, excessive reaction with the etching solution used to etch electrodes, etc. may result in over-etching.
[0037] The protective layer 20 of the semiconductor element mounting board 1 of this embodiment is made of a nickel-cobalt alloy, which has a higher natural potential in salt water than the copper that forms the base material 10. This reduces the potential difference between the base material 10 and the protective layer 20, making it less susceptible to corrosion by salt water and etching by the etching solution used in the manufacturing process.
[0038] According to the semiconductor device mounting board 1 of this embodiment described above, the protective layer 20 disposed between the copper substrate 10 and the electrode 70 is formed of a nickel-cobalt alloy, which is a material harder than the copper forming the substrate 10. This makes it possible to suppress deformation of the substrate 10 even if a force that would deform the substrate 10 acts on the semiconductor device mounting board 1 during the manufacturing process of the semiconductor device mounting board 1. This makes it possible to suppress the occurrence of defects due to deformation of the substrate 10.
[0039] Furthermore, according to the semiconductor element mounting board 1 of this embodiment, the protective layer 20 is formed of, for example, a metal that is less likely to crack than ceramic, which further suppresses deformation of the base material 10, thereby further suppressing the occurrence of defects due to deformation of the base material 10.
[0040] Furthermore, according to the semiconductor element mounting board 1 of this embodiment, the protective layer 20 is formed of a nickel-cobalt alloy that has a higher natural potential in salt water than the copper that forms the base material 10. As a result, for example, during actual use of the semiconductor element mounting board 1 on which the semiconductor element 5a is mounted, the protective layer 20 can suppress corrosion of the base material 10 caused by exposure to salt water.
[0041] Furthermore, in the semiconductor device mounting board 1 of this embodiment, the protective layer 20 is formed of a nickel-cobalt alloy that is corrosion-resistant against sulfide gas, so that when the semiconductor device mounting board 1 having the semiconductor device 5a mounted thereon is actually used, the protective layer 20 can suppress corrosion of the base material 10 due to sulfide gas present in the usage environment.
[0042] Furthermore, according to the semiconductor device mounting board 1 of this embodiment, the protective layer 20 is disposed between the base material 10 and the insulating layer 40, and in the manufacturing process of the semiconductor device mounting board 1, the protective layer 20 is formed on the base material 10 before forming the insulating layer 40. This makes it possible to suppress deformation of the base material 10 before forming the insulating layer 40, and therefore, for example, to suppress the occurrence of cracks in the insulating layer 40 due to deformation of the base material 10.
[0043] Furthermore, according to the semiconductor element mounting board 1 of this embodiment, the thickness of the protective layer 20 is 0.5 μm or more and 10 μm or less. In this embodiment, the semiconductor element mounting board 1 functions as a heat dissipation substrate for the semiconductor element 5 a, and therefore, by setting the thickness of the protective layer 20 to 10 μm or less, it is possible to prevent the protective layer 20 from becoming a thermal resistance between the semiconductor element 5 a and the base material 10. On the other hand, by setting the thickness of the protective layer 20 to 0.5 μm or more, the protective layer 20 can have a certain degree of strength, thereby preventing deformation of the base material 10.
[0044] Furthermore, in the semiconductor device mounting board 1 of this embodiment, the protective layer 20 is made of a nickel-cobalt alloy that can be formed by plating, which allows the protective layer 20 to be formed relatively easily in the manufacturing process of the semiconductor device mounting board 1.
[0045] Furthermore, according to the semiconductor device mounting board 1 of this embodiment, the base material 10 is made of copper, which has a relatively high heat dissipation property, so that the heat dissipation property of the semiconductor device mounting board 1 can be improved.
[0046] 3 is a cross-sectional view of a semiconductor device mounting board 2 according to a second embodiment. The semiconductor device mounting board 2 according to the second embodiment differs from the semiconductor device mounting board 1 according to the first embodiment (FIG. 1) in that a protective layer is formed on each of a pair of main surfaces of the substrate.
[0047] The semiconductor element mounting board 2 of the second embodiment includes a base material 10, a protective layer 20, an adhesion layer 30, an insulating layer 40, an adhesion layer 50, a bonding layer 60, an electrode 70, and a protective layer 80. Note that, for convenience of explanation, the thickness relationships among the base material 10, the protective layer 20, the adhesion layer 30, the insulating layer 40, the adhesion layer 50, the bonding layer 60, the electrode 70, and the protective layer 80 in Fig. 3 are illustrated as being different from the actual thickness relationships.
[0048] The protective layer 80 is provided on the main surface 12 of the flat-plate-shaped substrate 10 opposite to the side on which the electrode 70 is formed. That is, in the semiconductor element mounting board 2, the protective layers 20 and 80, which are made of a material harder than the metal forming the substrate 10, are formed on each of the pair of main surfaces 11 and 12 of the substrate 10. Like the protective layer 20, the protective layer 80 is made of a metal containing a nickel-cobalt alloy.
[0049] According to the semiconductor device mounting board 2 of this embodiment described above, the protective layer 20 made of a nickel-cobalt alloy, which is a material harder than the copper that forms the base material 10, is disposed between the base material 10 and the electrode 70. This makes it possible to prevent the base material 10 from being dented or deformed even if a load is applied to the electrode 70 during a chip mounting process or the like in the manufacturing process of the semiconductor device mounting board 1.
[0050] Furthermore, according to the semiconductor element mounting board 2 of this embodiment, the protective layers 20, 80 are formed on each of the pair of main surfaces 11, 12 of the base material 10. As a result, even if a force that would deform the base material 10 acts on the main surface 12 on the side on which the electrode 70 is not formed, the protective layer 80 can suppress depressions and deformations on the main surface 12 of the base material 10.
[0051] Furthermore, according to the semiconductor element mounting board 2 of this embodiment, the protective layers 20, 80 made of the same material are formed on each of the pair of main surfaces 11, 12 of the base material 10. This makes the base material 10 less prone to warping than when the protective layer 20 and the insulating layer 40 are formed only on one side of the base material 10. Therefore, deformation of the base material 10 can be further suppressed.
[0052] 4 is a cross-sectional view of a semiconductor device mounting board 3 according to a third embodiment. The semiconductor device mounting board 3 according to the third embodiment differs from the semiconductor device mounting board 1 according to the first embodiment (FIG. 1) in that a protective layer is also disposed between the insulating layer and the electrode.
[0053] The semiconductor element mounting board 3 of the third embodiment includes a base material 10, a protective layer 20, an adhesion layer 30, an insulating layer 40, an adhesion layer 50, a protective layer 90, a bonding layer 60, and an electrode 70. For ease of explanation, the thickness relationships among the base material 10, the protective layer 20, the adhesion layer 30, the insulating layer 40, the adhesion layer 50, the protective layer 90, the bonding layer 60, and the electrode 70 in Fig. 4 are illustrated as being different from the actual thickness relationships.
[0054] The protective layer 90 is disposed between the insulating layer 40 and the electrode 70, more specifically, between the adhesion layer 50 and the bonding layer 60. The protective layer 90 is formed of a nickel-cobalt alloy, which is a material harder than the metal forming the base material 10. This makes the insulating layer 40 less likely to deform due to loads on the electrodes in the manufacturing process of the semiconductor element mounting board 3 or forces acting during handling.
[0055] According to the semiconductor device mounting board 3 of this embodiment described above, the protective layer 20 made of a nickel-cobalt alloy, which is a material harder than the copper that forms the base material 10, is disposed between the base material 10 and the electrode 70. This makes it possible to prevent the base material 10 from being dented or deformed even if a load is applied to the electrode 70 during a chip mounting process or the like in the manufacturing process of the semiconductor device mounting board 1.
[0056] Furthermore, according to the semiconductor element mounting board 2 of this embodiment, the protective layer 90 is disposed between the insulating layer 40 and the electrode 70. This makes it possible for the protective layer 90 to prevent the load on the electrode 70 from acting on the insulating layer 40. Therefore, damage to the insulating layer 40 can be suppressed.
[0057] <Modifications of this embodiment> The present invention is not limited to the above-described embodiment, and can be implemented in various forms without departing from the spirit of the present invention. For example, the following modifications are also possible.
[0058] [Modification 1] In the above-described embodiment, the semiconductor mounting board supports the optical semiconductor and functions as a heat dissipation board that dissipates heat generated during light emission to the outside. However, the semiconductor mounted on the semiconductor mounting board is not limited to an optical semiconductor.
[0059] [Variation 2] In the above-described embodiment, the protective layers 20, 80, and 90 are formed from a metal containing a nickel-cobalt alloy, but the material for forming the protective layers is not limited to this. The protective layers may be formed from any material that is harder than the metal forming the base material. Forming the protective layers from a metal makes them less likely to crack, further suppressing deformation of the substrate. Furthermore, the protective layers containing a nickel-cobalt alloy can be formed relatively easily in the manufacturing process.
[0060] [Variation 3] In the above-described embodiment, the protective layers 20, 80, 90 are formed from a material that has a higher natural potential in salt water than the copper that forms the base material 10. By forming the protective layers from a material that has a higher natural potential in salt water than the material that forms the base material, corrosion of the base material 10 due to salt water during actual use can be suppressed, but the material that forms the protective layers is not limited to this.
[0061] [Modification 4] In the above-described embodiment, the protective layers 20, 80, 90 are formed of a material that is corrosion-resistant against sulfide gas. By forming the protective layers from a material that is corrosion-resistant against sulfide gas, corrosion of the base material due to sulfide gas in the environment during actual use can be suppressed, but the material for forming the protective layers is not limited to this.
[0062] [Variation 5] In the above-described embodiment, the thickness of the protective layer is set to 0.5 μm or more and 10 μm or less. The thickness of the protective layer is not limited to this. However, if the thickness of the protective layer is set to less than 0.5 μm, it becomes difficult to suppress deformation of the base material 10. Furthermore, if the thickness of the protective layer is set to more than 10 μm, thermal resistance will arise between the semiconductor element 5 a and the base material 10, which will reduce the heat dissipation performance of the semiconductor element 5 a. Therefore, the thickness is preferably set to 0.5 μm or more and 10 μm or less.
[0063] [Variation 6] In the above-described embodiment, the protective layer made of a material containing a nickel-cobalt alloy is formed by a plating step in the manufacturing process of the semiconductor device mounting board. However, the method for forming the protective layer is not limited to this. Other film formation methods such as CVD (Chemical Vapor Deposition), ALD (Atomic Layer Deposition), PVD (Physical Vapor Deposition), and vacuum evaporation may also be used.
[0064] [Modification 7] In the first embodiment, the semiconductor mounting board 1 is provided with one protective layer 20 on one main surface 11. In the third embodiment, the semiconductor mounting board 3 is provided with two protective layers 20, 90 on one main surface 11. The number of protective layers provided on the semiconductor mounting board is not limited to these.
[0065] [Modification 8] In the first embodiment, the protective layer 20 is disposed between the substrate 10 and the insulating layer 40. In the third embodiment, the protective layer 20 is disposed between the substrate 10 and the insulating layer 40, and the protective layer 90 is disposed between the insulating layer 40 and the electrode 70. The protective layer may be disposed only between the insulating layer 40 and the electrode 70.
[0066] [Modification 9] In the above-described embodiment, the insulating layer 40 is made of Al2O3. However, the material for forming the insulating layer is not limited to this. It is preferable that the insulating layer is formed of one of SiO2, YO3, AlN, Si3N4, and SIC, but it does not have to be a metal compound of these.
[0067] This aspect has been described above based on embodiments and modifications. However, the above-described embodiments are intended to facilitate understanding of this aspect and are not intended to limit this aspect. This aspect may be modified or improved without departing from the spirit and scope of the claims, and equivalents thereof are included in this aspect. Furthermore, if a technical feature is not described as essential in this specification, it may be deleted as appropriate.
[0068] (Application Example 1) A semiconductor device mounting board comprising: a base made of metal; an electrode connected to a semiconductor device; and a protective layer disposed between the base and the electrode, the protective layer being formed of a material harder than the metal forming the base. (Application Example 2) The semiconductor device mounting board according to Application Example 1, wherein the protective layer is formed of metal. (Application Example 3) The semiconductor device mounting board according to Application Example 1 or Application Example 2, wherein a material forming the protective layer has a higher natural potential in salt water than the metal forming the base. (Application Example 4) The semiconductor device mounting board according to any one of Application Examples 1 to 3, wherein the protective layer is formed of a material that is corrosion-resistant to sulfide gas. (Application Example 5) The semiconductor mounting board according to any one of Application Examples 1 to 4, further comprising an insulating layer disposed between the base material and the electrode, and the protective layer disposed between the base material and the insulating layer. (Application Example 6) The semiconductor mounting board according to any one of Application Examples 1 to 5, further comprising: an insulating layer disposed between the base material and the electrode, and the protective layer disposed between the base material and the insulating layer. (Application Example 7) The semiconductor mounting board according to any one of Application Examples 1 to 6, further comprising: an insulating layer disposed between the base material and the electrode, and the protective layer disposed between the insulating layer and the electrode. (Application Example 8) The semiconductor element mounting substrate according to any one of Application Examples 1 to 7, wherein the insulating layer is formed of any one of Al2O3, SiO2, Y2O3, AlN, Si3N4, and SIC.(Application Example 9) The semiconductor device mounting board according to any one of Application Examples 1 to 8, wherein the base material is formed in a flat plate shape, and the protective layer is formed on each of a pair of main surfaces of the base material. (Application Example 10) The semiconductor device mounting board according to any one of Application Examples 1 to 9, wherein the protective layer has a thickness of 0.5 μm or more and 10 μm or less. (Application Example 11) The semiconductor device mounting board according to any one of Application Examples 1 to 10, wherein the protective layer includes any one of a nickel-cobalt alloy, a nickel-phosphorus alloy, and a nickel-boron alloy. (Application Example 12) The semiconductor device mounting board according to any one of Application Examples 1 to 11, wherein the base material is formed of a material containing copper or aluminum as a main component.
[0069] DESCRIPTION OF SYMBOLS 1, 2, 3... Semiconductor element mounting board 10... Base material 11, 12... Main surface 20, 80, 90... Protective layer 40... Insulating layer 70... Electrode
Claims
1. A substrate for mounting semiconductor devices, A base material made of metal, semiconductor element cross-electrode, An insulating layer disposed between the substrate and the electrode, A protective layer disposed between the substrate and the electrode, the protective layer being made of a material harder than the metal forming the substrate, is provided. A substrate for mounting semiconductor devices, characterized by the following features.
2. A semiconductor element mounting substrate according to claim 1, The protective layer is formed of metal. A substrate for mounting semiconductor devices, characterized by the following features.
3. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The material forming the protective layer has a higher natural potential in saltwater than the metal forming the substrate. A substrate for mounting semiconductor devices, characterized by the following features.
4. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The protective layer is formed of a material that has corrosion resistance to sulfur gas. A substrate for mounting semiconductor devices, characterized by the following features.
5. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The protective layer is disposed between the substrate and the insulating layer. A substrate for mounting semiconductor devices, characterized by the following features.
6. A semiconductor element mounting substrate according to claim 5, The insulating layer is Al 2 O 3 SiO 2 , Y 2 O 3 AlN, Si 3 N 4 Formed from either SiC, A substrate for mounting semiconductor devices, characterized by the following features.
7. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The protective layer is disposed between the insulating layer and the electrode. A substrate for mounting semiconductor devices, characterized by the following features.
8. A substrate for mounting semiconductor elements according to claim 7, The insulating layer is Al 2 O 3 , SiO 2 , Y 2 O 3 , AlN, Si 3 N 4 formed by any one of SiC, A substrate for mounting semiconductor devices, characterized by the following features.
9. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The substrate is formed in a flat plate shape, The protective layer is formed on each of the pair of main surfaces of the substrate. A substrate for mounting semiconductor devices, characterized by the following features.
10. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The thickness of the protective layer is 0.5 μm or more and 10 μm or less. A substrate for mounting semiconductor devices, characterized by the following features.
11. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The protective layer comprises one of the following: nickel-cobalt alloy, nickel-phosphorus alloy, or nickel-boron alloy. A substrate for mounting semiconductor devices, characterized by the following features.
12. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The aforementioned substrate is formed from a material mainly composed of copper or aluminum. A substrate for mounting semiconductor devices, characterized by the following features.