Multilayer ceramic capacitor

JPWO2024209784A5Pending Publication Date: 2025-10-01
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Patent Information

Application Number
JP2025512423
Authority / Receiving Office
JP · JP
Patent Type
Applications
Filing Date
2025-07-22
Publication Date
2025-10-01

AI Technical Summary

Technical Problem

Multilayer ceramic capacitors face insulation resistance deterioration due to hydrogen occlusion in the plating layer forming process, which affects their reliability, especially in electronic components and automotive applications.

Method used

Incorporating an inner glass layer with a glass component on the base electrode layer and a connecting portion that penetrates the glass layer to electrically connect the base electrode and plating layer, reducing hydrogen storage and enhancing insulation resistance by forming a uniform plating layer efficiently.

Benefits of technology

The solution effectively suppresses insulation resistance deterioration by reducing hydrogen occlusion and forming a dense metal component in the base electrode layer, leading to improved reliability and performance in multilayer ceramic capacitors.

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Abstract

The present invention comprises: a laminate having a first surface and a second surface that face each other in a lamination direction, a third surface and a fourth surface that face each other in a first direction orthogonal to the lamination direction, and a fifth surface and a sixth surface that face each other in a second direction orthogonal to the lamination direction and the first direction; and an external electrode disposed on the fifth surface of the laminate. The laminate is provided with an inner layer part having an inner-layer dielectric layer and an inner electrode that is laminated on the inner-layer dielectric layer in the lamination direction and has an end part positioned on the fifth surface. The external electrode is provided with: an inner-layer base electrode layer that is disposed on the inner layer part on the fifth surface and connected to the internal electrode; an inner-layer glass layer that is disposed on the inner-layer base electrode layer and contains a glass component; a plating layer that is disposed on the inner-layer glass layer; and a connection part that extends so as to penetrate the inner-layer glass layer, the connection part electrically connecting the inner-layer base electrode layer and the plating layer.
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Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] In recent years, there has been a demand for improved reliability in multilayer ceramic capacitors for electronic components and in-vehicle applications.

[0003] For example, in the multilayer ceramic capacitor described in Patent Document 1, internal electrode layers are arranged inside a laminated chip having a dielectric layer containing a ceramic material that functions as a dielectric. The internal electrode layers are exposed on the surface of the laminated chip, and external electrodes are arranged so as to be joined to the internal electrode layers. The surfaces of the external electrodes are provided with plating layers mainly composed of metals such as copper (Cu), nickel (Ni), and tin (Sn).

[0004] Patent Document 2 describes that hydrogen generated by a chemical reaction during the plating layer formation process is absorbed into the internal electrodes, and the absorbed hydrogen gradually reduces the dielectric layer around the internal electrodes, deteriorating the insulation resistance.

[0005] JP 2022-119088 A JP 1-80011 A

[0006] An object of the present invention is to suppress deterioration of insulation resistance in a multilayer ceramic capacitor.

[0007] The present invention provides a multilayer ceramic capacitor comprising: a laminate having first and second surfaces opposed to each other in a stacking direction, third and fourth surfaces opposed to each other in a first direction perpendicular to the stacking direction, and fifth and sixth surfaces opposed to each other in a second direction perpendicular to the stacking direction and the first direction; and an external electrode disposed on the fifth surface of the laminate. The laminate comprises an inner dielectric layer and an inner layer portion laminated on the inner dielectric layer in the stacking direction and having an internal electrode with an end portion located on the fifth surface. The external electrode is disposed on the inner layer portion on the fifth surface and comprises an inner base electrode layer connected to the internal electrode, an inner glass layer containing a glass component disposed on the inner base electrode layer, a plating layer disposed on the inner glass layer, and a connection portion extending through the inner glass layer and electrically connecting the inner base electrode layer and the plating layer.

[0008] According to the present invention, it is possible to prevent the deterioration of insulation resistance in a multilayer ceramic capacitor.

[0009] 7A and 7B are cross-sectional views taken along line VIII-VIII in FIG. 7A and 7B, respectively; and FIG. 8A and 8B are cross-sectional views taken along line IX-IX in FIG. 8A and 8B, respectively; and FIG. 8B are cross-sectional views taken along line X-X in FIG. 8A and 8B, respectively; and

[0010] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0011] Note that each embodiment exemplifies an embodiment of the present invention, and the present invention is not limited to the content of the embodiment. Furthermore, it is possible to combine the contents described in different embodiments, and such implementations are also included in the present invention. Furthermore, the drawings are intended to facilitate understanding of the specification and may be drawn schematically, and the dimensional ratios of the depicted components or between the components may not match the dimensional ratios of those components described in the specification. Furthermore, components described in the specification may be omitted in the drawings, or the number of components may be omitted.

[0012] 1. Multilayer Ceramic Capacitor (First Embodiment) A multilayer ceramic capacitor according to a first embodiment of the present invention will be described.

[0013] Fig. 1 is a perspective view showing an example of a multilayer ceramic capacitor according to a first embodiment of the present invention, Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1, and Fig. 3 is a cross-sectional view taken along line III-III in Fig. 1.

[0014] The drawings may show the stacking direction X, width direction Y, and length direction Z of the multilayer ceramic capacitor 10, and these directions may be referred to in the following description. The width direction Y of this embodiment is an example of a first direction according to the present invention, and the length direction Z is an example of a second direction according to the present invention. The width direction Y of this embodiment may be an example of the second direction according to the present invention, and the length direction Z may be an example of the second direction according to the present invention.

[0015] 1 , a multilayer ceramic capacitor 10 has a laminate 12, a first external electrode 30 a, and a second external electrode 30 b. In the following description, when there is no need to particularly distinguish between the first external electrode 30 a and the second external electrode 30 b, one of these may be simply referred to as the external electrode 30.

[0016] The laminate 12 of this embodiment has a rectangular parallelepiped or approximately rectangular parallelepiped shape as a whole. The laminate 12 has a first surface 12a and a second surface 12b that face each other in the stacking direction X, a third surface 12c and a fourth surface 12d that face each other in the width direction Y, and a fifth surface 12e and a sixth surface 12f that face each other in the length direction Z. In this embodiment, the stacking direction X, the width direction Y, and the length direction Z are perpendicular to each other. The laminate 12 preferably has rounded corners and ridges. A corner refers to a portion where three adjacent surfaces of the laminate 12 intersect. A ridge refers to a portion where two adjacent surfaces of the laminate 12 intersect. Concave and recessed portions may be formed on some or all of the first surface 12a and the second surface 12b, the third surface 12c and the fourth surface 12d, and the fifth surface 12e and the sixth surface 12f.

[0017] 2, the laminate 12 includes an inner layer portion 13, a first outer layer portion 16a, and a second outer layer portion 16b. In the following description, when there is no need to particularly distinguish between the first outer layer portion 16a and the second outer layer portion 16b, one of these may be simply referred to as the outer layer portion 16.

[0018] 2 and 3, the inner layer portion 13 has a plurality of internal electrodes 13a and a plurality of inner dielectric layers 14a. The inner layer portion 13 is a portion located between the internal electrode 13a among the plurality of internal electrodes 13a that is closest to the first outer layer portion 16a and the internal electrode 13a among the plurality of internal electrodes 13a that is closest to the second outer layer portion 16b. In other words, the inner layer portion 13 is a portion located between the internal electrode 13a adjacent to the first outer layer portion 16a and the internal electrode 13a adjacent to the second outer layer portion 16b.

[0019] The plurality of inner dielectric layers 14a are stacked in the stacking direction X. In other words, the plurality of inner dielectric layers 14a are arranged side by side in the stacking direction X. The material of each inner dielectric layer 14a is arbitrary. For example, barium titanate (BaTiO 3 The dielectric ceramics containing BaTiO as a main component can be used as the material of the inner dielectric layer 14a. In particular, the material of the inner dielectric layer 14a is BaTiO 3However, the perovskite-type compound may have a plurality of crystal grains containing BaTiO 3 Instead of calcium titanate (CaTiO 3 ), strontium titanate (SrTiO 3 ), calcium zirconate (CaZrO 3 Dielectric ceramics containing other compounds as the main component, such as BaTiO, may also be used as the material for the inner dielectric layer 14a. 3 , CaTiO 3 , SrTiO 3 , CaZrO 3 The material for the inner dielectric layer 14 a may be a material obtained by adding, as a secondary component, compounds such as manganese (Mn) compounds, iron (Fe) compounds, chromium (Cr) compounds, cobalt (Co) compounds, or nickel (Ni) compounds in a content range less than that of the main component to the main component such as the above. The thickness of the inner dielectric layer 14 a, i.e., the dimension in the stacking direction X, is arbitrary, but is preferably, for example, 10.0 μm or less.

[0020] Each internal electrode 13a is disposed between two adjacent dielectric layers in the stacking direction X among the plurality of dielectric layers included in the laminate 12. The internal electrode 13a may be disposed between two adjacent internal dielectric layers 14a in the stacking direction X among the plurality of internal dielectric layers 14a. The internal electrode 13a may be disposed between an internal dielectric layer 14a disposed adjacent to each other in the stacking direction X and an outer dielectric layer 17a of the outer layer portion 16. The internal dielectric layer 14a is disposed between the two internal electrodes 13a adjacent to each other in the stacking direction X. The internal electrode 13a is disposed in contact with the internal dielectric layer 14a.

[0021] The internal electrode 13a in this embodiment is a plate-shaped electrode. The internal electrode 13a extends in the longitudinal direction Z. The internal electrode 13a has a first end exposed on either the fifth surface 12e or the sixth surface 12f, and a second end located inside the laminate 12.

[0022] 2 , in this embodiment, each internal electrode 13 a is exposed on either the fifth surface 12 e or the sixth surface 12 f of the laminate 12. The multiple internal electrodes 13 a include internal electrodes 13 a that are exposed on the fifth surface 12 e but not on the sixth surface 12 f, and internal electrodes 13 a that are exposed on the sixth surface 12 f but not on the fifth surface 12 e. The internal electrodes 13 a that are exposed on the fifth surface 12 e but not on the sixth surface 12 f and the internal electrodes 13 a that are exposed on the sixth surface 12 f but not on the fifth surface 12 e are arranged alternately in the stacking direction X.

[0023] FIG. 4 is an exploded perspective view of the inner layer portion 13. Referring to FIG. 4, each internal electrode 13a has a counter electrode portion 15a and an extraction electrode portion 15b. The counter electrode portion 15a is a portion of the internal electrode 13a that faces another adjacent internal electrode 13a in the stacking direction X. The extraction electrode portion 15b is a portion of the internal electrode 13a other than the counter electrode portion 15a. The counter electrode portions 15a of two adjacent internal electrodes 13a in the stacking direction X face each other with the inner dielectric layer 14a interposed therebetween, thereby forming a capacitance. Furthermore, each extraction electrode portion 15b is exposed on either the fifth surface 12e or the sixth surface 12f.

[0024] The shape of the internal electrode 13a is not particularly limited, but is preferably rectangular when viewed from the stacking direction X. The corners of the counter electrode portion 15a may be chamfered or rounded, and the corners of the extraction electrode portion 15b may be chamfered or rounded.

[0025] The internal electrode 13a preferably has a uniform thickness along the width direction Y, i.e., a dimension in the stacking direction X. The thickness of the end portion of the internal electrode 13a in the width direction Y may be thicker than the thickness of the central portion of the internal electrode 13a in the width direction Y.

[0026] In this embodiment, the main component of the internal electrode 13a is copper (Cu). However, the main component of the internal electrode 13a is optional, and other metals such as Ni, palladium (Pd), or silver (Ag) may be used instead of Cu. The main component of the internal electrode 13a may also be an alloy of Ni, Pd, Ag, Cu, or the like with other metals.

[0027] The thickness of the internal electrode 13a is not limited, but is preferably, for example, 0.2 μm or more and 2.0 μm or less.

[0028] (Outer layer portion 16) Referring to Figure 2, the first outer layer portion 16a and the second outer layer portion 16b are arranged with the inner layer portion 13 sandwiched between them in the stacking direction X. The first outer layer portion 16a is arranged on one side of the inner layer portion 13 in the stacking direction X (upper side in Figure 2). In other words, the first outer layer portion 16a is arranged on the first surface 12a side of the inner layer portion 13. The second outer layer portion 16b is arranged on the other side of the stacking direction X (lower side in Figure 2) of the inner layer portion 13. In other words, the second outer layer portion 16b is arranged on the second surface 12b side of the inner layer portion 13.

[0029] The outer layer portion 16 has a plurality of outer dielectric layers 17a. The plurality of outer dielectric layers 17a are stacked in the stacking direction X. The material of each outer dielectric layer 17a is arbitrary. For example, BaTiO 3 The outer dielectric layer 17a may be made of a dielectric ceramic containing BaTiO as a main component. 3 Instead of CaTiO 3 , SrTiO 3 , CaZrO 3 Alternatively, a dielectric ceramic containing other compounds as the main component may be used as the material for the outer dielectric layer 17a. 3 , CaTiO 3 , SrTiO 3 , CaZrO 3 The material for the outer dielectric layer 17a may be formed from a main component different from that for the inner dielectric layer 14a.

[0030] Although not shown, insulating layers may be disposed on the third surface 12c and the fourth surface 12d of the laminate 12. The insulating layers can prevent moisture from penetrating the interface between the internal electrode 13a and the inner dielectric layer 14a, the interface between the internal electrode 13a and the outer dielectric layer 17a, and into the interior of the laminate 12. Furthermore, it is preferable that the insulating layers have the same or similar components as the inner dielectric layer 14a or the outer dielectric layer 17a. When the insulating layer has the same or similar components as the inner dielectric layer 14a, the adhesion between the insulating layer and the inner dielectric layer 14a is improved. When the insulating layer has the same or similar components as the outer dielectric layer 17a, the adhesion between the insulating layer and the outer dielectric layer 17a is improved.

[0031] The insulating layer may also be arranged so as to be bonded to the internal electrode 13 a. In this case, the surface of the insulating layer not bonded to the internal electrode 13 a becomes the third surface 12 c and the fourth surface 12 d. In other words, when the insulating layer is bonded to the internal electrode 13 a, the surface of the insulating layer arranged on the opposite side to the internal electrode 13 a constitutes the third surface 12 c and the fourth surface 12 d of the laminate 12.

[0032] The insulating layer preferably includes an inner layer that is the innermost layer in the width direction Y and an outer layer that is the outermost layer in the first direction. The provision of the inner layer and the outer layer allows the boundary between the inner layer and the outer layer to be easily confirmed by observation using an optical microscope due to the difference in sinterability between the inner layer and the outer layer. That is, a boundary exists between the inner layer and the outer layer. There may be multiple boundaries.

[0033] The insulating layer is not limited to a two-layer structure, and may have a three-layer or more structure. When the insulating layer includes three or more layers, the layer disposed on the innermost side in the width direction Y is referred to as the inner layer, and the layer disposed on the outermost side in the width direction Y is referred to as the outer layer.

[0034] A step layer 19 is disposed on the same plane as the internal electrodes 13a. Without the step layer 19, a difference in thickness would occur between the portion where the internal electrodes 13a are disposed and the portion where the internal electrodes 13a are not disposed, which could result in distortion during pressing during the manufacturing process of the multilayer ceramic capacitor 10 (described later), resulting in structural defects. In contrast, in this embodiment, the step layer 19 can fill the step corresponding to the thickness of the internal electrodes 13a in the stacking direction X, thereby alleviating distortion during pressing during the manufacturing process of the multilayer ceramic capacitor 10 and suppressing structural defects. The step layer 19 preferably has the same or substantially the same thickness as the internal electrodes 13a disposed on the same plane. The step layer 19 preferably contains the same or substantially the same components as the inner dielectric layer 14a.

[0035] (External Electrode 30) The first external electrode 30a is disposed on the fifth surface 12e of the laminate 12. In this embodiment, the first external electrode 30a is disposed on the first surface 12a, the second surface 12b, the third surface 12c, the fourth surface 12d, and the fifth surface 12e. The first external electrode 30a may be disposed only on the fifth surface 12e of the laminate 12, but is preferably disposed continuously on the fifth surface 12e, the first surface 12a, and the second surface 12b. It is more preferable that the first external electrode 30a is also disposed on the third surface 12c and the fourth surface 12d. The first external electrode 30a is joined to the internal electrode 13a exposed on the fifth surface 12e of the laminate 12. As a result, the first external electrode 30 a is electrically connected to the internal electrode 13 a disposed on the fifth surface 12 e of the laminate 12 .

[0036] The second external electrode 30b is disposed on the sixth surface 12f of the laminate 12. In this embodiment, the second external electrode 30b is disposed on the first surface 12a, the second surface 12b, the third surface 12c, the fourth surface 12d, and the sixth surface 12f. The second external electrode 30b may be disposed only on the sixth surface 12f of the laminate 12, but is preferably disposed continuously on the sixth surface 12f, the first surface 12a, and the second surface 12b. It is more preferable that the second external electrode 30b is also disposed on the third surface 12c and the fourth surface 12d. The second external electrode 30b is bonded to the internal electrode 13a exposed on the sixth surface 12f of the laminate 12. As a result, the second external electrode 30b is electrically connected to the internal electrode 13a disposed on the sixth surface 12f of the laminate 12.

[0037] Fig. 5 is an enlarged view of region R in Fig. 2. Fig. 5 shows an enlarged view of a portion of the first external electrode 30a, but the second external electrode 30b has the same configuration as the first external electrode 30a.

[0038] 2, 3, and 5, the external electrode 30 includes a glass layer 31 and a base electrode layer 32 disposed so as to cover the glass layer 31. The external electrode 30 includes an inner glass layer 33a and an outer glass layer 33b disposed on the base electrode layer 32, plating layers 34 disposed on the inner glass layer 33a and the outer glass layer 33b, and a top plating layer 35 disposed on the plating layer 34.

[0039] The glass layer 31 is made of a glass component. The glass component includes at least one selected from boron (B), silicon (Si), barium (Ba), magnesium (Mg), aluminum (Al), and lithium (Li). In this embodiment, the glass component of the glass layer 31 includes silicon dioxide (SiO 2 ) to which at least one element selected from B, Ba, Mg, Al, and Li is added. The glass layer 31 is disposed at a position overlapping the outer layer portion 16 when the laminate 12 is viewed along the longitudinal direction Z. The glass layer 31 is disposed on both sides (upper and lower sides in FIG. 2 ) of an inner-layer base electrode layer 32 a described later in the stacking direction X.

[0040] The glass layer 31 of the first external electrode 30a is disposed on the fifth surface 12e side of the laminate 12. The glass layer 31 of the first external electrode 30a of this embodiment is disposed continuously on the first surface 12a, the second surface 12b, the third surface 12c, the fourth surface 12d, and the fifth surface 12e of the laminate 12. The glass layer 31 of the first external electrode 30a may be disposed only on the fifth surface 12e of the laminate 12, but is preferably disposed continuously on the fifth surface 12e, the first surface 12a, and the second surface 12b. Note that the glass layer 31 of the first external electrode 30a is preferably also disposed on the third surface 12c and the fourth surface 12d.

[0041] The glass layer 31 of the first external electrode 30a is disposed on the outer layer portion 16 on the fifth surface 12e of the laminate 12. The glass layer 31 of the first external electrode 30a is disposed on the outer dielectric layer 17a. In this embodiment, the glass layer 31 of the first external electrode 30a is not connected to the internal electrode 13a exposed on the fifth surface 12e of the laminate 12, but may be connected to the internal electrode 13a. The glass layer 31 of the first external electrode 30a has a thickness that is thinner at the end portions closer to the center of the laminate 12 in the longitudinal direction Z on the first surface 12a and the second surface 12b than at other portions. Although not shown, the glass layer 31 of the first external electrode 30a preferably has a thickness that is thinner at the end portions closer to the center in the longitudinal direction Z on the third surface 12c and the fourth surface 12d than at other portions.

[0042] The glass layer 31 of the second external electrode 30b is disposed on the sixth surface 12f side of the laminate 12. The glass layer 31 of the second external electrode 30b of this embodiment is disposed continuously on the first surface 12a, the second surface 12b, the third surface 12c, the fourth surface 12d, and the sixth surface 12f of the laminate 12. The glass layer 31 of the second external electrode 30b may be disposed only on the sixth surface 12f of the laminate 12, but is preferably disposed continuously on the sixth surface 12f, the first surface 12a, and the second surface 12b. Note that the glass layer 31 of the second external electrode 30b is preferably also disposed on the third surface 12c and the fourth surface 12d.

[0043] The glass layer 31 of the second external electrode 30b is disposed on the outer layer portion 16 on the sixth surface 12f of the laminate 12. The glass layer 31 of the second external electrode 30b is disposed on the outer dielectric layer 17a. In this embodiment, the glass layer 31 of the second external electrode 30b is not connected to the internal electrode 13a exposed on the sixth surface 12f of the laminate 12, but may be connected to the internal electrode 13a. The glass layer 31 of the second external electrode 30b has a thickness that is thinner at the end portions closer to the center of the laminate 12 in the longitudinal direction Z on the first surface 12a and the second surface 12b than at the other portions. Although not shown, the glass layer 31 of the first external electrode 30a preferably has a thickness that is thinner at the end portions closer to the center in the longitudinal direction Z on the third surface 12c and the fourth surface 12d than at the other portions.

[0044] The base electrode layer 32 is made of a baking layer. The baking layer contains a glass component and a metal. The glass component contained in the baking layer contains at least one selected from B, Si, Ba, Mg, Al, and Li. In this embodiment, the glass component contained in the baking layer is silicon dioxide (SiO 2 ) is doped with at least one selected from B, Ba, Mg, Al, and Li. In this embodiment, the glass components include Al, Ba, and O in addition to Si. The metal contained in the baking layer includes at least one selected from, for example, Cu, Ni, Ag, Pd, an Ag—Ni alloy, and gold (Au).

[0045] The base electrode layer 32 has an inner-layer base electrode layer 32a and an outer-layer base electrode layer 32b. When the base electrode layer 32 is viewed along the longitudinal direction Z, the inner-layer base electrode layer 32a overlaps with the inner layer portion 13. When the base electrode layer 32 is viewed along the longitudinal direction Z, the outer-layer base electrode layer 32b overlaps with the outer layer portion 16. The outer-layer base electrode layer 32b is disposed on the glass layer 31. The outer-layer base electrode layer 32b is disposed so as to cover the glass layer 31 from the outside in the longitudinal direction Z.

[0046] The inner-layer base electrode layer 32a of the first external electrode 30a is disposed on the inner layer portion 13 on the fifth surface 12e of the laminate 12. The inner-layer base electrode layer 32a of the first external electrode 30a is connected to the internal electrode 13a exposed on the fifth surface 12e of the laminate 12. As a result, the inner-layer base electrode layer 32a of the first external electrode 30a is electrically connected to the internal electrode 13a disposed on the fifth surface 12e of the laminate 12.

[0047] The inner-layer base electrode layer 32a of the second external electrode 30b is disposed on the inner layer portion 13 on the sixth surface 12f of the laminate 12. The inner-layer base electrode layer 32a of the second external electrode 30b is connected to the internal electrode 13a exposed on the sixth surface 12f of the laminate 12. As a result, the inner-layer base electrode layer 32a of the second external electrode 30b is electrically connected to the internal electrode 13a disposed on the sixth surface 12f of the laminate 12.

[0048] In this embodiment, the outer-layer base electrode layer 32b of the first external electrode 30a is continuously disposed at positions facing the fifth surface 12e, the first surface 12a, the second surface 12b, the third surface 12c, and the fourth surface 12d of the laminate 12. The outer-layer base electrode layer 32b of the first external electrode 30a may be disposed at a position facing only the fifth surface 12e of the laminate 12, but is preferably continuously disposed at positions facing the first surface 12a and the second surface 12b as well. Note that the outer-layer base electrode layer 32b of the first external electrode 30a is preferably also disposed at positions facing the third surface 12c and the fourth surface 12d. The outer-layer base electrode layer 32b of the first external electrode 30a is connected to the inner-layer base electrode layer 32a of the first external electrode 30a. As a result, the outer-layer base electrode layer 32b of the first external electrode 30a is electrically connected to the internal electrode 13a exposed on the fifth surface 12e of the laminate 12. The outer-layer base electrode layer 32b of the first external electrode 30a may be disposed between the third surface 12c or the fourth surface 12d and the internal electrode 13a.

[0049] In this embodiment, the outer-layer base electrode layer 32b of the second external electrode 30b is continuously disposed at positions facing the sixth surface 12f, the first surface 12a, the second surface 12b, the third surface 12c, and the fourth surface 12d of the laminate 12. The outer-layer base electrode layer 32b of the second external electrode 30b may be disposed at a position facing only the sixth surface 12f of the laminate 12, but is preferably continuously disposed at positions facing the first surface 12a and the second surface 12b as well. Note that the outer-layer base electrode layer 32b of the second external electrode 30b is preferably also disposed at positions facing the third surface 12c and the fourth surface 12d. The outer-layer base electrode layer 32b of the second external electrode 30b is connected to the inner-layer base electrode layer 32a of the second external electrode 30b. As a result, the outer-layer base electrode layer 32b of the second external electrode 30b is electrically connected to the internal electrode 13a exposed on the sixth surface 12f of the laminate 12. The outer-layer base electrode layer 32b of the second external electrode 30b may be disposed between the third surface 12c or the fourth surface 12d and the internal electrode 13a.

[0050] The inner glass layer 33a is composed of a glass component. The glass component includes at least one element selected from the group consisting of B, Si, Ba, Mg, Al, and Li. In this embodiment, the glass component of the inner glass layer 33a includes silicon dioxide (SiO 2 ) to which at least one element selected from B, Ba, Mg, Al, and Li is added. The inner glass layer 33a is disposed on the inner base electrode layer 32a. In other words, the inner glass layer 33a is disposed in a position overlapping the inner base electrode layer 32a when viewed along the longitudinal direction Z. In other words, the inner glass layer 33a is disposed so as to cover the inner base electrode layer 32a. By having the inner glass layer 33a cover the inner base electrode layer 32a, the area where the inner base electrode layer 32a and the plating layer 34 are alloyed together when the plating layer 34 is formed is reduced. This reduces the amount of hydrogen absorbed by the internal electrode 13a, thereby suppressing deterioration of insulation resistance.

[0051] The thickness of the inner glass layer 33a, i.e., the dimension in the longitudinal direction Z of the laminate 12, is preferably 0.2 μm to 3.5 μm inclusive. A thickness greater than 0.2 μm can further suppress the absorption of hydrogen that occurs when the plating layer 34 is formed, while a thickness less than 3.5 μm can suppress the time required to form the connection portion 36, which will be described later.

[0052] The outer glass layer 33b is made of a glass component. The glass component includes at least one element selected from the group consisting of B, Si, Ba, Mg, Al, and Li. In this embodiment, the glass component of the outer glass layer 33b includes silicon dioxide (SiO 2 ) to which at least one element selected from B, Ba, Mg, Al, and Li is added. The outer glass layer 33b is disposed on the outer base electrode layer 32b. In other words, the outer glass layer 33b is disposed at a position overlapping the outer base electrode layer 32b when viewed along the longitudinal direction Z. In yet other words, the outer glass layer 33b is disposed so as to cover the outer base electrode layer 32b.

[0053] When the inner glass layer 33a and the outer glass layer 33b are arranged continuously, the region located 5 μm from the boundary between the inner base electrode layer 32a and the outer base electrode layer 32b toward the inner base electrode layer 32a in the stacking direction X to the outer base electrode layer 32b side is defined as the outer glass layer 33b.

[0054] The outer glass layer 33b extends toward the tip of the external electrode 30 along the shape of the external electrode 30. In this case, the tip of the outer glass layer 33b may be tapered, or may not reach the tip of the external electrode 30.

[0055] In this embodiment, the outer glass layer 33b of the first external electrode 30a is continuously disposed at positions facing the fifth surface 12e, the first surface 12a, the second surface 12b, the third surface 12c, and the fourth surface 12d of the laminate 12. The outer glass layer 33b of the first external electrode 30a may be disposed only on the fifth surface 12e of the laminate 12, but is preferably continuously disposed on the first surface 12a and the second surface 12b as well. Note that the outer glass layer 33b of the first external electrode 30a is preferably also disposed on the third surface 12c and the fourth surface 12d.

[0056] In this embodiment, the outer glass layer 33b of the second external electrode 30b is continuously disposed at positions facing the sixth surface 12f, the first surface 12a, the second surface 12b, the third surface 12c, and the fourth surface 12d of the laminate 12. The outer glass layer 33b of the second external electrode 30b may be disposed only on the sixth surface 12f of the laminate 12, but is preferably continuously disposed on the first surface 12a and the second surface 12b as well. Note that the outer glass layer 33b of the second external electrode 30b is preferably also disposed on the third surface 12c and the fourth surface 12d.

[0057] The thickness of the outer glass layer 33b in a direction perpendicular to the laminate 12 is thinner than the thickness of the inner glass layer 33a in a direction perpendicular to the laminate 12. For example, the thickness of the portion of the outer glass layer 33b facing the first surface 12a is the thickness in the direction perpendicular to the first surface 12a, i.e., the stacking direction X. Similarly, the thickness of the portion of the inner glass layer 33a facing the first surface 12a is the thickness in the direction perpendicular to the first surface 12a, i.e., the stacking direction X. Furthermore, the thickness of the portion of the outer glass layer 33b facing the fifth surface 12e or the sixth surface 12f is the thickness in the direction perpendicular to the fifth surface 12e or the sixth surface 12f, i.e., the thickness in the length direction Z. Similarly, the thickness of the portion of the laminate 12 of the inner glass layer 33a that is positioned opposite the fifth surface 12e or the sixth surface 12f is the thickness in the direction perpendicular to the fifth surface 12e or the sixth surface 12f, i.e., the length direction Z.

[0058] The plating layer 34 is disposed so as to cover the inner glass layer 33 a and the outer glass layer 33 b. The plating layer 34 is disposed on the inner glass layer 33 a and the outer glass layer 33 b. In this embodiment, the plating layer 34 is a Ni plating layer. In other words, the main component of the plating layer 34 is Ni. If the plating layer 34 is a Ni plating layer, it is possible to prevent the inner base electrode layer 32 a from being corroded by solder when mounting the multilayer ceramic capacitor 10, a phenomenon commonly known as copper leaching.

[0059] The surface plating layer 35 is disposed so as to cover the plating layer 34. The surface plating layer 35 is disposed on the plating layer 34. In this embodiment, the surface plating layer 35 is a Sn plating layer. In other words, the main component of the surface plating layer 35 is Sn.

[0060] As shown in FIG. 5, the external electrode 30 has a connection portion 36 that extends through the inner glass layer 33 a and electrically connects the inner base electrode layer 32 a and the plating layer 34 .

[0061] The connection portion 36 is composed of the same component as the plating layer 34. That is, if the plating layer 34 is a Ni plating layer, the connection portion 36 is composed of Ni. If the plating layer 34 is a Sn plating layer, the connection portion 36 is composed of Sn. The presence of the connection portion 36 makes it possible to form a uniform plating layer 34 on the inner glass layer 33a in a short time and also shorten the current path, which also leads to a reduction in the electrical resistance of the multilayer ceramic capacitor 10.

[0062] The connection portion 36 can be confirmed by observing a cross section obtained when the laminate 12 is cross-sectionally polished in the width direction Y, i.e., a cross section including the stacking direction X and the length direction Z. In the cross section shown in Figure 5, the connection portion 36 has a columnar shape, but is not limited to this and may have a shape extending in the width direction Y. In that case, the connection portion 36 can be confirmed by observing a cross section obtained when the laminate 12 is cross-sectionally polished in the stacking direction X, i.e., a cross section including the width direction Y and the length direction Z.

[0063] In a cross section including the stacking direction X and the length direction Z (for example, a cross section obtained when the multilayer ceramic capacitor 10 is polished in the width direction Y to half its dimension in the width direction Y), the inner-layer base electrode layer 32a preferably satisfies the relationship: area of ​​glass component / (area of ​​glass component+area of ​​metal component)≦0.2. In other words, in a cross section including the stacking direction X and the length direction Z, the area of ​​the glass component contained in the inner-layer base electrode layer 32a is preferably 20% or less of the sum of the area of ​​the glass component and the area of ​​the metal component contained in the inner-layer base electrode layer 32a. When the area of ​​the glass component and the area of ​​the metal component contained in the inner-layer base electrode layer 32a satisfy the above-mentioned relationship, the inner-layer base electrode layer 32a has a high density of the metal component, and therefore can suppress moisture penetration into the internal electrode 13a.

[0064] The glass component area / (glass component area + metal component area) is measured, for example, as follows: The multilayer ceramic capacitor 10 is polished in the width direction Y to 1 / 2 of its dimension in the width direction Y. If internal electrodes 13a are present, the polishing may be performed to 1 / 3 of the dimension instead of 1 / 2. On the surface exposed by polishing, a position 1.5 μm away from the laminate 12 in the length direction Z from the internal electrode 13a closest to the outer layer portion 16 is set as the reference position. The glass area ratio is obtained in a range 20 μm away from the reference position toward the center of the laminate 12 in the stacking direction X and 2.0 μm away from the reference position in the length direction Z. The area ratio of glass is calculated by, for example, binarizing the glass component and the metal component in an image obtained by measuring an FE-SEM (Field Emission Scanning Electron Microscope) under conditions of a magnification of 2000 times, an acceleration voltage of 15.0 kV, and a WD of 7.5 mm using image processing software (for example, ImageJ from the National Institutes of Health, USA).

[0065] (Effects) The multilayer ceramic capacitor 10 according to this embodiment can provide the following effects.

[0066] Since the inner glass layer 33a containing a glass component is disposed on the inner base electrode layer 32a, the area where the inner base electrode layer 32a and the plating layer 34 are alloyed is reduced when the plating layer 34 is formed, which reduces the amount of hydrogen absorbed by the internal electrode 13a and suppresses deterioration of the insulation resistance.

[0067] The thickness of the inner glass layer 33a containing the glass component of the external electrode in the longitudinal direction of the laminate 12 is preferably 0.2 μm to 3.5 μm. A thickness of more than 0.2 μm can further suppress the absorption of hydrogen generated when the plating layer 34 is formed. A thickness of less than 3.5 μm can suppress the time required to form the connection 36 from becoming too long.

[0068] The external electrode 30 has a connection portion 36 that extends through the inner glass layer 33a and electrically connects the inner base electrode layer 32a and the plating layer 34. The presence of the connection portion 36 makes it possible to form a uniform plating layer 34 on the inner glass layer 33a in a short time and also shortens the current path, which also leads to a reduction in the electrical resistance of the multilayer ceramic capacitor 10.

[0069] The thickness of the inner glass layer 33a containing the glass component of the external electrode 30 in the longitudinal direction Z of the laminate 12 is 0.2 μm or more and 3.5 μm or less. This configuration makes it possible to efficiently form the plating layer 34 while further suppressing hydrogen absorption.

[0070] In the inner-layer base electrode layer 32a, the ratio of glass area / (glass area+metal component area)≦0.2 is satisfied. With this configuration, the inner-layer base electrode layer 32a has a high density of metal components, so that it is possible to suppress the penetration of moisture into the internal electrode 13a.

[0071] Second Embodiment A multilayer ceramic capacitor according to a second embodiment of the present invention will now be described. The multilayer ceramic capacitor according to the second embodiment has the same configuration as the multilayer ceramic capacitor according to the first embodiment, except for the shape and arrangement of the first internal electrodes, the shape and arrangement of the second internal electrodes, and the number and configuration of the external electrodes. In the second embodiment, components that are the same as or similar to those in the first embodiment are designated by the same or similar reference numerals, and detailed descriptions thereof will be omitted.

[0072] Fig. 6 is a perspective view of the multilayer ceramic capacitor 110 according to this embodiment. Fig. 7 is a cross-sectional view taken along line VII-VII in Fig. 6. Fig. 8 is a cross-sectional view taken along line VIII-VIII in Fig. 6.

[0073] 6, the multilayer ceramic capacitor 110 of this embodiment includes a laminate 112 and four external electrodes 130a, 130b, 130c, and 130d. In the following description, when there is no need to particularly distinguish between the four external electrodes 130a, 130b, 130c, and 130d, one of the four external electrodes 130a, 130b, 130c, and 130d may be simply referred to as the external electrode 130.

[0074] 7 and 8, the internal electrode of this embodiment includes a first internal electrode 113a and a second internal electrode 113b. As shown in FIG. 9, the first internal electrode 113a includes a counter electrode portion 115a and two lead electrode portions 115b. Each lead electrode portion 115b is exposed on either the fifth surface 112e or the sixth surface 112f. As shown in FIG. 10, the second internal electrode 113b includes a counter electrode portion 115c and two lead electrode portions 115d. Each lead electrode portion 115d is exposed on either the third surface 112c or the fourth surface 112d. The lead electrode portions 115b and the counter electrode portion 115a shown in FIG. 9 have substantially the same widthwise dimension in the Y direction, but the widthwise dimension of the lead electrode portion 115b may narrow as it approaches the nearest one of the fifth surface 112e or the sixth surface 112f. The first internal electrode 113a and the second internal electrode 113b are arranged in the stacking direction X with the inner dielectric layer 14a sandwiched therebetween.

[0075] When the laminate 112 is viewed along the stacking direction X, the external electrodes 130 are arranged on each of the four sides of the laminate 112. The first external electrode 130a and the second external electrode 130b are arranged to cover a portion of the first surface 112a, a portion of the second surface 112b, a portion of the third surface 112c and the fourth surface 112d, and the fifth surface 112e or the sixth surface 112f of the laminate 112. The first external electrode 130a and the second external electrode 130b are electrically connected to the first internal electrode 113a. The third external electrode 130c and the fourth external electrode 130d are arranged to cover a portion of the first surface 112a, a portion of the second surface 112b, and the third surface 112c or the fourth surface 112d of the laminate 112. The third external electrode 130c and the fourth external electrode 130d are electrically connected to the second internal electrode 113b.

[0076] The external electrode 130 has a configuration similar to that of the external electrode 30 according to the first embodiment. As shown in Figures 7, 8, 9, and 10, the external electrode 130 includes a glass layer 31 and a base electrode layer 32 arranged to cover the glass layer 31. The external electrode 130 includes an inner glass layer 33a and an outer glass layer 33b arranged on the base electrode layer 32, plating layers 34 arranged on the inner glass layer 33a and the outer glass layer 33b, and a top plating layer 35 arranged on the plating layer 34. The base electrode layer 32 of the external electrodes 130a and 130b is an example of a first base electrode layer according to the present disclosure, and the base electrode layer 32 of the external electrodes 130c and 130d is an example of a second base electrode layer according to the present disclosure. The inner glass layer 33 a of the external electrodes 130 a, 130 b is an example of a first inner glass layer according to the present disclosure, and the inner glass layer 33 a of the external electrodes 130 c, 130 d is an example of a second inner glass layer according to the present disclosure. The plating layer 34 of the external electrodes 130 a, 130 b is an example of a first plating layer according to the present disclosure, and the plating layer 34 of the external electrodes 130 c, 130 d is an example of a second plating layer according to the present disclosure.

[0077] In this embodiment, each of the four external electrodes 130a, 130b, 130c, and 130d has the above-described configuration, i.e., a configuration similar to that of the external electrode 30 according to the first embodiment, but this is not limited to this. Two of the four external electrodes 130a, 130b, 130c, and 130d that are arranged in opposing positions may have the above-described configuration. Only the external electrodes 130a and 130b may have the above-described configuration, or only the external electrodes 130c and 130d may have the above-described configuration.

[0078] The base electrode layer 32 has an inner-layer base electrode layer 32a and an outer-layer base electrode layer 32b. When the base electrode layer 32 is viewed along the length direction Z or the width direction Y, the inner-layer base electrode layer 32a overlaps with the inner layer portion 13. When the base electrode layer 32 is viewed along the length direction Z or the width direction Y, the outer-layer base electrode layer 32b overlaps with the outer layer portion 16. The outer-layer base electrode layer 32b is disposed on the glass layer 31. The outer-layer base electrode layer 32b is disposed so as to cover the glass layer 31 from the outside in the length direction Z.

[0079] 7, 8, 9, and 10, the external electrode 130 has a connection portion 36 that extends through the inner glass layer 33a and electrically connects the inner base electrode layer 32a and the plating layer 34. The connection portion 36 of the external electrodes 130a, 130b is an example of a first connection portion according to the present disclosure, and the connection portion 36 of the external electrodes 130c, 130d is an example of a second connection portion according to the present disclosure.

[0080] In the multilayer ceramic capacitor 110 of the second embodiment, if the configuration of the external electrodes 30 of the multilayer ceramic capacitor 10 according to the first embodiment is applied to the external electrode 130 to which a positive potential is applied, among the four external electrodes 130a, 130b, 130c, and 130d, the same effects as those of the multilayer ceramic capacitor 10 according to the first embodiment can be achieved. Also, if the configuration of the external electrodes 30 of the multilayer ceramic capacitor 10 according to the first embodiment is applied to the first external electrode 130a and the second external electrode 130b, all of the four external electrodes 130a, 130b, 130c, and 130d, the same effects as those of the multilayer ceramic capacitor 10 according to the first embodiment can be achieved.

[0081] 2. Manufacturing Method of Multilayer Ceramic Capacitor A manufacturing method of a multilayer ceramic capacitor will be described below with reference to FIG. 11. FIG. 11 is a flowchart for explaining the manufacturing method of a multilayer ceramic capacitor. In the following description, the manufacturing method of the multilayer ceramic capacitor 10 according to the first embodiment will be described as an example. The multilayer ceramic capacitor 110 according to the second embodiment can be manufactured by the same manufacturing method as the manufacturing method of the multilayer ceramic capacitor 10 according to the first embodiment.

[0082] In step S1, a dielectric sheet, a conductive paste for the internal electrodes, and a conductive paste for the external electrodes are prepared. The dielectric sheet, the conductive paste for the internal electrodes, and the conductive paste for the external electrodes each contain a binder and a solvent.

[0083] In step S2, a conductive paste for the internal electrodes is printed in a predetermined pattern on the dielectric sheet, thereby forming a dielectric sheet for the internal layer portion on which the internal electrode pattern of the internal layer portion 13 is printed. Printing the conductive paste for the internal electrodes on the dielectric sheet may be performed by, for example, screen printing or gravure printing.

[0084] In step S3, the dielectric sheets and the dielectric sheets for the internal electrodes are stacked and pressed in the stacking direction by, for example, a hydrostatic press to form a laminated block.

[0085] In step S4, the laminated block is cut into laminated chips of a predetermined size, after which the corners and ridges of the laminated chips may be rounded by barrel polishing or the like.

[0086] In step S5, the stacked chips are fired to form the stacked body 12 according to this embodiment.

[0087] In step S6, a conductive paste containing a glass component and a metal is applied to the third surface 12c to the sixth surface 12f by, for example, a dipping method or a method in which the conductive paste is applied by extruding it from a slit plate, and then a baking process is performed to form the glass layer 31, the inner layer base electrode layer 32a, the outer layer base electrode layer 32b, the inner layer glass layer 33a, and the outer layer glass layer 33b.

[0088] In step S6, the thickness of the inner glass layer 33 a can be increased by increasing the content of the glass component in the conductive paste containing the glass component, or by increasing the temperature during the baking process.

[0089] In step S7, the glass layer 31, the inner base electrode layer 32a, the outer base electrode layer 32b, the inner glass layer 33a, and the outer glass layer 33b formed in step S6 are immersed in a glass dissolving solution to form cracks in the inner glass layer 33a. These cracks are formed so as to penetrate the inner glass layer 33a in the thickness direction.

[0090] In step S8, the plating layer 34 is formed so as to connect the inner-layer base electrode layer 32a and the outer-layer base electrode layer 32b. Electrolytic plating is preferably used as the plating process. Barrel plating is preferably used as the plating method. At this time, the nickel forming the plating layer 34 flows through the cracks formed in step S7 to form the connection portions 36.

[0091] When four external electrodes are arranged on the laminate 112 as in the second embodiment, the glass layer 31, the inner base electrode layer 32a, the outer base electrode layer 32b, the inner glass layer 33a, and the outer glass layer 33b are arranged on the third to sixth surfaces in step S6. In step S7, the glass layer 31, the base electrode layer 32, the inner glass layer 33a, and the outer glass layer 33b arranged on desired surfaces among the third to sixth surfaces are selectively immersed in a glass dissolving solution, thereby forming the external electrodes according to the present invention on the desired surfaces.

[0092] As described above, although the embodiments of the present invention have been disclosed in the above description, the present invention is not limited thereto. In other words, various modifications can be made to the above-described embodiments in terms of mechanism, shape, material, quantity, position, arrangement, etc., without departing from the scope of the technical idea and purpose of the present invention, and such modifications are included in the present invention.

[0093] For example, although the step layer 19 is disposed on the same plane as the internal electrode 13a in Figures 2, 3, and 4, the step layer 19 does not have to be disposed on the same plane as the internal electrode 13a. Although the step layer 19 is disposed on the same plane as the first internal electrode 113a and the second internal electrode 113b in Figures 7 to 10, the step layer 19 does not have to be disposed on the same plane as the first internal electrode 113a and the second internal electrode 113b. In other words, the step layer 19 does not have to be provided in the internal layer portion 13.

[0094] REFERENCE SIGNS LIST 10 Multilayer ceramic capacitor 12 Laminate 13 Inner layer portion 13a Internal electrode 14a Inner dielectric layer 15a Counter electrode portion 15b Lead electrode portion 16 Outer layer portion 16a First outer layer portion 16b Second outer layer portion 17a Outer dielectric layer 19 Step layer 30 External electrode 30a First outer electrode 30b Second outer electrode 31 Glass layer 32 Base electrode layer 32a Inner base electrode layer 32b Outer base electrode layer 33a Inner glass layer 33b Outer glass layer 34 Plating layer 35 Surface plating layer 36 Connection portion

Claims

1. a laminate having a first surface and a second surface facing each other in a stacking direction, a third surface and a fourth surface facing each other in a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface facing each other in a second direction perpendicular to the stacking direction and the first direction; an external electrode disposed on a fifth surface of the laminate; Equipped with the laminate includes an inner dielectric layer, and an inner layer portion stacked on the inner dielectric layer in the stacking direction and including an internal electrode having an end portion located on the fifth surface, The external electrode is an inner-layer base electrode layer disposed on the inner layer portion on the fifth surface and connected to the internal electrode; an inner glass layer disposed on the inner base electrode layer and containing a glass component; a plating layer disposed on the inner glass layer; a connection portion that extends through the inner glass layer and electrically connects the inner base electrode layer and the plating layer; A multilayer ceramic capacitor comprising:

2. 2. The multilayer ceramic capacitor according to claim 1, wherein the connecting portion is made of the same metal component as the plating layer.

3. 3. The multilayer ceramic capacitor according to claim 1, wherein the main component of said plating layer is Ni.

4. an outer layer portion including an outer dielectric layer and disposed on the first surface side of the inner layer portion; The external electrode is a glass layer disposed on the outer dielectric layer and having a glass component; an outer base electrode layer disposed on the glass layer and connected to the inner base electrode layer; an outer glass layer disposed on the outer base electrode layer and having a glass component; The multilayer ceramic capacitor according to claim 1 or 2, comprising:

5. 5. The multilayer ceramic capacitor according to claim 4, wherein the outer glass layer is thinner than the inner glass layer.

6. a laminate having a first surface and a second surface facing each other in a stacking direction, a third surface and a fourth surface facing each other in a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface facing each other in a second direction perpendicular to the stacking direction and the first direction; a first external electrode disposed on the fifth surface of the laminate; a second external electrode disposed on the sixth surface of the laminate; a third external electrode disposed on the third surface of the laminate; a fourth external electrode disposed on the fourth surface of the laminate; Equipped with the laminate includes an inner layer portion having an inner dielectric layer, and a first inner electrode and a second inner electrode disposed on either side of the inner dielectric layer in the lamination direction, the first internal electrode has two ends located on the fifth surface and the sixth surface, the second internal electrode has two ends located on the third surface and the fourth surface, respectively; Each of the first external electrode and the second external electrode is a first inner-layer base electrode layer disposed on the inner layer portion and connected to the first inner electrode; a first inner glass layer disposed on the first inner base electrode layer and containing a glass component; a first plating layer disposed on the first inner glass layer; a first connection portion that extends through the first inner glass layer and electrically connects the first inner base electrode layer and the first plating layer; A multilayer ceramic capacitor comprising:

7. Each of the third external electrode and the fourth external electrode is a second inner-layer base electrode layer disposed on the inner layer portion and connected to the second inner electrode; a second inner glass layer disposed on the second inner base electrode layer and containing a glass component; a second plating layer disposed on the second inner glass layer; a second connection portion that extends through the second inner glass layer and electrically connects the second inner base electrode layer and the second plating layer; The multilayer ceramic capacitor according to claim 6 , comprising: