Method for manufacturing semiconductor device and semiconductor device
Patent Information
- Application Number
- JP2024554238
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-07-14
- Filing Date
- 2024-04-08
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2044-04-08
AI Technical Summary
Existing methods for converting amorphous silicon to single crystal silicon in semiconductor devices face challenges due to the mismatch in lattice constants, leading to increased channel resistance in devices like thin film transistors and semiconductor memory devices.
A method involving the formation of a Ni silicide film on amorphous silicon, followed by the deposition of an Al film to create a NiAlSi compound, which has a lattice constant closer to that of single crystal silicon, allowing for efficient crystallization through heat treatment.
This approach effectively reduces channel resistance in semiconductor devices by facilitating the conversion of amorphous silicon to single crystal silicon, thereby enhancing device performance.
Smart Images

Figure 00000011_0000 
Figure 00000011_0001 
Figure 00000011_0002
Abstract
Description
[Technical field]
[0001] The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device. [Background technology]
[0002] As one of the methods for solving the performance degradation due to the increase in channel resistance of semiconductor elements (e.g., thin film transistors, semiconductor memory devices), there is a method of single-crystallizing the amorphous silicon or polycrystalline silicon in the channel. As a method of single crystallization, there is a MILC (Metal Induced Lateral Crystallization) process in which Ni silicide is the growth edge of crystallization. As an example of the MILC process, "Thin film transistor using metal induced lateral crystallization method and its manufacturing method" shown in Patent Document 1 will be described with reference to Figs. 1 to 3. In Figs. 1 to 3, 200 denotes an insulating substrate, 210 denotes a buffer layer, 220 denotes an active layer, 221 and 225 denote source / drain regions, 223 denotes a channel region, 230 denotes a gate insulating film, 240 denotes a gate electrode, 250 denotes an interlayer insulating film, 251 and 255 denote contact holes, and 260 denotes a crystallization-induced metal film.
[0003] 1, an interlayer insulating film 250 is deposited on an insulating substrate 200 including a gate electrode 240, and contact holes 251, 255 are formed to expose portions of source / drain regions 221, 225. Next, a crystallization-inducing metal film 260 such as Ni is deposited on the insulating substrate 200 by a method such as sputtering.
[0004] 2, the amorphous silicon film of the active layer 220 is crystallized and changed into a polycrystalline silicon film by performing heat treatment in a furnace (crystallization at a rate of 3 μm / hr at 550° C.). At this time, the amorphous silicon in the lower regions 221a and 225a below the crystallization-inducing metal film 260 in the contact holes 251 and 255 is crystallized by a Metal Induced Crystallization (MIC) method, and the amorphous silicon in the other regions 221b and 225b is crystallized by a MILC method.
[0005] Next, as shown in FIG. 3, the crystallization-inducing metal film 260 is removed, and source / drain electrodes 271, 275 are formed to obtain a thin film transistor.
[0006] Patent Document 2 discloses a nonvolatile semiconductor memory device that includes a semiconductor substrate, a first layer, a second conductive layer, a memory film, and a semiconductor layer, and a metal layer containing Ni, Co, Al, or Pd in contact with the semiconductor layer, in order to improve operation speeds such as read speed, write speed, and erase speed while easing operation control and circuit layout design. Patent Document 2 also discloses that "when the metal layer 70 is made of a material that does not form silicide, such as Al, after annealing, the vicinity of the lower end of the semiconductor pillar SP may contain an alloy with Al, and the vicinity of the upper end of the semiconductor pillar SP may contain an alloy with Al. Also, not limited to the vicinity of the upper end and lower end of the semiconductor pillar SP, the semiconductor pillar SP may contain an alloy with Al."
[0007] Patent Document 3 discloses a semiconductor memory device having a first wiring layer, a second wiring layer, and a memory pillar to improve processing power. Patent Document 3 also discloses that NiSi2 is suitable for forming single crystal silicon by MILC because its lattice constant has a mismatch of only about 0.3% with that of Si. It also discloses that metal materials for crystallizing semiconductor pillars (e.g., silicon, silicon germanium, germanium) by the MILC method include, for example, Ni, Co, Al, and Pd.
[0008] Non-Patent Document 1 describes the lattice constant of Si, the lattice constant of NiSi2, and NiSi 2-X Al X The horizontal axis of Fig. 4 is the lattice constant of NiSi 2-X Al X The vertical axis of Fig. 4 shows the lattice constant. From Fig. 4, the lattice constant of NiSi2 is 5.406, and the lattice constant of Si is 5.431. When the ratio of Al to NiSi2 is X=0.24, 2-X Al X = 5.431, which is found to coincide with the lattice constant of Si. Note that the unit of the lattice constant in Non-Patent Document 1 is angstroms, and the lattice constant will also be described in this specification in angstroms. [Prior art documents] [Patent documents]
[0009] [Patent Document 1] JP 2005-159307 A [Patent Document 2] JP 2014-175348 A [Patent Document 3] JP 2019-165178 A [Non-patent literature]
[0010] [Non-Patent Document 1] Klaus et all “Appl. Phys. Lett. 83, 497(2003)” P497-499 Summary of the Invention [Problem to be solved by the invention]
[0011] The present invention provides a technique for converting amorphous silicon to single crystal silicon by means of a silicide having a lattice constant that more closely matches that of single crystal silicon. [Means for solving the problem]
[0012] A first aspect of the present invention relates to a method for manufacturing a semiconductor device, including a conversion step of converting amorphous silicon into single crystal silicon, the conversion step including a first step of forming a silicide film in contact with the amorphous silicon by forming a first film containing a first material so as to cover the amorphous silicon by a treatment involving heat, a second step of forming a compound composed of Si, the first material, and the second material in contact with the silicide film by forming a second film containing a second material so as to cover the silicide film by a treatment involving heat after the first step, and a third step of changing the silicide film remaining after the second step into the compound by a heat treatment, wherein the first material is one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn, and the second material is one material selected from the group consisting of Al, Au, Sb, In, Ag, and Ga.
[0013] A second aspect of the present invention relates to a method for manufacturing a semiconductor device, including a conversion step of converting amorphous silicon into single crystal silicon, the conversion step including a first step of forming a first film containing a first material so as to cover the amorphous silicon, a second step of forming a second film containing a second material so as to cover the first film after the first step, and a third step of forming a compound containing Si, the first material, and the second material by heat treatment after the second step, wherein the first material is one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn, and the second material is one material selected from the group consisting of Al, Au, Sb, In, Ag, and Ga.
[0014] A third aspect of the present invention relates to a semiconductor element including a laminated structure of amorphous silicon, a compound, and single crystal silicon, wherein in the semiconductor element, the compound is a compound of Si, a first material, and a second material, the first material is one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn, and the second material is one material selected from the group consisting of Al, Au, Sb, In, Ag, and Ga. [Brief description of the drawings]
[0015] [Figure 1] 1A to 1C are cross-sectional views illustrating steps in a manufacturing method of a thin film transistor described in Patent Document 1. [Diagram 2] 1A to 1C are cross-sectional views illustrating steps in a manufacturing method of a thin film transistor described in Patent Document 1. [Diagram 3] 1A to 1C are cross-sectional views illustrating steps in a manufacturing method of a thin film transistor described in Patent Document 1. [Figure 4] FIG. 1 is a diagram showing the relationship between the lattice constant of Si, the lattice constant of NiSi2, and the lattice constant of NiSi2-XAlX described in Non-Patent Document 1. [Figure 5A] 2A to 2C are process diagrams illustrating a method for manufacturing the semiconductor element according to the first embodiment. [Figure 5B] 2A to 2C are process diagrams illustrating a method for manufacturing the semiconductor element according to the first embodiment. [Figure 5C] 2A to 2C are process diagrams illustrating a method for manufacturing the semiconductor element according to the first embodiment. [Figure 6A] 5A to 5C are process diagrams illustrating a method for manufacturing a semiconductor element according to a second embodiment. [Figure 6B] 5A to 5C are process diagrams illustrating a method for manufacturing a semiconductor element according to a second embodiment. [Figure 6C] 5A to 5C are process diagrams illustrating a method for manufacturing a semiconductor element according to a second embodiment. [Figure 7A] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a third embodiment. [Figure 7B] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a third embodiment. [Figure 7C]10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a third embodiment. [Figure 8A] 2A to 2C are process diagrams illustrating a method for manufacturing the semiconductor element according to the first embodiment. [Figure 8B] 2A to 2C are process diagrams illustrating a method for manufacturing the semiconductor element according to the first embodiment. [Figure 8C] 2A to 2C are process diagrams illustrating a method for manufacturing the semiconductor element according to the first embodiment. [Figure 9] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 10] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 11] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 12] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 13] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 14] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 15] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 16] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 17] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fourth embodiment. [Figure 18A] 13A to 13C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fifth embodiment. [Figure 18B] 13A to 13C are process diagrams illustrating a method for manufacturing a semiconductor element according to a fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0016] Hereinafter, the embodiments will be described in detail with reference to the attached drawings. Note that the following embodiments do not limit the invention according to the claims. Although the embodiments describe a number of features, not all of these features are essential to the invention, and the features may be combined in any manner. Furthermore, in the attached drawings, the same reference numbers are used for the same or similar configurations, and duplicated descriptions are omitted.
[0017] 5A to 5C are diagrams showing a first embodiment of a method for manufacturing a semiconductor device including a conversion step for converting amorphous silicon 1 into single crystal silicon 10. The inventor discovered that the Al film inhibits the silicidation of the Ni film from the results of an experiment in which an Al film and a Ni film are sequentially formed on amorphous silicon and a structure obtained by heating the structure obtained by forming a NiAl film on amorphous silicon. The inventor also discovered that Al is not included in the Ni silicide and is pushed out to the surface side of the NiAl film from the results of an experiment in which a Ni silicide film is formed in contact with amorphous silicon by forming a Ni film on amorphous silicon by a process involving heating, and then an Al film is formed on the Ni silicide film by a process involving heating, thereby diffusing Al into the Ni silicide film and forming NiAlSi. NiAlSi has a lattice constant close to that of single crystal silicon, so that single crystal silicon can be easily obtained by contacting NiAlSi with amorphous silicon and performing a heat treatment. The following embodiments are based on the above findings.
[0018] The method for manufacturing a semiconductor device according to the first embodiment may include a conversion step of converting the amorphous silicon 1 into single crystal silicon 10. The amorphous silicon 1 may form a part of a substrate. The conversion step includes: A first step S1 of forming a first film 3 containing Ni (nickel) as a first material so as to cover the amorphous silicon 1 by a heat treatment involving heating, thereby forming Ni silicide as silicide 4 in contact with the amorphous silicon 1; After the first step S1, a second step S2 is performed in which a second film 6 containing Al (aluminum) as a second material is formed to cover the silicide 4 by a treatment involving heating, thereby forming NiAlSi as a compound 7 composed of Si (silicon), Ni (first material), and Al (second material) in contact with the silicide 4; It may include a third step S3 of changing the silicide 4 remaining after the second step S2 into a NiAlSi film as a compound 9 composed of Si, Ni (first material), and Al (second material) by heat treatment.
[0019] This makes it possible to prepare a structure in which NiAlSi as the compound 9 is disposed so as to be in contact with the amorphous silicon 1.
[0020] 5A shows a structure 101 at a stage where a first film 3 containing Ni as a first material is formed to cover the amorphous silicon 1 by a heat treatment involving heating in the first step S1, and a structure 102 in which Ni silicide is formed as the silicide 4. FIG. 5B shows a structure 104 at a stage where a second film 6 containing Al as a second material is formed to cover the silicide 4 by a heat treatment, and a structure 105 at a stage where NiAlSi is formed as a compound 7 composed of Si, Ni (first material), and Al (second material) in contact with the silicide 4. FIG. 5C shows a structure 106 having the silicide 4 remaining after the second step S2, and a structure 107 after the silicide 4 is changed to a compound 9 by a heat treatment.
[0021] Here, instead of Ni, the first material may be Pd (palladium), Ti (titanium), Cu (copper), Pt (platinum), Co (cobalt), Mo (molybdenum), Mg (magnesium), W (tungsten), Cr (chromium) or Mn (manganese). In other words, the first material may be one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr and Mn.
[0022] As the second material, Au (gold), Sb (antimony), In (indium), Ag (silver) or Ga (gallium) may be used instead of Al. In other words, the second material can be one material selected from the group consisting of Al, Au, Sb, In, Ag and Ga.
[0023] The compound composed of Si, the first material, and the second material is preferably, for example, NiAlSi, NiAuSi, NiSbSi, NiInSi, NiAgSi, or NiGaSi.
[0024] The conversion step of converting the amorphous silicon 1 into single crystal silicon 10 may further include a fourth step S4 of converting at least a portion of the amorphous silicon 1 remaining after the third step S3 into single crystal silicon 10 by heat treatment. Figure 5C shows the structure 108 after at least a portion of the amorphous silicon 1 remaining after the third step S3 has been converted into single crystal silicon 10 by heat treatment. The fourth step may include a Metal Induced Lateral Crystallization (MILC) process.
[0025] The substrate on which the first step is performed may have an insulating film 2 (for example, SiO2: silicon dioxide) in addition to the amorphous silicon 1. The amorphous silicon 1 and the insulating film 2 may be arranged in contact with each other or in close proximity to each other. In the first step S1, a first film 3 containing a first material (for example, Ni) may be formed so as to cover the insulating film 2 in addition to the amorphous silicon 1 by a treatment involving heating, thereby forming a silicide 4 in contact with the amorphous silicon 1 and a first material film 3' in contact with the insulating film 2. FIG. 5A shows a structure 102 having a first material film 3'.
[0026] In this case, the conversion process may further include a step of removing the first material film 3' in contact with the insulating film 2 by chemical etching or the like between the first step S1 and the second step S2. FIG. 5A shows a structure 103 in which the first material film 3' has been removed. By removing the first material film 3', it is possible to prevent the silicide 4 from growing laterally and joining other silicides 4 to cause an electrical short. When the first material film 3' in contact with the insulating film 2 is removed, in the second step S2, when forming NiAlSi as the compound 7 composed of Si, Ni (first material), and Al (second material) so as to contact the silicide 4, a part of the second film 6, that is, the second material film 8, remains on the portion covering the insulating film 2. The second material film 8 can be removed after the second step S2 (for example, between the second step S2 and the third step S3).
[0027] The thickness T2 of the second film 6 formed in the second step S2 (the thickness of the second film 6 in the portion covering the Ni silicide 4) is preferably greater than the thickness T1 of the first film 3 formed in the first step S1 and less than four times the thickness T1 of the first film 3 formed in the first step S1. That is, it is preferable to satisfy 0 < T2 < 4T1.
[0028] T2 = 0 corresponds to the value of X on the horizontal axis of FIG. 4 being 0. In this case, NiSi 2-0 The lattice constant of Al0 (that is, NiSi2) is 5.406. T2 = 4T1 corresponds to the value of X on the horizontal axis of FIG. 4 being 0.54. When the value of X is 0.54, NiSi 1.46 Al 0.54 The lattice constant is 5.454.
[0029] When 0 < T2 < 4T1 is satisfied, the lattice constant of NiSi 2-x Al x is shown as follows.
[0030] 5.406 < NiSi 2-x Al x The lattice constant < 5.454 Therefore, since the lattice constant of NiSi2 (5.406) is closer to that of Si (5.430), it is found to be suitable for forming single crystal silicon by the MILC process.
[0031] This can reduce channel resistance, which is a problem in semiconductor elements such as thin film transistors and semiconductor memory devices (eg, 3D NAND memories).
[0032] 6A to 6C are diagrams illustrating a second embodiment of a method for manufacturing a semiconductor device, including a conversion step of converting amorphous silicon 1 into single crystal silicon 10. Matters not mentioned in the second embodiment may follow the first embodiment. Fig. 6A illustrates a first step S1, Fig. 6B illustrates a second step S2, and Fig. 6C illustrates a third step S3 and a fourth step S4.
[0033] In the second embodiment, the first material film 3' in contact with the insulating film 2 is not removed between the first step S1 and the second step S2. Therefore, in the second step S2, a second film 6 containing Al as the second material is formed so as to cover the silicide 4 and the first material film 3' by a treatment involving heating, and in addition to the compound 7 in contact with the silicide 4, a second compound 11 of the first material and the second material is obtained so as to be in contact with the insulating film 2.
[0034] In the second embodiment, the conversion step may include a step of removing the second compound 11 in contact with the insulating film 2 between the second step S2 and the third step S3. By removing the second compound 11, it is possible to prevent the silicide 4 from growing laterally and combining with other silicides 4 to cause an electrical short circuit. FIG. 6B shows a structure 106 from which the second compound 11 has been removed.
[0035] 7A to 7C are diagrams showing a third embodiment of a method for manufacturing a semiconductor device, including a conversion step of converting amorphous silicon into single crystal silicon. Matters not mentioned in the third embodiment may follow the first embodiment. FIG. 7A shows a first step S1, FIG. 7B shows a second step S2, and FIG. 7C shows a third step S3 and a fourth step S4.
[0036] In the third embodiment, the first material film 3' in contact with the insulating film 2 is not removed between the first step S1 and the second step S2. Therefore, in the second step S2, a second film 6 containing Al as the second material is formed so as to cover the silicide 4 and the first material film 3' by a treatment involving heating, and in addition to the compound 7 in contact with the silicide 4, a second compound 11 of the first material and the second material is obtained so as to be in contact with the insulating film 2. Also, in the second embodiment, the second compound 11 in contact with the insulating film 2 is not removed between the second step S2 and the third step S3.
[0037] In the third embodiment, the conversion step may include a step of removing the second compound 11 in contact with the insulating film 2 after the third step S3, more specifically, between the third step S3 and the fourth step S4. By removing the second compound 11, it is possible to prevent the silicide 4 from growing laterally and combining with other silicides 4 to cause an electrical short circuit. FIG. 7C shows a structure 107 from which the second compound 11 has been removed.
[0038] In the first to third embodiments, the drawings to which reference is made show that the first and second films are formed on the amorphous silicon 1, but this merely shows that the first and second films are formed on the amorphous silicon 1 in the illustrated position. The formation of the first and second films on the amorphous silicon 1 does not limit the invention to the formation of the first and second films above the amorphous silicon 1 in a film forming apparatus. The formation of the first and second films on the amorphous silicon 1 also includes the formation of the first and second films below the amorphous silicon 1 in a film forming apparatus, for example, as illustrated in FIGS. 8A to 8C.
[0039] Next, a fourth embodiment of a method for manufacturing a semiconductor device will be described with reference to Figs. 9 to 17. The fourth embodiment provides a method for manufacturing a semiconductor memory device as an example of a semiconductor device. Here, an example of manufacturing a semiconductor memory device having a NAND string will be described. The NAND string includes a plurality of thin film transistors connected in series.
[0040] 9 to 17, 100 denotes a semiconductor substrate, 111, 114, 116, and 136 denote insulating films, 112 and 113 denote wiring layers, 115 denotes a gate electrode layer, 119 denotes a tunnel insulating film, 120 denotes a charge storage layer, 121 denotes a block insulating film, 135 denotes amorphous silicon, 123 denotes a core layer, 124A, 124B, and 141 denote silicide layers, 125 denotes a cap layer, 136 denotes a conductive layer, GP denotes a gap, MP denotes a memory pillar, and SLT denotes a slit.
[0041] In the state shown in FIG. 9, the gap GP communicates with the external space through the slit SLT. The amorphous silicon 135 corresponds to the amorphous silicon 1 described above and is the target of single crystallization. The amorphous silicon 135 is exposed to the gap GP. In this state, in the first step shown in FIG. 10 and FIG. 11, a first film 3 containing Ni as a first material is formed so as to cover the amorphous silicon 135 by a heat treatment involving heating, thereby forming Ni silicide as the silicide 4 in contact with the amorphous silicon 135. At this time, in addition to the silicide 4 in contact with the amorphous silicon 135, a first material film 3' in contact with the insulating film can be formed. The first material film 3' can be removed thereafter.
[0042] 12 and 13, a second film 6 containing Al as a second material is formed by a treatment involving heating so as to cover the silicide 4, thereby forming NiAlSi as a compound 7 composed of Si, Ni (first material), and Al (second material) so as to contact the silicide 4. At this time, a second material film 8, which is a part of the second film 6, remains in the portion covering the insulating film 136 and the like.
[0043] Then, in an optional step shown in Fig. 14, the second material film 8 on the insulating film is removed. Then, in a third step shown in Fig. 15, the silicide film 4 remaining after the second step is changed by heat treatment into a NiAlSi film as a compound 9 composed of Si, Ni (first material), and Al (second material).
[0044] Next, in a fourth step shown in FIGS. 16 and 17, at least a part of the amorphous silicon 135 remaining after the third step is converted into single crystal silicon 10 by heat treatment. The fourth embodiment is advantageous in reducing channel resistance, which is an issue in semiconductor memory devices (for example, 3D NAND memories).
[0045] 18A and 18B are diagrams illustrating a fifth embodiment of a method for manufacturing a semiconductor device, including a conversion step of converting amorphous silicon into single crystal silicon. Matters not mentioned in the fifth embodiment may follow the first to third embodiments. The fifth embodiment is also applicable to the fourth embodiment.
[0046] The fifth embodiment of the method for manufacturing a semiconductor device may include a conversion step of converting amorphous silicon 1 into single crystal silicon 10. The amorphous silicon 1 may constitute a part of a substrate. The conversion step may include a first step S1' of forming a first film 3 containing Ni as a first material so as to cover the amorphous silicon 1, a second step S2' of forming a second film 6 containing Al as a second material so as to cover the first film 3 after the first step S1', and a third step S3' of changing the amorphous silicon 1 into a NiAlSi film as a compound 9 composed of Si, Ni (first material), and Al (second material) by heat treatment after the second step S2'.
[0047] This makes it possible to prepare a structure in which NiAlSi as the compound 9 is disposed so as to be in contact with the amorphous silicon 1.
[0048] Here, instead of Ni, the first material may be Pd (palladium), Ti (titanium), Cu (copper), Pt (platinum), Co (cobalt), Mo (molybdenum), Mg (magnesium), W (tungsten), Cr (chromium) or Mn (manganese). In other words, the first material may be one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr and Mn.
[0049] As the second material, Au (gold), Sb (antimony), In (indium), Ag (silver) or Ga (gallium) may be used instead of Al. In other words, the second material can be one material selected from the group consisting of Al, Au, Sb, In, Ag and Ga.
[0050] The compound composed of Si (silicon), Ni (first material), and Al (second material) is preferably, for example, NiAlSi, NiAuSi, NiSbSi, NiInSi, NiAgSi, or NiGaSi.
[0051] The conversion step of converting the amorphous silicon 1 into the single crystal silicon 10 may further include a fourth step S4' of converting at least a part of the amorphous silicon 1 remaining after the third step S3' into the single crystal silicon 10 by heat treatment. The conversion step may also include a step of removing the second compound 11 in contact with the insulating film 2 between the third step S3' and the fourth step S4'.
[0052] Through the fourth step S4', a laminated structure of amorphous silicon 1, compound 9, and single crystal silicon 10 is formed. The fourth step S4' may include a MILC (Metal Induced Lateral Crystallization) process. The thickness of the second film 6 formed in the second step S2' is preferably greater than the thickness of the first film 3 formed in the first step S1' and less than four times the thickness of the first film 3 formed in the first step S1'.
[0053] The invention is not limited to the above-described embodiments, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]
[0054] 1: amorphous silicon, 2: insulating film, 3: first film (e.g., Ni film), 3': first material film (e.g., Ni film), 4: silicide (e.g., Ni silicide), 6: second film (e.g., Al film), 7: compound (e.g., NiAlSi), 8: second material film (e.g., Al film), 9: compound (e.g., NiAlSi), 10: single crystal silicon, 11: second compound (e.g., NiAl)
Claims
1. 1. A method for manufacturing a semiconductor device, comprising a conversion step of converting amorphous silicon into single crystal silicon, the conversion step comprising: a first step of forming a first film including a first material so as to cover the amorphous silicon by a treatment involving heating, thereby forming a silicide in contact with the amorphous silicon; a second step of forming a compound composed of Si, the first material, and the second material in contact with the silicide by forming a second film containing a second material by a treatment involving heating after the first step; a third step of converting the silicide remaining after the second step into the compound by heat treatment; The first material is one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr and Mn; The second material is one material selected from the group consisting of Al, Au, Sb, In, Ag, and Ga. A method for manufacturing a semiconductor device comprising the steps of:
2. The conversion step further includes a fourth step of converting at least a portion of the amorphous silicon remaining after the third step into single crystal silicon by heat treatment.
2. The method for manufacturing a semiconductor device according to claim 1.
3. Through the fourth step, a laminated structure of the amorphous silicon, the compound, and the single crystal silicon is formed.
3. The method for manufacturing a semiconductor device according to claim 2.
4. The fourth step includes a MILC (Metal Induced Lateral Crystallization) process; 4. The method for manufacturing a semiconductor device according to claim 3.
5. The thickness of the second film formed in the second process is greater than the thickness of the first film formed in the first process and is smaller than four times the thickness of the first film formed in the first process.
5. The method for manufacturing a semiconductor device according to claim 1,
6. The second material is Al.
5. The method for manufacturing a semiconductor device according to claim 1,
7. The first material is Ni; 5. The method for manufacturing a semiconductor device according to claim 1,
8. The first material is Ni and the second material is Al.
5. The method for manufacturing a semiconductor device according to claim 1,
9. In the first step, the first film containing the first material is formed so as to cover the insulating film as well as the amorphous silicon by a treatment involving heating, thereby forming a first material film in contact with the insulating film as well as the silicide in contact with the amorphous silicon.
5. The method for manufacturing a semiconductor device according to claim 1,
10. the converting step further includes a step of removing the first material film in contact with the insulating film between the first step and the second step.
10. The method for manufacturing a semiconductor device according to claim 9.
11. In the second step, the second film containing the first material is formed so as to cover the insulating film in addition to the silicide by a treatment involving heating, so that a second material film is formed in contact with the insulating film in addition to the compound in contact with the silicide. The method for manufacturing a semiconductor device according to claim 10 .
12. the converting step further includes a step of removing the second material film in contact with the insulating film between the second step and the third step. The method for manufacturing a semiconductor device according to claim 11 .
13. In the second step, the second film including the second material is formed so as to cover the silicide and the first material film by a treatment involving heating, so that a second compound of the first material and the second material is obtained in contact with the insulating film in addition to the compound in contact with the silicide.
10. The method for manufacturing a semiconductor device according to claim 9.
14. the converting step includes a step of removing the second compound in contact with the insulating film between the second step and the third step; The method for manufacturing a semiconductor device according to claim 13 .
15. The converting step further includes, after the third step, a step of removing the second compound in contact with the insulating film. The method for manufacturing a semiconductor device according to claim 13 .
16. 1. A method for manufacturing a semiconductor device, comprising a conversion step of converting amorphous silicon into single crystal silicon, the conversion step comprising: a first step of forming a first film including a first material so as to cover the amorphous silicon; a second step of forming a second film including a second material so as to cover the first film after the first step; a third step of forming a compound including Si, the first material, and the second material by heat treatment after the second step; The first material is one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr and Mn; The second material is one material selected from the group consisting of Al, Au, Sb, In, Ag, and Ga. A method for manufacturing a semiconductor device comprising the steps of:
17. The conversion step further includes a fourth step of converting at least a portion of the amorphous silicon remaining after the third step into single crystal silicon by heat treatment. The method for manufacturing a semiconductor device according to claim 16 .
18. Through the fourth step, a laminated structure of the amorphous silicon, the compound, and the single crystal silicon is formed. The method for manufacturing a semiconductor device according to claim 17 .
19. The fourth step includes a MILC (Metal Induced Lateral Crystallization) process; 20. The method for manufacturing a semiconductor device according to claim 18.
20. The thickness of the second film formed in the second process is greater than the thickness of the first film formed in the first process and is smaller than four times the thickness of the first film formed in the first process.
20. The method for manufacturing a semiconductor device according to claim 16,
21. The second material is Al.
20. The method for manufacturing a semiconductor device according to claim 16,
22. The first material is Ni; 20. The method for manufacturing a semiconductor device according to claim 16,
23. The first material is Ni and the second material is Al.
20. The method for manufacturing a semiconductor device according to claim 16,
24. A semiconductor device including a laminated structure of amorphous silicon, a compound, and single crystal silicon, the compound is a compound of Si, a first material, and a second material; The first material is one material selected from the group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr and Mn; The second material is one material selected from the group consisting of Al, Au, Sb, In, Ag, and Ga. A semiconductor device comprising: