Server, semiconductor device manufacturing system, and manufacturing method
Patent Information
- Application Number
- JP2024535799
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-24
- Publication Date
- 2025-02-27
- Estimated Expiration
- 2043-08-24
Abstract
Description
Server, semiconductor device manufacturing system and manufacturing method
[0001] The present invention relates to a server, a semiconductor device manufacturing system, and a manufacturing method.
[0002] Plasma etching systems are currently part of the semiconductor manufacturing toolset for producing semiconductor devices approaching atomic-level miniaturization. One of the requirements for device manufacturing equipment is improved uniformity. It has become clear that simply measuring the lateral dimensions of semiconductor devices from the top surface of the wafer and then performing uniformity based on that measurement data is insufficient for achieving near-atomic-level semiconductor device manufacturing. For example, while CD-SEM is one of the measurement tools mentioned above, the top-view geometric planar dimensional data obtained from CD-SEM only captures the surface dimensions of the pattern, making it impossible to measure bowing or notch shapes slightly deeper than the surface. As a result, even with the same critical dimension (CD) value, three-dimensional geometric defects in the pattern cannot be detected. Failure to detect these defects clearly leads to defects in the ion implantation and CVD processes after etching. Furthermore, these defect shapes are related not only to the temperature of the electrostatic chuck during etching but also to the plasma density, necessitating complex etching parameter control. As disclosed in Patent Document 1, the conventional technology is a technology that achieves uniform CD values within the wafer surface and improves wafer surface yield by feeding back the CD values, which are top-view geometric dimension data, to the temperature value of an electrostatic chuck based on variations in CD values within the wafer surface.
[0003] Patent No. 5925943
[0004] However, because the conventional technology is a technology for uniforming the CD value, it cannot address defects such as bowing or notches occurring in the depth direction even though the same CD value is shown. Furthermore, because the technology relies on feedback to the electrostatic chuck temperature, it cannot address defects in the pattern shape caused by plasma density. Therefore, the present invention aims to provide a technology that can detect shape defects that cannot be obtained solely from planar dimensional data obtained from a top view and accurately control etching parameters.
[0005] In order to solve the above-mentioned problems, one representative aspect of the present invention is a server characterized in that the etching parameters of a semiconductor manufacturing device are controlled based on correlation data between the amount of change between a feature of an etching shape formed on a sample and a target value, and the etching parameters of the semiconductor manufacturing device so as to obtain a desired processing result, and the feature is a value obtained from secondary electron data from the surface of the sample or interference light data from the surface of the sample.
[0006] According to the present invention, it is possible to detect shape defects that cannot be obtained from planar dimensional data obtained from a top view alone, and to accurately control etching parameters. Furthermore, users can non-destructively optimize etching process recipes that do not cause device defects without observing the cross section of the wafer when or before a device defect occurs. Problems, configurations, and effects other than those described above will become clear from the description of the following embodiments.
[0007] FIG. 1 is a schematic diagram of a semiconductor device manufacturing system according to a first embodiment. FIG. 2A is a correlation diagram between a pattern shape and a secondary electron profile when an acceleration voltage is high. FIG. 2B is a correlation diagram between a pattern shape and a secondary electron profile when an acceleration voltage is low. FIG. 3 is a correlation diagram between a pattern shape and a secondary electron profile for predetermined etching parameters. FIG. 4 is a flowchart of an example of a method for controlling etching parameters according to the first embodiment. FIG. 5 is a flowchart of an example of a method for controlling etching parameters according to the second embodiment. FIG. 6 is a correlation diagram between a pattern shape and a secondary electron profile for a predetermined number of etching-processed wafers. FIG. 7 is a flowchart of an example of a method for extracting a combination of feature quantities having a high correlation coefficient with respect to etching parameters. FIG. 8 is a schematic diagram of a feature quantity map according to a fourth embodiment. FIG. 9 is a flowchart of an example of a method for controlling etching parameters according to the fourth embodiment. FIG. 10 is a correlation diagram between feature quantities and etching parameters.
[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that the present invention is not limited to this embodiment. In addition, in the description of the drawings, the same parts are designated by the same reference numerals.
[0009] In one embodiment of the present invention, a server may be provided that calculates, based on feature quantities obtained from a secondary electron profile obtained from a top view of a wafer by a CD-SEM, the amount of change in the feature quantities over time or the amount of change in the feature quantities, or calculates the geometric dimension difference (amount of change) between the feature quantities of the etching shape and the feature quantities of a target shape and the integral value of the geometric dimension difference (amount of change) in the etching depth direction, and controls etching parameters in a semiconductor manufacturing apparatus based on these correlation data. The following description will be given based on the embodiment.
[0010] (First Embodiment) A first embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a schematic diagram of a semiconductor device manufacturing system according to the first embodiment. The semiconductor device manufacturing system 10 comprises a group of devices including a semiconductor manufacturing apparatus (etching apparatus) 105, a CD-SEM PC 101, a semiconductor manufacturing apparatus PC 102, and a semiconductor inspection apparatus 104 (e.g., a CD-SEM), and a server 103. The purpose of this diagram is to explain the performance improvement of a semiconductor device manufacturing system, which is important in semiconductor manufacturing.
[0011] The etching process recipe is input into the semiconductor manufacturing equipment PC 102 or transferred from the server 103 to the PC 102 and executed. After execution, the etching equipment 105 transmits the instruction values according to the contents of the process recipe to each device in the etching equipment, and the etching process is performed. Figure 1 shows only the main devices and components, including a wafer temperature control power supply, a temperature control electrode (heater / Peltier element), an RF power supply for high-frequency application, a microwave power supply for plasma generation, a plasma generation gas, a magnetic field generating coil for adjusting plasma density, an electrostatic adsorption electrode (electrostatic chuck), and a lower electrode. A sample wafer is placed on the electrostatic adsorption electrode and etched by plasma processing. The executed process recipe can be saved in the server 103 via the semiconductor manufacturing equipment PC 102. Unless otherwise specified, the term "in-plane" below refers to the surface of the sample (wafer). The wafer is described as having a circular shape with both a radial and circumferential direction.
[0012] The etched wafer is transported to a semiconductor inspection device 104 (e.g., a CD-SEM). In FIG. 1, a CD-SEM recipe is input into a CD-SEM PC 101, and a predetermined measurement is performed. Here, an electron beam is used in the measurement, and feature values are calculated based on the amount of secondary electrons (secondary electron data) after irradiation with the electron beam. Here, a feature value obtained from the intensity profile of the amount of secondary electrons (secondary electron profile) is used as a representative feature value. Other feature values include those using illuminance data and those obtained by differentiating the intensity profile (feature values obtained from the secondary electron profile derived from the etching shape of the sample are sometimes called profile feature values). The measurement results can be saved in a server 103 via the PC 101.
[0013] Using the stored measurement data, the wafer yield is visualized based on the distribution of feature values within the wafer surface, and if the required yield value is not met, the process recipe for performing the etching process again is modified. If there is a difference in feature values even if the CD value is the same, it is considered that there is a problem with the device pattern shape. This will be explained in more detail below.
[0014] (Secondary Electron Profile) Figure 2A is a correlation diagram between the pattern shape and the secondary electron profile when the acceleration voltage is high. Figure 2B is a correlation diagram between the pattern shape and the secondary electron profile when the acceleration voltage is low. Hereinafter, for convenience, Figures 2A and 2B may be collectively referred to as Figure 2. In Figure 2, a schematic diagram of the device pattern shape is shown on the left, and a schematic diagram of the secondary electron intensity profile (secondary electron profile) is shown on the right. The TopCD values of all the pattern shapes in Figure 2 are the same. Because differences in the amount of secondary electrons occur depending on the acceleration voltage, there is an optimal acceleration voltage that makes it easy to extract defect shapes. Here, we will use a bowing shape as an example of a defect shape to explain how the secondary electron profile changes between high and low acceleration voltages and the concept of which is optimal. Note that the device pattern shape may also be referred to as the etched shape when it is a shape formed by etching.
[0015] FIG. 2A illustrates the case where the acceleration voltage is high (acceleration voltage: Vh1). (a-1) shows the case where a bowing shape (defective shape) is present, and (a-2) shows the case where the target shape is present. Because the penetration depth of primary electrons at the acceleration voltage is deep, the amount of secondary electrons seeping out from the sidewalls of the pattern at the initial etching depth DL is small, and therefore the amount of secondary electrons is also small. Therefore, when there is a bowing shape with a reduced width, the feature value of the pattern shape (secondary electron intensity at the center of the top surface of the pattern) and the feature value of the target shape with a normal width (hereinafter, the feature value of the target shape will be simply referred to as the target value) are both a, with no difference (amount of change), making it difficult to detect the bowing shape.
[0016] As etching progresses and the etching depth reaches DH, which is the final shape, the amount of secondary electrons seeping out to the pattern sidewalls increases, as shown in (a-1), and the value of the feature quantity (secondary electron intensity at the center of the top surface of the pattern) increases to b. Therefore, since this value is larger than the target value c, it is easy to detect a bowing shape. In other words, if b-a > c-a (i.e., b > c), it can be determined that a bowing shape exists.
[0017] On the other hand, as shown in FIG. 2B , when the acceleration voltage is low (acceleration voltage: Vl1), the penetration depth of the primary electrons is shallow. Therefore, even if the bowing shape is small at the initial etching depth DL as shown in (b-1), many secondary electrons seep out from the pattern sidewalls. As a result, the feature value (secondary electron intensity at the center of the pattern top surface) becomes large, d. Therefore, the difference (change) d - e from the target value e is large, making it easy to detect the bowing shape even in the early stages of etching. Naturally, at the etching depth DH, which is the final shape after the etching process has progressed, the difference (change) f - g between the feature value and the target value is also large, making it easy to detect the bowing shape. As described above, adjusting the acceleration voltage applied to the primary electrons during electron beam irradiation affects the ease of detecting pattern shape defects, so it is important to optimally adjust the acceleration voltage.
[0018] As explained above, since the profile feature quantity also includes information on the etching shape in the etching depth direction, by calculating the difference in the profile feature quantity within the wafer surface, it becomes possible to determine defects such as bowing shape in the etching depth direction that cannot be obtained from only the planar dimensional data obtained from the top view. Furthermore, this can also be done by using the tilt function of the CD-SEM to tilt the wafer and calculate the change in the feature quantity, thereby calculating the change in the feature quantity in more detail.
[0019] (Features and Etching Parameters) Next, we will explain the correlation between feature values and etching parameters. Figure 3 shows the correlation between the pattern shape and secondary electron profile for a given set of etching parameters. As an example, the pattern shape and feature values at the wafer edge and at the wafer center are shown, along with the temperature and plasma density environment as etching parameters at each location. Here, for example, the device at the wafer center is the target pattern shape, and the wafer center temperature is T2 and the plasma density is P2. The device at the wafer edge is the location where a bowing defect occurs, and the wafer edge temperature is T1 and the plasma density is P1. Figure 3 shows a graph schematically illustrating the pattern shape at the wafer edge and wafer center, with the vertical axis z and the horizontal axis B. L1 to L4 are the film type switching lines. The shaded areas indicate the shape difference between the wafer edge and wafer center. The area of the shape difference (area difference) is ∫ΔBdz. There are two methods: optimizing the etching parameters by calculating ∫ΔBdz, or optimizing without calculating it. These are explained below.
[0020] (Method 1) Method 1 is a method of controlling etching parameters without specifying ∫ΔBdz. First, ∫ΔBdz can be expressed as Equation 1 using function Q. ∫ΔBdz = Q((f-a)-(g-a)) ...Equation 1 Next, if the electrostatic chuck temperature difference ΔT = T1-T2 and the plasma density difference ΔP = P1-P2, ∫ΔBdz can also be expressed as Equation 2 using function R. ∫ΔBdz = R(ΔT, ΔP) ...Equation 2 From Equations 1 and 2, Q(f-g) = R(ΔT, ΔP) Therefore, f-g can be expressed as Equation 3 using function Z. f-g = Z(ΔT, ΔP) ...Equation 3 Ideally, f-g = 0, so from Equation 3, the values of T and P at which Z(ΔT, ΔP) = 0 can be found.
[0021] (Method 2) Method 2 is a method for controlling etching parameters by specifying ∫ΔBdz. First, ∫ΔBdz is determined by measuring CD in real time at L1 to L4 using an OCD (Optical Critical Dimension). In this case, the measurement points in the depth direction may be stacked films of different film types. In the case of the same film, the wafer may be split and measured using an SEM or TEM. SEM and TEM can also be used for stacked films. ∫ΔBdz can be expressed as in Equation 4 using a predetermined function R: ∫ΔBdz = R(ΔT, ΔP)...Equation 4. Ideally, ∫ΔBdz = 0, so the values of T and P at which R(ΔT, ΔP) = 0 can be determined from Equation 4. Note that there are no particular limitations on the derivation of the function described in this disclosure, but it can be determined inductively from experiments.
[0022] In the first embodiment, Method 1 is adopted, so there is no need to calculate the geometric dimension difference. Meanwhile, in the second embodiment, which will be described later, Method 2 is adopted. A method for controlling etching parameters using Method 1 is described using a flowchart. FIG. 4 is a flowchart of an example of a method for controlling etching parameters in the first embodiment. First, after wafer etching, N measurement points are selected. N is a number greater than 1 relative to the number of parameters to be calculated. For example, in this embodiment, two points are selected: the wafer center and the wafer edge. For simplicity's sake, in this embodiment, the plasma density is not changed, and the only parameter to be calculated is temperature, so the above two measurement points are sufficient. Next, the wafer temperature T and plasma density P are measured at the selected positions, and the characteristic quantities are also measured. Next, the wafer temperature difference ΔT and plasma density difference ΔP between the wafer center and the wafer edge are calculated, and the change amount f-g, which is the difference between the characteristic quantities, is calculated.
[0023] Next, referring to Equation 3, the target f-g and T2 and P2 at the wafer center, which is the reference point, are set in order to calculate the value of function Z. If P1 at the wafer edge is the same as P2 as explained above, T1 at the wafer edge can be found from Equation 3. This is the temperature at the wafer edge that will create the target shape. In this case, the temperature near the edge of the electrostatic chuck is adjusted to find the etching parameter Ep that satisfies this T1. Taking into account the heat input balance from the plasma, the temperature near the edge of the electrostatic chuck is adjusted and etching is performed so that the temperature at the wafer edge becomes T1.
[0024] In this embodiment, an example is shown in which the etching parameters are optimized using the amount of change in spatial feature amount. Here, the explanation is based on feature amounts calculated from a secondary electron profile in a CD-SEM as secondary electron data, but the same flow applies to feature amounts calculated from an interference light profile in an OCD as interference light data.
[0025] Second Embodiment A second embodiment of the present invention will be described with reference to FIG. 5. The difference from the first embodiment is that Equation 4 in Method 2 described above is used. Since the rest of the method is the same as in the first example, the differences will be mainly described. FIG. 5 is a flowchart of an example of a method for controlling etching parameters in the second embodiment. In the first embodiment, it was not necessary to calculate the geometrical dimensional difference between the target shape and the defective shape, but the second embodiment is an example in which the geometrical dimensional difference between the target shape and the defective shape is calculated.
[0026] First, after wafer etching, M measurement points are selected. M is a number greater than 1 relative to the number of parameters to be determined. In this embodiment, for example, two points are selected: the wafer center and the wafer edge. In this embodiment, for simplicity's sake, the plasma density is not changed, and the only parameter to be determined is temperature, so the above two measurement points are sufficient. Next, the wafer temperature T and plasma density P are measured at the selected positions, and the pattern shape is also measured using secondary electron data obtained by cross-sectional SEM or TEM, or interference light data obtained by OCD, to determine feature quantities related to the geometric dimensions (feature quantities obtained directly from the geometric dimensions of the pattern shape are also called shape feature quantities).
[0027] Next, the wafer temperature difference ΔT and plasma density difference ΔP between the wafer center and wafer edge are calculated, and the area difference ∫ΔBdz is also calculated. To calculate this area difference, the wafer is cut using a cross-sectional SEM or TEM to measure shape feature quantities related to the dimensions of the pattern shape, or the shape feature quantities related to the dimensions of the pattern shape are obtained by adjusting the OCD light source to obtain the average pattern width for each film type L1 to L4 described in Figure 3. The area difference ∫ΔBdz is then calculated by integrating the change in the geometric dimension difference (ΔB) between the shape feature quantity of the pattern shape and the target value in the etching depth direction.
[0028] Next, referring to Equation 4, the target ∫ΔBdz and T2 and P2 at the wafer center, which is the reference point, are set to calculate the value of function R. As explained above, if P1 at the wafer edge is the same as P2, T1 at the wafer edge can be calculated from Equation 4. This is the temperature at the wafer edge that will create the target shape. Here, the temperature near the edge of the electrostatic chuck is adjusted to satisfy this T1 as the etching parameter Ep. Taking into account the heat input balance from the plasma, the temperature near the edge of the electrostatic chuck is adjusted and etching is performed so that the wafer edge temperature becomes T1. This enables etching parameter control that detects and resolves defects such as bowing in the etching depth direction that cannot be obtained solely from planar dimensional data obtained from a top view. In this embodiment, an example was shown in which the dimensions of the pattern shape are directly obtained using secondary electron data or interference light data to identify shape feature quantities and then optimize the etching parameters.
[0029] Third Embodiment A third embodiment of the present invention will be described with reference to FIG. 6 . FIG. 6 is a correlation diagram between the pattern shape and the secondary electron profile for a predetermined number of etched wafers. As an example, the graph shows the pattern shape and feature values at the wafer center for the first, 100th, and 1000th etched wafers, as well as the temperature and plasma density environments at each time. Here, as an example, the first etched wafer has the target shape, and the wafer center temperature is T1 and the plasma density is P1. The 100th etched wafer has a bowing shape defect, and the wafer center temperature is T100 and the plasma density is P100. The 1000th etched wafer has a bowing shape defect, and the wafer center temperature is T1000 and the plasma density is P1000. FIG. 6 shows a graph schematically illustrating the pattern shapes of the first and 1000th wafers, with the vertical axis z and the horizontal axis B. L1 to L4 are film type switching lines. The shaded area indicates the difference in shape between the first wafer and the 1000th wafer. The area of the difference in shape is ∫ΔBdz. Here, as in the first embodiment, a method of optimization without calculating ∫ΔBdz (Method 1) is used.
[0030] FIG. 4 will be used to explain the above process using a flow chart. First, after wafer etching, N measurement points are selected. N is a number greater than 1 relative to the number of parameters to be determined. In this embodiment, for example, two measurement points are selected: the first wafer and the 1000th wafer. To simplify the explanation, the plasma density is not changed in this embodiment, and the only parameter to be determined is temperature, so the above two measurement points are sufficient. Next, the wafer temperature T and plasma density P at the selected time are measured, and the feature quantities are also measured. Next, the wafer temperature difference ΔT and plasma density difference ΔP between the first wafer and the 1000th wafer are calculated, and the change f-g, which is the difference in feature quantities, is calculated.
[0031] Next, referring to Equation 3, the target f-g and the reference points T1 and P1 of the first wafer are set to calculate the value of function Z. As explained above, if P1000 of the 1000th wafer is the same as P1, then T1000 of the 1000th wafer can be calculated from Equation 3. This is the temperature of the 1000th wafer for which the target shape is to be created. Here, the temperature near the center of the electrostatic chuck is adjusted to satisfy T1000 as the etching parameter Ep. Taking into account the heat input balance from the plasma, the temperature near the center of the electrostatic chuck is adjusted over time to achieve T1000 at the wafer center, and etching is performed. In this embodiment, an example is shown in which the etching parameters are optimized using the change in feature quantity over time. While the explanation here is based on feature quantities calculated from a secondary electron profile obtained using a CD-SEM, the same flow applies to feature quantities calculated from an interference light profile obtained using an OCD.
[0032] Fourth Embodiment A fourth embodiment of the present invention will be described with reference to Fig. 7. Fig. 7 is a flowchart of an example of a method for extracting a combination of feature quantities having a high correlation coefficient with an etching parameter.
[0033] First, the etching parameter Ep is set and etching is performed. Next, shape feature quantities are measured after etching. Shape feature quantities can include various feature quantities such as etching rate, CD value, and surface roughness. There are more than one measurement point. Furthermore, profile feature quantities are measured after etching. Feature quantities are not limited to the secondary electron intensity at the center of the pattern Top surface obtained from the secondary electron profile described above, but various feature quantities (feature quantity 1 / feature quantity 2 / feature quantity 3, etc.) can be considered. There are more than one measurement point.
[0034] Next, the in-plane distribution of the feature quantities is visualized and the degree of nonuniformity is calculated. For example, the maximum value of the variation in the data related to the measured feature quantities relative to the average data is used to calculate the degree of nonuniformity as follows: (maximum value - average value) / average value x 100 (%). Then, feature quantities whose degree of nonuniformity exceeds a predetermined percentage (%) are extracted (for example, the number of extractions for shape feature quantities when the predetermined degree of nonuniformity is Q% is n, and the number of extractions for profile feature quantities when the predetermined degree of nonuniformity is R% is m).
[0035] Next, the in-plane distribution is normalized for each extracted feature quantity. In this example, normalization is performed with the maximum value for each feature quantity set to 1. Next, the normalized data for the in-plane distribution of the shape feature quantity and the normalized data for the in-plane distribution of the profile feature quantity are compared to calculate the correlation coefficient. As an example of calculating the correlation coefficient, FIG. 7 shows the relationship between the normalized data and the wafer measurement position (x). Here, for the etching rate and feature quantity 3 as an example, the normalized data are superimposed to determine the area of the difference (area difference). An example of a formula for calculating the correlation coefficient from the area difference ratio to the integral value of the normalized etching rate data is 100 - area difference ratio (%) to the integral value of the normalized etching rate data = correlation coefficient. This is calculated for all n x m combinations, and combinations with a correlation coefficient greater than L (%) are extracted and stored in a database (DB1) in the server. In this way, correlation data related to feature quantities highly correlated with the etching parameter Ep can be accumulated in DB1. This makes it possible to search DB1 for etching parameters highly correlated with a specified feature quantity using techniques such as machine learning, and control the in-plane distribution to be uniform.
[0036] An actual application example will now be described. Fig. 8 is a schematic diagram of a feature map in the fourth embodiment. Maps of feature quantities 1 to 3 are shown as feature quantities, and attention is focused on feature quantity 3, which has a difference in the in-plane distribution of the feature quantity (high degree of non-uniformity). Etching parameters highly correlated with feature quantity 3 are stored in DB1, so the etching parameters are searched and adjusted appropriately so that feature quantity 3 becomes uniform (DB search). It is also possible to extract optimal etching parameters from past experimental data and manually set them.
[0037] The above-described process is explained using a flowchart. FIG. 9 is a flowchart of an example of a method for controlling etching parameters in the fourth embodiment. First, the in-plane distribution of feature values after etching for wafer 1 is normalized. That is, the maximum feature value is set to 1. Next, the in-plane distribution of feature values is used to identify an etching parameter Ep1 with a high correlation coefficient from the DB1 described above. Machine learning can also be used for identification. If there is a significant spatial or temporal difference (amount of change) in the feature value and a problem is identified, the etching parameter Ep1 is corrected to a predetermined value, and etching processing is performed again on wafer 2. Thereafter, the same process is repeated until the feature value is no longer problematic, thereby obtaining the desired etching processing recipe. Therefore, it is possible to achieve a target shape by accurately controlling the etching parameters for problematic feature values with uneven in-plane distribution.
[0038] Figure 10 shows a further innovation for efficiently determining etching parameters. Figure 10 is a correlation diagram between feature values and etching parameters. An example correlation diagram between etching parameters and feature value 3 (e.g., secondary electron intensity at the center of the pattern top surface) is shown for the wafer center and wafer edge. During etching, the gas pressure is low at the wafer periphery, and the deposition rate of reaction products is often lower than at the center. Therefore, the thickness of reaction products attached to the pattern sidewalls may differ between the wafer center and periphery. Differences in the shape and roughness of the sidewalls are also thought to cause differences in feature values. Even if the same shape is shown, the material and surface roughness inside the pattern sidewalls will differ, resulting in different amounts of secondary electrons emitted from the sidewalls at the wafer center and periphery. In Figure 10, when feature value 3 is f, the etching parameters Ep1 and Ep2 are different at the wafer center and wafer edge. If the etching parameter remains Ep1, a feature value difference (f-g) will occur, which is problematic. However, to move the wafer edge closer to the center, the etching parameter Ep1 at the wafer edge can be changed to Ep2.
[0039] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit of the present invention. For example, in the embodiments, a flow was described in which etching parameters are controlled to eliminate differences in feature quantities by visualizing the distribution of feature quantities on a wafer, normalizing the distribution, and calculating a correlation coefficient. However, the visualization method, normalization method, and correlation coefficient calculation method described here are merely examples.
[0040] Furthermore, in the above embodiments, a server has been described as a component that controls etching parameters, but it does not have to be a server; a virtual area, a PC terminal, or a mobile terminal may also be used, and the same effects can be achieved using not only SMB communication but also FTP communication, NFS communication, or the like. Furthermore, in the above embodiments, an etching apparatus has been described as an example of semiconductor manufacturing equipment, but similar effects can be achieved with other manufacturing equipment, such as a plasma CVD apparatus, an ashing apparatus, or a surface modification apparatus. Furthermore, in the above embodiments, a CD-SEM has been described as an example of semiconductor inspection equipment, but similar effects can be achieved with other inspection equipment, such as an OCD, a TEM, or an XRR.
[0041] The following are some possible aspects of the present invention, but the present invention is not limited to these. (Aspect 1) A server characterized in that the etching parameters of a semiconductor manufacturing device are controlled to obtain a desired processing result based on correlation data between a change in a feature of an etching profile formed on a sample and a target value, and the etching parameters of the semiconductor manufacturing device, the feature being a value obtained from secondary electron data from the surface of the sample or interference light data from the surface of the sample. (Aspect 2) The server described in Aspect 1, characterized in that the feature is a value obtained from the dimensions of the etching profile of the sample based on the secondary electron data or the interference light data. (Aspect 3) The server described in Aspect 1 or 2, characterized in that the change is a value of spatial or temporal change. (Aspect 4) The server described in any one of Aspects 1 to 3, characterized in that the correlation data includes a value obtained from an integral in the etching depth direction of the change in the dimensional difference between the etching profile and the target profile. (Aspect 5) The server described in Aspect 4, characterized in that the correlation data includes the difference between an etching parameter related to the etching profile and an etching parameter related to the target profile, and the integral value. (Aspect 6) The server according to Aspect 1, characterized in that, when the feature amount is obtained from the secondary electron data, the feature amount is adjusted by the acceleration voltage of an electron gun of a CD-SEM. (Aspect 7) The server according to any one of Aspects 1 to 6, characterized in that the sample has a plurality of films formed thereon. (Aspect 8) The server according to Aspect 3, characterized in that, when the change amount is a value of spatial change, it is a value of change in the radial direction of the sample or the circumferential direction of the sample. (Aspect 9) The server according to any one of Aspects 1 to 8, characterized in that the correlation data includes a correlation coefficient with a predetermined etching parameter calculated from a visualization and normalization of the in-plane distribution of the sample in a plurality of feature amounts. (Aspect 10) The server according to Aspect 9, characterized in that it comprises a database in which data regarding combinations of feature amounts and etching parameters with high correlation coefficients are stored.(Aspect 11) The server according to Aspect 10, wherein a combination of a feature quantity and an etching parameter having a high correlation coefficient is identified from the database, and the etching parameter is corrected if the feature quantity differs from the target value. (Aspect 12) The server according to Aspect 11, wherein the etching parameter is controlled by controlling the temperature of the sample. (Aspect 13) A semiconductor device manufacturing system, comprising the server according to any one of Aspects 1 to 12. (Aspect 14) A semiconductor device manufacturing method, comprising: a step of obtaining a feature quantity from secondary electron data from a surface of the sample or interference light data from the surface of the sample; a step of obtaining correlation data between a change in a feature quantity of an etching shape formed on the sample and a target value, and an etching parameter of a semiconductor manufacturing apparatus; and a step of controlling the etching parameter so as to obtain a desired processing result of the semiconductor manufacturing apparatus based on the correlation data.
[0042] 10...Semiconductor device manufacturing system, 101...PC for CD-SEM, 102...PC for semiconductor manufacturing equipment, 103...Server, 104...Semiconductor inspection equipment, 105...Semiconductor manufacturing equipment
Claims
1. A server in which etching parameters are controlled so as to obtain desired processing results of a semiconductor manufacturing device based on correlation data between the amount of change between a feature of an etching shape formed on a sample and a target value and the etching parameters of the semiconductor manufacturing device, and the feature is a value obtained from secondary electron data from the surface of the sample or interference light data from the surface of the sample.
2. The server according to claim 1, wherein the feature amount is a value obtained from the dimensions of the etched shape of the sample based on the secondary electron data or the interference light data.
3. The server according to claim 1 or 2, wherein the amount of change is a value of spatial or temporal change.
4. The server according to claim 2, wherein the correlation data includes a value obtained from an integral value in the etching depth direction of the amount of change related to the dimensional difference between the etching shape and a target shape.
5. The server according to claim 4, wherein the correlation data includes the difference between an etching parameter related to the etching shape and an etching parameter related to the target shape, and the integral value.
6. The server according to claim 1, wherein, when the characteristic amount is obtained from the secondary electron data, the characteristic amount is adjusted by the accelerating voltage of an electron gun of a CD-SEM.
7. The server according to claim 1 or 2, wherein the sample has a plurality of films formed thereon.
8. The server according to claim 3, wherein when the amount of change is a value of spatial change, the amount of change is a value of change in the radial direction of the sample or in the circumferential direction of the sample.
9. The server according to claim 1, wherein the correlation data includes a correlation coefficient for a predetermined etching parameter calculated from visualization and normalization of the in-plane distribution of the sample in a plurality of feature quantities.
10. The server according to claim 9, further comprising a database in which data relating to combinations of said feature quantities with high correlation coefficients and etching parameters is stored.
11. The server according to claim 10, wherein a combination of the feature quantity and the etching parameter having a high correlation coefficient is identified from the database, and when the feature quantity differs from the target value, the etching parameter is corrected.
12. The server according to claim 11, wherein the etching parameters are controlled by controlling the temperature of the specimen.
13. A semiconductor device manufacturing system comprising the server according to claim 1.
14. A semiconductor device manufacturing method comprising the steps of: obtaining feature quantities from secondary electron data from a surface of a sample or interference light data from the surface of the sample; obtaining correlation data between the feature quantities of the etching shape formed on the sample and target values, and etching parameters of a semiconductor manufacturing apparatus; and controlling the etching parameters based on the correlation data so as to obtain desired processing results from the semiconductor manufacturing apparatus.
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