Wafer etching method and semiconductor processing device

Abstract

The present application discloses a wafer etching method and a semiconductor processing device. The wafer etching method comprises: obtaining a total glow duration for which a lower focus ring is exposed at the current relative angle; and if the total glow duration is greater than or equal to a preset duration threshold, changing the angle of a wafer to be etched relative to the lower focus ring by a preset unit angle in a preset direction and then performing etching, wherein the preset unit angle is greater than the central angle corresponding to a wafer notch. According to the present application, the relative angle between a wafer to be etched and a lower focus ring is changed after a certain period of time, and because a preset unit angle in each change is greater than the central angle corresponding to a wafer notch, different areas of the lower focus ring can be exposed to the wafer notch; each time the relative angle is changed, the time of exposing the lower focus ring to plasma tends to return to zero, thereby exponentially prolonging the service life of the lower focus ring, such that the service life of the lower focus ring can be prolonged.

Description

Wafer etching method and semiconductor processing equipment Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a wafer etching method and semiconductor processing equipment. Background Art

[0002] Edge etching involves plasma treatment of the wafer edge to remove polymer particles attached to the wafer edge. Referring to Figure 1, it illustrates the structure of a conventional edge etching process chamber. The process chamber comprises a chamber body 10, an upper electrode ceramic window 21 and a lower electrode base 22 disposed within the chamber body 10, an upper focus ring 31 sleeved around the upper electrode ceramic window 21, and a lower focus ring 32 sleeved around the lower electrode base 22. A wafer 40 is placed on top of the lower electrode base 22, with a gap between the wafer 40 and the lower focus ring 32.

[0003] Please refer to Figure 2. The left figure in Figure 2 is a schematic diagram (top view) of the positional relationship between the wafer and the lower focusing ring, and the right figure is an electron microscope scanning image of part A in the left figure. Since the wafer 40 is provided with a notch 41 for marking the direction of the wafer, the corresponding position 2 on the top surface of the lower focusing ring 32 (please also refer to position 1, position 2 and position 3 in Figure 1) is exposed in the notch 41. The plasma forms a strong etching in this area, making the anti-corrosion coating (generally Y2O3) in this area more easily damaged, which greatly reduces the service life of the lower focusing ring 32.

[0004] Summary of the Invention

[0005] In response to the above technical problems, the present application provides a wafer etching method and semiconductor processing equipment, which can improve the problem of rapid wear and short life of the lower focusing ring in the existing wafer etching method.

[0006] To solve the above technical problems, in a first aspect, an embodiment of the present application provides a wafer etching method, comprising:

[0007] Get the total duration of the focus ring's ignition at the current relative angle;

[0008] If the total ignition time is greater than or equal to a preset time threshold, the wafer to be etched and the lower focusing ring are changed relative to each other by a preset unit angle along a preset direction before etching, wherein the preset unit angle is greater than the central angle corresponding to the wafer notch.

[0009] In some embodiments, if the total ignition time is greater than or equal to a preset time threshold, after the wafer to be etched and the lower focus ring are relatively changed by a preset unit angle along a preset direction and then etching is performed, the method further includes:

[0010] Obtaining the cumulative change in angle of the current relative angle along a preset direction relative to the initial relative angle at the initial ignition time, wherein the initial ignition time is the first ignition time corresponding to the total ignition time;

[0011] If the cumulatively changed angle is less than the preset total angle threshold, the process returns to the step of obtaining the total ignition time of the focus ring at the current relative angle.

[0012] In some embodiments, after obtaining the cumulative change in the current relative angle along a preset direction relative to the initial relative angle at the initial ignition moment, the method further includes:

[0013] If the cumulatively changed angle is greater than or equal to the preset total angle threshold, etching is stopped.

[0014] In some embodiments, a valve of a process chamber is used as a reference, and a position where the edge of the wafer faces the valve when the wafer is transferred to the process chamber is used as a reference point, and the initial relative angle is a central angle corresponding to the wafer notch and the reference point, wherein the reference point avoids the wafer notch;

[0015] The preset direction is the rotation direction from the wafer notch to the reference point, and the preset total angle threshold is twice the central angle corresponding to the wafer notch and the reference point.

[0016] In some embodiments, after obtaining the total ignition time of the lower focus ring at the current relative angle, the method further includes:

[0017] If the total ignition time is less than the preset time threshold, the wafer to be etched continues to be etched at the current relative angle.

[0018] In some embodiments, the preset total angle threshold is less than or equal to 30°.

[0019] In some embodiments, the central angle corresponding to the wafer notch is less than 2°, and the preset unit angle is 2°.

[0020] In some embodiments, the total ignition time is less than or equal to 50 hours.

[0021] In a second aspect, an embodiment of the present application provides a semiconductor processing device, comprising a process chamber and a controller, wherein a carrying device for carrying a wafer is provided in the process chamber, wherein the carrying device comprises a lower electrode base and a lower focusing ring mounted on the outer side of the lower electrode base, wherein the controller comprises a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the wafer etching method described in the above embodiments is implemented.

[0022] In some embodiments, the semiconductor processing equipment further includes a calibration device and a transmission device;

[0023] The calibration device is used to adjust the wafer angle of the wafer to be etched located on the calibration device during rotation;

[0024] The transport device is used to transport the wafer to be etched from the calibration device to the process chamber;

[0025] The process chamber is used to etch the wafer to be etched;

[0026] The controller is used to control the calibration device to rotate so that the wafer to be etched changes a preset unit angle relative to the lower focusing ring.

[0027] In some embodiments, the controller is used to control the carrying device to drive the lower focusing ring to rotate by the preset unit angle.

[0028] In some embodiments, the lower focusing ring includes a ring body, and a top surface of the ring body is provided with an annular groove that cooperates with the lower electrode base plate;

[0029] The outer diameter of the ring body satisfies the requirement that when a wafer is placed on the lower electrode base, the shortest distance between the wafer notch of the wafer and the center of the wafer is greater than the outer diameter of the ring body.

[0030] In the wafer etching method provided by the present application, when the total ignition time experienced by the lower focusing ring at the current relative angle is greater than or equal to a preset time threshold, the wafer to be etched and the lower focusing ring are changed by a preset unit angle relative to each other along a preset direction before etching is performed, that is, the relative angle between the wafer to be etched and the lower focusing ring is changed according to a certain period of time. Since the preset unit angle changed each time is greater than the central angle corresponding to the wafer notch, different areas of the lower focusing ring can be exposed to the wafer notch. Each change in the relative angle is equivalent to returning the time the lower focusing ring is exposed to the plasma environment to zero, thereby doubling the service life of the lower focusing ring, that is, improving the service life of the lower focusing ring. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for describing the embodiments. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without inventive work.

[0032] FIG1 is a schematic structural diagram of an existing edge etching process chamber;

[0033] FIG2 is a schematic diagram (top view) illustrating the positional relationship between the wafer and the lower focus ring in section A of the figure;

[0034] FIG3 is a schematic flow chart of a wafer etching method provided in an embodiment of the present application;

[0035] FIG4 is a schematic diagram of the ignition time experienced by a lower focusing ring provided by the present application;

[0036] FIG5 is a schematic flow chart of another wafer etching method provided in an embodiment of the present application;

[0037] FIG6 is a schematic diagram of an etching process provided in an embodiment of the present application;

[0038] FIG7 is a schematic diagram of a wafer rotation method provided in an embodiment of the present application;

[0039] FIG8 is a comparison diagram of etching effects of a wafer notch at 6 o'clock (0°) and after the wafer notch is rotated to 15°, provided in an embodiment of the present application;

[0040] FIG9 is a schematic structural diagram of a semiconductor processing device provided in an embodiment of the present application;

[0041] FIG10 is a schematic diagram showing a comparison of the positional relationship between the front and rear lower focusing rings and the wafer according to an embodiment of the present application.

[0042] The purpose of this application, its features, and advantages will be further described in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and the accompanying text are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of this application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0043] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0044] It should be noted that, in this document, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0045] It should be further understood that the terms "comprising" and "including" indicate the presence of the described features, steps, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms "or", "and / or", "including at least one of the following", etc. used in this application may be interpreted as inclusive, or mean any one or any combination. For example, "including at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C", and for another example, "A, B or C" or "A, B and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C". Exceptions to this definition will only occur when the combination of elements, functions, steps or operations is inherently mutually exclusive in some way.

[0046] It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are merely used to distinguish information of the same type from one another. For example, first information could also be referred to as second information, and similarly, second information could also be referred to as first information without departing from the scope of this document. Depending on the context, as used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context indicates otherwise.

[0047] It should be understood that the terms "top", "bottom", "up", "down", "vertical", "horizontal", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0048] For ease of description, the following embodiments are all described using the orthogonal space formed by the horizontal plane and the vertical direction as an example. This premise should not be understood as a limitation to the present application.

[0049] Please refer to FIG3 , which is a schematic flow chart of a wafer etching method provided in an embodiment of the present application. The wafer etching method may include:

[0050] S110: Obtain the total ignition time of the lower focus ring at the current relative angle.

[0051] The current relative angle refers to the current relative angle between the lower focus ring and the wafer. When the lower focus ring is stationary and the wafer is rotating, the wafer's zero angle direction can be predefined. Alternatively, when the wafer is stationary and the lower focus ring is rotating, the lower focus ring's zero angle direction can be predefined. For example, if the lower focus ring is stationary and the wafer is rotating relative to the lower focus ring, the direction the wafer notch faces during etching is the wafer angle. For example, in Figure 2, wafer notch 41 is located at 6 o'clock. When the 6 o'clock direction is defined as the zero angle direction of the wafer, the current relative angle of the wafer in the left picture of Figure 2 is 0°. For another example, when the 9 o'clock direction is defined as the zero angle direction of the wafer, and the counterclockwise direction is the positive direction, the current relative angle of the wafer in the left picture of Figure 2 is 90°, that is, the wafer is rotated 90° in the positive direction relative to the zero angle direction; for another example, when the 3 o'clock direction is defined as the zero angle direction, and the counterclockwise direction is the positive direction, the current relative angle of the wafer in the left picture of Figure 2 is -90°, that is, the wafer is rotated 90° in the opposite direction relative to the zero angle direction.

[0052] For example, in the case where the wafer angle is fixed, that is, the notches of each wafer placed on the lower electrode base always face the same direction, and the lower focus ring is rotated relative to the wafer, the lower focus ring can be rotated, for example, driven by a wafer carrier, and the zero angle direction of the lower focus ring can be predefined. For example, since the orientation of the wafer notch is fixed, the initial angular position of the lower focus ring before the first etching (i.e., after replacing a new lower focus ring) can be defined as the zero position, and the angle of the lower focus ring at the zero position can be recorded as 0°. Based on this, when the lower focus ring is rotated forward or backward by a certain angle relative to the zero position, this angle becomes the current relative angle of the lower focus ring.

[0053] The moment when the same lower focus ring is first exposed to the RF environment at the same current relative angle is called the initial ignition time of the lower focus ring, which is the initial timing of the total ignition duration. The cumulative etching time of the same lower focus ring at the same current relative angle is called the total ignition duration of the lower focus ring, which is the cumulative time that the area on the lower focus ring corresponding to the wafer notch is directly exposed to the RF environment.

[0054] Please refer to Figure 4, which is a schematic diagram of the ignition time experienced by a lower focusing ring provided by the present application. For example, after replacing a new lower focusing ring, the current relative angle is 0°, then the moment when the new lower focusing ring is first exposed to the RF environment when the current relative angle is 0° is the initial ignition moment, and after the duration of continuous etching (continuous ignition duration) t1, the etching of N1 wafers is completed, and then the machine enters the shutdown state. After the duration of shutdown (idle duration) t2, etching is continued again with the current relative angle of 0°, and after the duration of continuous etching again (re-ignition duration) t3, the etching of N2 wafers is completed. Then the total ignition time experienced by the lower focusing ring is: ttotal=t1+t3.

[0055] The total ignition time experienced by the lower focusing ring is used to indicate the time that the same position of the lower focusing ring is corroded by RF energy at the same current relative angle. The longer the total ignition time is, the shorter the remaining life of the lower focusing ring at the current relative angle.

[0056] S120. If the total ignition time is greater than or equal to the preset time threshold, the wafer to be etched and the lower focusing ring are changed relative to each other by a preset unit angle along the preset direction before etching, wherein the preset unit angle is greater than the central angle corresponding to the wafer notch.

[0057] The preset duration threshold refers to the length of time the lower focus ring is exposed to the RF environment at the current relative angle, and after reaching the preset duration threshold, it remains in a safe state and has not reached its service life. The preset duration threshold can be set based on experiments. For example, referring to Figure 2, taking the lower focus ring 32 as an Al2O3 ceramic material as an example, experiments have shown that after continuously exposing position 2 of the lower focus ring 32 to the RF environment for approximately 56 hours, the Al in the lower focus ring 32 will be bombarded out, causing metal contamination to the wafer. Therefore, the preset duration threshold can be set to a value lower than 56 hours. For example, the preset duration threshold can be set to 52 hours, 50 hours, 47 hours, or other values ​​less than 56 hours.

[0058] When the total ignition time of the lower focusing ring at the current relative angle is greater than or equal to the preset time threshold, it means that the area of ​​the lower focusing ring at the wafer notch is about to reach the end of its service life. Therefore, after completing the wafer etching in the process chamber, the wafer to be etched (the next wafer) and the lower focusing ring can be changed relative to each other by a preset unit angle along the preset direction and then etched again, so that when the next etching is performed, a new area of ​​the lower focusing ring is exposed to the wafer notch of the wafer to be etched. As some examples, the wafer to be etched and the lower focusing ring are changed relative to each other by a preset unit angle. The wafer to be etched can be rotated relative to the lower focusing ring by the above-mentioned preset unit angle, or the carrier device can be rotated to drive the lower focusing ring to rotate relative to the wafer to be etched by the above-mentioned preset unit angle. The embodiments of the present application do not specifically limit this. The following mainly uses the example of rotating the wafer relative to the lower focusing ring to change the relative angle between the wafer and the lower focusing ring, and the method of rotating the carrier device will not be described in detail.

[0059] It can be understood that in the wafer etching method provided by this embodiment, when the total ignition time experienced by the lower focusing ring at the current relative angle is greater than or equal to the preset time threshold, the wafer to be etched and the lower focusing ring are changed by a preset unit angle along the preset direction before etching is performed, that is, the relative angle between the wafer to be etched and the lower focusing ring is changed according to a certain period of time. Since the preset unit angle changed each time is greater than the central angle corresponding to the wafer notch, different areas of the lower focusing ring can be exposed to the wafer notch. Each change in the relative angle is equivalent to returning the time the lower focusing ring is exposed to the plasma environment to zero, thereby doubling the life of the lower focusing ring.

[0060] In order to improve the uniformity of wafer etching, in one embodiment, please refer to Figure 5, which is a flow chart of another wafer etching method provided in an embodiment of the present application. Step S120 may further include steps S210 to S220.

[0061] S210: Obtain the cumulative change in the current relative angle along a preset direction relative to the initial relative angle at the initial ignition time, wherein the initial ignition time is the first ignition time corresponding to the total ignition duration.

[0062] If the cumulative change in the angle of the wafer to be etched along the preset direction is too large, it will affect the consistency of the etching effect. Therefore, after the etching of the previous wafer is completed, the cumulative change in the current relative angle along the preset direction relative to the initial relative angle at the initial moment of ignition can be obtained. This is the total cumulative angle of the wafer rotation, which is also the cumulative change in the current relative angle relative to the initial relative angle.

[0063] S220: If the cumulatively changed angle is less than the preset total angle threshold, return to step S110.

[0064] Since excessively large cumulative changes in the wafer's angle can affect the consistency of the etching effect, a preset total angle threshold can be determined experimentally. As long as the cumulative angle change does not exceed this preset total angle threshold, the consistency of the wafer etching can be ensured. After obtaining the cumulative wafer rotation angle, the cumulative rotation angle is compared with the preset total angle threshold. If the cumulative rotation angle is less than the preset total angle threshold, the process returns to step S110.

[0065] Furthermore, after step S210, the following steps may be further included:

[0066] S230: If the cumulative angle change is greater than or equal to the preset total angle threshold, stop etching.

[0067] As mentioned previously, excessive cumulative wafer angle changes can affect etching consistency. Therefore, if the cumulative angle change is greater than or equal to a preset total angle threshold, etching is stopped. At this point, equipment maintenance can be performed, such as replacing the lower focus ring.

[0068] It can be understood that, in this embodiment, since the relative angle between the wafer to be etched and the lower focusing ring is changed according to a certain period of time during etching, the preset unit angle of change is greater than the central angle corresponding to the wafer notch, so that different areas of the lower focusing ring can be exposed to the wafer notch. Each change in the relative angle is equivalent to returning the time the lower focusing ring is exposed to the plasma to zero, thereby doubling the life of the lower focusing ring. In addition, this embodiment also obtains the cumulative change in the current relative angle relative to the initial relative angle at the initial moment of ignition along the preset direction. If the cumulative change in angle is less than the preset total angle threshold, the next etching will be performed to ensure the uniformity of wafer etching. Taking the example of rotating the wafer relative to the lower focusing ring to change the relative angle between the wafer and the lower focusing ring, for example, please refer to Figure 6. The upper figure of Figure 6 is a schematic diagram of an etching process provided by an embodiment of the present application. Etching starts from an initial relative angle of 0°. When the total etching time is greater than or equal to the preset time threshold, the wafer (i.e., Wafer) can be rotated clockwise by a preset unit angle, such as 2°. The center angle corresponding to the wafer notch is approximately 1.15°. Rotating 2° can ensure that the area of ​​the lower focusing ring exposed to the wafer notch after each rotation is a different area, avoiding the same area from being corroded for too long. Similarly, the wafer starts from 0° and rotates 2° each time it etches for a certain period of time. As long as the cumulative rotation angle (cumulative angle) is accumulated successively (2°, 4°, 6°..., 30° respectively) and does not exceed the preset total angle threshold (e.g., 30°), it is sufficient. Furthermore, as shown in the lower figure of Figure 6, when the wafer is at 0°, the wafer notch is oriented at 6 o'clock. After the wafer (i.e., wafer) is rotated 2° clockwise, the wafer notch rotates from the dotted line position in Figure 6 to the solid line position. The area of ​​the lower focus ring exposed to the wafer notch at the dotted line position is different from the area exposed to the wafer notch at the solid line position. In one example, the arc length corresponding to a 2° rotation of the wafer notch is 5.23mm.

[0069] It should be noted that in order to avoid the influence of wafer rotation on the etching results, as an example, please refer to Figure 7, which is a schematic diagram of a wafer rotation method provided in an embodiment of the present application. The valve of the process chamber is used as a reference, and the position where the edge of the wafer is facing the valve when the wafer to be etched is transferred to the process chamber is the reference point B. At the initial moment of ignition, the initial relative angle is the center angle θ corresponding to the wafer notch N and the reference point B, wherein the reference point B avoids the wafer notch N. The preset direction is the rotation direction from the wafer notch N to the reference point B, as shown by the arrow in Figure 7, and the preset total angle threshold is twice the center angle θ corresponding to the wafer notch N and the reference point B. For example, when the preset total angle threshold is 30°, the reference point B corresponds to 0°, and the rotation can start from -15° (point N) and stop when the cumulative rotation reaches 15° (point N'). Please refer to Figure 8, which is a comparison diagram of the etching effects of a wafer notch provided in an embodiment of the present application at 6 o'clock (i.e., the initial relative angle is 0°) and after the wafer notch is rotated to 15°. By comparison, it can be seen that among the 8 positions on the circumference of the wafer near its edge, the fastest ER (etching rate) point (i.e., the position point with the fastest etching rate on the wafer) rotates slightly, and the slowest ER point (i.e., the position point with the slowest etching rate on the wafer) does not change significantly. The average ER value (the average etching rate value of the 8 positions) when the wafer notch is at 0° is The U value is 10.1%, and the average ER value when the wafer notch is at 15° is The U value is 9.7%, and the average ER varies by 3.9%, both within the normal range. All U values ​​meet specification requirements. This demonstrates that rotating the wafer 15° in the forward and reverse directions has no effect on process results. The above U value represents etching uniformity: U value = (ERmax - ERmin) / (2ERmean), where ERmax is the fastest etch rate among the eight directional points; ERmin is the slowest etch rate among the eight directional points; and ERmean is the average etch rate among the eight directional points.

[0070] It is understandable that, taking Al2O3 ceramic as an example, in the prior art, the angle of the wafer's lower focus ring remains fixed during etching. In this case, the position of the lower focus ring corresponding to the wafer notch is continuously exposed to the RF environment, resulting in a lifespan of only 56 hours. However, using the etching method of this embodiment, with a preset duration threshold of 50 hours, the lifespan of the lower focus ring is 50 hours × (1 + 30° / 2°) = 800 hours. This significantly increases the service life of the lower focus ring and reduces its maintenance cycle.

[0071] In one embodiment, please continue to refer to FIG. 5 , after step S110, the following steps may also be included:

[0072] S310: If the total ignition time is less than the preset time threshold, continue etching at the current relative angle.

[0073] It can be understood that if the total ignition time is less than the preset time threshold, it means that the area of ​​the lower focusing ring exposed to the wafer notch is etched for a shorter time and has not reached the preset time threshold. When transferring the wafer, the current wafer angle (the same as the wafer angle for etching the previous wafer) can be maintained and etching can continue at the current relative angle.

[0074] The present application also provides a semiconductor processing device. Please refer to Figures 1 and 9. Figure 9 is a schematic structural diagram of a semiconductor processing device provided in an embodiment of the present application. The semiconductor processing device includes a process chamber 100 and a controller. A carrier for carrying a wafer is provided in the process chamber 100. The carrier includes a lower electrode base plate 22 and a lower focus ring 32 disposed outside the lower electrode base plate 22. The controller includes a processor and a memory. The memory stores a computer program. When the computer program is executed by the processor, the wafer etching method described in the above embodiments is implemented.

[0075] As an example, the semiconductor processing equipment may further include a loading device 210 for loading wafers, and the loading device 210 is a starting station for wafer transfer.

[0076] In one embodiment, the controller can be used to control the carrier to drive the lower focus ring to rotate by a preset unit angle. That is, the relative angle between the wafer to be etched and the lower focus ring can be changed by controlling the carrier to drive the lower focus ring to rotate while the wafer is kept stationary.

[0077] In one embodiment, the semiconductor processing equipment may further include a calibration device 220 and a transfer device 230; the calibration device 220 is used to adjust the wafer angle of the wafer to be etched located on the calibration device while rotating the wafer to be etched; the transfer device 230 is used to transfer the adjusted wafer to be etched from the calibration device to the process chamber 100. As an example, the transfer device 230 may include a pre-vacuum chamber 231 and a vacuum transfer chamber 232 connected in sequence, the pre-vacuum chamber 231 serving as a transition chamber for the vacuum transfer chamber 232, and the vacuum transfer chamber 232 connected to the process chamber 100. The process chamber 100 is used to etch the wafer to be etched; the controller is used to control the calibration device to drive the wafer to be etched to rotate so that the wafer to be etched changes a preset unit angle relative to the lower focus ring.

[0078] The controller of this embodiment controls the calibration device to rotate the wafer to be etched so that the wafer to be etched changes a preset unit angle relative to the lower focus ring, while the supporting device of the process chamber 100 remains fixed (ie, the lower focus ring does not rotate).

[0079] As an example, the controller can control the corresponding robot to transfer the wafer to be etched from the loading device 210 to the calibration device 220, the transfer device 230, and finally to the process chamber 100. When the wafer is transferred to the calibration device 220, the calibration device 220 can be controlled to drive the wafer to be etched to rotate to change the wafer angle of the wafer to be etched. The controller can also control the process chamber 100 to etch the wafer to be etched.

[0080] It should be noted that the above-mentioned wafer transfer process can be completed by a robot. In addition, to improve efficiency, some devices can be arranged in a one-to-many or many-to-many configuration. For example, four process chambers 100 can be arranged around the vacuum transfer chamber 232 to improve the utilization rate of the vacuum transfer chamber 232.

[0081] In one embodiment, please refer to Figures 1 and 10. Figure 10 is a schematic diagram comparing the positional relationship between the lower focus ring and the wafer before and after improvement, as provided by an embodiment of the present application. The lower focus ring 32 may include a ring body 321. The top surface of the ring body 321 is provided with an annular groove 322 that mates with the lower electrode base 22. In one embodiment, the outer surface of the ring body 321 may also be provided with an annular protrusion 323, the top surface of which is lower than the top surface of the ring body 321. When the wafer is placed on the lower electrode base 22, the shortest distance between the wafer notch and the center of the wafer is greater than the outer diameter of the ring body 321. For example, lower focus ring position 1, lower focus ring position 2, and lower focus ring position 3 in Figure 10 correspond to positions 1, 2, and 3 in Figure 1, respectively. That is, lower focus ring position 1 corresponds to the edge of the annular protrusion 323, lower focus ring position 2 corresponds to the outer surface of the ring body 321, and lower focus ring position 3 corresponds to the inner surface of the ring body 321. By limiting the shortest distance L1 between the wafer notch and the center of the wafer to be greater than the outer diameter L0 of the ring body 321, it can be ensured that the entire lower focusing ring is blocked by the wafer, avoiding partial area of ​​the lower focusing ring being exposed to the wafer notch, thereby improving the life of the lower focusing ring.

[0082] For example, in the left image of Figure 10, the outer diameter of the original lower focus ring body 321 is 298.5mm, while the diameter of a 12-inch wafer is 300mm. Measurements show that the wafer notch facing the 6 o'clock direction has a lateral width of approximately 3.5mm and a vertical depth of approximately 1.3mm. The original single-edge distance between the lower focus ring and the wafer is half the difference between the two diameters, i.e., (300-298.5) / 2=0.75(mm)<1.3mm. Therefore, during etching, part of the lower focus ring is directly exposed to the plasma environment. After the outer diameter of the ring body 321 of the lower focus ring (right image of Figure 10) is reduced to 296.5mm, the inner diameter of the ring body 321 can be reduced as needed. The improved distance between the lower focus ring and the wafer is (300 - 296.5) / 2 = 1.75 mm, which is greater than 1.3 mm. The front of the lower focus ring is directly protected by the wafer, preventing plasma bombardment and damage to the lower focus ring. Experiments have shown that after 200 hours of plasma bombardment caused by radio frequency (RF) loading, the lower focus ring shows no significant wear, and the reduced size has no direct impact on process results.

[0083] For other working principles and processes of the semiconductor processing equipment of this embodiment, please refer to the description of the wafer etching method in the aforementioned embodiment of the present invention, which will not be repeated here.

[0084] The above describes in detail a wafer etching method and semiconductor processing equipment provided by this application. This article uses specific examples to illustrate the principles and implementation methods of this application. It should be noted that in this application, the descriptions of each embodiment have their own emphasis. For portions not described or documented in detail in a particular embodiment, reference can be made to the relevant descriptions of other embodiments.

[0085] The various technical features of the technical solution of this application can be combined arbitrarily. In order to make the description concise, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

Claims

1. A wafer etching method, characterized in that: include: Obtain the total duration of the ignition of the focus ring at the current relative angle; If the total ignition time is greater than or equal to a preset time threshold, the wafer to be etched and the lower focusing ring are changed by a preset unit angle relative to each other along a preset direction before etching, wherein the preset unit angle is greater than the center angle corresponding to the wafer notch.

2. The wafer etching method according to claim 1, characterized in that: If the total ignition time is greater than or equal to the preset time threshold, the method further includes: Obtaining the cumulative change in angle of the current relative angle along a preset direction relative to the initial relative angle at the initial ignition time, wherein the initial ignition time is the first ignition time corresponding to the total ignition time; If the cumulatively changed angle is less than the preset total angle threshold, the process returns to the step of obtaining the total duration of ignition experienced by the focus ring at the current relative angle.

3. The wafer etching method according to claim 2, characterized in that: After obtaining the angle of the current relative angle cumulatively changed along a preset direction relative to the initial relative angle at the initial ignition moment, the method further includes: If the accumulated angle change is greater than or equal to the preset total angle threshold, etching is stopped.

4. The wafer etching method according to claim 2, characterized in that: Taking the valve of the process chamber as a reference, and the position where the edge of the wafer faces the valve when the wafer is transferred to the process chamber as a reference point, the initial relative angle is the central angle corresponding to the wafer notch and the reference point, wherein the reference point avoids the wafer notch; The preset direction is the rotation direction from the wafer notch to the reference point, and the preset total angle threshold is twice the central angle corresponding to the wafer notch and the reference point.

5. The wafer etching method according to claim 1, characterized in that: After obtaining the total ignition time of the lower focusing ring at the current relative angle, the method further includes: If the total ignition time is less than the preset time threshold, the wafer to be etched continues to be etched at the current relative angle.

6. The wafer etching method according to any one of claims 2 to 5, characterized in that: The preset total angle threshold is less than or equal to 30°.

7. The wafer etching method according to claim 6, characterized in that: The center angle corresponding to the wafer notch is less than 2°, and the preset unit angle is 2°.

8. The wafer etching method according to claim 6, characterized in that: The total ignition time is less than or equal to 50 hours.

9. A semiconductor processing device, comprising a process chamber and a controller, wherein a carrying device for carrying a wafer is arranged in the process chamber, wherein the carrying device comprises a lower electrode base plate and a lower focusing ring sleeved on the outer side of the lower electrode base plate, wherein: The controller includes a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the wafer etching method according to any one of claims 1 to 8 is implemented.

10. The semiconductor processing equipment according to claim 9, characterized in that Also includes a calibration device and a transmission device; The calibration device is used to adjust the wafer angle of the wafer to be etched located on the calibration device when the wafer to be etched is rotated; The transmission device is used to transmit the adjusted wafer to be etched from the calibration device to the process chamber; The process chamber is used to etch the wafer to be etched; The controller is used to control the calibration device to drive the wafer to be etched to rotate so that the wafer to be etched changes a preset unit angle relative to the lower focusing ring.

11. The semiconductor processing equipment according to claim 9, characterized in that The controller is used to control the carrying device to drive the lower focusing ring to rotate the preset unit angle.

12. The semiconductor processing equipment according to claim 9, characterized in that The lower focusing ring comprises a ring body, the top surface of which is provided with an annular groove matched with the lower electrode base plate; The outer diameter of the ring body satisfies that: when a wafer is placed on the lower electrode base, the shortest distance between the wafer notch of the wafer and the center of the wafer is greater than the outer diameter of the ring body.

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