Drive circuit of display panel, and drive method thereof

Abstract

The present application discloses a drive circuit of a display panel, and a drive method thereof. The drive circuit comprises a source driver, a power supply module, a voltage feedback module, a voltage adjustment module, and a timing controller. When the potential of a first node is maintained by the voltage feedback module, if display whitening is about to occur, the timing controller can further increase the potential of the first node by means of the voltage adjustment module, thereby mitigating or avoiding the problem of display whitening.

Description

Driving circuit and driving method of display panel Technical Field

[0001] The present application relates to the field of display technology, and in particular to a driving circuit and a driving method of a display panel. Background Art

[0002] As display panels grow in size, their driving loads also increase, leading to various display quality issues. For example, as shown in Figure 1, the top of the display panel exhibits a whitening issue. This problem is caused by excessive current being drawn from the AVDD supply, which powers the source driver (as indicated by the dotted oval in Figure 2). This causes a momentary drop in the AVDD voltage amplitude, thereby reducing the voltage of the data signal output by the source driver. SUMMARY OF THE INVENTION

[0003] The present application provides a driving circuit for a display panel and a driving method thereof, so as to alleviate the technical problem of whitening of the display caused by a reduction in the power supply voltage of a source driver.

[0004] The present application provides a driving circuit for a display panel, which includes a source driver, a power module, a voltage feedback module, a voltage regulation module and a timing controller, wherein the voltage input terminal of the source driver is electrically connected to a first node; the voltage output terminal of the power module is electrically connected to the first node; the voltage feedback module is connected in series between the first node and the ground terminal, and the feedback node of the voltage feedback module is electrically connected to the feedback input terminal of the power module; the first terminal of the voltage regulation module is electrically connected to the feedback node, and the second terminal of the voltage regulation module is electrically connected to the ground terminal; the data output interface of the timing controller is electrically connected to the data input interface of the source driver, and the output control terminal of the timing controller is electrically connected to the input control terminal of the voltage regulation module.

[0005] In some embodiments, the voltage regulation module includes a first transistor and a first resistor, the first electrode of the first transistor is electrically connected to the feedback node, and the control electrode of the first transistor is electrically connected to the output control terminal of the timing controller; one end of the first resistor is electrically connected to the second electrode of the first transistor, and the other end of the first resistor is electrically connected to the ground terminal.

[0006] In some embodiments, the voltage feedback module includes a second resistor and a third resistor, one end of the second resistor is electrically connected to the first node, and the other end of the second resistor is electrically connected to the first electrode of the first transistor; one end of the third resistor is electrically connected to the first electrode of the first transistor, and the other end of the third resistor is electrically connected to the ground terminal.

[0007] In some embodiments, the source driver includes a comparison module, which is used to output a corresponding voltage detection signal based on the potential difference of the first node in two consecutive frames; the timing controller controls the voltage regulation module based on the voltage detection signal to increase or avoid affecting the potential of the first node.

[0008] In a second aspect, the present application provides a driving method for the driving circuit of the display panel in at least one of the above-mentioned embodiments, the driving method comprising: when the timing controller detects switching from a light-load frame image to a heavy-load frame image, controlling the voltage regulation module to increase the potential of the first node.

[0009] In some embodiments, when the timing controller detects a switch from a light-load frame image to a heavy-load frame image, the step of controlling the voltage regulation module to increase the potential of the first node includes: when the potential of the first node in two consecutive frames shows a downward trend and the potential difference of the first node in two consecutive frames is greater than or equal to a preset value, the timing controller controls the voltage regulation module to increase the potential of the first node.

[0010] In some embodiments, when the potential of the first node in two consecutive frames shows a downward trend and the potential difference of the first node in two consecutive frames is greater than or equal to a preset value, the step of the timing controller controlling the voltage regulation module to increase the potential of the first node includes: when the first transistor is in an amplification state or a saturated conduction state, the voltage regulation module increases the potential of the first node.

[0011] In some embodiments, when the timing controller detects switching from a heavy-load frame image to a light-load frame image, from a light-load frame image to a light-load frame image, or from a heavy-load frame image to a light-load frame image, it controls the voltage regulation module to stop working to avoid affecting the potential of the first node.

[0012] In some embodiments, when the timing controller detects that the screen switches from a heavy-loaded frame to a light-loaded frame, from a light-loaded frame to a light-loaded frame, or from a heavy-loaded frame to a light-loaded frame, the step of controlling the voltage regulation module to stop working to avoid affecting the potential of the first node includes: when the potential of the first node in two consecutive frames shows an upward trend or is equal, the timing controller controls the voltage regulation module to avoid affecting the potential of the first node.

[0013] In some embodiments, when the potential of the first node in two consecutive frames is on an upward trend or is equal, the step of the timing controller controlling the voltage regulation module to avoid affecting the potential of the first node includes: when the first transistor is in a cut-off state, the voltage regulation module stops working to avoid affecting the potential of the first node. Beneficial effects

[0014] The driving circuit and driving method of the display panel provided in the present application maintain the potential of the first node through the voltage feedback module. When the display is about to become whitened, the timing controller can further increase the potential of the first node through the voltage regulation module. This can offset the reduction in the power supply voltage of the source driver, thereby ensuring the stability of the power supply voltage of the source driver and improving or avoiding the problem of display whitening. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG. 1 is a schematic diagram showing a whitened top portion of a display panel in the related art.

[0016] FIG. 2 is a schematic diagram of a simulation of corresponding signals of a display panel in the related art.

[0017] FIG3 is a schematic structural diagram of a display panel in related art.

[0018] FIG4 is a schematic structural diagram of the source driver shown in FIG3 .

[0019] FIG5 is a first circuit schematic diagram of a display panel provided in an embodiment of the present application.

[0020] FIG6 is a second circuit schematic diagram of a display panel provided in an embodiment of the present application.

[0021] FIG7 is a schematic diagram showing a comparison of waveforms of AVDD before and after improvement according to an embodiment of the present application. Modes for Carrying Out the Invention

[0022] To make the purpose, technical solutions and effects of this application clearer and more specific, the following further describes this application in detail with reference to the accompanying drawings and examples. It should be understood that the specific examples described herein are only used to explain this application and are not intended to limit this application.

[0023] Regarding the aforementioned reason why the AVDD power supply for the source driver is overdrawn, causing the AVDD voltage amplitude to drop momentarily, please refer to Figures 3 and 4. The display panel shown in Figure 3 includes a source driver, a power module (DC-DC), a second resistor R1, a third resistor R2, and a timing controller (TCON). The timing controller (TCON) transmits video data to the source driver (Source Driver) via a peer-to-peer (P2P) network transmission protocol. The power module (DC-DC) provides the source driver (Source Driver) with an analog total voltage AVDD, which the source driver uses to modulate the voltage amplitude of the data signal. The second resistor R1 and the third resistor R2 feed the analog total voltage AVDD back to the power module (DC-DC) via the feedback node FB they form, thereby stabilizing the analog total voltage AVDD output by the power module (DC-DC).

[0024] Among them, the source driver (Source Driver) includes two amplifiers shown in Figure 4. The first input terminal of the first amplifier OP1 is connected to the corresponding positive polarity reference voltage, the second input terminal of the first amplifier OP1 is electrically connected to the output terminal OUT1 of the first amplifier OP1 and outputs the corresponding positive polarity grayscale voltage, and the analog total voltage AVDD and the analog divided voltage HAVDD provide working power for the first amplifier OP1.

[0025] The analog divided voltage HAVDD is a divided voltage of the analog total voltage AVDD, and the positive polarity grayscale voltage ranges from the analog divided voltage HAVDD to the analog total voltage AVDD.

[0026] A first input terminal of the second amplifier OP2 is connected to a corresponding negative polarity reference voltage. A second input terminal of the second amplifier OP2 is electrically connected to an output terminal OUT2 of the second amplifier OP2 and outputs a corresponding negative polarity grayscale voltage. The analog divided voltage HAVDD and the zero voltage provide operating power for the second amplifier OP2. The negative polarity grayscale voltage ranges from 0 to the analog divided voltage HAVDD.

[0027] In other words, the voltage of the data signal output by the source driver needs to be provided by the analog total voltage AVDD. Therefore, when the display switches from the blanking area of ​​the lightly loaded screen to the active display area of ​​the heavily loaded screen, the load current of the analog total voltage AVDD suddenly increases, causing the voltage amplitude of the analog total voltage AVDD to drop. However, the feedback mechanism shown in Figure 3 can no longer guarantee that the analog total voltage AVDD meets the voltage requirements in the active display area, resulting in the display panel display being whitened at the top during forward scanning or at the bottom during reverse scanning.

[0028] Based on this, in view of the above-mentioned technical problem of whitening caused by the reduced supply voltage of the source driver 100 (Source Driver), this embodiment provides a driving circuit for a display panel. Please refer to Figures 3 to 7. As shown in Figures 5 and 6, the driving circuit includes at least one of a source driver 100 (Source Driver), a power module 200 (DC-DC), a voltage feedback module 300, a voltage regulation module 400, and a timing controller 500 (TCON).

[0029] The voltage input terminal of the source driver 100 (Source Driver) is electrically connected to the first node N1. The voltage output terminal of the power module 200 (DC-DC) is electrically connected to the first node N1. The voltage feedback module 300 is connected in series between the first node N1 and the ground terminal GND. The feedback node FB of the voltage feedback module 300 is electrically connected to the feedback input terminal of the power module 200 (DC-DC). The first terminal of the voltage regulation module 400 is electrically connected to the feedback node FB, and the second terminal of the voltage regulation module 400 is electrically connected to the ground terminal GND. The data output interface of the timing controller 500 (TCON) is electrically connected to the data input interface of the source driver 100 (Source Driver), and the output control terminal of the timing controller 500 (TCON) is electrically connected to the input control terminal of the voltage regulation module 400.

[0030] It is understandable that, in the display panel provided in this embodiment, when the potential of the first node N1 is maintained by the voltage feedback module 300, the timing controller 500 (TCON) can further increase the potential of the first node N1 through the voltage regulation module 400 when the display is about to become whitened. This can offset the reduction in the supply voltage of the source driver 100 (Source Driver), thereby ensuring the stability of the supply voltage of the source driver 100 (Source Driver) and improving or avoiding the problem of display whitening.

[0031] It should be noted that the timing controller 500 (TCON) provides the corresponding video data to the source driver 100 (Source Driver) via a P2P network transmission protocol. The source driver 100 (Source Driver) outputs the corresponding data signal based on the video data. The timing controller 500 (TCON) provides the corresponding control signal (AVDD Control) to the input control terminal of the voltage regulator module 400 through its output control terminal.

[0032] Among them, any of the timing controller 500 (TCON), source driver 100 (Source Driver), or power module 200 (DC-DC) can be manufactured as a corresponding chip to reduce its own installation space, thereby reducing the border space of the display panel. The power module 200 (DC-DC) can also be a DC conversion circuit.

[0033] In one embodiment, the voltage regulation module 400 includes a first transistor Q1 and a first resistor R3. The first electrode of the first transistor Q1 is electrically connected to the feedback node FB, and the control electrode of the first transistor Q1 is electrically connected to the output control terminal of the timing controller 500 (TCON); one end of the first resistor R3 is electrically connected to the second electrode of the first transistor Q1, and the other end of the first resistor R3 is electrically connected to the ground terminal GND.

[0034] It should be noted that the function of the first resistor R3 is to divide the voltage and limit the current flowing between the first electrode of the first transistor Q1 and the second electrode of the first transistor Q1 to prevent damage to the first transistor Q1. The first transistor Q1 can be a thin film transistor, a field effect transistor, or a triode. If the first transistor Q1 is a thin film transistor or a field effect transistor, the first electrode can be one of the source or the drain, the second electrode can be the other of the source or the drain, and the control electrode can be the gate. If the first transistor Q1 is a triode, the first electrode can be one of the collector or the emitter, the second electrode can be either the collector or the emitter, and the control electrode can be the base.

[0035] The first transistor Q1 may be an N-channel transistor or a P-channel transistor.

[0036] In one embodiment, the voltage feedback module 300 includes a second resistor R1 and a third resistor R2, one end of the second resistor R1 is electrically connected to the first node N1, and the other end of the second resistor R1 is electrically connected to the first electrode of the first transistor Q1; one end of the third resistor R2 is electrically connected to the first electrode of the first transistor Q1, and the other end of the third resistor R2 is electrically connected to the ground terminal GND.

[0037] It should be noted that, as shown in FIG5 , an output pin (AVDD_Control Pin) of the timing controller 500 (TCON) is added on the basis of FIG3 and connected to the first transistor Q1. Then, the voltage amplitude of the control signal (AVDD_Control) can be modulated by the analog-to-digital converter (ADC) inside the timing controller 500 (TCON), thereby controlling the on-resistance Rds (RQ1) of the first transistor Q1.

[0038] Assuming that the reference voltage at the feedback input terminal of the power module 200 (DC-DC) is a fixed value VFB (usually 0.6V or 0.8V), the analog total voltage AVDD can be obtained according to formula 1-1.

[0039] AVDD=[(R1+R2) / VFB] ×[(1 / R2)+1 / (RQ1+R3)] (1-1)

[0040] From formula 1-1, it can be seen that AVDD and RQ1 are inversely proportional or inversely changing, and RQ1 is inversely proportional to the voltage applied to the control electrode of the first transistor Q1, that is, AVDD and the voltage amplitude of AVDD_Control are in direct proportion or in a positively changing relationship.

[0041] Wherein, VFB is the potential of the feedback node FB.

[0042] It can be concluded from this that the first transistor Q1 can be used to increase or avoid affecting the potential of the first node N1 through the resistance value between the first electrode and the second electrode.

[0043] Specifically, when the first transistor Q1 is in the off state, RQ1 is maximum, and the voltage regulation module 400 stops working to avoid affecting the potential of the first node N1. Alternatively, when the first transistor Q1 is in the amplified state or the saturated conduction state, RQ1 becomes smaller, and the voltage regulation module 400 increases the potential of the first node N1.

[0044] For the display panel shown in Figure 5, the timing controller 500 (TCON) must have a frame detection function that can distinguish between lightly loaded and heavily loaded frames. As shown in Figure 7, when the timing controller 500 (TCON) detects that the next frame is heavily loaded, it can increase the AVDD voltage by increasing the AVDD_Control voltage in the Blanking region of the previous frame.

[0045] Alternatively, when the timing controller 500 (TCON) detects a switch from a light-load frame to a heavy-load frame, it controls the voltage regulation module 400 to increase the potential of the first node N1. When the timing controller 500 (TCON) detects a switch from a heavy-load frame to a light-load frame, from a light-load frame to a light-load frame, or from a heavy-load frame to a light-load frame, it controls the voltage regulation module 400 to stop operating to avoid affecting the potential of the first node N1.

[0046] The light-load frame is a frame of light-load image, and the heavy-load frame is a frame of heavy-load image.

[0047] It can be understood that this control method can ensure that AVDD can reach the target voltage value during the display time of the first multiple lines (1st to nth lines) of the Active area of ​​the reloaded screen.

[0048] The improvement is shown in Figure 7. Before the improvement, AVDD dropped significantly during the display of the first several lines (1st to nth lines) of the active area of ​​the reloaded screen, resulting in a whiteout issue. After the improvement, AVDD is increased by the voltage regulator module 400 during the display of the first several lines (1st to nth lines) of the active area of ​​the reloaded screen, and this is offset by the drop in the load, allowing it to remain relatively stable, thereby improving or avoiding the whiteout issue.

[0049] In one embodiment, as shown in FIG6 , a source driver 100 includes a comparison module 110 , which is configured to output a voltage detection signal (VDS) corresponding to a potential difference at a first node N1 in two consecutive frames. A timing controller 500 (TCON) controls a voltage regulation module 400 based on the voltage detection signal to increase or avoid affecting the potential of the first node N1.

[0050] It should be noted that this embodiment implements AVDD change detection by adding a comparison module 110 to the source driver 100 (Source Driver). Therefore, the timing controller 500 (TCON) can improve or avoid the display whitening problem without having a screen detection function.

[0051] Specifically, when the source driver 100 (Source Driver) detects a large voltage difference between AVDD in the Blanking region and the Active region, it transmits the voltage difference to the timing controller 500 (TCON) through the VDS (Voltage Detect Signal) Pin. The timing controller 500 (TCON) then controls the operating state of the first transistor Q1 through AVDD_Control.

[0052] In one embodiment, when the potential of the first node N1 shows a downward trend in two consecutive frames and the potential difference of the first node N1 in the two consecutive frames is greater than or equal to a preset value, the timing controller 500 (TCON) controls the voltage regulation module 400 to increase the potential of the first node N1.

[0053] It should be noted that this embodiment is limited to the case where the potential of the first node N1 is increased, which can more accurately improve the problem of display whitening.

[0054] In one embodiment, when the potential of the first node N1 in two consecutive frames shows an upward trend or is equal, the timing controller 500 (TCON) controls the voltage regulating module 400 to avoid affecting the potential of the first node N1.

[0055] It should be noted that the situation defined in this embodiment indicates that the possibility of the current display screen being whitened is very low, and therefore, the voltage regulating module 400 can be controlled to save power consumption.

[0056] It should be noted that the above-mentioned display panel can be either a liquid crystal display panel or a self-luminous display panel, for example, an organic light emitting diode display panel, a micro light emitting diode display panel, a mini light emitting diode display panel, or a quantum dot light emitting diode display panel.

[0057] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of this application, and all these changes or substitutions should fall within the scope of protection of the claims attached to this application.

Claims

1. A driving circuit for a display panel, in, The driving circuit comprises: a source driver, wherein a voltage input terminal of the source driver is electrically connected to the first node; a power supply module, wherein a voltage output terminal of the power supply module is electrically connected to the first node; A voltage feedback module, wherein the voltage feedback module is connected in series between the first node and the ground terminal, and a feedback node of the voltage feedback module is electrically connected to a feedback input terminal of the power module; a voltage regulating module, wherein a first terminal of the voltage regulating module is electrically connected to the feedback node, and a second terminal of the voltage regulating module is electrically connected to a ground terminal; and A timing controller, wherein a data output interface of the timing controller is electrically connected to a data input interface of the source driver, and an output control terminal of the timing controller is electrically connected to an input control terminal of the voltage regulating module.

2. The driving circuit according to claim 1, in, The voltage regulation module comprises: a first transistor, a first electrode of the first transistor being electrically connected to the feedback node, and a control electrode of the first transistor being electrically connected to an output control terminal of the timing controller; and A first resistor, one end of the first resistor is electrically connected to the second electrode of the first transistor, and the other end of the first resistor is electrically connected to the ground.

3. The driving circuit according to claim 2, in, The voltage feedback module comprises: a second resistor, one end of the second resistor being electrically connected to the first node, and the other end of the second resistor being electrically connected to the first electrode of the first transistor; and A third resistor, one end of the third resistor is electrically connected to the first electrode of the first transistor, and the other end of the third resistor is electrically connected to the ground end.

4. The driving circuit according to claim 1, in, The source driver comprises a comparison module, and the comparison module is used to output a corresponding voltage detection signal according to the potential difference of the first node in two consecutive frames; The timing controller controls the voltage regulating module according to the voltage detection signal to increase or avoid affecting the potential of the first node.

5. A method for driving a driving circuit of a display panel as claimed in claim 1, in, The driving method comprises: When the timing controller detects switching from a light-load frame to a heavy-load frame, the timing controller controls the voltage regulating module to increase the potential of the first node.

6. The driving method according to claim 5, in, The step of controlling the voltage regulating module to increase the potential of the first node when the timing controller detects switching from a light-load frame to a heavy-load frame includes: When the potential of the first node in two consecutive frames shows a downward trend and the potential difference of the first node in two consecutive frames is greater than or equal to a preset value, the timing controller controls the voltage regulating module to increase the potential of the first node.

7. The driving method according to claim 6, in, When the potential of the first node in two consecutive frames shows a downward trend and the potential difference of the first node in two consecutive frames is greater than or equal to a preset value, the timing controller controls the voltage regulating module to increase the potential of the first node, comprising: When the first transistor is in an amplification state or a saturation conduction state, the voltage regulation module increases the potential of the first node.

8. The driving method according to claim 5, in, When the timing controller detects switching from a heavy-load frame image to a light-load frame image, from a light-load frame image to a light-load frame image, or from a heavy-load frame image to a light-load frame image, the timing controller controls the voltage regulation module to stop working to avoid affecting the potential of the first node.

9. The driving method according to claim 8, in, The timing controller controls the voltage regulating module to stop working to avoid affecting the potential of the first node when detecting that the heavy-load frame image is switched to the light-load frame image, the light-load frame image is switched to the light-load frame image, or the heavy-load frame image is switched to the light-load frame image, including: When the potential of the first node in two consecutive frames shows an upward trend or is equal, the timing controller controls the voltage regulating module to avoid affecting the potential of the first node.

10. The driving method according to claim 9, in, When the potential of the first node in two consecutive frames is on an upward trend or is equal, the step of the timing controller controlling the voltage regulating module to avoid affecting the potential of the first node comprises: When the first transistor is in the cut-off state, the voltage regulating module stops working to avoid affecting the potential of the first node.

11. The driving method according to claim 5, in, The voltage regulation module comprises: a first transistor, a first electrode of the first transistor being electrically connected to the feedback node, and a control electrode of the first transistor being electrically connected to an output control terminal of the timing controller; and A first resistor, one end of the first resistor is electrically connected to the second electrode of the first transistor, and the other end of the first resistor is electrically connected to the ground.

12. The driving method according to claim 11, in, The voltage feedback module comprises: a second resistor, one end of the second resistor being electrically connected to the first node, and the other end of the second resistor being electrically connected to the first electrode of the first transistor; and A third resistor, one end of the third resistor is electrically connected to the first electrode of the first transistor, and the other end of the third resistor is electrically connected to the ground end.

13. A driving method of a driving circuit of a display panel as claimed in claim 1, in, The driving method comprises: When the timing controller detects switching from a light-load frame to a heavy-load frame, the timing controller controls the voltage regulating module to increase the potential of the first node; Wherein, the source driver comprises a comparison module, and the comparison module is used to output a corresponding voltage detection signal according to the potential difference of the first node in two consecutive frames; The timing controller controls the voltage regulating module according to the voltage detection signal to increase or avoid affecting the potential of the first node.

14. The driving method according to claim 13, in, The step of controlling the voltage regulating module to increase the potential of the first node when the timing controller detects switching from a light-load frame to a heavy-load frame includes: When the potential of the first node in two consecutive frames shows a downward trend and the potential difference of the first node in two consecutive frames is greater than or equal to a preset value, the timing controller controls the voltage regulating module to increase the potential of the first node.

15. The driving method according to claim 14, in, When the potential of the first node in two consecutive frames shows a downward trend and the potential difference of the first node in two consecutive frames is greater than or equal to a preset value, the timing controller controls the voltage regulating module to increase the potential of the first node, comprising: When the first transistor is in an amplification state or a saturation conduction state, the voltage regulation module increases the potential of the first node.

16. The driving method according to claim 13, in, When the timing controller detects switching from a heavy-load frame image to a light-load frame image, from a light-load frame image to a light-load frame image, or from a heavy-load frame image to a light-load frame image, the timing controller controls the voltage regulation module to stop working to avoid affecting the potential of the first node.

17. The driving method according to claim 16, in, The timing controller controls the voltage regulating module to stop working to avoid affecting the potential of the first node when detecting that the heavy-load frame image is switched to the light-load frame image, the light-load frame image is switched to the light-load frame image, or the heavy-load frame image is switched to the light-load frame image, including: When the potential of the first node in two consecutive frames shows an upward trend or is equal, the timing controller controls the voltage regulating module to avoid affecting the potential of the first node.

18. The driving method according to claim 17, in, When the potential of the first node in two consecutive frames is on an upward trend or is equal, the step of the timing controller controlling the voltage regulating module to avoid affecting the potential of the first node comprises: When the first transistor is in the cut-off state, the voltage regulating module stops working to avoid affecting the potential of the first node.

19. The driving method according to claim 13, in, The voltage regulation module comprises: a first transistor, a first electrode of the first transistor being electrically connected to the feedback node, and a control electrode of the first transistor being electrically connected to an output control terminal of the timing controller; and A first resistor, one end of the first resistor is electrically connected to the second electrode of the first transistor, and the other end of the first resistor is electrically connected to the ground.

20. The driving method according to claim 19, in, The voltage feedback module comprises: a second resistor, one end of the second resistor being electrically connected to the first node, and the other end of the second resistor being electrically connected to the first electrode of the first transistor; and A third resistor, one end of the third resistor is electrically connected to the first electrode of the first transistor, and the other end of the third resistor is electrically connected to the ground end.

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