Optical transceiver
Patent Information
- Application Number
- PCT/JP2023/024027
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-28
- Publication Date
- 2025-01-02
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Figure JP2023024027_02012025_PF_FP_ABST
Abstract
Description
Optical Transceiver
[0001] The present invention relates to an optical transceiver used in optical communications, and more particularly to an implementation of an optical transceiver.
[0002] In order to meet the increasing demand for communication traffic, high-speed optical modulators and optical receivers compatible with advanced optical modulation methods are required. In the optical modulators and optical receivers used in early 100G digital coherent communication systems, each component was packaged and mounted on a printed circuit board (PCB). For example, in the case of an optical modulator, the driver IC and optical modulator chip were individually packaged, and the packaged ICs and chips were mounted on the PCB. In the case of an optical receiver, the transimpedance amplifier (TIA) and optical receiver chip were individually packaged and mounted on the PCB as separate components.
[0003] In digital coherent communication systems exceeding 400 Gbps, which are experiencing ever-increasing speeds, optical modulators and optical receivers are also required to have wider bandwidths to handle signals of 40 GHz and above, necessitating reduced high-frequency loss and miniaturization. In the case of optical modulators, the driver IC and optical modulator chip are now integrated into a single package as an optical module. In the case of optical receivers, the TIA and optical receiver chip are now integrated into a single optical module. Regarding the signal format for inputting and outputting baseband signals, a shift from single-ended to differential designs has become common as one means of achieving higher speeds, smaller size, and lower power consumption. Currently, device development is underway to achieve 800 Gbps and 1 Tbps (128 GBd operation).
[0004] The Optical Internetworking Forum (OIF) has standardized an optical transmitter in which a driver IC and an optical modulator are mounted in an integrated package under the name High-Bandwidth Coherent Driver Modulator (HB-CDM). Non-Patent Document 1 specifies various types of modules, including their physical configurations and interface specifications. On the receiving side, a TIA and an optical receiver are mounted in an integrated package, also known as an HB-ICR (High-Bandwidth Intradyne Coherent Receiver). An optical transceiver (optical transmitting and receiving device) includes a transmitting (Tx) optical module and a receiving (Rx) optical module.
[0005] Initially, the optical modules described above used surface-mount (SMT) packages, which offer excellent mountability. Optical modules using SMT packages are mounted on the PCB of an optical transceiver, so a via (VIA) structure is essential for transmitting high-frequency electrical signals inside the package. Because degradation of high-frequency characteristics is unavoidable with VIAs, the VIA structure is unsuitable for further broadening the bandwidth. Furthermore, SMT packages suffer from electromagnetic field mode mismatch and impedance mismatch at the connection between the lead pins and the ceramic package, resulting in degradation of the high-frequency transmission characteristics of electrical signals (see Non-Patent Document 2). Therefore, a new package configuration using flexible printed circuits (FPCs) has been standardized (see Non-Patent Document 1).
[0006] International Publication Number WO2021 / 171599
[0007] OIF, Implementation Agreement for the High Bandwidth Coherent Driver Modulator (HB-CDM), [online], July 15, 2021, [Retrieved January 20, 2023], Internet <URL: https: / / www.oiforum.com / wp-content / uploads / OIF-HB-CDM-02.0.pdf> J. Ozaki et al., "Over-85-GHz-Bandwidth InP-Based Coherent Driver Modulator Capable of 1-Tb / s / λ-Class Operation," in Journal of Lightwave Technology, vol. 41, no. 11, pp. 3290-3296, June 1, 2023, doi: 10.1109 / JLT.2023.3236962.
[0008] In addition to increasing the speed of individual optical modules, optimizing the design of the digital signal processor (DSP) is crucial to achieving overall high-speed optical transceivers. In early optical transceivers, the DSP, transmitter module, and receiver module were mounted in separate packages, each located at a distance on the PCB. This limited the speed of optical transceivers due to propagation losses within each package and on the PCB. One solution being explored is a "co-package structure" in which the optical modulator chip, optical receiver chip, and DSP are closely spaced within a single package. While this structure is ideal for significantly reducing high-frequency electrical signal loss, it places the DSP, the largest heat source, in close proximity to the optical modulator and receiver. When using optical modulators that require temperature control, such as InP modulators, which offer excellent speed performance, the optical modulator chip must be mounted on a Peltier element. Peltier elements have the potential for increased power consumption and thermal runaway, making it difficult to mount the Peltier element in close proximity to the DSP, which is a source of heat inflow, within a single package. The co-package structure has various problems in terms of the mounting process and realization, so another optical transceiver configuration has been proposed (Patent Document 1).
[0009] FIG. 1 is a side cross-sectional view showing the configuration of a conventional optical transceiver suitable for high-speed transmission. The cross-sectional view (z-x plane) of the optical transceiver 800 is shown, cut along a line passing through a transmitter module 807 mounted on the board surface (x-y plane) of a PCB 801. The optical transceiver 800 includes a DSP 802, a transmitter module 807, and a receiver module (not shown). The DSP 802 includes a DSP chip 805 mounted on a DSP board 804 using a ball grid array (BGA). The entire DSP 802 is further mounted on the PCB 801 using a BGA 803. The transmitter module 807 includes a driver IC, an optical modulator chip, and other components (not shown) in a terraced package, and is equipped with an optical fiber 808.
[0010] In the optical transceiver 800, the radio frequency (RF) signal connection between the DSP 802 and the optical module 807 is performed via an FPC 806. Using the FPC 806 as an RF interface allows direct connection between the RF signal line formed on the top surface of the DSP board 804 and the RF signal line on the terrace of the optical module. In early optical transceivers including optical modules in SMT packages, the signal path was configured via the VIA on the DSP board 804, the RF signal line pattern on the PCB 801, and the VIA on the package of the optical module 807. The optical transceiver 800 in Figure 1 minimizes high-frequency loss compared to early optical transceivers using SMT packages. Furthermore, the optical modulator options are not limited as in optical transceivers with a co-package structure, making it more feasible to implement. High-frequency loss can also be significantly reduced compared to early optical transceivers using SMT packages.
[0011] However, in the prior art optical transceiver 800 shown in Figure 1, the specific connection configuration between the FPC 806 and the DSP board 802, the structure of the FPC 806, and the connection configuration between the FPC 806 and the optical module 807 are unclear. The configuration of the DSP and DSP board is also unclear. Furthermore, in the transmitter module 807 shown in Figure 1, heat-generating components such as the driver IC inside the package are thermally connected to the PCB side, which has a terrace, and the heat dissipation direction is downward (in the -z direction) from the optical transceiver 800. On the other hand, in the DSP 802, the DSP chip 805 is located on the upper side, so the heat dissipation direction is upward (in the +z direction) from the optical transceiver. Heat dissipation is split into two directions, which is undesirable for simplifying the heat dissipation structure.
[0012] An object of the present invention is to provide a configuration for a smooth high-frequency connection between a DSP and an optical module in an optical transceiver, and to provide an optical transceiver capable of ultra-high speed operation.
[0013] One aspect of the present invention is an optical transceiver comprising at least one optical module mounted on a printed circuit board (PCB), a digital signal processor (DSP) mounted on the PCB, and a flexible printed circuit (FPC) connecting the DSP and the optical module, wherein the DSP comprises a DSP chip mounted on a DSP substrate, the FPC has a first connection PAD on a first surface that is solder-connected to a PAD on a terrace surface of the optical module, and a second connection PAD on a second surface that is solder-connected to a PAD on the top surface of the DSP substrate, and the PAD on the DSP substrate is connected to the DSP chip by a signal line on the outermost layer.
[0014] The present invention reduces degradation in the quality of high-frequency signals and realizes wide-band, high-speed operation of optical transceivers.
[0015] FIG. 1 is a side cross-sectional view showing a conventional optical transceiver configuration adapted for higher speeds. FIG. 2 is a top view and a cross-sectional view showing an overview of the configuration of an optical transceiver of the present disclosure. FIG. 3 is an enlarged cross-sectional view of an optical module including an FPC connection portion. FIG. 4 is a diagram showing an FPC wiring layout in an optical transceiver of the present disclosure. FIG. 5 is a diagram showing another example configuration of an FPC in an optical transceiver of the present disclosure. FIG. 6 is a diagram showing the configuration and internal layer structure of signal lines in a DSP substrate. FIG. 7 is a diagram showing simulation calculation results of inter-channel crosstalk. FIG. 8 is a diagram showing a signal line configuration on a surface layer in a DSP substrate. FIG. 9 is a diagram showing another configuration of signal lines on a surface layer in a DSP substrate. FIG. 10 is a diagram showing the configuration of an optical transceiver in which grooves are formed on a DSP substrate. FIG. 11 is a diagram showing another configuration of signal lines in a multilayer DSP substrate having a core layer. FIG. 12 is a diagram showing a half-through hole formed at an end of a DSP substrate. FIG. 13 is a diagram showing the cross-sectional structure of a Tx module of an optical transceiver of the present disclosure.
[0016] The optical transceiver disclosed herein presents a specific configuration for achieving a smooth high-frequency connection between a DSP and an optical module. The optical module may include an optical receiver module and an optical modulator module. The optical transceiver may include two separate optical modules, or a single optical module integrating the functions of both the optical receiver and the optical modulator. A flexible printed circuit (FPC) is used for the high-frequency connection. Both sides of the FPC electrically connect the pads on the top surface of the DSP substrate to the pads on the optical module package. The connection pads on one side of the FPC are connected to the DSP substrate, and the connection pads on the other side are connected to the optical module. The DSP may have a DSP chip mounted on a DSP substrate, and the entire DSP may be covered by a lid except for the area of the DSP substrate that is connected to the FPC.
[0017] The present invention discloses detailed structures of the connection pad on the DSP board, the shape of the high-frequency wiring, the structure of the multilayer wiring board, and the FPC structure, in order to avoid degradation of the transmission characteristics of high-frequency signals due to impedance mismatch, high-frequency crosstalk, etc. The detailed configuration of the optical transceiver will be described below with reference to the drawings.
[0018] For simplicity, the following description refers to the transmitting optical module containing an optical modulator and its driver IC as the "Tx module," and the receiving optical module containing a photodetector (PD) and TIA as the "Rx module." A single optical module integrating the functions of both a Tx module and an Rx module is referred to as a TRX module. The following description uses an optical transceiver containing an Rx module and a Tx module as an example, but the two modules can also be replaced with a single TRX module. While the following description focuses on the cross section of a Tx module, the connection between the DSP and optical module via FPC remains the same for an Rx module, which has a roughly symmetrical shape to the Tx module. Having similar pad shapes for the FPC between the DSP and Tx module and between the DSP and Rx module is efficient in terms of high-frequency design. It also reduces variations in solder mounting quality and connection strength throughout the optical module.
[0019] [Basic Configuration of Optical Transceiver] Figure 2 shows a top view and a cross-sectional view illustrating the configuration of the optical transceiver of the present disclosure. Figure 2(a) is a top view of the PCB 101, looking at the board surface (x-y plane), and Figure 2(b) is a cross-sectional side view (x-z plane) taken along line IIb-IIb passing through the Tx module 400. The optical transceiver 100 has a DSP 200, an Rx module 300, and a Tx module 400 mounted on the PCB 101.
[0020] Various other electrical and mechanical components, such as chip capacitors and resistors, will be mounted on the top and bottom surfaces of the PCB 101, but these are omitted from Fig. 1. In the optical transceiver 100, the heat dissipation surfaces of the DSP 200, Rx module 200, and Tx module 300 are aligned in one direction, taking into consideration manufacturability when mounting each component on the PCB 101 and simplification of the optical transceiver's heat dissipation structure. Considering that the DSP chip 202 generates the most heat in the optical transceiver, it is desirable to align the heat dissipation direction upward (+z direction), which is appropriate for heat dissipation from the DSP chip 202.
[0021] 2(b), in contrast to the configuration of the prior art, the optical module 100 is inverted when mounted on the PCB 101, and is positioned so that the side with the terrace is on the upper side in the height direction (z-axis) of the optical module. The optical module is mounted so that the terrace surface faces the upper surface of the PCB, and in the case of the Tx module 400, heat is transferred from the driver IC and Peltier element toward the side with the terrace surface of the package (in the +z direction).
[0022] FIG. 13 is a cross-sectional view of the internal structure of a Tx module in an optical transceiver according to the present disclosure. Note that FIG. 13 illustrates the internal structure of a completed Tx module 400 mounted in the optical transceiver 100, inverted. The Tx module 400 includes a Peltier element 406, a substrate 407, and an optical modulator chip 409 arranged in this order within a housing 417. Lenses 410 and 411 are provided on the substrate, which are optically coupled to an optical fiber 402. Within the module, a driver IC 408 is formed on the surface of a base 415, and wiring 412 is formed on a package base 416. Wires 413 and 414 connect the optical modulator chip 409 to the wiring 412. The housing 417, package base 416, and package sidewalls 405 separate the interior and exterior of the module. A portion of the package base 416 is exposed from the housing, forming a terrace surface of the optical module. An FPC 500-1 is connected to the terrace surface.
[0023] 13, when the Tx module is mounted on the PCB of the optical transceiver, the Peltier element 406 for temperature control and the base 415, which is thermally connected to the driver IC, a heat-generating component, are located on the inner surface of the housing 417, opposite the PCB 101. The heat dissipation mechanism from inside the Tx module is configured so that heat moves from the driver IC and Peltier element to the outside in the +z direction. The Rx module also has a TIA instead of a driver IC, and when mounted on the PCB 101, heat from inside the Rx module moves to the upper side of the module (+z direction).
[0024] As described above, the optical module is mounted on the PCB in a manner that allows heat-generating components inside the package to dissipate heat toward the outside of the package from the side opposite the mounting surface fixed to the PCB. Therefore, a heat dissipation mechanism (housing) with a single common heat dissipation surface (not shown) can be used above the optical transceiver 100 to dissipate heat from the DSP chip 202 and the Tx module 300. By arranging the optical module and DSP in close proximity and aligning the top surfaces of the DSP and optical module, a single heat dissipation mechanism can easily dissipate heat from the DSP and optical module. When using a common heat dissipation mechanism, careful consideration must be given to preventing heat from leaking from the DSP to the optical module. Furthermore, to prevent heat from leaking through the heat dissipation mechanism, separate heat dissipation mechanisms on the same surface can be used for the DSP and optical module.
[0025] The DSP 200 is composed of a DSP substrate 201, which is made up of a multilayer wiring substrate (described later), a DSP chip 202, and a lid 203. The DSP chip 202 and the DSP substrate 201 are connected by a BGA 204. Similarly, the DSP substrate 201 and the PCB 101 are connected by a BGA 205.
[0026] The lid 203 is made of a single piece of metal and covers at least the entire top surface of the DSP chip 202 and the top surface of the DSP substrate excluding the areas where the FPCs 500-1 and 500-2 are connected and fixed. The lid 203 may cover the sides of the DSP chip 202 or may extend beyond the periphery of the DSP substrate 201. The lid 203 prevents unexpected direct damage to the DSP chip and the BGAs 204, 204, etc., which are the connection points, due to mishandling during installation of the DSP 200 in an optical transceiver or during the manufacturing process. By carefully designing the shape of the lid 203, the surface of the DSP substrate 201 can be left open from the RF connection pad for connecting to the FPC to the edge of the substrate. In this way, the DSP 200 can be prepared as a DSP module by mounting the DSP chip 202 and lid 203 on the DSP substrate 201. The manufacturing process of the optical transceiver will be described later, but if it is prepared in the form of a DSP module with a lid, it can be safely mounted on PCB 101 without being damaged during the manufacturing process, just like the Rx module and Tx module.
[0027] As another form of DSP 200, it is also possible to prepare the DSP 200 without a lid, with only the DSP chip 202 mounted on the DSP substrate. The lid-less DSP 200 can be connected to the optical modules 300 and 400 with FPCs 500-1 and 500-2, respectively, and then the lid 203 can be attached. When mounting the lid, there is a risk of applying inadvertent force to the FPC or of the lid 203 shorting the FPC wiring. Therefore, it is necessary to thoroughly optimize the position of the pads in the area including the connection pads on the top surface of the DSP substrate 201 and the shape of the lid. Because the DSP chip and DSP substrate are exposed until just before the lid is mounted, extreme care must be taken to avoid damaging the DSP chip and other components.
[0028] When the DSP 200 includes a lid 203, the footprint of the lid 203 on the substrate surface (xy plane) is necessarily smaller than the footprint of the DSP substrate 201. On the other hand, the footprint of the DSP chip 202 is included within the footprint of the lid. On the substrate surface of the DSP substrate 201, the lid 203 is absent only in the area where at least the RF connection pad is located.
[0029] If damage to the DSP chip and BGAs 204 and 205 can be avoided during the manufacturing process of the optical transceiver, the lid can be omitted. In order to effectively dissipate heat from the DSP chip outside the optical transceiver, a lid may be provided only on the top surface of the DSP chip. The shape of the lid 203 can be modified in various ways, and specific variations will be described later.
[0030] The Rx module 300 and the Tx module 400 are each housed in a package. The two optical modules 300, 400 are directly connected to the DSP 200 via FPCs 500-1, 500-2, which serve as an RF interface for electrical signals. Here, "directly connected" means that the connection pads on the terrace of the optical modules are connected to the connection pads on the DSP board only via the FPCs 500-1, 500-2. Therefore, in the optical transceiver 100, there are no high-frequency paths that pass through the vias connecting the optical modules to the PCB, the RF signal lines within the PCB, the BGAs connecting the PCB to the DSP board, or the vias within the DSP board. In contrast to optical transceivers that include conventional SMT-type packaged optical modules, the electrical signals in the optical transceiver 100 do not pass through the vias or BGAs, which can degrade high-frequency characteristics. The DSP and optical module can be connected via the shortest high-frequency path, significantly reducing high-frequency loss. Furthermore, because the number of VIA and BGA connections is reduced, the optical transceiver configuration shown in Figure 2 is also extremely effective in reducing high-frequency loss due to impedance mismatching that occurs at discontinuous parts of the high-frequency path.
[0031] The direct current (DC) interfaces of the optical modules 300 and 400 can be, for example, lead pins 301 and 401 as shown in FIG. 2A. The DC interfaces are not limited to lead pin structures, and may use FPCs, similar to the RF interface with the DSP 200. The DC lead pins 301 and 401 are soldered to pads (not shown) on the PCB 101 so that power can be supplied from outside the optical transceiver.
[0032] Referring again to the top view of the optical transceiver 100 in Figure 2(a), the Rx module 200, Tx module 400, and DSP 200 are optimally positioned to minimize loss of the RF signal, a high-frequency electrical signal. The two modules and the DSP 200 are symmetrically positioned about the centerline along the longitudinal direction of the PCB 101. To achieve a high-speed optical transceiver, it is important to minimize high-frequency loss of the RF signal from the DSP 200 to the Tx module and from the Rx module to the DSP 200. The lengths of the FPCs 500-1 and 500-2, which function as RF interfaces, must each be as short as possible. In the optical transceiver 100 of Figure 2, to transmit high-speed signals exceeding 128 GBd, it is preferable to keep the distance (gap) between the two optical modules in the y-axis direction to 1 mm or less.
[0033] To place two optical modules close to each other, the DC lead pins must be grouped on one side of each module and oriented in opposite directions. As shown in Figure 2(a), the DC lead pins 401 of the Tx module 400 are oriented in the -y-axis direction (downward in the figure) toward the periphery of the PCB 101, while the DC lead pins 301 of the Rx module 300 are oriented in the +y-axis direction (upward in the figure) toward the periphery of the PCB 101. This configuration conforms to the lead pin orientation specified in the HB-CDM standardized by the Optical Fiber Forum (OIF) as shown in Non-Patent Document 1.
[0034] The optical module package is made of ceramic. Considering the layout design of the high-frequency signal lines and DC lines within the optical module, the height from the top surface of the PCB 101 to the terrace surface of the optical module in the cross-sectional view of Figure 2(b) is preferably about 1 to 2 mm. The thickness of the DSP board 201 is also preferably set in the range of about 1 to 2 mm, from the viewpoint of matching the height with the terrace surface of the optical module. By matching the height of the top surface of the DSP board with the height of the terrace surface, bending in the thickness direction of the FCP is unnecessary, as will be described later, and the FCP can be made flat.
[0035] If a DSP board is approximately 1 to 2 mm thick, it will have more layers available than are required for DC and RF lines. Since minimizing the number of layers in a multilayer wiring board is typically desirable from a cost perspective, a core layer can be used internally to adjust the overall thickness of the board. Multilayer wiring boards that include such core layers are sometimes called build-up boards. In addition to adjusting the overall board thickness, the core layer also functions as a separation layer separating the RF wiring layer from the DC wiring layer. The provision of a core layer allows for a significant separation between the DC and RF wiring layers, thereby reducing mutual interference and noise between the wiring layers. The detailed configuration of the DSP board will be described later, along with the detailed configuration of the PAD and signal lines.
[0036] Considering the need for faster DSP operation as described above, it is desirable to house the DSP 200 on a small DSP board 201 to reduce high-frequency signal loss and costs. The two FPCs should be configured to converge on the centerline of the DSP 200 as they move from the optical module side toward the DSP side. As described below, the FPCs shown in Figure 2 are pre-shaped and curved within the plane of the base material (x-y plane). While it is possible to make the FPCs straight without bending, this would require the pads to be arranged in a fan-shaped pattern on the surface of the DSP board 201. This is undesirable because it increases high-frequency loss on the DSP board and increases the size of the DSP board.
[0037] [Connection between DSP and Optical Module in Optical Transceiver] The optical transceiver 100 disclosed herein has one feature in the FPC connection between the DSP and optical module. In the conventional optical transceiver 800 shown in FIG. 1, the FPC 806 is located on the same surface as the board surface of the DSP board 804 and the terrace surface of the optical module 807, which faces the same direction, and is connected only on one side of the FPC 802. In contrast, in the optical transceiver 100 shown in FIG. 2(a), the FPC 500-1 is located on the same surface as the board surface of the DSP board 201 and the terrace surface of the Tx module 400, which faces the opposite direction, and is connected on a different side of the FPC 500-1. The optical module 400 is mounted on the PCB 101 upside down, as compared to the conventional technique, so that the terrace surface with the connection pad for the FPC faces the PCB 101.
[0038] FIG. 3 is an enlarged cross-sectional view of an optical module including an FPC connection. This is an enlarged side cross-section (x-z plane) of the FPC 500-1 and its vicinity in FIG. 2(b), with the height direction (z-axis direction) enlarged. Please note that the relative sizes of the various components are not accurately depicted to facilitate understanding of the configuration near the FPC. FIGS. 3 and 2(b) are cross-sectional views taken perpendicular to the PCB surface through line IIb-IIb in FIG. 2(a). Although the cross-section crosses the signal lines of the bent FPC 500-1, the FPC is actually shown along the signal lines. The optical transceiver 100 disclosed herein employs a configuration that minimizes FPC bending to reduce high-frequency loss caused by bending the FPC in the thickness direction (z-axis direction).
[0039] FIG. 3 shows an FPC 500-1 connecting a connection pad 210 at the end of the DSP board 201 to a connection pad 403 on the terrace surface of the Tx module 400. The FPC 500-1 has metal layers formed on both sides of a base material 501, with a signal line 502 on the upper side of the figure and a ground (GND) surface 503 on the opposite side. A PAD 504 and a PAD 507 for connecting to the optical module are formed on both ends of the signal line 502. Also on the GND surface are a PAD 505 for connecting to the DSP, connected to the PAD 504 via a VIA or through-hole 508, and a PAD 506 connected to the connection pad 507 or a through-hole VIA 509. As will be described later, heating the PAD 504 connects the connection pad 505 to the connection pad 210 with solder 206. Similarly, by heating the PAD 506 , the connection PAD 507 and the connection PAD 403 are connected by the solder 206 .
[0040] In the optical module 100 of the present disclosure, the height difference ΔH between the terrace surface of the Tx module and the top surface of the DSP substrate 201 is set to 500 μm or less in order to minimize bending of the FPC in the thickness direction. A height difference of approximately 500 μm eliminates the need to bend the FPC significantly in the thickness direction, allowing for a nearly flat connection. This reduces the high-frequency loss and risk of cracks in the metal wiring on the FPC caused by significant bending of the FPC, making it possible to achieve a good high-frequency connection.
[0041] Generally, the thinner the FPC base material 501, the easier it is to handle, allowing for flexible adjustment of its height during the mounting process. On the other hand, in terms of high-frequency characteristics, a thicker base material is preferable to minimize loss. Taking these factors into consideration, the thickness of the base material 501 is preferably 50 μm or greater. Specifically, if the base material 501 is approximately 50 to 100 μm thick, even if the height difference ΔH between the terrace surface and the DSP substrate surface is approximately 500 μm, mounting is easy by slightly adjusting the FPC's thickness. Setting ΔH to approximately 500 μm also minimizes damage to the solder joints between the FPC and the optical module during the mounting process. If the solder 206, 404 at the solder joints on both ends of the FPC becomes too thick, the size of the conductor portion of the transmission line may change, potentially reducing the characteristic impedance of the signal line. The solder thickness between the pads is preferably 50 μm or less.
[0042] As mentioned above, the shorter the FPC 500-1, the better in terms of high-frequency characteristics. In practice, the influence of heat from the DSP chip 202, the largest heat source in an optical transceiver, must be considered. Placing the optical modules 300 and 400 and the DSP chip 202 too close together can result in the optical module becoming extremely hot. If the optical module incorporates a Peltier element, there is a risk of the Peltier element's power consumption increasing significantly or becoming inoperable and experiencing thermal runaway. Furthermore, if the FPC is too short, problems may arise during the process of connecting the FPC to the DSP board, such as missing a portion to hold the FPC or an insufficient length for bending the FPC. From the perspectives of both thermal design and mountability, the FPC length should preferably be 3 mm or longer. The FPC wiring layout will be described later with reference to Figures 4 and 5.
[0043] [Outline of Optical Transceiver Assembly Procedure] The following is an outline of the assembly procedure for the optical transceiver 100. The Rx module 300 and Tx module 400 are pre-soldered onto their respective terrace surfaces. First, the DSP 200 is mounted on the PCB 101 by reflow soldering, and then the optical modules 300 and 400 are mounted on the PCB 101. The optical module and DSP are mounted in separate processes because it is difficult to put the optical module through a normal reflow soldering process due to heat resistance limitations and other factors.
[0044] The optical modules 300 and 400 are first assembled by soldering their respective FPCs to the connection pads 210 of the DSP 200. Then, the lead pins 301 and 401 of the optical modules are fixed to the PCB 101. Because the FPC of the optical module is an RF interface, the size of the connection pad 505 is limited for impedance matching. Because high-frequency transmission characteristics and connection strength are affected by misalignment between the opposing pads via solder, mounting of the optical module with an FPC requires extremely high precision. On the other hand, since the lead pins only need to be reliably connected in DC, the DC pad on the PCB can be large, allowing for a relatively large tolerance for misalignment. Therefore, the optical module is first connected from the FPC side, and then the lead pins are connected.
[0045] To reduce the number of steps required for mounting an FPC to a DSP 200 already mounted on a PCB, it is desirable to heat and solder the Tx module and Rx module together using a hot bar. Mounting using a hot bar requires pre-soldering of at least one of the FPC's connection pad 505 or the connection pad 210 on the DSP board. To melt the pre-solder between the connection pads using a hot bar and establish a solder connection, at least one via (VIA) 508 is required, as shown in Figure 3. By pressing the hot bar against the heating pad 504 from above in Figure 3, the via 508 transfers heat from the heating pad 504 to the solder 206 between the connection pads 505 and 210. Alternatively, the via 508 can be replaced with a through hole. Here, a through hole refers to a hole that penetrates a board and has all of its inner surfaces metallized. In the case of through holes, solder can be flowed through the holes, so it is sufficient that at least one of the FPC connection pad 505, heating pad 504, or connection pad 210 on the DSP board is pre-soldered.
[0046] The lead pins 301 and 401 of the optical module are DC interfaces, and as long as they are electrically connected, some misalignment is acceptable. The pad size on the PCB can also be set wide enough relative to the lead pins, and high-precision alignment and mounting techniques like those required on the FPC are not required. While lead pins cannot be bent after being fixed, the FPC can be bent slightly. Therefore, after the FPC is fixed, it is possible to fine-tune the FPC to connect and fix the DC lead pins.
[0047] [FPC Wiring Layout] This section describes the specific configuration of the FPC in the optical transceiver 100 of the present disclosure. As shown in FIG. 3 , the FPC has a base material 501 with metal layers on both sides. One side has a signal line 502 for the high-frequency transmission path, and the other side has a GND surface 503 for the signal line. The FPC is preferably configured so that the side with the signal line 502 faces the terrace surface of the Tx module 400. Conversely, if the FPC is configured so that the signal line 502 faces the substrate surface of the PCB 101 below, there is a possibility that the metal wiring pattern on the PCB and the signal line 502 on the FPC will interfere with each other. This interference could result in degradation of the high-frequency transmission characteristics of electrical signals input / output between the DSP 200 and the optical module, or in mutual noise contamination between the electrical signals and the DC signals on the PCB. If the GND surface 503 of the FPC 500-1 faces the PCB 101, as shown in FIG. 3 , the above-mentioned interference problem would not occur. However, if there are no electrical wiring or other components on PCB 101 or if there is a sufficient distance between the PCB and FPC, the signal line surface and GND surface of the FPC may be upside down compared to FIG.
[0048] FIG. 4 illustrates the FPC wiring layout of an optical transceiver disclosed herein. (a) of FIG. 4 illustrates the first surface (x-y plane) on which the signal lines are located, and (b) of FIG. 4 illustrates the second surface (x-y plane) opposite the first surface, which includes the GND surface. In FIG. 4, the FPC coverlay and resist are omitted to make the layout easier to see. Two pairs of GSSG differential signal lines 502a and 502b are shown on the first surface of the FPC 500a in FIG. 4(a) as an example. Here, G represents ground and S represents signal. The number of signal line pairs may vary depending on the type of optical module. Furthermore, the area of the GND side pad is larger than that of the signal line pad. While a smaller pad size is desirable for the signal line pad from the perspective of high-frequency characteristics, a sufficient solder connection area is required to ensure the solder connection strength. Therefore, the GND side pad is made sufficiently wider than the signal line pad to ensure the solder connection strength.
[0049] The maximum area of the GND pad between each channel is uniquely determined by the inter-channel pitch of the signal line pads on the FPC and DSP board. If the inter-channel pitch is narrow and sufficient area for the GND pad cannot be secured, it is effective to expand the size of the GND pad at both ends of the FPC's width direction (y direction). To prevent short circuits if solder flows outside the soldered PDA area, areas of the FPC where soldering is not required are covered with resist. Note that the resist defines the soldered PAD area, thereby defining the GND pad on the GND surface as well. Therefore, multiple PADs are placed at the end of the FPC in a GSSG differential format. Furthermore, because applying resist to the signal lines increases high-frequency loss, care must be taken to minimize the area of the resist.
[0050] 4B, a GND surface 503 for signal lines 502a and 502b is formed on the second surface side of the lower surface of the FPC 500a. As shown in the cross-sectional view of the FPC connection portion in FIG. 3, the first surface of the FPC, on which the signal line 502 is located, is connected to a connection pad on the terrace surface of the optical module 400, and the second surface of the FPC, on which the GND surface 503 is located, is connected to a connection pad on the upper surface of the DSP board 201. The first and second surfaces of the FPC are each used for RF interfaces. Therefore, the VIA 508 included in the path of the signal line 502 not only serves the function of fixing by soldering, but also plays an important role as part of the signal path for transmitting high-frequency signals.
[0051] To transmit high-frequency signals without loss, if vias are not located at the edges of the pads, a portion of the pad away from the vias will form an open stub, adding capacitive impedance to the signal line. To prevent this, as shown in Figure 4, half-through holes 510 are provided at the very end of the FPC 500a for signal lines 502a and 502b. If the pad length is sufficiently short and impedance changes due to stub formation are not a problem within the operating frequency band, half-through holes are not necessary. Similarly, half-through holes 511 are provided at the very end of the FPC 500a to stabilize the high-frequency potential on the GND surface. Half-through holes 510 and 511 not only improve high-frequency characteristics but also strengthen solder connection strength by forming solder fillets on the connecting pads. Regarding half-through holes 510 for signal line pads, if the diameter of the half-through holes is too large and the surrounding land area is large, the capacitive nature of the pads increases, leading to lower impedance and degraded high-frequency characteristics of the connecting pads. In order to prevent deterioration of the high frequency transmission characteristics of the signal line, it is desirable to set the diameter φ of the half through hole 510 to 150 μm or less.
[0052] The configuration of the connection pads and other components of the DSP board 101 will be described later. From the perspective of forming fillets at the FPC end, it is desirable to mount the FPC signal line pad end and the signal line pad end on the DSP board with a 100 μm offset. This corresponds to the offset of the end of the connection pad 210 on the DSP board in the −x direction compared to the end of the connection pad 505 in FIG. 3 . By setting the size and positional relationship of the connection pads 505 and 210 in this manner, a good fillet is formed in the solder 206 at the connection point, improving the strength quality of the solder. Specifically, the connection pads 505 and 210 can be mounted with the same length, and the FPC position can be adjusted so that the edge positions of the two pads are offset in the longitudinal direction (x direction). 3, one edge of the connection pads 505 and 210 can be aligned, and the length of the connection pad 505 on the FPC side can be made about 100 μm shorter than the connection pad 210 on the DSP board 201. The half-through hole 511 at the end of the GND surface does not have a significant effect on the high-frequency characteristics, so it can be a half-through hole with a larger diameter depending on the required connection strength.
[0053] FIG. 5 illustrates another example of the configuration of an FPC in an optical transceiver according to the present disclosure. The difference between FPC 500b and FPC 500a shown in FIG. 4 is the inclusion of voids 513a-513c within the GND plane region. Generally, the more ground vias an FPC has and the thicker its base material 501, the stiffer it becomes and the less flexible it is. Providing voids 513a-513c within the GND plane region is effective in maintaining the flexibility and ensuring the bendability of the FPC. Because voids reduce the area of the metal region on the GND plane, they may impair the stability of the ground potential and crosstalk between channels. As mentioned above, if the FPC does not require high flexibility, voids are not necessary. In cases where the FPC can be mounted in a flat configuration with minimal bending in the thickness direction, as in the optical transceiver 100 according to the present disclosure, it is preferable to eliminate voids in the FPC from the perspective of high-frequency transmission characteristics.
[0054] As mentioned above, it is desirable to reduce the number of ground vias in order to ensure the flexibility of the FPC, but reducing the via density reduces the effectiveness of the ground in high frequency bands, causing degradation of high frequency transmission characteristics. To prevent degradation of transmission characteristics in the high frequency range within the required frequency band of the electrical signals input and output to and from the DSP, the spacing between vias should be controlled. On the GND side of the FPC, the vias must be spaced at intervals of ¼ or less of the wavelength within the transmission path at the maximum frequency of the required transmission band of the electrical signals input and output to and from the DSP 200.
[0055] [Configuration of Pads on DSP Board] The following describes an example of the configuration of the pads for connecting to the FPC, the configuration of the signal lines, and the internal configuration of the board on the DSP board 201 of the optical transceiver 100. While only two sets of signal lines are shown in the diagrams in the following explanation, along one side of the DSP board 201, connection pads for multiple signal lines and GND pads whose areas are defined by resist on the GND surface are arranged. The pads on the FPC and the pads on the DSP board correspond one-to-one.
[0056] FIG. 6 shows the signal line configuration and internal layer structure of the DSP board. (a) of FIG. 6 is a top view (x-y plane) showing the electrode configuration at the end of the DSP board 201-1, which is soldered to the FPC. (b) of FIG. 6 is a cross-sectional view (y-z plane) of the DSP board 201-1 taken vertically along line VIb-VIb, showing the differential signal line connection PAD 210. (c) of FIG. 6 is a cross-sectional view (y-z plane) of the DSP board 201-1 taken vertically along line VIc-VIc, showing the internal signal line 211. While FIG. 6 shows an example using two dielectric layers, it is also possible to use only one dielectric layer or three or more dielectric layers.
[0057] DSP boards are formed with numerous DC lines and RF signal lines to operate the DSP chip. Because interference between the DC lines and RF signal lines must be suppressed, they are preferably formed as so-called build-up boards with a multilayer structure. Build-up boards are printed circuit boards formed (built up) by sequentially stacking metal and dielectric layers one by one on a core substrate. Laser vias (non-through vias) are formed in the build-up layers. Unlike typical through vias, laser vias do not penetrate between layers, enabling high-density wiring. Furthermore, whereas through vias are formed by drilling, laser vias are processed with a laser. Therefore, build-up boards can be manufactured with high precision and small via diameters, enabling the formation of extremely precise patterns such as fine wiring with narrow pitches. To handle high-speed electrical signals of 128 GBd or higher on DSP boards, small-diameter vias are essential, and build-up boards capable of forming vias with diameters of 100 μm or less are required. In terms of the aspect ratio in VIA processing during substrate manufacturing, in an RF wiring layer where a VIA diameter of 100 μm or less is required, the thickness of each dielectric layer must be 100 μm or less.
[0058] The connection pads of the differential signal line 210 shown in Figures 6(a) and 6(b) must be as small as possible and sufficiently separated from the GND surface of the underlying GND layer 217 in order to achieve impedance matching when connected via solder to the FPC connection pad 505 shown in Figure 4. Specifically, assume that the relative dielectric constant of the build-up board is approximately 3.0 to 3.5, and the solder thickness at the connection portion is approximately 50 μm. Assuming a connection with a characteristic impedance of 100 Ω, it is desirable that the width (y direction) of the signal line connection pads 210a and 210b be 0.2 mm or less, the length (x direction) be 1 mm or less, and the distance from the GND surface of the underlying GND layer 217 be at least 0.1 mm. Similarly, the distance (y direction) between the adjacent ground pad 212 on the top layer and the connection pads 210a and 210b must also be 100 μm or more.
[0059] FIG. 6 shows an example of two channels of differential signal lines, sandwiched between a GND plane. To maintain solder connection strength at the pads and inter-channel crosstalk, it is difficult to significantly increase the distance (y direction) between the connection pads and the GND pads. This is because, when the signal line connection pads are configured at a certain pitch between adjacent channels, increasing the distance between the connection pads and the GND pads reduces the area of the GND pads. It is necessary to achieve a solder connection between the FPC and the DSP with good impedance matching without degrading solder connection strength or inter-channel crosstalk. Therefore, it is useful to adjust the distance between the connection pads 210a and 210b and the GND plane defined by the underlying GND layer 217. From this perspective, it is desirable for the thickness direction distance (z direction) between the connection pads and the GND plane defined by the GND layer 217 to be greater than the width direction distance (y direction) between the GND pad on the top layer and the connection pad.
[0060] Furthermore, even if the distance (z direction) of the lower GND surface is sufficient, if the intermediate layer 216 is closer to the signal line than the ground metal of the top layer, the proximity of the ground will result in low impedance. Therefore, referring to the y-z cross section of Figure 6(b), it is necessary to configure the GDN of the intermediate layer 219 so that it does not protrude inside the adjacent ground surface (ground pad) 212 of the top layer, i.e., into the signal line side region 224. In other words, the connection pad 210 is configured to be at least 0.1 mm in the board thickness direction and not include other metal conductors in the region between adjacent ground pads 212 in a cross section perpendicular to the longitudinal direction (x direction).
[0061] Considering the strength of the connection with the FPC and ease of mounting, it is desirable that the width of the signal line connection pads 210a, 210b be at least 100 μm. If the width of the connection pads on the DSP board is 100 μm or less, there is a risk that the solder connection will not be successful if the FPC is misaligned during mounting or if the width tolerances and position tolerances of the connection pads on the DSP board and FPC side are accumulated.
[0062] From the perspective of impedance matching, the spacing between signal lines (in the y-axis direction) is also important. For example, in the case of the GSSG configuration shown in Figure 6, a signal line spacing of at least 0.3 mm is required. Placing the signal lines too close together risks short circuits during solder assembly. Setting a signal line spacing of at least 0.3 mm ensures a 0.1 mm distance between the edges of the signal lines, even if the width of the signal line connection pads 210a and 210b is 200 μm. Placing resist between the signal lines can prevent short circuits during solder assembly. From the perspective of characteristic impedance design, since bringing signal lines closer together leads to lower impedance, ensuring a signal line spacing of at least 0.3 mm is crucial. Furthermore, increasing the capacitance of the connection lowers the cutoff frequency of the transmission frequency band. To avoid such degradation of transmission frequency characteristics, it is desirable to minimize the length and width of the connection pads on the DSP board while still ensuring both connection strength and ease of assembly.
[0063] To reduce capacitance while maintaining solder connection strength, it is advisable to reduce the width of either the DSP board connection pad or the FPC connection pad. For example, the width of the connection pads 210a and 210b on the DSP board side can be set to 100 μm, and the width of the connection pad on the FPC side can be set to 200 μm. This reduces the connection capacitance while ensuring mountability. In the optical transceiver 100 disclosed herein, the heating pad is heated from the FPC side using a hot bar to mount the FPC. Therefore, considering factors such as thermal conductivity, it is desirable to narrow the width of the connection pads 210a and 210b on the DSP board side. The above-mentioned pad width examples assume a characteristic impedance of 100 Ω. If the signal line is designed for a different impedance, a different optimal value may exist.
[0064] Unintended coupling between adjacent channels is called crosstalk, and it occurs when high-frequency signals input and output to the DSP 200 interfere with signals on other channels, degrading signal quality. To improve high-frequency crosstalk characteristics between different channels, the GND pattern shape around the signal line connection PAD 210 is extremely important, as shown in Figure 6(a). Specifically, it is essential that the ground pattern be formed inside the DSP board 201-1 so that the distance d between the edge of the ground PAD 212 on the DSP board 201-1 and the edge of the signal line connection PAD 210 is 0.1 mm or more in the PAD length direction (-x direction). At the same time, it is also important that no ground metal is formed in the dotted-line area 223 on the board edge side (right side of the figure) of the signal line connection PAD 210.
[0065] Figure 7 shows the results of a simulation calculation of inter-channel crosstalk. Figure 7(a) explains the simulation model and the definition of far-end crosstalk. Figure 7(b) shows the calculation results of the inter-channel far-end crosstalk frequency characteristics obtained by an actual simulation. "Inter-channel far-end crosstalk" (hereinafter referred to as crosstalk) represents the strength ratio of a signal transmitted from one differential pair at the near end to another adjacent differential pair at the far end in two adjacent channels separated by a GND PAD 212. Since electrical signals appearing in adjacent channels are unwanted noise for the electrical signal of the target channel, the smaller the crosstalk value, the better. In this simulation, as shown in Figure 7(a), the amount of electrical signal input from the DSP PAD 210 that appears on the high-frequency line 502 on the FPC side of the adjacent channel is shown. The crosstalk value was simulated using the distance d between the edge of the GND PAD 212 on the DSP substrate end side and the edge of the signal line connection PAD as a parameter in the range of d=0.0 to 0.4 mm at intervals of 0.1 mm.
[0066] The calculation results in Figure 7 show that a stable and sufficient amount of crosstalk is achieved when the edge-to-edge distance d is 0.1 mm or greater. Conversely, when the edge-to-edge distance d = 0 mm and the edge of the GND PAD 212 and the edge of the connection PAD 210 are aligned, an increase in crosstalk of more than 20 dB is observed around 100 GHz. By extending the edge-to-edge distance d = 0.1 mm and the edge of the GND PAD 212 relatively toward the edge of the DSP board, crosstalk characteristics are significantly improved. Furthermore, it can be confirmed that increasing the edge-to-edge distance d to 0.2 mm or greater further improves crosstalk characteristics above 60 GHz. On the other hand, even if the edge-to-edge distance d is increased to 0.3 mm or greater, no further improvement is achieved in frequency bands up to 100 GHz. Therefore, for example, if the required transmission bandwidth is specified to be around 100 GHz, an edge-to-edge distance d of approximately 0.1 to 0.3 mm is sufficient.
[0067] [Configuration of signal lines on the DSP board] The above explanation has focused on the configuration of the connection pad, which is the connection part between the DSP board and the FPC. Below, we will explain the structure of the high-frequency (RF) wiring from the connection pad to the DSP chip.
[0068] 2, in the optical transceiver 100, a lid 203 is formed on the top layer of the DSP substrate 201, and there is a possibility that underfill material may protrude onto the BGA 204 connecting the DSP chip 202 and the DSP substrate. Therefore, if wiring is formed on the top layer of the DSP substrate 201, depending on the condition of the lid or underfill material, the characteristic values of the optical transmitter and optical receiver may vary between channels, and high-frequency characteristics may be significantly degraded. To eliminate the influence of the lid or underfill material on high-frequency characteristics, it is preferable to configure the DSP substrate so that high-frequency lines other than the pad portion, which is essential for connection to the FPC, are internally wired.
[0069] 6(a) and 6(c), the signal line connection PAD 210 is connected to the DSP chip as an inner layer signal line 211 via a VIA 213. If the signal line is routed as an inner layer within the DSP board 201-1 and the signal line 211 is surrounded above and below by metal ground layers 212 and 217, the above-mentioned lid and underfill material do not affect the high frequency characteristics.
[0070] FIG. 6 shows the simplest example of a multilayer wiring board, including two dielectric layers of the same thickness on the surface side of a build-up board. However, the layer thickness can be varied or the number of layers can be increased. To form a high-frequency line using such inner-layer wiring, at least three metal layers are required: a top-surface ground layer 212, a signal line layer 216, and a bottom-surface ground layer 217. FIG. 6 also shows only two dielectric layers and three metal layers from the surface to illustrate the configuration of the connection pad 210 and the inner-layer signal line 211. In a DSP board as a multilayer wiring board, the configuration below the bottom-surface ground layer 217 is not limited in any way. Furthermore, FIG. 6 shows an example in which a via 213 is provided at the end of the connection pad 210 on the DSP chip side to connect to the inner-layer wiring and transition to the signal line. This configuration is not limited to this; a signal line of a certain length based on the original characteristic impedance can be configured on the surface layer beyond the connection pad 210, and then transition to the inner layer via a via. Conversely, the VIA 213 may exist within the connection PAD 210. As with the FPC, care should be taken not to create a branched structure as a signal line and not to create an open stub.
[0071] As shown in Figure 6 above, if a signal line constructed using inner-layer wiring on a DSP board is used, the lid and underfill material do not affect the high-frequency characteristics. However, with inner-layer wiring, the signal line 211 is surrounded by the dielectric layer of the multilayer wiring board, which has a higher dielectric constant and dielectric loss tangent than air. For a differential line with a characteristic impedance of 100 Ω, the width of the signal line 211 is approximately 0.75 to 0.5 times larger than a signal line on the outermost layer of a DSP board with the same dielectric layer thickness. Because the signal line width is relatively narrower than that of the signal line on the outermost layer, high-frequency loss occurs in the signal line on the inner layer due to the dielectric (dielectric loss tangent), resulting in increased high-frequency loss. To increase the speed of optical transceivers, widening the bandwidth and reducing loss of each device are paramount, so it is desirable to construct high-frequency signal lines on the outermost layer of a DSP board.
[0072] Furthermore, in the configuration using the inner layer wiring 211 shown in Figure 6, in order to connect to the connection pads 210a and 210b, it is necessary to make an interlayer connection between the inner layer and the outermost layer using vias 213. This via 213 can cause impedance mismatches and reflection losses at discontinuous parts of the high-frequency path, which cannot be ignored. Therefore, the optimal configuration for signal lines should be selected while taking into consideration the required frequency bandwidth and the layer structure of the DSP board that can be used. Next, we will explain a configuration that achieves low loss and wide bandwidth for the high-frequency lines of the DSP board by placing the wiring on the surface layer on the DSP board.
[0073] FIG. 8 shows the configuration of signal lines on the surface layer of the DSP board. (a) of FIG. 8 is a top view (x-y plane) showing the electrode configuration at the end of the DSP board 201-2, which is soldered to the FPC. (b) of FIG. 8 is a vertical cross-sectional view of the DSP board 201-2 taken along line VIIIb-VIIIb, and (c) is a vertical cross-sectional view of the DSP board 201-2 taken along line VIIIc-VIIIc. The configuration of the connection pad 210 on the surface layer in (b) of FIG. 8 is the same as that in (b) of FIG. 6. (c) of FIG. 8 shows the configuration of a signal line 216 formed on the top layer, continuing from the connection pad 210. The GND surface for the signal line 216 is on the GND layer 217-1, via two dielectric layers. Compared with the signal line 211 formed in the inner layer of FIG. 6B, in the layer configuration of FIG. 8C, the line width of the signal line 216 becomes too thick, making it difficult to form high-density wiring.
[0074] When multiple complex wiring is installed on a small board such as a DSP board, it is necessary to layout the signal lines together in as small an area as possible. If the signal line width is wide, a large layout area is required to bend the high-frequency lines, which can make it impossible to route within the limited area of the DSP board, resulting in an increase in the size of the DSP board. Assuming that the placement pitch between channels is constant, as the signal line width increases, the GND area between channels becomes smaller, which has the disadvantage of degrading crosstalk characteristics. It is desirable to adjust the distance between the signal line and the ground plane to control the line width appropriately.
[0075] Typically, if the signal line 216 is routed on the outermost layer with the same layer structure and line width as the connecting pad, the capacitance of the signal line is significantly reduced due to the absence of the influence of solder or the FPC connecting pad, resulting in a characteristic impedance greater than 100 Ω. To increase the capacitance, it is preferable to set the GND layer of the ground plane for the signal line 216 on a layer closer to the surface than the GND layer 217-1 of the connecting pad. This allows for a characteristic impedance of approximately 100 Ω even if the signal line 216 is extended without changing the width of the connecting pad. Adjusting the distance between the GND layer and the signal line 216 in this way makes it possible to achieve a high-frequency line with the desired impedance for the signal line width required for the layout. Naturally, shortening the distance between the outermost signal line and the GND portion is also an effective method for reducing the characteristic impedance.
[0076] FIG. 9 shows another configuration of signal lines on the surface layer of a DSP board. (a) of FIG. 9 is a top view (x-y plane) showing the electrode configuration at the end of the DSP board 201-2, which is soldered to the FPC. (b) of FIG. 9 is a vertical cross-sectional view of the DSP board 201-2 taken along line IXb-IXb, and (c) is a vertical cross-sectional view of the DSP board 201-2 taken along line IXc-IXc. The configuration of the connection pads 210a and 210b in (b) of FIG. 9 is exactly the same as that in (b) of FIG. 8. (c) of FIG. 9 shows a configuration in which the signal line 216 formed on the top layer can be narrower than the signal line configuration in (c) of FIG. 8. The GND surface for the signal line 216 is located on the GND layer 217-2, separated by one dielectric layer. 8(c), compared to a configuration in which the GND plane is on the GND layer 217-1 via two dielectric layers, narrowing the distance between the signal line 216 and the GND plane allows the width of the signal line to be narrowed while achieving the same characteristic impedance. In this way, it is possible to adjust the characteristic impedance by adjusting the width of the signal line and the distance to the GND plane. Therefore, it is preferable that the ground layer for the signal line 216 be the same layer as the ground layer 217-1 for the connection PAD 210 on the DSP board, or a layer 217-2 closer to the surface.
[0077] Therefore, the optical transceiver of the present invention can be implemented as an optical transceiver comprising at least one optical module 300, 400 mounted on a printed circuit board (PCB) 101, a digital signal processor (DSP) 200 mounted on the PCB, and a flexible wiring board (FPC) 500 connecting the DSP and the optical module, wherein the DSP comprises a DSP chip 202 mounted on a DSP substrate 201, the FPC has a first connection PAD 404 on a first surface that is solder-connected to a PAD 403 on the terrace surface of the optical module, and a second connection PAD 505 on a second surface that is solder-connected to a PAD 210 on the top surface of the DSP substrate, and the PAD on the DSP substrate is connected to the DSP chip by a signal line 216 on the outermost layer.
[0078] When providing signal lines on the top layer of a multilayer wiring board, such as a build-up board, attention must be paid to the influence of the lid's metal wiring pattern and to the protrusion of underfill material onto the signal lines. Underfill material on high-frequency signal lines not only increases high-frequency loss but also causes variations in optical transceiver characteristics. The underfill material protrudes randomly, resulting in problems such as variations in characteristics between individual optical transceivers and between channels. To suppress such variations, the entire wiring area can be covered with underfill material or solder resist, but both are dielectrics that can degrade high-frequency characteristics. While solder resist can be omitted from the wiring area, underfill material is essential to improve the connection reliability between the DSP chip and the DSP board. Therefore, when forming signal lines on the top layer of a DSP board, it is preferable to use high-precision mounting to prevent the underfill material from protruding and to provide a structure that prevents it from protruding. As will be described below, a groove capable of storing the underfill material can be formed around the DSP chip near at least one side on the FPC side to prevent the underfill material from flowing onto the signal lines.
[0079] FIG. 10 illustrates the configuration of an optical transceiver with a groove formed on the DSP board. Similar to FIG. 2, FIG. 10(a) is a top view of the PCB 101 of the optical transceiver 100-1, looking at the board surface (x-y plane), and FIG. 10(b) is a cross-sectional view (x-z plane) taken along line Xb-Xb. Note that the lid is omitted in FIG. 10 to make the groove structure easier to see. As shown in FIG. 10(a), a groove 207 is formed on the edge of the DSP chip 202 facing the FPC. It is effective to provide the groove 207 near the edge of the DSP chip 202 facing the FPC so that the underfill material 208 can be distributed around the BGA 204 below the DSP chip. In terms of the width direction (x direction) of the groove 207, the groove 207 is formed beyond the BGA in the row closest to the FPC.
[0080] In the groove 207, signal lines cannot be formed on the surface, so internal wiring must be applied to a limited extent. Specifically, because underfill material is present on the entire surface directly below the DSP chip 202, the most desirable design is to internalize the signal line 211 from directly below the BGA connected to the signal line to beyond the groove 207. Internalizing the signal line 211 requires vias 213 in two locations, and interlayer vias behave as inductive reactance (inductance) added in series to the signal line. Since the longer the via 213, the lower the high-frequency cutoff frequency becomes, so to accommodate higher speeds in optical transceivers, it is desirable to keep the via as short as possible. To minimize degradation of high-frequency transmission characteristics, it is desirable to make the length of the interlayer via 213 equal to or less than 1 / 8 of the wavelength within the transmission path of the high-frequency signal propagating through the via. The depth of the groove 207 in the substrate thickness direction (z-axis direction) must be shallower than the length of the via, considering that inner layer wiring will be formed below the groove 207. Therefore, it is also an essential condition that the depth of the groove 207 be 1 / 8 or less of the wavelength in the transmission line.
[0081] The groove 207 shown in Figure 10 tends to degrade high-frequency characteristics compared to when no groove is formed, so it is desirable for the width (x direction) of the groove 207 to be as narrow as possible. The length of the groove 207 in the direction along the edge of the DSP chip (y direction) should be as long as possible so that it can store enough underfill material. It is most desirable to control the underfill material as much as possible to prevent it from getting on high-frequency signal lines. In Figure 10, the groove 207 is provided along the edge on the FPC side, but grooves can also be provided in four directions to surround the entire periphery of the DSP chip. There are no restrictions on the length of the grooves in the three directions other than the edge on the FPC side, as they do not affect high-frequency characteristics.
[0082] 6 and 8 show examples of DSP substrate configurations in which signal lines are formed primarily in the two dielectric layers on the surface side of a multilayer wiring board. Many other variations on DSP substrate configurations are possible. Furthermore, to prevent degradation of high-frequency characteristics when some of the signal lines are internalized as described above, it is important to strictly control the mounting conditions, such as stabilizing the amount of underfill material overflow, as described above. In the above explanation, the groove is formed near one edge on the FPC side. However, depending on the layout design of the DSP chip's backside pad, the amount of underfill material can be controlled, and the groove can be formed closer to the interior of the DSP chip.
[0083] FIG. 11 illustrates the signal line configuration in a multilayer wiring DSP substrate with a core layer. (a) of FIG. 11 is a top view (x-y plane) showing the electrode configuration at the end of the DSP substrate 201-3, which is soldered to the FPC. (b) of FIG. 11 is a cross-sectional view (y-z plane) of the DSP substrate taken vertically along line XIb-XIb, showing the signal line connection pad. (c) of FIG. 11 is a cross-sectional view (y-z plane) of the DSP substrate taken vertically along line XIc-XIc, showing the signal lines on the inner layers. Compared to the configurations in FIGS. 6 and 8, which primarily show only the surface layers, FIG. 11 illustrates an example configuration in which the number of layers of the multilayer wiring substrate is increased to include DC lines. The connection pad 210 in the top view of FIG. 11(a) is the same as in FIG. 6, while the core layer 221 and DC wiring layer 222 are newly shown in the cross-sectional views of (b) and (c).
[0084] As shown in Figure 2, to ensure a low-loss connection between the optical module and the DSP board by making the FPC flat in the thickness direction, the thickness of the DSP board needs to be approximately 1 to 2 mm. To adjust the board thickness, a core layer can be used in a multilayer wiring board. As mentioned above, a multilayer board structure with this core layer is generally called a build-up board. When mounting the FPC on the DSP board, the hot bar is pressed, applying pressure to the periphery of the DSP board's connection pads. Depending on the FPC mounting conditions, excessive pressure could damage the DSP board. Therefore, the DSP board needs to be configured to withstand the pressure from the hot bar during FPC mounting.
[0085] As shown in Figure 11(b), multiple large vias 215 are arranged in the core layer 221 directly below the connection pads 210a and 210b. The vias 215 in the core layer 221 increase the strength of the DSP substrate at the connection pads, preventing a decrease in signal quality and reliability due to warping or damage to the DSP substrate caused by pressure from the hot bar. Because the core layer 221 does not affect high-frequency characteristics, the diameter φ of the vias 215 does not need to be as small as 100 μm or less. Depending on the thickness of the core layer 221, it may be impossible to form a via with a diameter φ of 100 μm. Therefore, a larger diameter of approximately 200 μm to 300 μm, or even larger, is also possible. Since the core layer 221 in Figure 11(b) will be the core layer of the build-up substrate, it generally shows a buried through-hole via.
[0086] When laying out DC lines and the like for operating a DSP chip around the connecting pads and the signal lines on the top or inner layers, it is necessary to suppress the degradation of high-frequency transmission characteristics due to mutual interference between the DC lines and the signal lines. As shown in Figure 11 (c), it is desirable to lay out DC lines 214-1 to 214-3 on a DC wiring layer 222 below the ground layer 217 for the connecting pads and the signal lines 216 on the surface layer. By surrounding the DC wiring layer 222 with ground layers above and below, interference with the signal lines 216 on the RF wiring layer 220 is completely suppressed. From the perspective of high-frequency design, it is important to adjust the layer thickness and number of layers for the signal lines on the inner layers, just as it is for the connecting pads. 11, a DC wiring layer 222 is provided and DC lines 214-1 to 214-3 are shown as metal layers, but within the DSP substrate surface (x-y plane), there are no high-frequency lines in the range where high-frequency signals may affect the DC lines, and there is no limitation on the layer that constitutes the DC lines in the region where interference with signal lines may not occur. Part or all of the DC wiring may be formed on the same surface layers 210a and 210b as the signal line connection pads in FIGS. 11(b) and 11(c), or on the layer of the signal line 211, which is an inner layer in FIG.
[0087] FIG. 12 illustrates a half-through hole formed at the edge of a DSP board. To prevent degradation of high-frequency transmission characteristics when transmitting high-speed electrical signals on a DSP board, high-frequency ground stability is crucial. As shown in FIG. 12 , extending the ground pad 212 to the edge of the DSP board 201 and incorporating a half-through hole on the side of the board is effective. Forming a conductor on the side of the board to connect the top and bottom surfaces of the board in this manner is also called castellation. Various castellation structures are available, including semicircular half-through holes as shown in FIG. 12 , as well as oval shapes. This stabilizes the high-frequency ground potential of the ground pad connected to the FPC together with the connection pad 210, stabilizing the transmission of high-frequency electrical signals from the optical module connection pad 403 to the connection pad 210.
[0088] In the above description, both the terms "through hole" and "via" are used, but the two are interchangeable. Furthermore, the configuration of the multilayer wiring board can be modified in various ways and is not limited to the above example.
[0089] Although the above description uses an example in which the Tx module and Rx module are packaged separately, the optical transceiver configuration of the present invention is also effective for optical transmitter / receiver module configurations (such as IC-TROSA) in which the optical modulator and optical receiver are packaged together, or other package configurations.
[0090] The present invention can be used in optical communications.
[0091] 100, 100-1, 800 Optical transceiver 101, 801 PCB 200, 802 DSP 201, 201-1, 201-2, 804 DSP board 202, 805 DSP chip 203 Lid 204, 205, 803 BGA 206, 404 Solder 207 Groove 208 Underfill material 210, 403, 505, 507 Connection pad 211, 216, 502, 502a, 502b Signal line 212 GND pad 213, 215, 508, 509 VIA 214-1 to 214-3 DC line 216, 217, 223, 503 GND layer 300 Rx module 301, 401 Lead pin 302, 402, 808 Optical fiber 400, 807 Tx module 405 Package side wall 406 Peltier element 409 Driver IC 409 Optical modulator chip 415, 416 Base 417 Housing 500, 500-1, 500-2, 500a, 500b, 806 FPC 501 Base material 504, 506 Heating pad 513a to 514c Air gap
Claims
1. An optical transceiver comprising: at least one optical module mounted on a printed circuit board (PCB); a digital signal processor (DSP) mounted on the PCB; and a flexible printed circuit (FPC) connecting the DSP and the optical module; wherein the DSP comprises a DSP chip mounted on a DSP substrate; the FPC has a first connection PAD on a first surface which is solder-connected to a PAD on a terrace surface of the optical module, and a second connection PAD on a second surface which is solder-connected to a PAD on the top surface of the DSP substrate; and the PAD on the DSP substrate is connected to the DSP chip by a signal line on the outermost layer.
2. The optical transceiver according to claim 1, wherein the DSP further comprises a lid including at least the area of the DSP chip and covering the area of the DSP board excluding the PAD.
3. The optical transceiver of claim 1, wherein the PAD of the DSP board is at least 0.1 mm in the thickness direction of the board and does not contain other metal conductors in the area between adjacent ground PADs in a cross section perpendicular to the longitudinal direction, the end of the PAD on the board end side in the longitudinal direction is 0.1 mm or more toward the inside of the board than the corresponding end of the adjacent ground PAD, the length of the PAD is 1 mm or less and the width is 0.2 mm or less, the ground layer for the signal line is a layer on the surface side of the ground layer for the PAD on the DSP board, and the width of the signal line is the same as or narrower than the width of the PAD.
4. The optical transceiver according to claim 1, wherein the PAD of the DSP board has a width narrower than that of the connection PAD of the FPC.
5. An optical transceiver as claimed in claim 1, wherein an underfill material is filled between said DSP chip and said DSP board, and said DSP board has a groove for receiving an excess of said underfill material.
6. An optical transceiver as described in claim 5, wherein the groove is formed along the edge of the DSP chip on the FPC side, a portion of the signal line between the PAD and the DSP chip is configured in an inner layer directly below the groove, and the depth of the groove is 1 / 8 or less of the wavelength within the transmission path at which an electrical signal of the maximum frequency propagates through the via.
7. The optical transceiver of claim 1, wherein the first connection pad has a first heating pad connected by one or more through holes or buried VIAs at a corresponding position on the second surface side, and the second connection pad has a second heating pad connected by one or more through holes or buried VIAs at a corresponding position on the first surface side, and the second connection pad is at least 100 μm shorter in the longitudinal direction than the pad on the DSP substrate.
8. The optical transceiver according to claim 1, wherein the ground pad adjacent to the pad on the DSP board extends to the edge of the board and has a castellation structure on the side surface of the board.
9. The optical transceiver according to claim 1, wherein the DSP board includes a core layer, and the core layer has one or more embedded vias at positions corresponding to the connection pads of the DSP board.
10. The optical transceiver of claim 1, wherein the at least one optical module includes an optical transmitter module including an optical modulator and a driver integrated circuit, and an optical receiver module including a photodetector and a transimpedance amplifier, or is a single optical transmitting and receiving module including the functions of both the optical transmitter module and the optical receiver module, and the at least one optical module is mounted so that the terrace surface faces the top surface of the PCB, and heat-generating components are arranged inside the package so that heat is dissipated toward the surface opposite to the surface mounted on the PCB.
Citation Information
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