Capillary force-based horizontal dual-layer semiconductor field effect transistor and preparation method

By using capillary force to drop N-type and P-type semiconductor solutions into a multi-channel mold, the problems of complex and high cost in the preparation process in the prior art are solved, and the effect of simplifying the process and reducing costs is achieved.

WO2025007382A1PCT designated stage expired Publication Date: 2025-01-09SHANDONG UNIV OF SCI & TECH

Patent Information

Application Number
PCT/CN2023/110585
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-06
Filing Date
2023-08-01
Publication Date
2025-01-09

AI Technical Summary

Technical Problem

In the prior art, when preparing horizontal bilayer semiconductor field effect transistors, it is necessary to deposit P-type and N-type semiconductor materials respectively. The process is complex, time-consuming and costly, and there is a lack of simplified process methods.

Method used

A multi-channel mold was used to drop N-type and P-type semiconductor solutions into the microchannels respectively using capillary force, and a horizontal bilayer structure semiconductor was formed by heat treatment, and then a metal electrode was deposited in vacuum, simplifying the process flow.

Benefits of technology

The simultaneous deposition of the double-layer semiconductor layer is achieved, reducing the production cost and time, simplifying the process flow, and improving the application of the device.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN2023110585_09012025_PF_FP_ABST
    Figure CN2023110585_09012025_PF_FP_ABST
Patent Text Reader

Abstract

Disclosed are a capillary force-based horizontal dual-layer semiconductor field effect transistor and a preparation method. The transistor comprises a substrate (1), a dielectric layer (2), a semiconductor layer (3) and a metal electrode (4), in sequence from bottom to top, the semiconductor layer (3) being a semiconductor having a horizontal dual-layer structure. The preparation method comprises: preparing a multi-channel mold having multiple first micro-channels (5) and second micro-channels (6), the left end of each first micro-channel (5) being an open end and the right end thereof being a closed end, the left end of each second micro-channel (6) being a closed end and the right end thereof being an open end, and the first micro-channels (5) and the second micro-channels (6) being disposed at intervals; and dripping a N-type semiconductor solution (7) and a P-type semiconductor solution (8) on the left side and the right side of the mold, respectively. A dual-layer semiconductor having a horizontal structure can be prepared under the action of capillary force without requiring an additional mask plate.
Need to check novelty before this filing date? Find Prior Art

Description

A horizontal double-layer semiconductor field-effect transistor based on capillary force and its preparation method Technical Field

[0001] The present invention belongs to the technical field of semiconductor materials and devices, and in particular relates to a capillary force-based horizontal double-layer semiconductor field effect transistor and a preparation method thereof. Background Art

[0002] As key components in complementary circuits, field-effect transistors (FETs) based on bipolar semiconductor materials have been extensively studied by numerous researchers due to their excellent electrical properties. Bipolar semiconductor materials with high adaptability and excellent electrical properties are essential for the fabrication of high-performance FETs.

[0003] Based on the structure and preparation method of the semiconductor layer, bipolar field-effect transistors can be divided into vertical double-layer semiconductor transistors, horizontal double-layer semiconductor transistors, and P / N hybrid single-layer semiconductor transistors. In terms of device performance, the electrical performance of horizontal double-layer semiconductor transistors has obvious advantages over the other two types of transistors. However, the current preparation of horizontal double-layer semiconductors generally requires the deposition of P-type and N-type semiconductors separately, and the first semiconductor film needs to be masked when depositing the second semiconductor film. This process is relatively complex, time-consuming, and costly. Technical Solutions

[0004] In response to the shortcomings of the existing technology, the present invention provides a horizontal double-layer semiconductor field-effect transistor based on capillary force and a preparation method. By dropping two selected semiconductor solutions with different polarities onto both sides of the mold, two semiconductor layers can be deposited simultaneously without affecting each other's performance.

[0005] In order to achieve the above-mentioned purpose 1, the present invention adopts the following technical solutions:

[0006] A capillary force-based horizontal double-layer semiconductor field effect transistor comprises, from bottom to top, a substrate, a dielectric layer, a semiconductor layer and a metal electrode, wherein the semiconductor layer is a horizontal double-layer structure semiconductor.

[0007] Furthermore, the substrate is a rigid substrate or a flexible substrate, and the rigid substrate is made of silicon wafer or glass; and the metal electrode is made of Al, Ag or Au.

[0008] Furthermore, the horizontal double-layer structure semiconductor is composed of N-type and P-type organic or inorganic semiconductor materials.

[0009] In order to achieve the above-mentioned purpose 2 of the invention, the present invention adopts the following technical solutions:

[0010] A method for preparing a horizontal double-layer semiconductor field-effect transistor based on capillary force, using the horizontal double-layer semiconductor transistor as described above, comprises the following steps:

[0011] S1. Select a P-type silicon substrate with a silicon nitride dielectric layer, clean the substrate with acetone, isopropyl alcohol, and deionized water, then dry it, and perform a secondary cleaning treatment on the substrate surface using a plasma cleaner to obtain a highly hydrophilic and clean silicon nitride surface;

[0012] S2. Prepare a multi-channel mold, wherein the multi-channel mold is provided with a plurality of first microchannels and second microchannels, wherein the left end of the first microchannel is an open end and the right end is a closed end, and the left end of the second microchannel is a closed end and the right end is an open end, and the first microchannels and the second microchannels are spaced apart; press the multi-channel mold onto the dielectric layer, and drop selected N-type and P-type semiconductor solutions on the left and right sides of the mold, respectively, so that the two semiconductor solutions flow into the microchannels under the action of the capillary force of the microchannels, place the mold with the solution dropped therein on a hot plate for pre-baking, and then remove the mold and place it in a muffle furnace for thermal annealing, thereby finally obtaining a horizontal double-layer structure semiconductor;

[0013] S3. Prepare a metal electrode and deposit a metal film on the surface of the horizontal double-layer structure semiconductor by vacuum deposition to form a metal electrode, thereby finally obtaining a horizontal double-layer structure semiconductor field effect transistor.

[0014] Furthermore, the channel width of the microchannel is less than 1 micron, the channel length is less than 10 microns, and the distance between adjacent microchannels is less than 0.5 micron; the thickness of the semiconductor layer is 20-50 nanometers, the thickness of the dielectric layer is 30-100 nanometers, and the thickness of the metal electrode is 10-200 nanometers. Beneficial effects

[0015] The multi-channel mold used in this invention, under the action of capillary forces, can simultaneously produce a double-layer semiconductor with a horizontal structure without the need for an additional mask. While ensuring the performance of the resulting horizontal double-layer semiconductor transistor, this simplifies the fabrication process, reduces fabrication costs, and improves the practical applicability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] FIG1 is a schematic structural diagram of a horizontal double-layer semiconductor field effect transistor provided by the present invention;

[0017] FIG2 is a schematic diagram of the semiconductor solution dripping into the multi-channel mold in the present invention;

[0018] Wherein, 1-substrate; 2-dielectric layer; 3-semiconductor layer; 4-metal electrode; 5-first microchannel; 6-second microchannel; 7-N-type semiconductor solution; 8-P-type semiconductor solution; Modes for Carrying Out the Invention

[0019] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. The examples described below with reference to the accompanying drawings are of an illustrative nature and cannot be considered as limitations of the present invention. It should be understood that in the description of the present invention, the orientations or positional relationships indicated such as top, bottom, up, down, left, and right are based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention.

[0020] To further illustrate the technical solution of the present invention, specific embodiments will be described in detail below.

[0021] A horizontal double-layer semiconductor field effect transistor based on capillary force, as shown in FIG1 , includes, from bottom to top, a substrate 1, a dielectric layer 2, a semiconductor layer 3 and a metal electrode 4, wherein the semiconductor layer 3 is a horizontal double-layer structure semiconductor.

[0022] The substrate 1 is a rigid substrate or a flexible substrate. The rigid substrate is made of silicon wafer or glass. The metal electrode 4 is made of Al, Ag or Au.

[0023] The horizontal double-layer structure semiconductor is composed of N-type and P-type organic or inorganic semiconductor materials.

[0024] A method for preparing a horizontal double-layer semiconductor field-effect transistor based on capillary force, using the horizontal double-layer semiconductor transistor as described above, comprises the following steps:

[0025] S1, select a P-type silicon substrate with a silicon nitride dielectric layer (SiN x ), the thickness of the dielectric layer is 30 to 100 nanometers; the P-type silicon substrate is ultrasonically cleaned with acetone and isopropyl alcohol for 15 minutes and 30 minutes respectively, and then the residual isopropyl alcohol on the surface is cleaned with deionized water to make the silicon nitride surface clean and free of organic matter. The silicon nitride substrate is dried with nitrogen and then dried to remove residual moisture and oxidizing or reducing gases on the surface of the silicon nitride substrate. Finally, the substrate surface is cleaned twice with a plasma cleaner to obtain a highly hydrophilic and clean silicon nitride surface;

[0026] S2. Prepare a multi-channel mold, which includes a plurality of first microchannels 5 and second microchannels 6. The first and second microchannels extend in the left-right direction. The first microchannels 5 and the second microchannels 6 are provided with closed surfaces on the front and back. The left end of the first microchannel 5 is an open end and the right end is a closed end. The left end of the second microchannel 6 is a closed end and the right end is an open end. The first microchannels 5 and the second microchannels 6 are arranged in parallel in the front-to-back direction. The channel width of the microchannels is less than 1 micron, the channel length is less than 10 microns, and the spacing between adjacent microchannels is less than 0.5 micron. Press the multi-channel mold on the dielectric layer, and drop the selected N-type semiconductor solution 7 and P-type semiconductor solution 8 on the left and right sides of the mold respectively, so that the two semiconductor solutions flow into the microchannels under the action of the capillary force of the microchannels, as shown in Figure 2; Place the mold on a hot plate for pre-baking at 120°C for 10 minutes, then remove the mold and place it in a muffle furnace for annealing at 500°C for 40 minutes to finally obtain a horizontal double-layer structure semiconductor with a semiconductor layer thickness of 20 to 50 nanometers.

[0027] S3. Prepare a metal electrode; deposit a metal film on the surface of the horizontal double-layer structure semiconductor by vacuum deposition to form a metal electrode, and finally obtain a horizontal double-layer structure semiconductor transistor.

[0028] The thickness of the three metal electrodes is 10 to 200 nanometers, the conductive channel length L = 80 microns, and the width W = 2000 microns.

[0029] Of course, the above description is not a limitation of the present invention, and the present invention is not limited to the above examples. Changes, modifications, additions or substitutions made by technicians in this technical field within the essential scope of the present invention should also fall within the scope of protection of the present invention.

Claims

1. A horizontal double-layer semiconductor field effect transistor based on capillary force, characterized in that: It includes a substrate, a dielectric layer, a semiconductor layer and a metal electrode from bottom to top, and the semiconductor layer is a horizontal double-layer structure semiconductor.

2. The capillary force-based horizontal double-layer semiconductor field effect transistor according to claim 1, characterized in that: The substrate is a rigid substrate or a flexible substrate, and the rigid substrate is made of silicon wafer or glass; the metal electrode is made of Al, Ag or Au.

3. The capillary force-based horizontal double-layer semiconductor field effect transistor according to claim 1, characterized in that: The horizontal double-layer structure semiconductor is made of N-type and P-type organic or inorganic semiconductor materials.

4. A method for preparing a horizontal double-layer semiconductor field effect transistor as claimed in any one of claims 1 to 3, characterized in that: The following steps are involved: S1. Select a P-type silicon substrate with a silicon nitride dielectric layer, clean the substrate with acetone, isopropyl alcohol and deionized water, and then dry it, and use a plasma cleaner to perform a secondary cleaning treatment on the substrate surface to obtain a highly hydrophilic and clean silicon nitride surface; S2. Prepare a multi-channel mold, wherein the multi-channel mold is provided with a plurality of first microchannels and second microchannels, wherein the left end of the first microchannel is an open end and the right end is a closed end, the left end of the second microchannel is a closed end and the right end is an open end, and the first microchannel and the second microchannel are arranged at intervals; press the multi-channel mold on the dielectric layer, and drop the selected N-type and P-type semiconductor solutions on the left and right sides of the mold respectively, so that the two semiconductor solutions flow into the microchannels respectively under the action of the capillary force of the microchannels, place the mold with the solution dropped on a hot plate for pre-baking, and then remove the mold and place it in a muffle furnace for thermal annealing, and finally obtain a horizontal double-layer structure semiconductor; S3. Prepare a metal electrode, and deposit a metal film on the surface of the horizontal double-layer structure semiconductor by vacuum deposition to form a metal electrode, and finally obtain a horizontal double-layer structure semiconductor field effect transistor.

5. The method for preparing a horizontal double-layer semiconductor field effect transistor based on capillary force according to claim 4, characterized in that: The channel width of the microchannel is less than 1 micron, the channel length is less than 10 microns, and the distance between adjacent microchannels is less than 0.5 micron; the thickness of the semiconductor layer is 20-50 nanometers, the thickness of the dielectric layer is 30-100 nanometers, and the thickness of the metal electrode is 10-200 nanometers.

Citation Information

Patent Citations

  • Method for forming a pattern, method for manufacturing semiconductor apparatus, and method for manufacturing display

    CN101582391A

  • Organic semiconductor thin film production method

    CN105122492A

  • Micro-nano material ordered self-assembly graphical method based on micro-channel structure

    CN105152125A

  • Capillary force-based horizontal double-layer semiconductor field effect transistor and preparation method thereof

    CN116844959A

  • Thin-film transistor and fabrication method thereof

    US20080054257A1

Cited By

  • Pulse ultraviolet light excited semiconductor gas sensor and preparation method thereof

    CN120064409A

  • A semiconductor gas sensor excited by pulsed ultraviolet light and its preparation method

    CN120064409B