Testing method for heterojunction with intrinsic thin-layer cell

Abstract

The present application provides a testing method for a heterojunction with intrinsic thin-layer cell, comprising: step S1, performing first forward scanning on a heterojunction with intrinsic thin-layer cell to be tested so as to obtain a first initial volt-ampere characteristic curve, and performing reverse scanning on said heterojunction with intrinsic thin-layer cell to obtain a second initial volt-ampere characteristic curve; step S2, the area between the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve forming a feature region, and performing average partition on the feature region in a direction perpendicular to a voltage axis; and step S3, on the basis of a partition scanning time, performing second forward scanning on said heterojunction with intrinsic thin-layer cell partition by partition to obtain a target volt-ampere characteristic curve, wherein the step of acquiring the partition scanning time comprises: on the basis of a ratio of the partition area of each partition of the feature region to the area of the feature region as a partition scanning time ratio, taking a product of the partition scanning time ratio and the total scanning time of the second forward scanning as the partition scanning time. According to the testing method for the heterojunction with intrinsic thin-layer cell, the testing efficiency can be improved while eliminating the hysteresis effect.

Description

A testing method for heterojunction battery

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on July 4, 2023, with application number 202310808685.1 and invention name “A testing method for heterojunction batteries”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the technical field of photovoltaic cells, and in particular to a testing method for heterojunction cells. Background Art

[0003] During the solar cell manufacturing process, accurate testing of the electrical performance of solar cells is crucial. This helps analyze the differences in the power levels of the produced solar cells, facilitates identification of the causes of the differences, and facilitates process improvements. Currently, solar cell testing methods all involve simulating sunlight and applying an external load. The simulator simulates sunlight with an irradiance of 1000. While receiving sunlight, the solar cell is connected in parallel with the load. At this time, the current and voltage of the load are the current and voltage of the solar cell to be tested. By testing the current and voltage of the load, the current and voltage of the solar cell can be indirectly measured. Furthermore, various parameters of solar cell performance can be calculated using the volt-ampere characteristic curve (IV curve).

[0004] Heterojunction cells (HJITLs) are currently the most promising type of solar cell, offering advantages such as high conversion efficiency, low attenuation, a low temperature coefficient, and high bifaciality. HJT cells have a nearly symmetrical structure, and their high internal capacitance leads to significant hysteresis. The volt-ampere characteristic curves obtained from HJT testing cannot effectively eliminate this hysteresis, which can introduce measurement errors.

[0005] Some in the industry have proposed a testing method for heterojunction batteries to eliminate the hysteresis effect of capacitors. Specifically, the method uses a steady-state light source for testing, increases the test duration, and waits until the capacitor is fully charged and the current stabilizes before testing again. However, this method still presents two problems: First, prolonged illumination can cause temperature rise, and heterojunction batteries are very sensitive to temperature, so temperature fluctuations further increase measurement errors; second, the test duration is too long, which obviously makes it difficult to achieve the efficiency requirements of the production process.

[0006] Therefore, how to eliminate the hysteresis effect of the volt-ampere characteristic curve of heterojunction batteries while improving the testing efficiency is a technical problem that needs to be solved urgently.

[0007] Summary of the Invention

[0008] The technical problem to be solved by the present application is to overcome the above-mentioned technical problems in the prior art and provide a testing method for heterojunction batteries.

[0009] The testing method of the heterojunction battery includes: step S1: performing a first forward scan on the heterojunction battery to be tested to obtain a first initial volt-ampere characteristic curve, and performing a reverse scan on the heterojunction battery to be tested to obtain a second initial volt-ampere characteristic curve, wherein the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve do not overlap due to the hysteresis effect of the capacitance in the battery; step S2: the area between the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve constitutes a characteristic region, and the characteristic region is evenly partitioned in a direction perpendicular to the voltage axis; step S3: performing a second forward scan on the heterojunction battery to be tested region by region according to the region scanning time to obtain a target volt-ampere characteristic curve; the step of obtaining the region scanning time includes: taking the ratio of the region area obtained from each partition of the characteristic region to the area of ​​the characteristic region as the region scanning time ratio, and taking the product of the region scanning time ratio and the total scanning time of the second forward scan as the region scanning time.

[0010] Optionally, step S1 includes: step S11: providing the heterojunction battery to be tested and an adjustable load, and connecting the adjustable load and the heterojunction battery to be tested in parallel; step S12: performing a first forward scan on the heterojunction battery to be tested, and obtaining a first initial volt-ampere characteristic curve as the resistance of the adjustable load gradually increases; performing a reverse scan on the heterojunction battery to be tested, and obtaining a second initial volt-ampere characteristic curve as the resistance of the adjustable load gradually decreases, and the characteristic area is between the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve.

[0011] Optionally, step S2 includes: dividing the characteristic area into the first region to the Mth region, where M is an integer greater than or equal to 2; the boundary between the mth region and the m+1th region is perpendicular to the voltage axis of the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve; m is an integer greater than or equal to 1 and less than or equal to M-1, the average voltage corresponding to the mth region is less than the average voltage corresponding to the m+1th region, and the interval on the voltage axis from the first region to the interval on the voltage axis is equal to the interval on the voltage axis from the Mth region.

[0012] Optionally, step S3 includes: step S31: obtaining the respective areas of the first zone to the Mth zone; step S32: performing a second forward scan on the heterojunction battery to be tested, adjusting the resistance of the adjustable load from zero to the upper limit of the adjustable load, and obtaining the target volt-ampere characteristic curve, the second forward scan process is divided into a first main test stage to an Mth main test stage, the resistance change of the adjustable load in any stage from the first main test stage to the Mth main test stage is equal, the proportion of the time of the jth main test stage to the second forward scan time is equal to the proportion of the area of ​​the jth zone to the area of ​​the characteristic region, j is an integer greater than or equal to 1 and less than or equal to M; the sum of the first forward scan time and the reverse scan time is less than the second forward scan time.

[0013] Optional, M is 700-800.

[0014] Optionally, the sum of the first forward scanning time and the reverse scanning time is 1 / 5-1 / 4 of the second forward scanning time.

[0015] Optionally, the second forward scanning time is 50ms-60ms.

[0016] Optionally, the resistance value of the adjustable load changes at a uniform rate in any of the j-th main test phases.

[0017] Optionally, in the first forward scan, the resistance of the adjustable load changes at a uniform speed.

[0018] Optionally, during the reverse scan, the resistance of the adjustable load changes at a uniform rate.

[0019] The technical solution of this application has the following technical effects:

[0020] The technical solution of the present application provides a heterojunction battery testing method in which the sum of the first forward scan time and the reverse scan time is less than the second forward scan time, thereby shortening the time required to obtain the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve. The second forward scan occupies the majority of the test time. During the second forward scan, the second forward scan is performed on the heterojunction battery to be tested, region by region, according to the region scan time, to obtain a target volt-ampere characteristic curve. The step of obtaining the region scan time includes: determining the region scan time ratio based on the ratio of the region area obtained for each region of the characteristic region to the area of ​​the characteristic region, and determining the region scan time ratio by the product of the region scan time ratio and the total scan time of the second forward scan. This effectively eliminates the hysteresis effect caused by the capacitance of the heterojunction battery to be tested during the limited second forward scan time, thereby increasing the accuracy of the obtained target volt-ampere characteristic curve. Even when the second forward scan time is relatively short, the accuracy of the target volt-ampere characteristic curve is not reduced. This eliminates the hysteresis effect while improving testing efficiency when testing the volt-ampere characteristic curve of the heterojunction battery to be tested.

[0021] Furthermore, the resistance of the adjustable load is adjusted from zero to the upper limit of the adjustable load, and the second forward scan is divided into the first main test stage to the Mth main test stage. The resistance change of the adjustable load in any stage from the first main test stage to the Mth main test stage is equal, and the ratio of the time of the jth main test stage to the second forward scan time is equal to the ratio of the area of ​​the jth region to the area of ​​the characteristic region. In this way, the time of the jth main test stage corresponds to the area of ​​the jth region, so that the hysteresis effect caused by the capacitance of the heterojunction battery to be tested is eliminated in the process of the second forward scan with a limited time, so that the target volt-ampere characteristic curve obtained is more accurate. Even if the second forward scan time is relatively short, the accuracy of the target volt-ampere characteristic curve will not be reduced. In this way, the test efficiency is improved while eliminating the hysteresis effect when testing the volt-ampere characteristic curve of the heterojunction battery to be tested. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0023] FIG1 is an equivalent circuit diagram of a volt-ampere test of a heterojunction battery in the prior art;

[0024] FIG2 is a volt-ampere characteristic curve of a heterojunction battery in the prior art;

[0025] FIG3 is a flow chart of a method for testing a heterojunction battery according to an embodiment of the present application;

[0026] FIG4 is a first initial volt-ampere characteristic curve and a second initial volt-ampere characteristic curve of a heterojunction battery to be tested, as well as a schematic diagram of partitioning characteristic regions, provided in one embodiment of the present application;

[0027] FIG5 shows a first initial volt-ampere characteristic curve, a second initial volt-ampere characteristic curve, and a target volt-ampere characteristic curve of a heterojunction battery to be tested provided in one embodiment of the present application. DETAILED DESCRIPTION

[0028] The most basic structure of a heterojunction battery is: a silicon substrate serves as the middle layer, with a P-type layer + transparent conductive film / N-type layer + transparent conductive film structure formed on either side of the silicon substrate, respectively. Currently, the industry generally uses N-type silicon substrates. The core structure of a heterojunction battery is a PN junction formed by a portion of the structure within the P-type layer and the N-type layer. The PN junction is formed by the combination of an N-type silicon substrate and a P-type amorphous silicon thin film. The N-type silicon substrate is first doped with phosphorus. Because phosphorus has one more electron than silicon, electrons are majority carriers and holes are minority carriers within the N-type silicon substrate. In this case, the N-type silicon substrate is electrically neutral. However, the P-type amorphous silicon thin film is doped with boron, where holes are majority carriers and electrons are minority carriers. Similarly, the P-type amorphous silicon thin film is also electrically neutral. However, when the N-type silicon substrate and the P-type amorphous silicon thin film come into contact and bond together, due to the difference in majority and minority carriers on each side, electrons in the N-type silicon substrate flow toward the P-type amorphous silicon thin film, while holes in the P-type amorphous silicon thin film flow toward the N-type silicon substrate. The N-type silicon substrate becomes positively charged due to the loss of electrons, while the P-type amorphous silicon thin film becomes negatively charged due to the loss of holes. This difference in charge creates a potential difference, which in turn forms a built-in electric field at the interface between the two, known as the space charge region. The space charge region is almost devoid of charge carriers, and the entire space charge region, along with the other film layers of the heterojunction cell, acts as a capacitor. Thus, within the entire heterojunction cell, the gate electrode, front transparent conductive film, back transparent conductive film, N-type doped amorphous silicon thin film, P-type doped amorphous silicon thin film, front intrinsic amorphous silicon thin film, back intrinsic amorphous silicon thin film, and N-type silicon substrate form a capacitor. The capacitor is positively charged on the side closest to the N-type silicon substrate and negatively charged on the side closest to the P-type amorphous silicon thin film. However, the capacitor as a whole appears electrically neutral to the outside.

[0029] The circuit diagram of the heterojunction battery volt-ampere test is shown in Figure 1, including: constant current source I ph , series resistance Rs, parallel resistance R sh and adjustable external load R load The heterojunction battery has a first diode current I d1 and the second diode current I d2.

[0030] Analysis of multiple test results revealed that the formation of this capacitance can lead to a hysteresis effect, which in turn reduces the accuracy of the heterojunction battery's volt-ampere characteristic curve. This is represented on the coordinates as two volt-ampere characteristic curves of varying heights (see Figure 2).

[0031] Curve A in Figure 2 shows the volt-ampere characteristic curve during the forward sweep, and Curve B shows the volt-ampere characteristic curve during the reverse sweep. The difference between Curves A and B is due to the hysteresis effect caused by capacitance. The true volt-ampere characteristic curve should lie between Curves A and B. Typical solar cell testing methods use a fit between these two curves, an average of them, or a fitted method. The resulting volt-ampere characteristic curve always lies midway between the two curves. During both the forward and reverse sweeps, the load changes with a specific step size. The load is swept from zero to infinity at a corresponding number of points. For example, if 740 points are selected for the sweep, with a step size of 1, the horizontal axis of the volt-ampere characteristic curve is divided equally into 740 parts. With a step size of 1, each part is tested once, resulting in 740 current and voltage data points collected. This translates to the load resistance being divided equally into 740 parts. During the sweep, the current and voltage data are collected every time the load changes by 1 / 740. The forward scan and the reverse scan are tested in this way. Finally, the 1480 collected data are plotted into two volt-ampere characteristic curves for fitting, and the real volt-ampere characteristic curve is obtained.

[0032] Due to the complex film structure of heterojunction cells, the capacitance of heterojunction cells is higher than that of ordinary solar cells. The above measurement method cannot effectively eliminate the hysteresis effect of capacitance. Therefore, how to eliminate the hysteresis effect and improve the test efficiency when testing the volt-ampere characteristic curve of heterojunction cells requires a new perspective.

[0033] The technical concept of this application is:

[0034] Due to the presence of equivalent capacitance in heterojunction cells, this capacitance can cause hysteresis during testing. During the forward scan, some of the excited non-equilibrium carriers charge the capacitor, causing the collected current to be less than the actual current generated. The same problem arises during the reverse scan. During the reverse scan, the capacitor is already fully charged. Illumination generates non-equilibrium carriers, and the current is then collected. The collected current includes not only the current generated by the directional movement of the non-equilibrium carriers excited by the illumination, but also some current released by the capacitor. This means that the collected current is actually higher than the actual current generated. Therefore, the presence of hysteresis can cause the test value to deviate from the actual value. To eliminate this deviation, the measurement time must be increased. However, this increased measurement time significantly reduces the production line test cycle, slowing down the test cadence. To achieve this balance, the test speed should be maintained as much as possible while increasing the measurement time. To this end, we intentionally select the part with the greater influence of the hysteresis effect caused by the capacitor, divide this part, make the size of the divided area correspond to the length of the test time, and increase the measurement time of this part to achieve the purpose of accurately eliminating the hysteresis effect without greatly affecting the test rhythm.

[0035] The following will clearly and completely describe the technical solution of this application in conjunction with the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this application.

[0036] In the description of the present application, the terms “first”, “second” and “third” are used for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0037] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0038] This embodiment provides a testing method for heterojunction batteries, with reference to FIG3 and FIG4 , including:

[0039] Step S1: performing a first forward scan on the heterojunction battery to be tested to obtain a first initial volt-ampere characteristic curve, and performing a reverse scan on the heterojunction battery to be tested to obtain a second initial volt-ampere characteristic curve, wherein the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve do not overlap due to a hysteresis effect of the battery internal capacitance;

[0040] Step S2: The area between the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve constitutes a characteristic region, and the characteristic region is evenly partitioned in a direction perpendicular to the voltage axis;

[0041] Step S3: performing a second forward scan on the heterojunction battery to be tested, zone by zone, according to the zone scan time, to obtain a target volt-ampere characteristic curve; the step of obtaining the zone scan time includes: taking the ratio of the zone area obtained from each partition of the characteristic area to the area of ​​the characteristic area as the zone scan time ratio, and taking the product of the zone scan time ratio and the total scan time of the second forward scan as the zone scan time.

[0042] In this embodiment, step S1 includes: step S11: providing a heterojunction battery to be tested and an adjustable load, and connecting the adjustable load and the heterojunction battery to be tested in parallel; step S12: performing a first forward scan on the heterojunction battery to be tested, and obtaining a first initial volt-ampere characteristic curve A1 as the resistance of the adjustable load gradually increases (refer to Figure 4); performing a reverse scan on the heterojunction battery to be tested, and obtaining a second initial volt-ampere characteristic curve B1 as the resistance of the adjustable load gradually decreases (refer to Figure 4), and the area between the first initial volt-ampere characteristic curve A1 and the second initial volt-ampere characteristic curve B1 is a characteristic area.

[0043] During the first forward scan, the test heterojunction battery absorbs the energy of sunlight to generate directional movement of photogenerated carriers to form a constant current source, changing the resistance of the adjustable load from zero to infinity. Because the test heterojunction battery itself has series resistance and parallel resistance, the series resistance is connected in series with the adjustable load, and the parallel resistance is connected in parallel with the adjustable load. The parallel resistance is relatively large and the series resistance is relatively small. At the beginning, when the adjustable load slowly increases from zero, because the resistance of the adjustable load is small, the current almost flows through the adjustable load instead of the parallel resistance. As the load resistance increases, when it increases to a certain value, the current flows through the adjustable load instead of the parallel resistance. The degree of resistance is even close to or exceeds the parallel resistance. At this time, we have to consider the influence of the parallel resistance of the heterojunction battery to be tested, because the parallel resistance will divide part of the current. At this time, the current passing through the adjustable load becomes less, and the current is decreasing. As the resistance of the adjustable load increases, the voltage across the adjustable load gradually increases. This increase and decrease draws the data on the coordinate axis, with the horizontal axis representing voltage and the vertical axis representing current. A curve will be formed from left to right and gradually bends toward the horizontal axis. This curve is called the first initial volt-ampere characteristic curve A1 of the heterojunction battery to be tested.

[0044] As previously mentioned, the gate electrode, front transparent conductive film, back transparent conductive film, N-type doped amorphous silicon film, P-type doped amorphous silicon film, front intrinsic amorphous silicon film, back intrinsic amorphous silicon film, and N-type silicon substrate in the heterojunction cell form an equivalent capacitor. In the circuit formed by connecting the heterojunction cell under test and an adjustable load, the directional movement of charge generates a current. Due to the repulsion of like charges, the current is maximum at the beginning of the first forward scan and then gradually decreases. The capacitor charge is minimum, reaching zero, at the beginning of the charge movement. During the charge movement process, the capacitor charge gradually increases, and the voltage across the upper and lower plates of the capacitor gradually increases. When the current gradually decreases to zero, the capacitor charging is completed. When the light is removed and the connection between the capacitor and the power supply is disconnected, the capacitor discharges, and the voltage across the plates gradually decreases to zero. This capacitor charging and discharging process introduces errors during the first forward scan. When simulated light is applied to the heterojunction cell under test, it excites non-equilibrium carriers within the cell, namely electrons and holes. Electron carriers, under the influence of the built-in electric field in the PN junction region, migrate toward the N region, forming a current. Hole carriers, under the influence of the built-in electric field, migrate toward the P region. The direction of positive charge movement is defined as the direction of current flow. Therefore, the current generated in the circuit is the sum of the currents generated by the movement of these two excited carriers. However, due to the presence of capacitance in the heterojunction battery under test, some of the excited unbalanced carriers will charge the capacitance, causing the current collected in the first forward scan to be less than the actual current generated.

[0045] The second initial volt-ampere characteristic curve is obtained by performing a reverse scan on the heterojunction battery to be tested, so that the adjustable load does not increase from zero to infinity, but is instead scanned in the opposite direction from infinity to zero. However, the same problem will occur in the reverse scan. Because the capacitor is fully charged by the time of the reverse scan after the first forward scan, light is used to generate non-equilibrium carriers and then the current is collected. At this time, the collected current includes not only the current generated by the directional movement of non-equilibrium carriers excited by light, but also a part of the current released by the capacitor. That is, the current collected by the second initial volt-ampere characteristic curve is actually higher than the actual current generated. In summary, during the first forward scan, since part of the current will charge the capacitor, the collected current is lower than the actual value. During the reverse scan, the capacitor will discharge outward, so the collected current will be higher than the actual value.

[0046] In one embodiment, the test conditions for the first forward scan include: an irradiance of 900 W / m 2 ~1100W / m 2 , for example 1000W / m 2 .

[0047] The test conditions for reverse scanning include: irradiance of 900W / m 2~1100W / m 2 , for example 1000W / m 2 .

[0048] In this embodiment, step S2 includes: dividing the characteristic area into the first zone to the Mth zone, where M is an integer greater than or equal to 2; the boundary between the mth zone and the m+1th zone is perpendicular to the voltage axis of the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve; m is an integer greater than or equal to 1 and less than or equal to M-1, the average voltage corresponding to the mth zone is less than the average voltage corresponding to the m+1th zone, and the interval on the voltage axis from the first zone to the interval on the voltage axis from the Mth zone is equal.

[0049] Referring to FIG4 , M is equal to 6, and the characteristic region is divided into a first region F1, a second region F2, a third region F3, a fourth region F4, a fifth region F5, and a sixth region F6. The boundary between the first region F1 and the second region F2 is perpendicular to the voltage axis of the first and second initial volt-ampere characteristic curves, the boundary between the second region F2 and the third region F3 is perpendicular to the voltage axis of the first and second initial volt-ampere characteristic curves, the boundary between the third region F3 and the fourth region F4 is perpendicular to the voltage axis of the first and second initial volt-ampere characteristic curves, the boundary between the fourth region F4 and the fifth region F5 is perpendicular to the voltage axis of the first and second initial volt-ampere characteristic curves, and the boundary between the fifth region F5 and the sixth region F6 is perpendicular to the voltage axis of the first and second initial volt-ampere characteristic curves. The first region F1, the second region F2, the third region F3, the fourth region F4, the fifth region F5, and the sixth region F6 are equidistant on the voltage axis.

[0050] In one embodiment, M is 700-800, so that the second forward scan is divided into a relatively large number of main test phases, and the time of each main test phase is differentiated to a certain extent, which better eliminates the hysteresis effect caused by the capacitance of the heterojunction battery under test. In one embodiment, the test conditions of the second forward scan include: an irradiance of 900W / m2 to 1100W / m2, for example, 1000W / m2.

[0051] In this embodiment, step S3 includes: step S31: obtaining the respective areas of the first zone to the Mth zone; step S32: performing a second forward scan on the heterojunction battery to be tested, adjusting the resistance of the adjustable load from zero to the upper limit of the adjustable load, and obtaining a target volt-ampere characteristic curve C (refer to Figure 5), the process of the second forward scan is divided into a first main test stage to an Mth main test stage, the resistance change of the adjustable load in any stage from the first main test stage to the Mth main test stage is equal, the proportion of the time of the jth main test stage to the second forward scan time is equal to the proportion of the area of ​​the jth zone to the area of ​​the characteristic region, j is an integer greater than or equal to 1 and less than or equal to M; the total time of the first forward scan and the reverse scan is less than the second forward scan time.

[0052] In this embodiment, the total time of the first forward scan and the reverse scan is less than the time of the second forward scan, thereby shortening the time required to obtain the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve. The second forward scan occupies the majority of the test time. During the second forward scan, the resistance of the adjustable load is adjusted from zero to the upper limit of the adjustable load. The second forward scan is divided into a first main test phase to an Mth main test phase. The resistance change of the adjustable load in any of the first to Mth main test phases is equal. The proportion of the time of the jth main test phase to the second forward scan time is equal to the proportion of the area of ​​the jth region to the area of ​​the characteristic region. Thus, the time of the jth main test phase corresponds to the area of ​​the jth region. This effectively eliminates the hysteresis effect caused by the capacitance of the heterojunction battery under test during the limited second forward scan time, resulting in a more accurate target volt-ampere characteristic curve. Even when the second forward scan time is relatively short, the accuracy of the target volt-ampere characteristic curve is not reduced. This eliminates the hysteresis effect when testing the volt-ampere characteristic curve of the heterojunction battery under test, improving the accuracy of the test data and the test efficiency.

[0053] In one embodiment, the total time of the first forward scan and the reverse scan is 1 / 5-1 / 4 of the time of the second forward scan. The advantage of this setting is that if the total time of the first forward scan and the reverse scan is greater than 1 / 4 of the time of the second forward scan, the total time of the first forward scan and the reverse scan is too long, and the degree of improvement in test efficiency will be reduced; if the total time of the first forward scan and the reverse scan is less than 1 / 5 of the time of the second forward scan, the total time of the first forward scan and the reverse scan is too short, and the accuracy of the obtained feature area is low. In this way, the time of the jth main test stage is obtained according to the ratio of the area of ​​the jth zone to the area of ​​the feature area, resulting in a reduction in the accuracy of the time of the jth main test stage.

[0054] In one embodiment, the total time of the first forward scan and the reverse scan is 10 ms to 12 ms.

[0055] In one embodiment, the second forward scanning time is 50ms-60ms.

[0056] In one embodiment, the resistance of the adjustable load changes at a uniform rate during any j-th main test phase. This reduces the irregularity in the timing of the j-th main test phase caused by the irregular variations in the resistance of the adjustable load, thereby further improving the accuracy of the target volt-ampere characteristic curve. In other embodiments, the resistance of the adjustable load may change at a variable rate during any j-th main test phase.

[0057] In one embodiment, in the first forward scan, the resistance of the adjustable load changes at a uniform speed.

[0058] In one embodiment, during the reverse scan, the resistance of the adjustable load changes at a uniform speed.

[0059] After using the improved heterojunction battery method described in this embodiment, multiple measurements and analysis of the results demonstrated that this method is more accurate than existing transient IV testing methods and faster than steady-state IV testing methods. This method achieves both precise and efficient measurements within a limited timeframe by proportionally increasing the measurement duration in areas with significant hysteresis. This effectively eliminates hysteresis, improving test data accuracy, and simultaneously increasing test efficiency.

[0060] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will readily appreciate that other variations or modifications based on the above descriptions are possible. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of this application.

Claims

1. A method for testing a heterojunction battery, characterized in that: include: Step S1: performing a first forward scan on the heterojunction battery to be tested to obtain a first initial volt-ampere characteristic curve, and performing a reverse scan on the heterojunction battery to be tested to obtain a second initial volt-ampere characteristic curve, wherein the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve do not overlap due to the hysteresis effect of the internal capacitance of the battery; Step S2: the area between the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve constitutes a characteristic region, and the characteristic region is averagely partitioned in a direction perpendicular to the voltage axis; Step S3: performing a second forward scan on the heterojunction battery to be tested region by region according to the region scanning time to obtain a target volt-ampere characteristic curve; wherein: the step of obtaining the region scanning time comprises: taking the ratio of the region area obtained according to each region of the characteristic region to the area of ​​the characteristic region as the region scanning time ratio, and taking the product of the region scanning time ratio and the total scanning time of the second forward scan as the region scanning time; A total time of the first forward scan and the reverse scan is less than the second forward scan time.

2. The method for testing a heterojunction battery according to claim 1, characterized in that: Step S1 includes: Step S11: providing the heterojunction battery to be tested and an adjustable load, and connecting the adjustable load and the heterojunction battery to be tested in parallel; Step S12: performing a first forward scan on the heterojunction battery to be tested, and obtaining the first initial volt-ampere characteristic curve as the resistance value of the adjustable load gradually increases; performing a reverse scan on the heterojunction battery to be tested, and obtaining the second initial volt-ampere characteristic curve as the resistance value of the adjustable load gradually decreases, and the characteristic region is between the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve.

3. The method for testing a heterojunction battery according to claim 2, characterized in that: Step S2 includes: dividing the characteristic area into the first zone to the Mth zone, M is an integer greater than or equal to 2; the boundary between the mth zone and the m+1th zone is perpendicular to the voltage axis of the first initial volt-ampere characteristic curve and the second initial volt-ampere characteristic curve; m is an integer greater than or equal to 1 and less than or equal to M-1, the average voltage corresponding to the mth zone is less than the average voltage corresponding to the m+1th zone, and the interval of the first zone on the voltage axis is equal to the interval of the Mth zone on the voltage axis.

4. The method for testing a heterojunction battery according to claim 3, characterized in that: M is 700-800.

5. The method for testing a heterojunction battery according to claim 3, characterized in that: Step S3 includes: Step S31: acquiring the areas of the first region to the Mth region respectively; Step S32: Perform a second forward scan on the heterojunction battery to be tested, adjust the resistance of the adjustable load from zero to the upper limit of the adjustable load, and obtain the target volt-ampere characteristic curve. The second forward scan process is divided into a first main test stage to an Mth main test stage. The resistance change of the adjustable load in any stage from the first main test stage to the Mth main test stage is equal. The proportion of the time of the jth main test stage to the second forward scan time is equal to the proportion of the area of ​​the jth zone to the area of ​​the characteristic region. j is an integer greater than or equal to 1 and less than or equal to M.

6. The method for testing a heterojunction battery according to claim 5, characterized in that: The resistance value of the adjustable load changes at a uniform rate in any of the j-th main test phases.

7. The method for testing a heterojunction battery according to claim 5, characterized in that: The sum of the first forward scanning time and the reverse scanning time is 1 / 5-1 / 4 of the second forward scanning time.

8. The method for testing a heterojunction battery according to any one of claims 1 to 6, characterized in that: The second forward scanning time is 50ms-60ms.

9. The method for testing a heterojunction battery according to any one of claims 2 to 6, characterized in that: During the first forward scanning process, the resistance value of the adjustable load changes at a uniform speed.

10. The method for testing a heterojunction battery according to any one of claims 2 to 6, characterized in that: During the reverse scanning process, the resistance value of the adjustable load changes at a uniform speed.

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