Vertical resonator-type light-emitting element and light-emitting device

Abstract

The present invention includes: a substrate; a first multilayer film reflector formed on the substrate; a semiconductor structure layer including a first semiconductor layer of a first conductivity type formed on the first multilayer film reflector, a light-emitting layer formed on the first semiconductor layer, and a second semiconductor layer that is of a second conductivity type opposite to the first conductivity type, is formed on the light-emitting layer, has a protruding section protruding upward from the center of an upper surface, and has insulating properties in a part along a region outside of the protruding section on the upper surface; a first insulating layer that has insulating properties and is formed across the side surface of the protruding section of the second semiconductor layer; a conductive film that has light-transmitting properties, is formed so as to cover the upper surface of the second semiconductor layer from the upper surface of the protruding section to the peripheral edge thereof, and is electrically connected to the second semiconductor layer; and a second multilayer film reflector that is formed so as to cover the protruding section on the semiconductor structure layer and constitutes a resonator in the interval between said second multilayer film reflector and the first multilayer film reflector.

Description

Vertical cavity light emitting element and light emitting device

[0001] The present invention relates to a vertical cavity light emitting device and a light emitting device.

[0002] A vertical cavity surface emitting laser (VCSEL) is known as one type of semiconductor laser. For example, Patent Document 1 discloses a vertical cavity surface emitting laser (VCSEL) including a semiconductor structure layer that includes an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer, with a protrusion formed on an upper surface of the p-type semiconductor layer, an insulating layer formed on the upper surface of the p-type semiconductor layer, and a light-transmitting electrode layer that includes the insulating layer and is formed on the upper surface of the p-type semiconductor layer.

[0003] Patent Publication No. 2021-197437

[0004] In the vertical cavity surface emitting laser disclosed in Patent Document 1, for example, if the light-transmitting electrode layer is formed so as to be in direct contact with the side surface of the protruding portion of the p-type semiconductor layer, the side surface will not be a completely non-conductive portion, and therefore, a long-term current will be passed through the side surface of the protruding portion via the light-transmitting electrode layer, which may result in a decrease in the output of light emitted from the vertical cavity surface emitting laser.

[0005] The present invention has been made in consideration of the above-mentioned points, and an object of the present invention is to provide a vertical cavity light emitting device that can maintain stable light output even when power is applied for a long period of time.

[0006] a first multilayer reflector formed on the substrate; a first semiconductor layer having a first conductivity type formed on the first multilayer reflector; a light-emitting layer formed on the first semiconductor layer; and a semiconductor structure layer including a second semiconductor layer formed on the light-emitting layer, the second semiconductor layer having a second conductivity type opposite to the first conductivity type, the second semiconductor layer having a protruding portion protruding upward from the center of an upper surface thereof and an insulating portion along a region of the upper surface outside the protruding portion; a first insulating layer having insulating properties formed over a side surface of the protruding portion of the second semiconductor layer; a light-transmitting conductive film formed so as to cover the upper surface of the second semiconductor layer from the upper surface of the protruding portion to its peripheral portion and electrically connected to the second semiconductor layer; and a second multilayer reflector formed on the semiconductor structure layer to cover the protruding portion and to form a resonator between itself and the first multilayer reflector.

[0007] FIG. 1 is a perspective view of a vertical cavity surface emitting laser according to Example 1; FIG. 2 is a top view of the vertical cavity surface emitting laser according to Example 1; FIG. 3 is a cross-sectional view of the vertical cavity surface emitting laser according to Example 1; FIG. 4 is an enlarged view of a part of the cross section of the vertical cavity surface emitting laser according to Example 1; FIG. 5 is an enlarged view of a part of the cross section of a conventional vertical cavity surface emitting laser; FIG. 6 is a graph showing SIMS analysis results for a p-type semiconductor layer and a light emitting layer; FIG. 7 is a graph showing SIMS analysis results for a p-type semiconductor layer and a light emitting layer; SiO ２ Fig. 1 is a graph showing SIMS analysis results for a layer; Fig. 2 is a diagram showing a part of a method for manufacturing a vertical cavity surface emitting laser according to Example 1; Fig. 3 is a diagram showing a part of a method for manufacturing a vertical cavity surface emitting laser according to Example 1; Fig. 4 is a diagram showing a part of a method for manufacturing a vertical cavity surface emitting laser according to Example 1; Fig. 5 is a diagram showing a part of a method for manufacturing a vertical cavity surface emitting laser according to Example 1; Fig. 6 is a top view of a light emitting device according to Example 2; Fig. 7 is a cross-sectional view of a light emitting device according to Example 2;

[0008] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and the description of the same components will be omitted.

[0009] The configuration of a vertical cavity surface emitting laser 100 (hereinafter referred to as surface emitting laser 100) according to Example 1 will be described with reference to Figures 1 to 4. Figure 1 is a perspective view of the surface emitting laser 100. Figure 2 is a top view of the surface emitting laser 100. Figure 3 is a cross-sectional view of the surface emitting laser 100 shown in Figure 2 taken along line 3-3, and Figure 4 is an enlarged view of part A in Figure 3. In Figure 3, the up-down direction corresponds to the height direction of the surface emitting laser 100.

[0010] The substrate 11 is a flat, transparent substrate with a rectangular upper surface. The substrate 11 is a growth substrate on which a semiconductor crystal can be grown. The substrate 11 is made of a material that is transparent to light having a blue wavelength, such as undoped gallium nitride (GaN). In the following description, an axis that passes through the center of the upper surface of the substrate 11 and is perpendicular to the upper surface is referred to as a central axis CA.

[0011] The first multilayer reflector 12 is a semiconductor multilayer reflector made up of semiconductor layers grown on the substrate 11. The first multilayer reflector 12 is a so-called distributed Bragg reflector (DBR) in which high-refractive-index semiconductor films with a relatively high refractive index and low-refractive-index semiconductor films with a refractive index lower than that of the high-refractive-index semiconductor films are alternately stacked on the upper surface of the substrate 11.

[0012] The first multilayer reflector 12 is formed by stacking, for example, 42 pairs of high-refractive-index semiconductor films made of GaN and low-refractive-index semiconductor films made of indium aluminum nitride (AlInN) on the upper surface of the substrate 11. With this configuration, the first multilayer reflector 12 is reflective to light in the blue wavelength range. A buffer layer (not shown) made of GaN is provided between the substrate 11 and the first multilayer reflector 12.

[0013] The semiconductor structure layer EM is a laminated structure made up of a plurality of semiconductor layers formed on the first multilayer reflector 12. The semiconductor structure layer EM has an n-type semiconductor layer 13 formed on the first multilayer reflector 12, a light-emitting layer 14 formed on the n-type semiconductor layer 13, and a p-type semiconductor layer 15 formed on the light-emitting layer 14.

[0014] The structures of the n-type semiconductor layer 13, the light emitting layer 14, and the p-type semiconductor layer 15 that constitute the semiconductor structure layer EM will be described below.

[0015] The n-type semiconductor layer 13 as a first semiconductor layer having a first conductivity type is a semiconductor layer formed over the upper surface of the first multilayer film reflector 12. The n-type semiconductor layer 13 is made of GaN and is doped with silicon (Si) as an n-type impurity.

[0016] The n-type semiconductor layer 13 has a so-called mesa-shaped structure consisting of a flat lower portion 13A and a cylindrical upper portion 13B protruding upward from the center of the lower portion 13A along a central axis CA (see FIGS. 1 and 3).

[0017] The light-emitting layer 14 is formed over the upper portion 13B of the n-type semiconductor layer 13 and is a semiconductor layer having a quantum well structure in which well layers made of InGaN and barrier layers made of GaN are stacked one on top of the other. The light-emitting layer 14 is formed so that its light-emitting center is positioned on the central axis CA. The light-emitting layer 14 emits blue light having a peak wavelength of, for example, 450 nm.

[0018] The p-type semiconductor layer 15, which serves as a second semiconductor layer having a second conductivity type, is a semiconductor layer formed over the upper surface of the light emitting layer 14. The p-type semiconductor layer 15 includes a p-type GaN layer doped with p-type impurities and a p-type AlGaN layer doped with p-type impurities. The p-type AlGaN layer is formed between the light emitting layer 14 and the p-type GaN layer and functions as an electron blocking layer. Note that an undoped GaN layer may be formed between the light emitting layer 14 and the p-type AlGaN layer to prevent diffusion of p-type impurities from the p-type AlGaN layer into the light emitting layer 14.

[0019] The p-type semiconductor layer 15 has, on its upper surface, a protruding portion 15P1 that has a circular upper surface shape and protrudes upward through the central axis CA (see FIG. 3 ). In other words, the p-type semiconductor layer 15 has a first region 15R1 that is a region that passes through the central axis CA, and an annular second region 15R2 that is a region on the periphery of the first region 15R1 and is recessed downward relative to the first region 15R1.

[0020] Furthermore, the p-type semiconductor layer 15 has, on its upper surface, a peripheral portion 15P2 that has an annular upper surface shape and protrudes above the second region 15R2 along the outer edge of the p-type semiconductor layer 15. In other words, the p-type semiconductor layer 15 has a third region 15R3 that is a region on the periphery of the second region 15R2 and protrudes above the second region 15R2. That is, the p-type semiconductor layer 15 has, on its upper surface, a recess that surrounds the protruding portion 15P1 and has the second region 15R2 as its bottom.

[0021] In the p-type semiconductor layer 15, the second region 15R2, the side surface 15S1 of the protruding portion 15P1 (hereinafter also simply referred to as the side surface 15S1), and the side surface 15S2 of the outer peripheral portion 15P2 (hereinafter also simply referred to as the side surface 15S2) are each a region in which the p-type impurity (Mg) doped into the p-type semiconductor layer 15 is electrically inactivated (see Figures 3 and 4).

[0022] The second region 15R2, the side surface 15S1, and the side surface 15S2 are each formed, for example, by dry etching the upper surface of the flat p-type semiconductor layer so as to leave regions corresponding to the first region 15R1 and the third region 15R3.

[0023] In the p-type semiconductor layer 15 before the protrusion 15P1 is formed, i.e., before dry etching, the p-type impurities in the upper surface of the p-type semiconductor layer 15 are in an electrically activated state. On the other hand, in the p-type semiconductor layer 15 after dry etching, the p-type impurities in the second region 15R2 and the side surface 15S1 and the side surface 15S2 are in an electrically inactive state due to etching damage.

[0024] Therefore, the second region 15R2, the side surface 15S1, and the side surface 15S2 each function as a high-resistance region having a higher electrical resistance than the first region 15R1. In particular, the second region 15R2 functions as a non-conductive region through which electricity hardly passes, compared to the side surface 15S1 and the side surface 15S2.

[0025] In addition, the first region 15R1 and the third region 15R3, which are regions of the upper surface of the p-type semiconductor layer 15 that have not been dry-etched, function as low-resistance regions having lower electrical resistance than the second region 15R2, the side surface 15S1, and the side surface 15S2.

[0026] The first insulating layer 18 is a transparent, electrically insulating coating layer formed over the side surface 15S1 of the protrusion 15P1 and covering the edge of the first region 15R1. The first insulating layer 18 is made of a non-oxide material, such as silicon nitride (SiN), that has a refractive index similar to that of the conductive film 21 described below.

[0027] The second insulating layer 19 is a transparent coating layer having electrical insulation properties and formed to cover the third region 15R3 and the side surface 15S2 of the outer peripheral portion 15P2. The second insulating layer 19 is formed to provide an inclined surface from the third region 15R3 to the second region 15R2. The second insulating layer 19 is formed on the upper surface of the p-type semiconductor layer 15, spaced apart from the first insulating layer 18. The second insulating layer 19 is made of, for example, silicon dioxide (SiO ２ )

[0028] The second insulating layer 19 may be formed from the outer edge of the peripheral portion 15P2 to the side surfaces of the p-type semiconductor layer 15, the light-emitting layer 14, and the upper portion 13B of the n-type semiconductor layer 13, or may be formed to reach the upper surface of the lower portion 13A of the n-type semiconductor layer 13.

[0029] The conductive film 21 is a light-transmitting conductive film that is formed to cover the upper surface of the p-type semiconductor layer 15 from the first region 15R1 to the third region 15R3 and is electrically connected to the p-type semiconductor layer 15. The conductive film 21 is formed on the p-type semiconductor layer 15 to cover the first insulating layer 18 and the second insulating layer 19.

[0030] The conductive film 21 is made of a metal oxide, such as indium tin oxide (ITO) or indium zinc oxide (IZO), that is translucent to the blue light emitted from the light emitting layer 14 of the semiconductor structure layer EM described above.

[0031] The conductive film 21 is formed to have an inclined surface that follows the inclined surface of the second insulating layer 19. By forming the conductive film 21 in this manner, it is expected that the durability against cracks and the like during long-term use will be improved compared to when the conductive film 21 is simply formed in a flat plate shape.

[0032] As described above, the conductive film 21 is formed to cover the first insulating layer 18 formed on the side surface 15S1 and the second insulating layer 19 formed on the third region 15R3 and side surface 15S2. Therefore, the conductive film 21 is electrically insulated from each of the side surface 15S1, the third region 15R3, and the side surface 15S2. Furthermore, the second region 15R2 has a high resistance due to etching damage, making it difficult for a current to flow through the conductive film 21. Therefore, on the upper surface of the p-type semiconductor layer 15, only the first region 15R1, which is the upper surface of the protruding portion 15P1, is electrically connected to the conductive film 21.

[0033] The n-electrode NE as a first electrode is provided on the upper surface of the lower portion 13A of the n-type semiconductor layer 13, and is a metal electrode with a ring-shaped upper surface that is electrically connected to the n-type semiconductor layer 13. The n-electrode NE is formed to surround the upper portion 13B of the n-type semiconductor layer 13 while being spaced apart from the upper portion 13B in a plan view of the surface-emitting laser 100 from above. The n-electrode NE is formed, for example, by laminating titanium (Ti) and aluminum (Al) in this order on the upper surface of the lower portion 13A.

[0034] The p-electrode PE as the second electrode is formed along the outer edge of the upper surface of the conductive film 21 so as to surround the first region 15R1 in a plan view of the surface-emitting laser 100 from above, and is a metal electrode with a ring-shaped upper surface that is electrically connected to the conductive film 21. The p-electrode PE is made of, for example, gold (Au).

[0035] The second multilayer reflector 23 is a cylindrical dielectric multilayer reflector made of a dielectric layer formed on the upper surface of the conductive film 21. The second multilayer reflector 23 is formed to cover the first region 15R1 while being spaced apart from the p-electrode PE in a plan view of the surface-emitting laser 100 from above.

[0036] The second multilayer film reflector 23 is a so-called distributed Bragg reflector (DBR) in which high-refractive-index semiconductor films with a relatively high refractive index and low-refractive-index semiconductor films with a lower refractive index than the high-refractive-index semiconductor films are alternately stacked on the upper surface of the conductive film 21.

[0037] The second multilayer reflector 23 is made of, for example, niobium pentoxide (Nb ２ O ５ ) and a high refractive index dielectric film made of SiO ２ The second multilayer film reflector 23 has a reflectivity for the blue light emitted from the light emitting layer 14.

[0038] A transparent dielectric layer (not shown) having a circular top surface may be formed as a phase adjustment layer between the second multilayer reflector 23 and the conductive film 21. The dielectric layer may be made of, for example, Nb ２ O ５ , tantalum pentoxide (Ta ２ O ５ ), zinc oxide (ZrO ２ ), titanium oxide (TiO ２ ), hafnium oxide (HfO ２ ) etc.

[0039] In the surface-emitting laser 100, the lower surface of the second multilayer reflector 23 faces the upper surface of the first multilayer reflector 12, with the conductive film 21, the first insulating layer 18, and the semiconductor structure layer EM sandwiched therebetween. As a result, the first multilayer reflector 12 and the second multilayer reflector 23 form a resonator OC between the first multilayer reflector 12 and the second multilayer reflector 23, with the resonator length direction being perpendicular to the semiconductor structure layer EM (perpendicular to the substrate 11).

[0040] In the surface-emitting laser 100, the reflectance of the first multilayer reflector 12 for blue light is slightly lower than the reflectance of the second multilayer reflector 23 for blue light. Therefore, part of the blue light resonating in the resonator OC passes through the first multilayer reflector 12 and the substrate 11 and is extracted to the outside. That is, the light resonating between the first multilayer reflector 12 and the second multilayer reflector 23 is emitted downward in FIG. 3 .

[0041] The lower surface of the substrate 11 is covered with Nb ２ O ５ and SiO ２ The anti-reflection film (not shown) is formed by laminating the above-mentioned anti-reflection layer 11 and the above-mentioned anti-reflection layer 11. The anti-reflection film is a so-called AR coat that suppresses the blue light emitted from the substrate 11 from being reflected upward in FIG.

[0042] Here, we will explain the operation and optical characteristics of the surface-emitting laser 100. When a voltage is applied to the n-electrode NE and p-electrode PE described above and a current flows between the n-electrode NE and the p-electrode PE, the current flows in the light-emitting layer 14 of the semiconductor structure layer EM as shown by the thick dashed-dotted arrow in Figure 3, and when the current reaches a predetermined current value, which is a threshold current, the intensity of the blue light emitted from the light-emitting layer 14 increases rapidly.

[0043] The blue light emitted from the light-emitting layer 14 when the threshold current is reached is repeatedly reflected between the first multilayer film reflector 12 and the second multilayer film reflector 23, i.e., in the resonator OC, and reaches a resonance state (i.e., laser oscillation occurs).

[0044] At this time, in the p-type semiconductor layer 15, most of the current flowing from the p-electrode PE to the conductive film 21 flows to the n-electrode NE via the first region 15R1, which is a low-resistance region. Therefore, in the surface-emitting laser 100, current is supplied to the light-emitting layer 14 via the first region 15R1, and blue light is emitted from the first region 15R1 along the central axis CA. That is, in the surface-emitting laser 100, the protruding portion 15P1 of the p-type semiconductor layer 15 functions as a current constriction portion that limits the current supply range so that the current does not spread any further.

[0045] As described above, the blue light emitted from the light-emitting layer 14 and resonated within the resonator OC is partially extracted to the outside after passing through the first multilayer reflector 12 and the substrate 11 because the optical reflectance of the first multilayer reflector 12 is lower than the optical reflectance of the second multilayer reflector 23. In other words, the lower surface of the substrate 11 serves as the light-emitting surface of the surface-emitting laser 100.

[0046] Within the resonator OC of the surface-emitting laser 100, the thickness from the lower surface to the upper surface of the p-type semiconductor layer 15 is thicker by the protruding portion 15P1 than the thickness from the lower surface of the p-type semiconductor layer 15 to the second region 15R2. Therefore, the equivalent refractive index within the resonator OC of the surface-emitting laser 100 differs between the cylindrical central region including the protruding portion 15P1 of the p-type semiconductor layer 15 and the cylindrical peripheral region therearound, and the equivalent refractive index in the central region is greater than the equivalent refractive index in the peripheral region.

[0047] In the surface-emitting laser 100, the resonator OC is configured in this manner, which suppresses optical loss caused by the standing wave in the central region diverging (radiating) to the peripheral regions. In other words, most of the light remains in the central region, and the laser light is extracted to the outside in this state.

[0048] Therefore, a large amount of light emitted from the light-emitting layer 14 is concentrated in the central region around the central axis CA of the resonator OC, thereby generating and emitting high-power, high-density laser light. In other words, the transverse mode (intensity distribution in the transverse cross section of the laser beam) of the laser light emitted from the surface-emitting laser 100 can be stabilized.

[0049] Furthermore, the conductive film 21 has a conductive film protrusion 21P with a flat upper surface on the protrusion 15P1 of the p-type semiconductor layer. The area of ​​the upper surface of the conductive film protrusion 21P is preferably larger than the area of ​​the first region 15R1. This allows the second multilayer film reflector 23 formed on the upper surface of the conductive film protrusion 21P to be formed substantially parallel to the upper surface of the protrusion 15P1 (first region 15R1), thereby suppressing loss during resonance in the resonator OC.

[0050] [Suppression of Reduction in Optical Output of Surface-Emitting Laser 100] Hereinafter, suppression of reduction in optical output of the surface-emitting laser 100 in this embodiment will be described with reference to FIGS.

[0051] In the surface-emitting laser 100 of this embodiment, as described above, the side surface 15S1 of the protrusion 15P1 is insulated from the conductive film 21 by the first insulating layer 18, the second region 15R2 functions as a non-conductive region, and the third region 15R3 and the side surface 15S2 are insulated from the conductive film 21 by the second insulating layer 19. That is, in the surface-emitting laser 100 of this embodiment, almost no current flows from the conductive film 21 to the second region 15R2, the side surface 15S1, the third region 15R3, and the side surface 15S2.

[0052] Therefore, when a voltage is applied to the n-electrode NE and the p-electrode PE and a current flows between the n-electrode NE and the p-electrode PE, the current flowing in the conductive film 21 flows along the in-plane direction of the upper surface of the p-type semiconductor layer 15 within the conductive film 21 as shown in FIG. 4, passes through the first region 15R1, which is a low-resistance region, and progresses into the p-type semiconductor layer 15, and heads toward the n-electrode NE.

[0053] Here, the flow of current when energized in a conventional surface-emitting laser will be described with reference to Fig. 5. Fig. 5 is an enlarged view of a cross section of the conventional surface-emitting laser at a location similar to part A in the cross section of the surface-emitting laser 100 shown in Fig. 3. The conventional surface-emitting laser differs from the surface-emitting laser 100 in that the first insulating layer 18 is not formed on the side surface 15S1, but is otherwise the same as the surface-emitting laser 100.

[0054] During the formation of the protruding portion 15P1 of the p-type semiconductor layer 15, the side surface 15S1 of the protruding portion 15P1 may be less damaged by etching than the second region 15R2, which is the bottom surface of the etching, due to factors such as the etching conditions and environment. In this case, the side surface 15S1 does not become a completely non-conductive portion but becomes a conductive portion with high resistance.

[0055] Therefore, if the first insulating layer 18 is not formed on the side surface 15S1 of the protrusion 15P1 as in the conventional example, that is, if the conductive film 21 is in direct contact with the side surface 15S1, and the side surface 15S1 becomes a high-resistance conductive portion, the current flowing in the conductive film 21 will flow not only to the first region 15R1 but also to the side surface 15S1.

[0056] In this case, if current is passed through the originally highly resistive side 15S1 for a long period of time, the resistance of the side 15S1 will become even higher, and for example, as shown in Figure 5, part of the current flowing in the conductive film 21 may be concentrated at the corner 15C, which is a high-resistance portion formed by the side 15S1 and the second region 15R2.

[0057] If the current concentrates at the corner 15C as described above, the efficiency of current injection into the light-emitting layer 14 may decrease, resulting in a phenomenon in which the optical output power obtained from the surface-emitting laser 100 decreases. That is, when the surface-emitting laser is energized, the current is supposed to flow only through the first region 15R1, but the current also flows through portions having a higher resistance than the first region 15R1, which leads to current loss and may result in a decrease in the optical output power.

[0058] In the surface-emitting laser 100 of this embodiment, as described above, the side surface 15S1 and corner portion 15C of the protrusion 15P1 are covered with the first insulating layer 18, and therefore the side surface 15S1 and corner portion 15C are insulated from the conductive film 21. Therefore, according to the surface-emitting laser 100, as shown in FIG. 4 , the current flowing in the conductive film 21 flows only through the first region 15R1, which is a low-resistance region, and therefore it is possible to prevent a decrease in the optical output of the surface-emitting laser 100.

[0059] Furthermore, in the surface-emitting laser 100, if only the second insulating layer 19 is formed from the side surface 15S1 of the protrusion 15P1 to the third region 15R3, that is, if the second insulating layer 19 is in direct contact with the side surface 15S1, a phenomenon may occur in which the efficiency of current injection into the light-emitting layer 14 decreases if current is passed through for a long period of time.

[0060] Specifically, since second insulating layer 19, which is an oxide, is formed and contains hydrogen during its formation, if current is passed through second insulating layer 19 for a long period of time while it is in direct contact with side surface 15S1, residual hydrogen in second insulating layer 19 may diffuse into protruding portion 15P1 via side surface 15S1. This may result in an increase in electrical resistance within protruding portion 15P1, reducing the efficiency of current injection into light-emitting layer 14.

[0061] 6A to 6C, the hydrogen concentration in the p-type semiconductor layer when residual hydrogen in second insulating layer 19 diffuses into the p-type semiconductor layer will be described. Each of Figures 6A to 6C is a graph showing the results of measuring the concentration of each element in the depth direction (thickness direction) of each of the samples described below by SIMS (Secondary Ion Mass Spectrometry) analysis.

[0062] FIG. 6A shows a GaN substrate directly coated with SiO ２ Using a sample on which a layer was formed, the concentration profiles of hydrogen (solid line), oxygen (dashed line), silicon (dotted line), and gallium (dash-dotted line) in the depth direction are shown, with the top surface of the sample being the reference (0 nm).

[0063] In FIG. 6A, the region indicated by the two-dot chain line is SiO ２ The area indicated by the dashed line in FIG. 6A shows the concentration in the layer, and the area indicated by the dashed line in FIG. 6B shows the concentration in the substrate. ２ SiO when the layer was formed ２ The hydrogen concentration in the layer is 1×10 21 ~2 x 10 21 atoms / cm ３ That is, the degree of SiO ２ As a single layer, 1 x 10 21 atoms / cm ３ It can be seen that the hydrogen concentration is equal to or higher than this.

[0064] FIG. 6B shows a SiO layer corresponding to the light emitting layer 14, the p-type semiconductor layer 15, and the second insulating layer 19. ２Using a sample in which the layers were formed in this order and then heat-treated, the concentration profiles of hydrogen (solid line), aluminum (dashed line), and indium (dotted line) in the depth direction are shown, with the top surface of the p-type semiconductor layer 15 set as the reference (0 nm).

[0065] 6B, the region indicated by the two-dot chain line indicates the concentration in the p-type semiconductor layer 15, and the region indicated by the one-dot chain line indicates the concentration in the light-emitting layer 14. From FIG. 6B, it can be seen that the hydrogen concentration in the p-type semiconductor layer 15 is about 2×10 １９ atoms / cm ３ It can be seen that the above is shown.

[0066] 6C shows the concentration profiles of hydrogen (solid line), aluminum (dashed line), and indium (dotted line) in the depth direction when the top surface of p-type semiconductor layer 15 is set as the reference (0 nm) using a sample in which light-emitting layer 14 and p-type semiconductor layer 15 are formed in this order. Note that in the figure, an undoped layer (not shown) made of GaN is formed between the light-emitting layer and the p-type semiconductor layer.

[0067] 6C, the region indicated by the two-dot chain line indicates the concentration in the p-type semiconductor layer 15, and the region indicated by the one-dot chain line indicates the concentration in the light-emitting layer 14. From FIG. 6C, it can be seen that the hydrogen concentration in the p-type semiconductor layer 15 is about 1×10 １６ atoms / cm ３ It is understood that the high concentration of hydrogen present in the film thickness of 0 to 20 nm is considered to be due to the influence of impurities (contamination) that have adhered to or been mixed into the p-type semiconductor layer 15.

[0068] The difference in hydrogen concentration between FIG. 6B and FIG. 6C indicates that SiO 2 is present on the p-type semiconductor layer 15. ２ When the layer was formed, SiO ２ It is thought that hydrogen contained in the layer has moved into the p-type semiconductor layer 15 due to diffusion or the like. As a result, for example, the hydrogen that has moved into the p-type semiconductor layer 15 may bond with Mg, which is a dopant in the p-type semiconductor layer 15, and inactivate the Mg, which may increase the electrical resistance in the protrusion 15P1. As a result, the efficiency of current injection into the light-emitting layer 14 may decrease.

[0069] In the surface-emitting laser 100, the first insulating layer 18 formed on the protruding portion 15P1 is made of a material that does not contain hydrogen, such as SiN, which is a nitride. ２ Therefore, the surface-emitting laser 100 of this embodiment can prevent a decrease in the efficiency of current injection into the light-emitting layer 14 even when the surface-emitting laser 100 is energized for a long period of time.

[0070] Therefore, according to the surface-emitting laser 100 of this embodiment, it is possible to prevent a decrease in the optical output of the surface-emitting laser 100 even when power is supplied for a long period of time. Therefore, according to the surface-emitting laser 100 of this embodiment, the optical output of the laser light emitted from the surface-emitting laser 100 can be stably maintained.

[0071] The average hydrogen concentration in the p-type semiconductor layer 15 as a whole is about 2×10 １８ atoms / cm ３ It is preferable that the area of ​​the second insulating layer 19 present on the upper surface of the second region 15R2 is, for example, 40% or less of the area of ​​the second region 15R2. This makes it possible to achieve insulation against the current flowing from the p-electrode PE while suppressing an increase in electrical resistance due to excessive diffusion of hydrogen into the p-type semiconductor layer 15.

[0072] As described above, the first insulating layer 18 has a refractive index equivalent to that of the conductive film 21, and the refractive index of the first insulating layer 18 is preferably within 10% of the refractive index of the conductive film 21. For example, the refractive index of the conductive film 21 made of ITO is approximately 2.1, and the refractive index of the first insulating layer 18 made of SiN is approximately 2.0.

[0073] In the surface-emitting laser 100, as described above, the transverse mode of the laser light is controlled by adjusting the equivalent refractive index in the resonator OC by providing the protrusion 15P1 in the p-type semiconductor layer 15. Therefore, by using the first insulating layer 18, which has a refractive index as close as possible to that of the conductive film 21, as the insulating layer covering the side surface 15S1, it is possible to control the transverse mode without reducing the current injection efficiency.

[0074] In this embodiment, the upper surface of the p-type semiconductor layer 15 has been described as having the outer peripheral portion 15P2, but the outer peripheral portion 15P2 may not be provided, and the second region 15R2 may be formed up to the outer edge of the p-type semiconductor layer 15. That is, the entire upper surface of the p-type semiconductor layer 15 except for the first region 15R1 may be etched (inactivated).

[0075] Furthermore, when the second region 15R2 is formed up to the outer edge of the p-type semiconductor layer 15 as described above, the entire region other than the first region 15R1 becomes a non-conductive portion, and therefore it is not necessary to form the second insulating layer 19. In this case, the first insulating layer 18 may be formed over the second region 15R2 while covering the side surface 15S1.

[0076] In this embodiment, the first insulating layer 18 is described as covering the outer edge of the first region 15R1 and the side surface 15S1 of the protrusion 15P1, but it is sufficient that it covers only the side surface 15S1, and it does not have to be formed on the outer edge of the first region 15R1.

[0077] In this embodiment, the first insulating layer 18 and the second insulating layer 19 are described as being formed apart from each other on the upper surface of the p-type semiconductor layer 15, but it is sufficient that the first insulating layer 18 covers the side surface 15S1, and the first insulating layer 18 may be in contact with the second insulating layer 19. In other words, the second insulating layer 19 may cover most of the second region 15R2.

[0078] [Method of forming first insulating layer 18 and second insulating layer 19] Below, using Figures 7 to 10, a method of forming first insulating layer 18 and second insulating layer 19 on p-type semiconductor layer 15 of semiconductor structure layer EM formed by the above-mentioned dry etching will be described.

[0079] First, as shown in FIG. 7 , a lift-off resist R is formed by patterning on the upper surface of the lower portion 13A of the n-type semiconductor layer 13, on the upper surface of the p-type semiconductor layer 15 in a region excluding the edge of the first region 15R1, and on the second region 15R2 and the third region 15R3, and an insulating layer made of SiN is formed by vapor deposition, sputtering, or the like.

[0080] Next, the resist R formed on the upper surface of the lower portion 13A of the n-type semiconductor layer 13, the region of the upper surface of the p-type semiconductor layer 15 excluding the edge of the first region 15R1, the second region 15R2, and the third region 15R3 is removed by lift-off, thereby forming a first insulating layer 18 that covers the edge and side surface 15S1 of the first region 15R1, as shown in FIG. 8 .

[0081] Next, as shown in FIG. 9, a lift-off resist R is formed by patterning in the first region 15R1 and the region excluding the edge of the second region 15R2 on the side surface 15S2 side, and SiO ２ An insulating layer made of

[0082] Next, the resist R formed in the area excluding the first region 15R1 and the edge of the second region 15R2 on the side surface 15S2 side is removed by lift-off, thereby forming a second insulating layer 19 covering the third region 15R3 to the side surface 15S2 of the outer peripheral portion 15P2, as shown in FIG. 10.

[0083] Thereafter, as shown in FIG. 3, a conductive film 21 and a second multilayer film reflector 23 are formed on the upper surface of the p-type semiconductor layer 15, and an n-electrode NE is formed on the lower portion 13A of the n-type semiconductor layer 13, and a p-electrode PE is formed on the upper surface of the conductive film 21, thereby obtaining the surface-emitting laser 100 in this embodiment.

[0084] In this embodiment, the p-type impurities are deactivated by dry etching of the p-type semiconductor layer, but the deactivation method is not limited to dry etching. For example, the p-type impurities may be deactivated by ion implantation after slightly removing the surface of the p-type semiconductor layer, or by ashing.

[0085] Next, a light emitting device according to Example 2 will be described with reference to Figures 11 and 12. Figure 11 is a top view of light emitting device 200, and Figure 12 is a cross-sectional view of light emitting device 200 taken along line 12-12 in Figure 11. Note that in Figure 12, the vertical direction corresponds to the height direction of light emitting device 200.

[0086] The light emitting device 200 is obtained by flip-chip mounting and packaging the surface emitting laser 100 according to the first embodiment on a mounting substrate 31. The light emitting device 200 includes the mounting substrate 31 on which the surface emitting laser 100 is mounted, a frame 37, and a light-transmitting plate 41. The configuration of the surface emitting laser 100 is the same as that of the first embodiment except for the shape of the p-electrode PE.

[0087] The mounting substrate 31 is a plate-like body having a rectangular upper surface. The mounting substrate 31 is made of ceramic such as aluminum nitride (AlN) or aluminum oxide (Al ２ O ３ The insulating material is made of silicon (Si), silicon carbide (SiC), or the like.

[0088] The mounting substrate 31 is formed with through electrodes 32 and 33 that vertically penetrate the mounting substrate 31. The through electrodes 32 and 33 are insulated from each other by being formed spaced apart from each other on the mounting substrate 31. The through electrodes 32 and 33 are made of, for example, gold (Au).

[0089] In the light-emitting device 200, the surface-emitting laser 100 is flip-chip mounted on the upper surface of the mounting substrate 31 as described above. Specifically, in the surface-emitting laser 100, the n-electrode NE is bonded to the through electrode 32 of the mounting substrate 31 via an n-electrode bonding member 34 made of Au and extending downward in the figure, and a bonding member 35 made of Au-Sn eutectic bonding.

[0090] In addition, in the surface-emitting laser 100, the p-electrode PE extends downward in the figure so that the height from the top surface of the n-electrode bonding member 34 and the mounting substrate 31 is aligned, and is bonded to the through electrode 33 of the mounting substrate 31 via a bonding member 35.

[0091] The frame 37 is formed along the outer edge of the upper surface of the mounting substrate 31, and has an opening 37O that exposes the upper surface of the mounting substrate 31 and the surface-emitting laser 100 mounted on the upper surface of the mounting substrate 31. In other words, in a plan view of the light-emitting device 200 seen from above, the frame 37 surrounds the surface-emitting laser 100 on the mounting substrate 31. The frame 37 is made of a material such as ceramic, e.g., AlN, or Al, similar to the mounting substrate 31. ２ O３ The insulating material is made of silicon, silicon carbide, or the like.

[0092] The light-transmitting plate 41 is a transparent plate-like body with a rectangular upper surface. The lower surface of the light-transmitting plate 41 is joined to the frame 37 via a metal layer 42 made of Au formed on the upper surface of the frame 37 and the joining member 35. In other words, the light-transmitting plate 41 is held by the frame 37 so as to cover the surface-emitting laser 100. The light-transmitting plate 41 is made of a material that is translucent to the light emitted from the surface-emitting laser 100, such as borosilicate glass.

[0093] In the light-emitting device 200, light emitted from the surface-emitting laser 100 passes through the light-transmitting plate 41 and is emitted to the outside of the light-emitting device 200. That is, in this embodiment, the upper surface of the light-transmitting plate 41 is the light-emitting surface of the light-emitting device 200.

[0094] In the light emitting device 200 of this embodiment, as in Example 1, it is possible to prevent the optical output of the surface emitting laser 100 from decreasing even when power is supplied for a long period of time. Therefore, according to the light emitting device 200 of this embodiment, the optical output of the laser light emitted from the light emitting device 200 can be stably maintained.

[0095] REFERENCE SIGNS LIST 100 Surface-emitting laser (vertical cavity light-emitting element) 200 Light-emitting device 11 Substrate 12 First multilayer reflector 13 n-type semiconductor layer 14 Light-emitting layer 15 P-type semiconductor layer 18 First insulating layer 19 Second insulating layer 21 Conductive film 23 Second multilayer reflector 31 Mounting substrate 32, 33 Through electrode 34 N-electrode bonding member 35 Bonding member 37 Frame 41 Translucent plate 42 Metal layer NE n-electrode PE p-electrode

Claims

a semiconductor structure layer including: a first semiconductor layer having a first conductivity type formed on the first multilayer reflector, a light-emitting layer formed on the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type formed on the light-emitting layer, the second semiconductor layer having a protruding portion protruding upward from the center of an upper surface and having insulating properties along a region of the upper surface outside the protruding portion; a first insulating layer having insulating properties formed over side surfaces of the protruding portion of the second semiconductor layer; a light-transmitting conductive film formed so as to cover the upper surface of the second semiconductor layer from the upper surface of the protruding portion to its peripheral portion and being electrically connected to the second semiconductor layer; and a second multilayer reflector formed on the semiconductor structure layer covering the protruding portion and constituting a resonator between itself and the first multilayer reflector.

2. The vertical cavity light emitting device according to claim 1, wherein said first insulating layer is made of a non-oxide.

3. The vertical cavity light emitting device according to claim 1 or 2, wherein the first insulating layer has a refractive index close to that of the conductive film.

4. The vertical cavity light emitting device according to claim 3, wherein the conductive film is made of ITO, and the first insulating layer is made of SiN.

5. The vertical cavity light emitting device according to claim 1 or 2, wherein the side surface of said protrusion is a surface formed by etching the upper surface of said second semiconductor layer.

6. A vertical cavity light emitting device as described in claim 1 or 2, characterized in that it has a second insulating layer having electrical insulation properties formed at a distance from the first insulating layer in the outer region of the upper surface of the second semiconductor layer.

7. The second insulating layer is SiO ２ 7. The vertical cavity light emitting device according to claim 6, comprising:

8. A light emitting device comprising: the vertical resonator type light emitting element according to claim 1, having a first electrode formed on the first semiconductor layer and a second electrode formed on the conductive film; a mounting substrate electrically connected to the first electrode and the second electrode; a frame formed on the mounting substrate and surrounding the vertical resonator type light emitting element on the mounting substrate; and a light-transmitting plate held by the frame so as to cover the vertical resonator type light emitting element.

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