Substrate processing method, substrate processing apparatus, and hard mask

The substrate processing method and apparatus utilize an amorphous WSiN hard mask with specific composition to address the consumption and stability issues in resist masks during plasma etching, achieving high resistance and precise etching in silicon-containing films.

WO2025009469A1PCT designated stage expired Publication Date: 2025-01-09TOKYO ELECTRON LTD

Patent Information

Application Number
PCT/JP2024/023403
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-05
Filing Date
2024-06-27
Publication Date
2025-01-09

AI Technical Summary

Technical Problem

In the manufacturing of electronic devices, particularly semiconductor devices, the resist masks used in plasma etching of silicon-containing films are heavily consumed, leading to instability in forming deep openings, which is addressed by employing hard masks like tungsten silicide or titanium nitride, but these masks have limitations in resistance to plasma etching and can cause warping due to film stress.

Method used

A substrate processing method and apparatus that forms an amorphous hard mask composed of tungsten, silicon, and nitrogen (WSiN) with specific atomic concentration ratios, which is more resistant to plasma etching and reduces film stress, allowing for stable etched shapes and improved selectivity between the hard mask and the base film.

Benefits of technology

The amorphous WSiN hard mask provides high resistance to plasma etching, maintaining shape integrity and reducing the thickness of the hard mask, thereby minimizing warping and enhancing etching selectivity, resulting in more precise and stable opening formations in silicon-containing films.

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Patent Text Reader

Abstract

Provided are a substrate processing method, a substrate processing apparatus, and a hard mask with which it is possible to obtain a stable etched shape. The substrate processing method includes a step for preparing a substrate having a silicon-containing film, and a step for forming, on the silicon-containing film, a hard mask which is an amorphous film comprising tungsten, silicon, and nitrogen through sputtering.
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Description

Substrate processing method, substrate processing apparatus and hard mask

[0001] The present disclosure relates to a substrate processing method, a substrate processing apparatus, and a hard mask.

[0002] In the manufacture of electronic devices such as semiconductor devices, plasma etching is sometimes performed on silicon-containing films to form openings such as holes or trenches in the silicon-containing films. To form such openings, a mask is provided on the silicon-containing film. A known example of such a mask is a resist mask.

[0003] In recent years, elements in electronic devices have begun to have three-dimensional structures. Accordingly, significantly deeper openings are being formed in silicon-containing films. However, resist masks are significantly consumed during plasma etching of silicon-containing films. Therefore, hard masks have begun to be used. As described in Patent Documents 1 to 4, hard masks made of tungsten silicide (WSi) or titanium nitride (TiN) are used.

[0004] Japanese Patent Application Publication No. 2007-294836 Japanese Patent Application Publication No. 2003-243526 Japanese Patent Application Publication No. 2005-150403 US Patent Application Publication No. 20019 / 0019675

[0005] In one aspect, the present disclosure provides a substrate processing method, a substrate processing apparatus, and a hard mask that can obtain a stable etching profile.

[0006] In order to solve the above problem, according to one aspect, there is provided a substrate processing method including: preparing a substrate having a silicon-containing film; and forming a hard mask, which is an amorphous film containing tungsten, silicon, and nitrogen, on the silicon-containing film by sputtering.

[0007] According to one aspect, it is possible to provide a substrate processing method, a substrate processing apparatus, and a hard mask that can obtain a stable etching shape.

[0008] 1. A flowchart illustrating a substrate processing method according to an embodiment. 2. An example of a schematic cross-sectional view of a wafer in each process. 3. An example of a schematic cross-sectional view of a wafer in each process. 4. An example of a schematic cross-sectional view of a wafer in each process. 5. An example of a schematic cross-sectional view of a wafer in each process. 6. An example of a schematic cross-sectional view of a substrate processing apparatus according to an embodiment. 7. An example of a schematic cross-sectional view showing an example of processing of a hard mask according to a reference example. 8. An example of a schematic cross-sectional view showing an example of processing of a hard mask according to a reference example. 9. An example of a schematic cross-sectional view showing an example of processing of a hard mask according to a reference example. 10. An example of a schematic cross-sectional view showing an example of processing of a hard mask according to a reference example. 11. An example of a schematic cross-sectional view of a hard mask according to a reference example. 12. An example of a schematic cross-sectional view of a hard mask according to a reference example. 13. An example of a schematic cross-sectional view of a hard mask according to a reference example. 14. An example of a schematic cross-sectional view of a hard mask according to a reference example. 15. An example of a schematic cross-sectional view of a hard mask according to a reference example. 16. An example of a schematic cross-sectional view of a hard mask according to a reference example. 10 shows another example of a hard mask according to the embodiment.

[0009] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant explanations may be omitted.

[0010] <Substrate Processing Method> A substrate processing method according to one embodiment will be described with reference to Figure 1 and Figures 2A to 2F. Figure 1 is a flowchart illustrating the substrate processing method according to one embodiment. Figures 2A to 2F are example schematic cross-sectional views of a wafer in each step.

[0011] In step S101, preparation of the wafer 200 is performed. Fig. 2A is an example of a schematic cross-sectional view of the wafer 200 prepared in step S101.

[0012] The prepared wafer 200 has a base 101. The base 101 is, for example, a Si substrate. An underlayer 102 is formed on the base 101. The underlayer 102 is an etching target film (film to be etched) in which an opening pattern is formed by performing a plasma etching process (see step S105 described later) using a hard mask 103 described later. The underlayer 102 is, for example, a silicon-containing film. The silicon-containing film of the underlayer 102 may be a single-layer film having any one of a single-crystal silicon film, a polycrystalline silicon film, a silicon oxide film, and a silicon nitride film. The silicon-containing film of the underlayer 102 may be a multilayer film having two or more of a single-crystal silicon film, a polycrystalline silicon film, a silicon oxide film, and a silicon nitride film.

[0013] In step S102, a hard mask 103 is formed on the wafer 200. Fig. 2B is an example of a schematic cross-sectional view of the wafer 201 after processing in step S102.

[0014] The hard mask 103 is an amorphous film (WSiN film) containing tungsten (W), silicon (Si), and nitrogen (N). The hard mask 103 may also contain boron (B).

[0015] The concentration ratio of each element in the hard mask 103 is, for example, 60 at. % for tungsten, 25 at. % for silicon, and 15 at. % for nitrogen. Note that [at. %] indicates atomic concentration. However, the concentration ratio of each element in the hard mask 103 is not limited to this.

[0016] Preferably, tungsten: in the range of 50 at. % to 60 at. %, silicon: in the range of 20 at. % to 30 at. %, nitrogen: in the range of 15 at. % to 25 at. %, boron: in the range of 0 at. % to 15 at. %, provided that the total of tungsten, silicon, nitrogen, and boron is 100 at. %.

[0017] An example of the substrate processing apparatus 1 for forming the hard mask 103 will be described later with reference to FIG.

[0018] In step S103, the hard mask 103 is patterned. Fig. 2C is an example of a schematic cross-sectional view of the wafer 202 after processing in step S103.

[0019] In this example, a silicon oxide film 104 is formed on the hard mask 103. The silicon oxide film 104 may be formed by chemical vapor deposition or atomic layer deposition. An amorphous carbon film 105 is formed on the silicon oxide film 104. The amorphous carbon film 105 may be formed by spin-on carbon (SOC). The silicon oxide film 104 and the amorphous carbon film 105 are used as masks when etching the hard mask 103 (see step S104 described below).

[0020] Furthermore, a resist film 106 having a pattern of openings 111 is formed on the silicon oxide film 104. That is, the resist film 106 is formed on the silicon oxide film 104, and the resist film 106 having the pattern of openings 111 is formed by exposure processing and development processing.

[0021] In the following description, the silicon oxide film 104, the amorphous carbon film 105, and the resist film 106 are used as masks when etching the hard mask 103, but the present invention is not limited to this.

[0022] In step S104, etching is performed on the hard mask 103. Fig. 2D is an example of a schematic cross-sectional view of the wafer 203 after processing in step S104.

[0023] Here, the resist film 106 having the pattern of openings 111 is used as a mask to etch the silicon oxide film 104 and the amorphous carbon film 105, thereby forming the opening pattern in the silicon oxide film 104 and the amorphous carbon film 105. The silicon oxide film 104 and the amorphous carbon film 105 can be etched by anisotropic etching using plasma of a gas containing halogen atoms.

[0024] Then, using the silicon oxide film 104 and the amorphous carbon film 105 having the opening pattern as a mask, the hard mask 103 is etched to form a pattern of openings 112 in the hard mask 103. Here, when etching the hard mask 103, a step of etching the hard mask 103 and a step of oxidizing the sidewalls of the recesses (openings 112) in the hard mask 103 are alternately repeated. The step of etching the hard mask 103 can use anisotropic etching using plasma of a gas containing halogen atoms. The step of oxidizing the sidewalls of the recesses in the hard mask 103 can use plasma containing oxygen.

[0025] In step S105, etching is performed on the wafer 203. Fig. 2E is an example of a schematic cross-sectional view of the wafer 203 after the processing in step S105.

[0026] Here, the hard mask 103 having the pattern of the openings 112 is used as a mask to etch the base film 102, thereby forming a pattern of the openings 113 in the base film 102. Note that the etching of the base film 102 (silicon-containing film) performed in step S105 can be anisotropic etching using, for example, plasma of a fluorocarbon-based gas or plasma of a hydrofluorocarbon-based gas.

[0027] In step S106, the hard mask 103 is removed. Fig. 2F is an example of a schematic cross-sectional view of the wafer 205 after processing in step S106.

[0028] 2F, the hard mask 103 is removed. As described above, according to the substrate processing method shown in FIG.

[0029] <Substrate Processing Apparatus> Next, the substrate processing apparatus 1 that forms the hard mask 103 will be described with reference to Fig. 3. Fig. 3 is an example of a schematic cross-sectional view of the substrate processing apparatus 1 according to an embodiment.

[0030] The substrate processing apparatus 1 includes a processing chamber 10, gas supply units 20 a and 20 b, sputter particle emission units 30 a and 30 b, a substrate support unit 40, an exhaust unit 60, and a control unit 70. The substrate processing apparatus 1 is, for example, a PVD apparatus that deposits sputter particles (film-forming atoms) and processing gas emitted from the sputter particle emission units 30 a and 30 b in the processing chamber 10 on the surface of a wafer W, such as a semiconductor wafer, placed on the substrate support unit 40 to form a film.

[0031] The processing chamber 10 includes a chamber body 10a having an open top and a lid 10b provided to close the top opening of the chamber body 10a. The lid 10b has an inclined side surface. The interior of the processing chamber 10 forms a processing space S where a film formation process is performed.

[0032] An exhaust port 11 is formed at the bottom of the processing chamber 10. An exhaust device 60 is connected to the exhaust port 11. The exhaust device 60 includes a pressure control valve and a vacuum pump. The processing space S is evacuated to a predetermined vacuum level by the exhaust device 60.

[0033] Gas inlet ports 12a and 12b are inserted into the processing chamber 10 to introduce gas into the processing space S. A gas supply unit 20a is connected to the gas inlet port 12a. A gas supply unit 20b is connected to the gas inlet port 12b. The gas supply unit 20a supplies a sputtering gas into the processing space S from the gas inlet port 12a. Here, the sputtering gas is, for example, an inert gas. In the following description, a case where the sputtering gas is Ar gas will be described as an example. Furthermore, the gas supply unit 20b supplies a processing gas containing a material including the constituent elements of the film to be formed into the processing space S from the gas inlet port 12b. Here, the processing gas is a gas containing nitrogen (N). In the following description, the processing gas is N 2 An example of gas will be described.

[0034] A loading / unloading port 13 for loading and unloading a wafer W is formed in a sidewall of the processing chamber 10. The loading / unloading port 13 is opened and closed by a gate valve 14. The processing chamber 10 is provided adjacent to a transfer chamber (not shown), and opening the gate valve 14 allows the processing chamber 10 to communicate with the transfer chamber (not shown). The transfer chamber (not shown) is maintained at a predetermined vacuum level, and a transfer device (not shown) for loading and unloading a wafer W into and from the processing chamber 10 is provided therein.

[0035] The sputter particle emission unit 30a includes a target (first target) 31a, a target holder 32a, an insulating member 33a, a power supply 34a, a magnet 35a, and a magnet scanning mechanism 36a. The sputter particle emission unit 30b includes a target (second target) 31b, a target holder 32b, an insulating member 33b, a power supply 34b, a magnet 35b, and a magnet scanning mechanism 36b.

[0036] The targets 31a and 31b are made of materials containing the constituent elements of the film to be deposited. The target 31a is made of a first material. The target 31b is made of a second material. In this example, the target 31a contains, for example, tungsten (W). The target 31b contains, for example, tungsten (W) and silicon (Si). When the film to be deposited contains boron (B), a target containing boron (B) is used for one or both of the targets 31a and 31b.

[0037] The target holders 32 a, 32 b are made of a conductive material and are attached via insulating members 33 a, 33 b at different positions on the inclined surface of the lid 10 b of the processing chamber 10. The target holders 32 a, 32 b hold the targets 31 a, 31 b so that the targets 31 a, 31 b are positioned obliquely above the wafer W supported by the substrate support part 40.

[0038] The power supplies 34a and 34b are electrically connected to the target holders 32a and 32b, respectively. The power supplies 34a and 34b may be DC power supplies if the targets 31a and 31b are made of a conductive material, or may be high-frequency power supplies if the targets 31a and 31b are made of a dielectric material. When the power supplies 34a and 34b are high-frequency power supplies, they are connected to the target holders 32a and 32b via matching boxes. When a voltage is applied to the target holders 32a and 32b, the sputtering gas dissociates around the targets 31a and 31b. Ions in the dissociated sputtering gas then collide with the targets 31a and 31b, causing sputter particles, which are particles of the constituent material of the targets 31a and 31b, to be emitted from the targets 31a and 31b.

[0039] The magnets 35a, 35b are disposed on the rear side of the target holders 32a, 32b and configured to be reciprocated (oscillated) by magnet scanning mechanisms 36a, 36b. The magnet scanning mechanisms 36a, 36b include, for example, guides 37a, 37b and drivers 38a, 38b. The magnets 35a, 35b are guided by the guides 37a, 37b so that they can reciprocate. The drivers 38a, 38b reciprocate the magnets 35a, 35b along the guides 37a, 37b.

[0040] Ions in the dissociated sputtering gas are attracted by the magnetic fields of the magnets 35a and 35b and collide with the targets 31a and 31b. The magnet scanning mechanisms 36a and 36b reciprocate the magnets 35a and 35b, thereby changing the positions at which the ions collide with the targets 31a and 31b, in other words, the positions at which sputter particles are emitted.

[0041] Furthermore, a mounting portion 41 of a substrate support unit 40 for horizontally mounting a wafer W is provided at a position facing the targets 31 a, 31 b in the processing chamber 10. The mounting portion 41 is connected via a shaft member 42 to a drive mechanism 43 disposed below the processing chamber 10. The drive mechanism 43 has a function of rotating the mounting portion 41.

[0042] The shaft member 42 penetrates the bottom of the chamber body 10a and is connected to a drive mechanism 43. A seal portion 44 that keeps the inside of the processing chamber 10 airtight is provided at the position where the shaft member 42 penetrates the bottom of the chamber body 10a.

[0043] A heating mechanism (not shown) is provided within the mounting portion 41 so that the wafer W can be heated during sputtering.

[0044] The control unit 70 is made up of a computer and controls each component of the substrate processing apparatus 1, such as the power supplies 34a and 34b, the drive units 38a and 38b, the drive mechanism 43, and the exhaust unit 60. The control unit 70 has a main control unit made up of a CPU that actually controls these components, as well as an input device, an output device, a display device, and a storage device. The storage device stores parameters for various processes performed in the substrate processing apparatus 1 and is also configured to hold a storage medium that stores programs for controlling the processes performed in the substrate processing apparatus 1, i.e., process recipes. The main control unit of the control unit 70 calls up a predetermined process recipe stored in the storage medium and causes the substrate processing apparatus 1 to perform a predetermined process based on the process recipe.

[0045] Next, an example of a film formation process in the substrate processing apparatus 1 will be described. Here, an example is used in which a WSiN film is formed as the hard mask 103. When boron (B) is to be contained in the film, a target containing boron (B) is used for one or both of the targets 31a and 31b.

[0046] First, the wafer W is loaded into the processing chamber 10. Specifically, the control unit 70 opens the gate valve 14. A transfer device (not shown) provided in a transfer chamber (not shown) transfers the wafer W into the processing chamber 10 and places the wafer W on the placement unit 41. When the transfer device retreats from the loading / unloading port 13, the control unit 70 closes the gate valve 14.

[0047] Next, a film formation process is performed on the wafer W. The control unit 70 controls the substrate processing apparatus 1 to form a hard mask 103 (WSiN film) on the wafer W. Here, while rotating the mounting unit 41, Ar gas is supplied as a sputtering gas from the gas introduction port 12a, and N is supplied as a nitrogen-containing gas from the gas introduction port 12b. 2 Gas is supplied to cause the targets 31a and 31b to emit sputtering particles, and a hard mask 103 (WSiN film) is formed on the wafer W.

[0048] Finally, the wafer W is unloaded from the processing chamber 10. Specifically, the control unit 70 opens the gate valve 14. A transfer device (not shown) provided in a transfer chamber (not shown) unloads the wafer W from the mounting part 41 in the processing chamber 10. When the transfer device retreats from the loading / unloading port 13, the control unit 70 closes the gate valve 14.

[0049] As described above, according to the substrate processing apparatus 1, an amorphous film (WSiN film) containing tungsten (W), silicon (Si), and nitrogen (N) is formed on the wafer W by the sputtered particles of the first material (W) emitted from the target 31 a, the sputtered particles of the second material (WSi) emitted from the target 31 b, and the nitrogen (N)-containing gas supplied into the processing chamber 10.

[0050] The control unit 70 also controls the concentration of the first material released from the target 31a by controlling the voltage applied from the power supply 34a to the target holder 32a. The control unit 70 also controls the concentration of the second material released from the target 31b by controlling the voltage applied from the power supply 34b to the target holder 32b. The control unit 70 also controls the flow rate of the nitrogen-containing gas supplied from the gas supply unit 20b into the processing chamber 10. In other words, the control unit 70 controls the flow rate ratio of the nitrogen-containing gas and the sputtering gas supplied into the processing chamber 10. This allows the concentration ratio of tungsten (W), silicon (Si), and nitrogen (N) in the hard mask 103 formed on the wafer W to be adjusted by controlling at least one of the voltage applied to the target 31a (first target), the voltage applied to the target 31b (second target), and the flow rate of the nitrogen-containing gas supplied into the processing chamber 10 (or the flow rate ratio of the nitrogen-containing gas and the sputtering gas supplied into the processing chamber 10).

[0051] The combination of the first material and the second material is not limited to this. The target 31a may be a target containing tungsten (W), and the target 31b may be a target containing silicon (Si). Alternatively, the target 31a may be a target containing tungsten and silicon (WSi), and the target 31b may be a target containing silicon (Si). Alternatively, the targets 31a and 31b may both be targets containing tungsten and silicon (WSi), but the ratios of the concentrations of tungsten (W) to silicon (Si) between the targets 31a and 31b may be different. Even with such a combination, the ratios of the concentrations of tungsten (W), silicon (Si), and nitrogen (N) in the hard mask 103 formed on the wafer W can be adjusted.

[0052] Alternatively, both the target 31a and the target 31b may contain tungsten and silicon (WSi) and have the same concentration ratio of tungsten (W) to silicon (Si). In this combination, at least one of the targets 31a and 31b may be used in the film formation process. Even in this configuration, the control unit 70 can adjust the concentration ratio of tungsten (W), silicon (Si), and nitrogen (N) in the hard mask 103 formed on the wafer W by controlling at least one of the voltage applied to the target holder 32a and / or the target holder 32b and the flow rate of the nitrogen-containing gas (or the flow rate ratio between the nitrogen-containing gas and the sputtering gas). Here, an example in which a WSiN film is formed as the hard mask 103 is used. However, if boron (B) is to be contained in the hard mask 103, a target containing boron (B) may be used for one or both of the targets 31a and 31b. By including boron (B), oxidation can be further suppressed.

[0053] Here, the tungsten silicide film formed by chemical vapor deposition has grain boundaries of metal crystals, and therefore the resistance to plasma etching is low at the grain boundaries, and the portions where the grain boundaries exist are quickly etched.

[0054] In contrast, the hard mask 103 formed by the substrate processing apparatus 1 shown in FIG. 3 can form an amorphous film that is substantially free of crystal grain boundaries. This allows the hard mask 103 to have high resistance to plasma etching. That is, in the etching of the wafer W (S105), the selectivity between the hard mask 103 and the base film 102 can be increased. In other words, the film thickness of the hard mask 103 can be reduced. Furthermore, by reducing the film thickness of the hard mask 103, the occurrence of twisting due to suppression of perpendicular ion incidence can be reduced.

[0055] <Etching of Hard Mask> Next, the shape of the opening 112 formed by etching the hard mask 103 in step S104 will be described in comparison with a reference example.

[0056] Elements in electronic devices often have electrodes made of tungsten and silicon-containing films. Therefore, tungsten silicide is a desirable material for forming hard masks for plasma etching. However, hard masks made of tungsten silicide are partially etched quickly.

[0057] Furthermore, if the thickness of the hard mask is increased in order to maintain the hard mask until the end of plasma etching, the film stress of the hard mask may cause warping of the workpiece.

[0058] Therefore, a hard mask with high resistance to plasma etching is required. Because highly resistant hard masks are difficult to process by etching, a method that involves repeating sidewall oxidation and etching is often used. However, if the sidewall oxidation is severe, the shape may be deteriorated.

[0059] First, the shape of the opening 112 formed by etching the hard mask 103C according to the reference example will be described with reference to Figures 4A to 4D and 5. Figures 4A to 4D are examples of schematic cross-sectional views showing an example of processing the hard mask 103C according to the reference example.

[0060] Here, the hard mask 103C according to the reference example is an amorphous film (WSi film) containing tungsten (W) and silicon (Si). Here, the hard mask 103C having a concentration ratio of tungsten (W): silicon (Si): 60 at. % was formed using the substrate processing apparatus 1 shown in FIG. 3 without supplying a nitrogen-containing gas.

[0061] When etching the hard mask 103C using the silicon oxide film 104 with the openings formed therein as a mask, a step of etching the hard mask 103C and a step of oxidizing the sidewalls of the recesses in the hard mask 103C are alternately repeated.

[0062] As shown in FIG. 4A, in the step of etching the hard mask 103C, the hard mask 103C is etched using the amorphous carbon film 105 and the silicon oxide film 104 having openings as a mask.

[0063] Furthermore, as shown in FIG. 4B , in the step of oxidizing the side walls of the recesses in the hard mask 103C, the side walls and bottom walls of the recesses in the hard mask 103C formed by etching are oxidized by plasma containing oxygen (O) to form an oxide layer 123.

[0064] In this manner, in the plasma etching of the hard mask 103C, the etching of the hard mask 103C shown in FIG. 4A and the formation of the oxide layer 123 shown in FIG. 4B are repeated, thereby progressing the etching of the hard mask 103C.

[0065] 4C shows the state where etching has been completed until the hard mask 103C is penetrated. As shown in FIG. 4C, the thickness of the oxide layer 123 formed on the sidewall of the opening is non-uniform.

[0066] 4D shows the state of the hard mask 103C after DHF cleaning. Cleaning with DHF (diluted HF) removes the oxide layer 123. This results in a poor shape of the opening in the hard mask 103C, as shown in FIG. 4D. For example, this results in poor local critical dimension uniformity (LCDU).

[0067] 5 is an example of an A-A cross-sectional view of the hard mask 103C according to the reference example. Here, the A-A cross-sectional view is shown as viewed from above in FIG. 4C. The cross-sectional portions of the hard mask 103C and the oxide layer 123 are each shown hatched. Reference numeral 102a denotes the edge of the opening in the hard mask 103C at the interface with the base film 102.

[0068] 5, the circularity of the edge 102a of the opening is also deteriorated during plasma etching of the hard mask 103C, and the thickness of the oxide layer 123 is also non-uniform.

[0069] First, the shape of the opening 112 formed by etching the hard mask 103 according to this embodiment will be described with reference to Figures 6A to 6D and 7. Figures 6A to 6D are examples of schematic cross-sectional views showing an example of processing the hard mask 103 according to this embodiment.

[0070] Here, the hard mask 103 according to this embodiment is an amorphous film (WSiN film) containing tungsten (W), silicon (Si), and nitrogen (N). Here, using the substrate processing apparatus 1 shown in FIG. 3, the hard mask 103 was formed with a concentration ratio of tungsten (W): silicon (Si): 25 at. %: nitrogen (N): 15 at. %.

[0071] When etching the hard mask 103 using the silicon oxide film 104 with the openings formed therein as a mask, a step of etching the hard mask 103 and a step of oxidizing the sidewalls of the recesses in the hard mask 103 are alternately repeated.

[0072] As shown in FIG. 6A, in the step of etching the hard mask 103, the hard mask 103 is etched using the amorphous carbon film 105 and the silicon oxide film 104 having openings as a mask.

[0073] Furthermore, as shown in FIG. 6B , in the step of oxidizing the sidewalls of the recesses in the hard mask 103, the sidewalls and bottom wall of the recesses in the hard mask 103 formed by etching are oxidized by plasma containing oxygen (O) to form an oxide layer 123.

[0074] In this manner, in the plasma etching of the hard mask 103, the etching of the hard mask 103 shown in FIG. 6A and the formation of the oxide layer 123 shown in FIG. 6B are repeated, and thus the etching of the hard mask 103 progresses.

[0075] 6C shows a state where etching has been completed until the hard mask 103 is penetrated. As shown in FIG. 6C, the oxide layer 123 formed on the sidewall of the opening has a reduced non-uniform thickness.

[0076] 6D shows the state of the hard mask 103 after DHF cleaning. Cleaning with DHF (diluted HF) removes the oxide layer 123. As a result, as shown in FIG. 6D, the shape of the opening in the hard mask 103C is improved compared to the reference example. For example, local critical dimension uniformity (LCDU) is improved.

[0077] 7 is an example of a cross-sectional view taken along the line B-B of the hard mask 103 according to this embodiment. Here, the cross-sectional view is taken from above in FIG. 6C. The cross-sectional portions of the hard mask 103 and the oxide layer 123 are shown hatched. Reference numeral 102a denotes the edge of the opening in the hard mask 103 at the interface with the base film 102.

[0078] 7, the circularity of the edge 102a of the opening is improved in the plasma etching of the hard mask 103. Also, the thickness of the oxide layer 123 is prevented from becoming non-uniform.

[0079] Although the hard mask 103 made of an amorphous film (WSiN film) containing tungsten (W), silicon (Si), and nitrogen (N) has been described as having a uniform composition ratio overall, the hard mask 103 may be a film in which the atomic concentration of silicon (Si) is concentration-modulated in the depth direction.

[0080] 8A and 8B show another example of the hard mask 103 according to this embodiment.

[0081] 8A, the hard mask 103 includes a first WSiN film 103 A and a second WSiN film 103 B. The second WSiN film 103 B has a higher atomic concentration of silicon (Si) than the first WSiN film 103 A.

[0082] Here, when the hard mask 103 is etched using the silicon oxide film 104 with the openings formed therein as a mask, a step of etching the hard mask 103 and a step of oxidizing the sidewalls of the recesses in the hard mask 103 are alternately repeated. Therefore, compared to the lower part, the upper part of the hard mask 103 is repeatedly exposed to etching gas, which may cause bowing on the upper side of the openings formed in the hard mask 103. In particular, the risk of bowing occurring becomes more pronounced as the aspect ratio increases.

[0083] 8B, the atomic concentration of silicon (Si) in the upper second WSiN film 103B is made higher than that in the first WSiN film 103A. In the etching process, a large amount of silicon oxide, which is less volatile than tungsten oxide, is present on the sidewall, thereby preventing bowing from occurring above the opening formed in the hard mask 103.

[0084] The first WSiN film 103A and the second WSiN film 103B can be successively formed in the processing chamber 10 of the substrate processing apparatus 1. After the first WSiN film 103A is formed, the second WSiN film 103B having a higher silicon atomic concentration than the first WSiN film 103A can be formed by changing the voltage applied to the target and the flow rate of the nitrogen-containing gas supplied into the processing chamber 10. By successively forming the first WSiN film 103A and the second WSiN film 103B in the same chamber, high throughput can be obtained.

[0085] Although the hard mask 103 has been described as being formed of two layers, the first WSiN film 103A and the second WSiN film 103B, the present invention is not limited to this. The hard mask 103 may be formed of three or more layers or continuously, with a higher silicon atomic concentration in the upper portion than in the lower portion. Even in this case, continuous film formation is possible by changing the voltage applied to the target and the flow rate of the nitrogen-containing gas supplied into the processing chamber 10 of the substrate processing apparatus 1.

[0086] The substrate processing method has been described above, but the present disclosure is not limited to the above-described embodiments, and various modifications and improvements are possible within the scope of the gist of the present disclosure described in the claims.

[0087] This application claims priority based on Japanese Patent Application No. 2023-110833, filed on July 5, 2023, the entire contents of which are incorporated herein by reference.

[0088] REFERENCE SIGNS LIST W wafer 1 substrate processing apparatus 10 processing chamber 20a, 20b gas supply unit 30a, 30b sputter particle emission unit 31a, 31b target 34a, 34b power supply 40 substrate support unit 60 exhaust unit 70 control unit 101 base unit 102 undercoat film 103 hard mask 104 silicon oxide film 105 amorphous carbon film 106 resist film 123 oxide layer

Claims

1. A method for processing a substrate, comprising: providing a substrate having a silicon-containing film; and forming a hard mask, which is an amorphous film containing tungsten, silicon, and nitrogen, on the silicon-containing film by sputtering.

2. The substrate processing method according to claim 1, wherein the hard mask is formed by sputtering a target containing the tungsten and the silicon.

3. The substrate processing method according to claim 2, further comprising controlling at least one of a voltage applied to the target and a flow rate of a nitrogen-containing gas supplied to a processing chamber, thereby adjusting a ratio of the tungsten concentration, the silicon concentration, and the nitrogen concentration in the hard mask.

4. The substrate processing method according to claim 3, wherein the targets include a first target containing the tungsten, and a second target containing the tungsten and the silicon.

5. The substrate processing method according to claim 4, further comprising adjusting a ratio of the tungsten concentration, the silicon concentration, and the nitrogen concentration in the hard mask by controlling at least one of a voltage applied to the first target, a voltage applied to the second target, and a flow rate of a nitrogen-containing gas supplied to the processing chamber.

6. The substrate processing method according to claim 4, further comprising controlling at least one of a voltage applied to the first target, a voltage applied to the second target, and a flow rate ratio of a sputtering gas and a nitrogen-containing gas supplied to the processing chamber, thereby adjusting a ratio of the tungsten concentration, the silicon concentration, and the nitrogen concentration in the hard mask.

7. The substrate processing method according to claim 1, wherein the hard mask further contains boron.

8. The substrate processing method according to claim 7, wherein a ratio of a concentration of the tungsten, a concentration of the silicon, a concentration of the nitrogen, and a concentration of the boron in the hard mask is in a range of 50 [at. %] to 60 [at. %], a range of 20 [at. %] to 30 [at. %], a range of 15 [at. %] to 25 [at. %], or a range of 0 [at. %] to 15 [at. %], with the proviso that the total of the tungsten, the silicon, the nitrogen, and the boron is 100 at. %.

9. The substrate processing method according to claim 1, wherein the hard mask has an atomic concentration of silicon that is modulated in a depth direction.

10. The substrate processing method according to claim 9, wherein the hard mask has a higher atomic concentration of silicon in an upper portion than in a lower portion.

11. A substrate processing apparatus comprising: a processing chamber; a substrate support part for supporting a substrate; a first target containing at least tungsten; a second target containing at least silicon; a first power supply for applying a voltage to the first target; a second power supply for applying a voltage to the second target; a first gas supply part for supplying a sputtering gas; a second gas supply part for supplying a nitrogen-containing gas; and a control part, wherein the control part is configured to be capable of executing a process of: placing a substrate having a silicon oxide film on the substrate support part to prepare the substrate; and forming a hard mask, which is an amorphous film containing tungsten, silicon and nitrogen, on the silicon-containing film by sputtering.

12. The substrate processing apparatus of claim 11, wherein the control unit adjusts the ratio of the tungsten concentration, the silicon concentration, and the nitrogen concentration in the hard mask by controlling at least one of the voltage applied to the first target, the voltage applied to the second target, and the flow rate ratio of the sputtering gas and the nitrogen-containing gas supplied to the processing chamber.

13. The substrate processing apparatus according to claim 11, wherein the hard mask further contains boron.

14. A hard mask for plasma etching formed on a silicon oxide film, the hard mask being an amorphous film containing tungsten, silicon and nitrogen.

15. The hardmask of claim 14, wherein the hardmask further comprises boron.

16. The hard mask according to claim 15, wherein a ratio of the tungsten concentration, the silicon concentration, the nitrogen concentration, and the boron concentration is in a range of 50 [at. %] to 60 [at. %], a range of 20 [at. %] to 30 [at. %], a range of 15 [at. %] to 25 [at. %], or a range of 0 [at. %] to 15 [at. %], with the proviso that the sum of the tungsten, the silicon, the nitrogen, and the boron is 100 at. %.

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