Method for producing semiconductor wafers from monocrystalline silicon

Abstract

The invention relates to a method for producing semiconductor wafers from monocrystalline silicon, comprising drawing a cylindrical portion and subsequently an end cone of a monocrystal of silicon from a melt which is contained in a crucible; wherein the drawing speed during drawing of the end cone remains substantially constant with respect to the drawing speed during drawing of the cylindrical portion end region; rotating the crucible at a rotational speed and in a rotational direction during drawing of the cylindrical portion and the end cone of the monocrystal; and separating the semiconductor wafers of monocrystalline silicon from the cylindrical portion of the monocrystal, characterised in that the drawing speed, during drawing of the end cone, is at least greater than 0.46 mm / min, the rotational direction of the crucible is continuously changed and an amplitude of the rotational speed before and after the change in rotational direction is not less than 6 rpm.

Description

[0001] Process for producing semiconductor wafers from single-crystal silicon

[0002] The invention relates to a method for producing semiconductor wafers from single-crystal silicon.

[0003] The production of silicon single crystals is predominantly carried out using a crucible pulling process (called the Czochralski process or CZ method) or a crucible-free pulling process (called the zone melting process or FZ method). The rod-shaped single crystals, typically 100 to 300 mm in diameter, are primarily used as the base material for the production of wafers, from which electronic components are manufactured.

[0004] The Czochralski method involves pulling a single crystal from a melt contained in a crucible. The single crystal is pulled from the melt by hanging from a seed crystal. Typically, a thin neck is first crystallized at the bottom of the seed crystal so that dislocations move to the edge of the thin neck and are thus eliminated. The further pulling of the silicon single crystal continues in the usual way, with the pulling of a conical section, a cylindrical section, and an end cone of the single crystal. Towards the end of the pulling process, the single crystal tapers to a small diameter. This prevents slips or dislocations in the single crystal that arise when the single crystal is separated from the melt from running back deep into the single crystal, especially into the cylindrical section.Single-crystal semiconductor wafers made of silicon are cut from the cylindrical section of the single crystal and further processed.

[0005] Of particular importance when pulling a single crystal of silicon according to the CZ method is the control of the ratio V / G of pulling speed V and axial temperature gradient G at the crystallization boundary.

[0006] The pulling rate V is the rate at which the growing single crystal is lifted upwards away from the melt, and the axial temperature gradient G is a measure that indicates the change in temperature at the crystallization boundary in the direction of the crystal lift.

[0007] If the ratio V / G exceeds a critical value k1, vacancies predominantly occur, which can agglomerate and then be identified, for example, as COPs (crystal originated particles). Depending on the detection method, they are also referred to as LPD (light point defects) or LLS (localized light scatterers).

[0008] If the V / G ratio is below a critical value k2, which is smaller than k1, then predominantly self-point defects in the form of silicon self-interstitials appear, which can also form agglomerates and appear macroscopically as dislocation loops. Agglomerates of interstitial atoms form local crystal dislocations, which are also referred to as LPITs (large etch pits) due to the detection method used.

[0009] In the broadest sense, the region in which neither vacancy nor interstitial agglomeration occurs, i.e., where V / G lies between k1 and k2, is called the neutral zone or perfect region. The value of V / G at which the crystal transitions from vacancy to interstitial excess naturally lies between k1 and k2.

[0010] The axial temperature gradient G at the crystallization boundary and its radial gradient are determined by the heat transport to and from the crystallization boundary. Heat transport, in turn, is significantly influenced by the thermal properties of the environment surrounding the growing single crystal, the so-called hot zone, and by the heat input from one or more heating devices.

[0011] The axial and radial profile of the axial temperature gradient G at the crystallization boundary can be determined using simulation calculations that take the heat balance into account. To keep the ratio V / G within a specified range in the axial direction, it is necessary to compensate for the temporal change in the axial temperature gradient G by a corresponding change in the pulling speed V. By controlling the pulling speed V, the ratio V / G can also be controlled.

[0012] Oxygen plays an important role in the formation of bulk micro defects (BMDs). BMDs are oxygen precipitates that form from BMD nuclei during heat treatment. BMDs act as internal getters, i.e., energy sinks for impurities, and are therefore fundamentally advantageous.

[0013] US 2020 / 199776 A1 discloses a method for producing a silicon single crystal in which, if dislocations occur during crystal pulling, the pulling process continues at the same pulling rate until the starting point of the dislocations passes through a temperature zone where BMD nuclei form. The method thus aims to prevent the thermal history in the non-dislocated region from being influenced by changes in the pulling process and to enable the formation of BMDs during subsequent thermal treatments of these wafers.

[0014] EP4025726A1 discloses a method for producing semiconductor wafers from single-crystal silicon using CZ, in which the direction of rotation of the crucible is continuously reversed. This allows axial fluctuations in the oxygen concentration in the cylindrical section of the single crystal, expressed as the difference between the highest and lowest concentrations, to be more than halved.

[0015] Examination of slices cut from the cylindrical section of a single crystal in the range of 75% to 95% of the rod length revealed an increase in LLS with a size smaller than 19 nm. LLS of this size can be detected using the SP5 particle size analyzer from KLA Corp, using scattered light measurement.

[0016] The object of the invention was to reduce the LLS stress on the wafers. The object of the invention is achieved by a method for producing semiconductor wafers from single-crystal silicon, comprising pulling a cylindrical section and subsequently an end cone of a single crystal of silicon from a melt contained in a crucible; wherein the pulling speed during pulling of the end cone remains substantially constant compared to the pulling speed during pulling of the cylindrical section; rotating the crucible at a rotational speed and in a rotational direction during pulling of the cylindrical section and the end cone of the single crystal;and separating the semiconductor wafers made of single-crystal silicon from the cylindrical portion of the single crystal, characterized in that the pulling speed during the pulling of the end cone is at least greater than 0.46 mm / min, the direction of rotation of the crucible is continuously changed, and an amplitude of the rotation speed before and after the change of the direction of rotation is not less than 6 rpm.;

[0017] The method according to the invention allows for a significant reduction of LLS with a size of less than 19 nm on slices separated from the cylindrical section of the single crystal in the range of 75% to 95% of the rod length.

[0018] According to the inventors, this is due to the fact that the process reduces the residence time in this section (75% to 95% of the rod length). This will be demonstrated later in the examples.

[0019] Preferred embodiments of the invention are set forth in the following description and claims.

[0020] Preferably, the melt is subjected to a horizontal magnetic field, at least during the pulling of the cylindrical section of the single crystal. The horizontal magnetic field has an intensity of preferably no less than 0.2 T and no more than 0.4 T in the region of the phase boundary between the growing single crystal and the melt.

[0021] The process according to the invention is particularly suitable for producing single-crystal semiconductor wafers made of silicon with a diameter of at least 200 mm, in particular with a diameter of at least 300 mm.

[0022] When growing the cylindrical section of the crystal, v / G is preferably adjusted so that the rod is free of agglomerates of vacancies and interstitial atoms, so that the resulting disks do not contain L-pits and COPs.

[0023] In one embodiment, no dislocations occur during pulling of the cylindrical portion of the single crystal.

[0024] The crucible rotation during end cone creation results in a more stable end cone shape. The end cone dislocation frequency was reduced by 2%.

[0025] The features specified with regard to the above-mentioned embodiments of the method according to the invention can be implemented either separately or in combination as embodiments of the invention. Furthermore, they can describe advantageous embodiments that are independently protectable.

[0026] Examples

[0027] The simulation of the thermal history of the CZ process shows a high residence time in the temperature range between 600°C and 700°C in the rod region (75-95%), where the LLS defects were also observed.

[0028] By increasing the pull speed in the end cone and increasing the crucible rotation speed, the residence time can be reduced to such an extent that defects are significantly reduced. Various pull speeds were simulated and tested experimentally.

[0029] Comparison example: lower drawing speed end cone (-10%)

[0030] Example 1 :

[0031] Lower drawing speed bar end, then constant from bar end to end cone

[0032] Example 2:

[0033] Higher drawing speed bar end to end cone

[0034] ( / Inventive) Example 3:

[0035] Higher pulling speed rod end to end cone and crucible change rotation end cone

[0036] Table 1 shows the minimum and maximum residence times for comparative example and examples 1 to 3, determined by numerical simulations.

[0037] Table 1

[0038] Examples 1 to 3 lead to a significant reduction of LLS < 19 nm, as shown in Table 2. Table 2 i I jj |

[0039] However, in example 2 (without crucible rotation) COPs are visible at the rod end.

[0040] Only example 3 with increased pulling speed and crucible rotation leads to an even more significant reduction of LLS (compared to examples 1 and 2) and simultaneous avoidance of COPs.

[0041] The foregoing description of exemplary embodiments is intended to be exemplary. The disclosure provided herein will enable those skilled in the art to understand the present invention and the associated advantages, and will also encompass variations and modifications of the described structures and methods that are obvious to those skilled in the art. Therefore, all such variations and modifications, as well as equivalents, are intended to be covered by the scope of the claims.

Claims

Patent claims 1. A method for producing semiconductor wafers from single-crystal silicon, comprising pulling a cylindrical section and subsequently an end cone of a single crystal of silicon from a melt contained in a crucible; wherein the pulling speed during pulling of the end cone remains substantially constant compared to the pulling speed during pulling of the cylindrical section end region; rotating the crucible at a rotational speed and in a rotational direction during pulling of the cylindrical section and the end cone of the single crystal;and separating the semiconductor wafers made of single-crystal silicon from the cylindrical portion of the single crystal, characterized in that the pulling speed during the pulling of the end cone is at least greater than 0.46 mm / min, the direction of rotation of the crucible is continuously changed, and an amplitude of the rotation speed before and after the change of the direction of rotation is not less than 6 rpm.; 2. The method according to claim 1, wherein the drawing speed during drawing of the end cone is at least greater than 0.5 mm / min.

3. A method according to any one of claims 1 to 2, wherein the residence time of a region of 75% to 95% of the rod length of the cylindrical portion in the temperature range of 600-700°C is less than 460 min.

4. The method according to any one of claims 1 to 3, wherein the separated semiconductor wafers are free of COPs and LPits.

5. A method according to any one of claims 1 to 4, wherein no dislocations occur during pulling of the cylindrical portion of the single crystal.

6. The method according to any one of claims 1 to 5, wherein the melt is subjected to a horizontal magnetic field.

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