Three-dimensional heterogeneous integrated millimeter wave system package structure

Abstract

The present invention provides a three-dimensional heterogeneous integrated millimeter wave system package structure, which is formed by assembling an upper-layer antenna board and a lower-layer chip carrier board. The upper-layer antenna board is of an integrated structure, and is internally provided with a package antenna and a feed network; the lower-layer chip carrier board is of a modular structure and is provided with a first chip group and a second chip group which are heterogeneously integrated; and each chip group comprises a plurality of chips of the same process or different processes. The second chip group is located below the first chip group, and the active surfaces of the two groups of chips are opposite, but are staggered in the vertical direction; the upper-layer antenna board and the lower-layer chip carrier board each are provided with a plurality of metallized via holes, and interconnection of any layers is realized by means of the metallized via holes; and the first chip group is electrically connected to the second chip group by mans of the metallized via holes and / or solder balls by using metal interconnection. According to the present invention, an antenna, a radio frequency control chip and radio frequency front-end chips are integrated, and the integrated production design is carried out, improving the integration level and the packaging yield, and satisfying the packaging requirements of different antennas.

Description

A three-dimensional heterogeneous integrated millimeter wave system packaging structure Technical Field

[0001] The present invention relates to the field of chip packaging technology, and in particular to a three-dimensional heterogeneous integrated millimeter wave system packaging structure. Background Art

[0002] With the rapid development of fifth-generation mobile communication technology (5G), the widely used spectrum in the sub-6 GHz frequency band can no longer meet people's demand for higher data rates. The millimeter wave (mmW) frequency band can provide a wider absolute frequency bandwidth, which is extremely attractive for applications with ultra-high data rates. However, the significant air loss (attenuation) poses a huge challenge to mmWave wireless communications. In this situation, beamforming technology enabled by large-scale phased array architecture is a key technology to overcome this challenge and maintain radio coverage. In addition, at mmWave frequencies, the interconnection loss between antennas and mmWave integrated circuits (ICs) is also much higher than that of traditional sub-6 GHz systems, which in turn reduces the system's performance such as noise figure (NF) and power added efficiency (PAE).

[0003] Therefore, phased array antennas are being integrated into the package to further reduce the interconnection loss between the antenna and the millimeter-wave integrated circuit, a technology known as antenna-in-package (AiP). Integrating the packaged antenna with different chips in a single package further meets the current requirements for high integration, low loss, and high reliability in RF systems.

[0004] There are many different existing RF packaging structures, but they all have the following shortcomings:

[0005] The overall package does not include a complete millimeter-wave system module: it either only contains the main control chip and the RF front-end chip, or only the RF front-end chip and the antenna. There are fewer packages that integrate the main control chip, RF front-end chip and antenna together; most of them are two-dimensional planar packaging structures, and the number of chips that can be packaged is small; the antenna and chip packaging are inseparable as a whole, which increases the difficulty of testing and reduces the yield of the package; the antenna cannot be replaced after it is integrated into the package, and if it needs to be replaced, it needs to be redesigned; for the packaging of large-scale phased arrays and millimeter-wave integrated circuits, most of them use the packaging and then splicing method to form a large-scale phased array system, which will inevitably produce a certain phase difference between channels.

[0006] Summary of the Invention

[0007] The purpose of the present invention is to provide a three-dimensional heterogeneous integrated millimeter-wave system packaging structure that integrates antennas, RF control chips, and RF front-end chips, conducts integrated production design, improves integration and packaging yield, and meets the packaging requirements of multi-channel millimeter-wave phased arrays for communication or radar applications.

[0008] To achieve the above object, the present invention provides the following solutions:

[0009] A three-dimensional heterogeneous integrated millimeter wave system packaging structure comprises: an upper antenna board and a lower chip carrier board assembled together; a gap is provided between the upper antenna board and the lower chip carrier board, and the upper antenna board and the lower chip carrier board are connected by solder balls; the upper antenna board is an integrated structure, internally provided with a packaged antenna and a feed circuit; the lower chip carrier board is a modular structure, provided with a first chipset and a second chipset, the second chipset being located below the first chipset, the first chipset including a plurality of first chips, the second chipset including a plurality of second chips, the first and second chips being heterogeneous chips, the active surfaces of the first and second chips facing each other, but staggered in a vertical direction;

[0010] The lower chip carrier is composed of an upper redistribution layer, a core layer, and a lower redistribution layer stacked in sequence from top to bottom; the upper antenna board is provided with a plurality of vertically penetrating metallized vias, connected to the upper redistribution layer through solder balls / bumps; the upper redistribution layer, the core layer, and the lower redistribution layer are respectively provided with a plurality of metallized vias, and interconnection of any layer is achieved through the metallized vias;

[0011] The first chip is electrically connected to the second chip by metal interconnection through metallized vias and / or solder balls;

[0012] The upper antenna board is made by a planar circuit / packaging process.

[0013] Furthermore, the first chipset is arranged on the upper surface of the lower chip carrier, the second chipset is embedded in the core layer of the lower chip carrier, located between the upper redistribution layer and the lower wiring layer, and the lower surface of the second chip is provided with metallized vias and connected to solder balls.

[0014] Furthermore, the first chipset is arranged on the upper surface of the lower chip carrier, and the second chipset is arranged on the lower surface of the lower chip carrier; the lower surface of the first chip is provided with solder balls, which are connected to the upper redistribution layer, the upper surface of the second chip is provided with solder balls, which are connected to the lower redistribution layer, and the lower surface of the second chip is provided with heat dissipation teeth for heat dissipation, and the bottom of the millimeter wave system packaging structure is connected to the PCB board, and the PCB board is provided with an opening for accommodating the heat dissipation teeth.

[0015] Furthermore, a groove is provided on the lower surface of the upper antenna board, the first chip group is provided in the groove, the lower surface of the first chip is the active surface of the first chip, solder balls are provided on the lower surface of the first chip, the upper surface of the second chip is the active surface of the second chip, and metallized vias and solder balls are provided on the upper surface of the second chip, which are connected to the solder balls provided on the lower surface of the first chip.

[0016] Furthermore, the first chip is set to one, using a silicon-based RF control chip, and correspondingly, the groove is set to one, located at the center of the lower surface of the upper antenna board; the second chip is set to several, using a compound RF front-end chip.

[0017] Furthermore, the first chip is set to be multiple, including a silicon-based RF control chip and multiple power management chips. Correspondingly, the groove is set to be multiple, wherein one groove is located at the center of the lower surface of the upper antenna board, which is used to set a silicon-based RF control chip, and the remaining grooves are used to set power management chips and are set around the silicon-based RF control chip.

[0018] Furthermore, the first chipset is arranged in the gap between the upper antenna board and the lower chip carrier board, the diameter of the solder ball between the upper antenna board and the lower chip carrier board is greater than the thickness of the first chip, and the bottom of the first chip is provided with a solder ball connected to the upper redistribution layer; the upper surface of the second chip is provided with a metallized via connected to the solder ball at the bottom of the first chip.

[0019] Furthermore, the first chipset is embedded in the interior of the lower chip carrier, the second chipset is arranged on the lower surface of the lower chip carrier, the upper surface of the second chip is provided with solder balls, which are connected to the lower redistribution layer, and the first chip and the second chip are directly electrically connected through the solder balls; the lower surface of the second chip is provided with heat dissipation teeth for heat dissipation, the bottom of the millimeter wave system packaging structure is connected to the PCB board, and the PCB board is provided with an opening for accommodating the heat dissipation teeth.

[0020] Furthermore, a surface mount component is provided on the upper surface of the lower chip carrier; and the lower chip carrier is formed by stacking multiple material layers.

[0021] Furthermore, the first chip adopts a silicon-based RF control chip, and the silicon-based RF control chip is prepared by CMOS, SiGe BiCMOS or SOI process; the second chip adopts a compound RF front-end chip, and the chip is prepared by GaAs, GaN or InP process.

[0022] According to the specific embodiments provided by the present invention, the three-dimensional heterogeneous integrated millimeter wave system packaging structure provided by the present invention discloses the following technical effects:

[0023] (1) High integration: The three-dimensional packaging structure makes the chip area larger than the packaging area. The entire structure contains a complete RF system, including but not limited to the antenna, RF front-end and main control chip. At the same time, some passive components can be integrated to achieve better electrical performance.

[0024] (2) Excellent RF performance: RF channel consistency is high, the large-scale antenna has a large number of channels, and the antenna is integrated rather than multi-module, which can avoid the phase difference problem caused by module splicing in different channels. At the same time, the use of low-loss media can ensure the signal quality during transmission.

[0025] (3) High flexibility: This packaging structure can be applied to phased array systems of different scales. The antenna needs to be designed according to the different scales of the phased array system, and the lower chip carrier only needs to change the corresponding number of modules to match the phased array system of the appropriate scale;

[0026] (4) High product yield: The packaged product is divided into an upper antenna board with an integrated design and a lower chip carrier board with a multi-module RF front-end chipset, so it can be tested in parts; at the same time, the antenna process of the integrated design is stable and the structure is relatively simple. If a problem is detected in the front-end chipset in the lower chip carrier board, only the corresponding module needs to be replaced, so the overall packaging structure can ensure a high yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] FIG1-1 is a schematic structural diagram of a first embodiment of a three-dimensional heterogeneous integrated millimeter wave system packaging structure according to the present invention;

[0029] 1-2 is another structural schematic diagram of Embodiment 1 of the three-dimensional heterogeneous integrated millimeter wave system packaging structure of the present invention;

[0030] FIG2 is a schematic structural diagram of a second embodiment of a three-dimensional heterogeneous integrated millimeter wave system packaging structure according to the present invention;

[0031] FIG3 is a schematic structural diagram of a third embodiment of a three-dimensional heterogeneous integrated millimeter wave system packaging structure according to the present invention;

[0032] FIG4 is a schematic structural diagram of a fourth embodiment of a three-dimensional heterogeneous integrated millimeter wave system packaging structure according to the present invention;

[0033] FIG5 is a schematic structural diagram of a fifth embodiment of a three-dimensional heterogeneous integrated millimeter wave system packaging structure according to the present invention;

[0034] Explanation of the accompanying drawings: 1. Upper antenna board; 2. Core layer; 3. Packaged antenna; 4. Solder ball; 5. First chip; 5-1. Silicon-based millimeter wave chip; 5-2. Power management chip; 6. Metallized via; 7. Second chip; 8. Upper redistribution layer; 9. Lower redistribution layer; 10. Surface mount device; 11. Integrated passive device; 12. Shielding copper pillar; 13. Shielding copper layer. DETAILED DESCRIPTION

[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0036] The purpose of the present invention is to provide a three-dimensional heterogeneous integrated millimeter-wave system packaging structure that integrates antennas, RF control chips, and RF front-end chips, conducts integrated production design, improves integration and packaging yield, and meets the packaging requirements of multi-channel millimeter-wave phased arrays for communication or radar applications.

[0037] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0038] The present invention provides a three-dimensional heterogeneous integrated millimeter wave system packaging structure, comprising: an upper antenna board 1 and a lower chip carrier board assembled together; a gap is provided between the upper antenna board 1 and the lower chip carrier board, and the upper antenna board 1 and the lower chip carrier board are connected by solder balls; the upper antenna board 1 is an integrated structure, internally provided with a packaged antenna 3 and a feed circuit; the lower chip carrier board is a modular structure, provided with a first chipset and a second chipset, the second chipset being located below the first chipset, the first chipset including a plurality of first chips 5, and the second chipset including a plurality of second chips 7, the first chips 5 and the second chips 7 being heterogeneous chips, the active surfaces of the first chips 5 and the second chips 7 facing each other, but staggered in the vertical direction;

[0039] The lower chip carrier board is composed of an upper rewiring layer 8, a core layer 2, and a lower rewiring layer 9 stacked in sequence from top to bottom; the upper antenna board 1 is provided with a plurality of vertically penetrating metallized vias, which are connected to the upper rewiring layer 8 through solder balls / bumps; the upper rewiring layer 8, the core layer 2, and the lower rewiring layer 9 are respectively provided with a plurality of metallized vias, and interconnection of any layer is achieved through the metallized vias;

[0040] The first chip 5 is electrically connected to the second chip 7 by metal interconnection through metalized vias and / or solder balls.

[0041] For example, the first chip 5 can be a silicon-based RF control chip, which is manufactured by CMOS, SiGe BiCMOS or SOI process; the second chip 7 can be a compound RF front-end chip, which is manufactured by GaAs, GaN or InP process.

[0042] The upper antenna board 1 is made of a planar circuit / packaging process, including but not limited to LTCC, HDI, etc.

[0043] The three-dimensional heterogeneous integrated millimeter wave system packaging structure is characterized by being divided into two parts, the upper antenna board 1 in the upper part containing a large-scale packaged antenna that does not need to be divided; the lower chip carrier board in the lower part is a plurality of combinable packaging substrates, each of which contains a plurality of heterogeneous first chips 5 and second chips 7, which can be a plurality of control silicon-based chips and multiple RF front-end chips.

[0044] The large-scale packaged antenna in the upper portion can be made of low-temperature co-fired ceramic (LTCC), laminated with a high-density interconnect substrate (HDI), or made of glass. As long as the pins of the packaged antenna are compatible with the pads of the underlying chip carrier, the antenna can be of various types. If the upper antenna board uses a simpler non-cavity manufacturing process, large-sized solder balls are required to support a certain height to accommodate the chip. The upper antenna board can also have a cavity to accommodate the chip, while using smaller solder balls to reduce the overall package height. A redistribution layer and integrated passive devices (IPDs) can also be set up inside the upper antenna board to achieve functions such as filtering and decoupling.

[0045] The structure of the lower chip carrier in the lower half is symmetrically distributed around the central core layer 2. Thin-film dielectrics and metal conductors are fabricated on both the upper and lower surfaces of the core layer through a lamination process. The thickness and material of the dielectric layer are adjusted according to actual conditions, and a variety of materials can be used to form the laminated structure. Three or five chips can be embedded in the central core layer 2, with the silicon-based chip flipped upside down on the upper surface of the lower chip carrier. Solder balls or micro-bumps are used to bring the silicon-based chip's signals to the substrate surface for electrical connection. Metallized vias at the bottom of the three or five chips transfer heat to the solder balls for dissipation. Surface-mounted devices (SMDs), such as capacitors, can be soldered to the surface of the lower chip carrier.

[0046] Alternatively, a III-V chip can be placed beneath the lower chip carrier for soldering, with the silicon-based chip placed on the upper surface of the lower chip carrier. Heat dissipation from the bottom of the III-V chip is achieved through heat sinks, and the PCB connected to it requires a cavity to accommodate the heat sinks. For example, the silicon-based chip can be embedded in the lower chip carrier and directly connected to the III-V chip, achieving the shortest electrical connection distance and reducing the difficulty of antenna fabrication.

[0047] There can be more than one silicon-based chip. A silicon-based millimeter-wave chip and multiple power management chips can be flipped upside down on the top surface of the underlying chip carrier. A shielding layer can be placed between the multiple silicon-based chips to prevent electromagnetic interference. The shielding layer can be composed of a shielding copper layer and shielding copper pillars.

[0048] The edge of each module's lower chip carrier is designed with a slot to facilitate the assembly of multiple modules. Large solder balls are soldered to the lower surface of the lower chip carrier for electrical connection to the printed circuit board (PCB).

[0049] The working principle of the three-dimensional heterogeneous integrated millimeter wave system packaging structure is as follows:

[0050] Signal reception: The signal is received by the packaged antenna (AiP) in the upper antenna board, then transmitted to the RF front-end chip in the lower chip carrier board for low-noise amplification, and then transmitted to the silicon-based millimeter wave chip for processing;

[0051] Signal transmission: The signal from the silicon-based millimeter wave chip is transmitted to the RF front-end chip for power amplification, and then transmitted to the AiP to be transmitted into free space;

[0052] Power supply: The solder balls at the bottom of the millimeter wave system packaging structure connect the lower chip carrier to the printed circuit board (PCB). Through the solder balls, the PCB supplies DC power to each chip.

[0053] The positions of the first chip and the second chip are diversified, thereby forming various types of three-dimensional heterogeneous integrated millimeter wave system packaging structures, as detailed in the following embodiments.

[0054] Example 1:

[0055] As shown in Figure 1-1 , the first chipset is disposed on the upper surface of the lower chip carrier, while the second chipset is embedded within the core layer 2 of the lower chip carrier, located between the upper redistribution layer 8 and the lower wiring layer 9. The lower surface of the second chip 7 is provided with metallized vias connected to solder balls. The metallized vias allow the second chip 7 to transfer heat to the solder balls for dissipation, and the metallized vias also allow electrical connection to the solder balls.

[0056] A groove is provided on the lower surface of the upper antenna board 1, the first chip group is arranged in the groove, the lower surface of the first chip 5 is the active surface of the first chip 5, and solder balls are provided on the lower surface of the first chip 5. The upper surface of the second chip 7 is the active surface of the second chip 7, and the upper surface of the second chip 7 is provided with metallized vias and solder balls, which are connected to the solder balls provided on the lower surface of the first chip 5.

[0057] Specifically, a groove is provided at the center of the lower surface of the upper antenna board 1. A first chip 5 is disposed within the groove. A solder ball 4 is provided at the bottom of the first chip 5. A metallized via is provided on the upper surface of the second chip 7. The first chip 5 and the second chip 7 are connected via the metallized via and the solder ball. The first chip 5 can be a silicon-based millimeter wave chip, and the second chip 7 can be a III-V chip.

[0058] For example, as shown in FIG1-2 , a surface mount device 10 may be further provided on the upper surface of the lower chip carrier; the lower chip carrier is formed by stacking multiple material layers.

[0059] The three-dimensional heterogeneous integrated millimeter-wave system packaging structure in Example 1 includes an upper-layer large-scale packaged antenna fabricated from low-temperature co-fired ceramic (LTCC) and comprising 256 antenna elements. The lower-layer chip carrier utilizes eight packaged substrate modules, layered using composite materials. Each of the four antenna elements is controlled by a Group III-V gallium arsenide (GaAs) FEM chip. Each of the eight GaAs FEMs is interconnected with an eight-channel silicon-based millimeter-wave chip, forming a modular lower-layer chip carrier.

[0060] The upper antenna board requires a cavity on its lower surface to accommodate the silicon-based millimeter-wave chip. The feed port also needs to be designed based on the signal port of the gallium arsenide FEM on the underlying chip carrier. Integrated passive components 11 are placed within the antenna layer to provide filtering for the antenna.

[0061] The lower chip carrier consists of eight layers of metal, centered around the core layer, in a symmetrical design. From the inside out, the dielectric layers are filled with ABF, PP, and liquid crystal polymer (LCP) materials. A GaAs FEM is embedded in the core layer, and signals are routed from the fourth layer through the ABF dielectric vias to the third metal routing layer. The FEM's metallized backside is routed through metallized vias to the solder balls on the bottom layer for heat dissipation. Because ABF material can be made relatively thin, allowing for the use of finer vias, it is very effective for routing signals to narrow-pitch pads. The dielectric between the second and third layers is PP, offering excellent high-frequency performance and good fill. The dielectric between the first and second layers is LCP, whose excellent high-frequency performance supports the high-frequency signal routing on the surface layers. The signal routing from the core layer to the surface layer is 4.82mm long, with an insertion loss of -1.5dB at 76GHz.

[0062] The silicon-based millimeter-wave chip uses a gold-gold bonding process, with 90µm gold balls electrically connected to the top surface of the package substrate. 350µm solder balls are used on the bottom surface of the package substrate to connect to the PCB. The GaAs chip's backside is metallized, allowing metal vias to be routed to the solder balls on the bottom surface of the package substrate to dissipate heat. To power the GaAs chip, a small surface-mount capacitor is soldered to the package substrate to minimize DC ripple.

[0063] A fixed frame is used on the lower chip carrier to splice the modules. The thickness of the fixed frame is slightly thicker than the module substrate, so that the module edge can be embedded in the fixed frame.

[0064] Example 2:

[0065] As shown in FIG2 , the main difference from the first embodiment is that the RF front-end chip is not embedded in the core layer of the lower chip carrier, but is soldered to the bottom of the lower chip carrier, and the overall structure is supported by larger solder balls.

[0066] Specifically, the first chipset is arranged on the upper surface of the lower chip carrier, and the second chipset is arranged on the lower surface of the lower chip carrier; the lower surface of the first chip 5 is provided with solder balls, which are connected to the upper redistribution layer 8, and the upper surface of the second chip 7 is provided with solder balls, which are connected to the lower redistribution layer 9. The lower surface of the second chip 7 is provided with heat dissipation teeth for heat dissipation, and the bottom of the millimeter wave system packaging structure is connected to the PCB board, and the PCB board is provided with an opening for accommodating the heat dissipation teeth.

[0067] The lower surface of the upper antenna board 1 has a recess at its center. A first chip 5 is positioned within the recess. Solder balls are located at the bottom of the first chip 5. Metallized vias are provided on the upper surface of the second chip 7, connecting to the solder balls on the bottom of the first chip 5. The first chip 5 can be a silicon-based millimeter-wave chip, and the second chip 7 is a Group III-V chip. The second chip 7 and the first chip 5 are electrically connected via metallized vias.

[0068] Example 3:

[0069] As shown in FIG3 , the third embodiment is similar to the first embodiment, except that the upper antenna board 1 no longer has a cavity, but is supported to a certain height by using large solder balls to accommodate the chip.

[0070] Specifically, the second chip 7 is embedded in the core layer 2 of the lower chip carrier board. The lower surface of the second chip 7 is provided with metallized vias and connected to solder balls. The second chip 7 transfers heat to the solder balls through the metallized vias for heat dissipation or electrical connection between different layers.

[0071] The first chip 5 is arranged in the gap between the upper antenna board 1 and the lower chip carrier board. The diameter of the large solder ball between the upper antenna board 1 and the lower chip carrier board is greater than the thickness of the first chip 5. A solder ball is provided at the bottom of the first chip 5, which is connected to the upper redistribution layer 8; the upper surface of the second chip 7 is provided with a metallized via connected to the solder ball at the bottom of the first chip 5.

[0072] Compared with the first embodiment, the implementation of this embodiment is simpler and more convenient in terms of process.

[0073] Example 4:

[0074] As shown in Figure 4, Example 4 is similar to Example 1, except that the first chip 5 on the surface of the lower chip carrier not only includes a silicon-based millimeter-wave chip, but also a power management unit (PMU) responsible for DC power supply. The PMU is responsible for providing DC bias voltage to each RF front-end chip and adjusts the bias voltage of the RF front-end chip based on control commands received from the silicon-based millimeter-wave chip to achieve the purpose of controlling the RF front-end chip gain.

[0075] Because multiple silicon-based chips are placed on the same horizontal plane, an electromagnetic shielding layer is required around the silicon-based millimeter-wave chip, which serves as the master control chip, to prevent electromagnetic interference. Closely spaced shielding copper pillars 12 are added around the master control chip, and a metal layer, such as a shielding copper layer 13, is added to the bottom of the chip to form an electromagnetic shielding layer.

[0076] Specifically, the second chip 7 is embedded in the interior of the lower chip carrier board, and the lower surface of the second chip 7 is provided with metallized vias and connected to solder balls. The second chip 7 can transfer heat to the solder balls through the metallized vias for heat dissipation or for electrical connection.

[0077] The lower surface of the upper antenna board 1 is provided with a groove, within which the first chip 5 is positioned. Solder balls are located at the bottom of the first chip 5, and the upper surface of the second chip 7 is provided with metallized vias connected to the solder balls at the bottom of the first chip 7. There are multiple first chips 5, including a silicon-based millimeter-wave chip 5-1 and multiple power management chips 5-2. Correspondingly, there are multiple grooves, one of which is located at the center of the lower surface of the upper antenna board for positioning a silicon-based millimeter-wave chip 5-1. The remaining grooves are for positioning power management chips 5-2 and are arranged around the silicon-based millimeter-wave chip 5-1. An electromagnetic shielding layer is provided between the multiple first chips.

[0078] Embodiment 5:

[0079] Example 5 is similar to Example 2, except that the silicon-based millimeter-wave chip is embedded in the core layer 2 of the lower chip carrier board. This eliminates the need for a cavity in the upper antenna board 1 and allows the use of small solder balls. The RF front-end chip and the silicon-based millimeter-wave chip can be electrically connected directly via solder balls, minimizing interconnect distance and resulting in superior high-frequency electrical performance.

[0080] Specifically, the first chipset is embedded in the core layer 2 of the lower chip carrier, the second chipset is arranged on the lower surface of the lower chip carrier, the upper surface of the second chip 7 is provided with solder balls, which are connected to the lower redistribution layer 9, and the first chip 5 and the second chip 7 are directly electrically connected through the solder balls; the lower surface of the second chip 7 is provided with heat dissipation teeth for heat dissipation, the bottom of the millimeter wave system packaging structure is connected to the PCB board, and the PCB board is provided with an opening for accommodating the heat dissipation teeth.

[0081] In summary, the three-dimensional heterogeneous integrated millimeter wave system packaging structure provided by the present invention (1) solves the problem of low RF packaging integration: it integrates the antenna, main control chip and front-end chip; (2) solves the problem of large-scale antenna phase consistency: the antenna is not split and produced and then recombined, but is directly produced as a whole; (3) solves the problem of different packaging designs required for different antennas: a single design can meet the packaging requirements of different antennas; (4) solves the problem of high interconnection loss between chips: the highly integrated system reduces the interconnection length, and the use of excellent high-frequency materials further reduces the interconnection loss; (5) solves the problem of low yield and high cost of multi-chip packaging: the package is divided into an integrated antenna without a chip in the upper part and a multi-module packaging substrate with a chip in the lower part. When a problem is detected in a chip, only the module with the problem needs to be replaced, without replacing the entire package.

[0082] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The above examples are only intended to help understand the method and core concept of the present invention. At the same time, those skilled in the art will find that the specific implementation methods and application scopes may vary based on the concept of the present invention. In summary, the contents of this specification should not be construed as limiting the present invention.

Claims

1. A three-dimensional heterogeneous integrated millimeter wave system packaging structure, characterized in that: The upper antenna board and the lower chip carrier board are assembled and constituted; a gap is set between the upper antenna board and the lower chip carrier board, and they are connected by solder balls; the upper antenna board is an integrated structure, and a packaged antenna and a feeding circuit are arranged inside; the lower chip carrier board is a modular structure, and a first chipset and a second chipset are arranged, the second chipset is located below the first chipset, the first chipset includes a plurality of first chips, the second chipset includes a plurality of second chips, the first chipset and the second chips are heterogeneous chips, and the active surfaces of the first chips and the second chips are opposite, but are staggered in the vertical direction; The lower chip carrier is composed of an upper rewiring layer, a core layer and a lower rewiring layer stacked in sequence from top to bottom; the upper antenna board is provided with a plurality of vertically penetrating metallized vias, which are connected to the upper rewiring layer through solder balls / bumps, and the upper rewiring layer, the core layer and the lower rewiring layer are respectively provided with a plurality of metallized vias, and any layer interconnection is achieved through the metallized vias; The first chip is electrically connected to the second chip by metal interconnection through metalized vias and / or solder balls; The upper antenna board is made by planar circuit / packaging technology.

2. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 1, characterized in that: The first chipset is arranged on the upper surface of the lower chip carrier, the second chipset is embedded in the core layer of the lower chip carrier, located between the upper rewiring layer and the lower wiring layer, and the lower surface of the second chip is provided with metallized vias and connected with solder balls.

3. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 1, characterized in that: The first chipset is arranged on the upper surface of the lower chip carrier, and the second chipset is arranged on the lower surface of the lower chip carrier; the lower surface of the first chip is provided with solder balls connected to the upper redistribution layer, the upper surface of the second chip is provided with solder balls connected to the lower redistribution layer, the lower surface of the second chip is provided with heat dissipation teeth for heat dissipation, the bottom of the millimeter wave system packaging structure is connected to the PCB board, and the PCB board is provided with an opening for accommodating the heat dissipation teeth.

4. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 2 or 3, characterized in that: A groove is provided on the lower surface of the upper antenna board, the first chip group is arranged in the groove, the lower surface of the first chip is the active surface of the first chip, solder balls are arranged on the lower surface of the first chip, the upper surface of the second chip is the active surface of the second chip, and metallized vias and solder balls are arranged on the upper surface of the second chip, which are connected to the solder balls arranged on the lower surface of the first chip.

5. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 4, characterized in that: The first chip is set to one, and adopts a silicon-based RF control chip. Correspondingly, the groove is set to one, which is located at the center of the lower surface of the upper antenna board; the second chip is set to several, and adopts a compound RF front-end chip.

6. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 4, characterized in that: The first chip is set to be multiple, including a silicon-based RF control chip and multiple power management chips. Correspondingly, the groove is set to be multiple, wherein one groove is located at the center of the lower surface of the upper antenna board, which is used to set a silicon-based RF control chip, and the remaining grooves are used to set power management chips and are set around the silicon-based RF control chip.

7. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 2, characterized in that: The first chipset is arranged in the gap between the upper antenna board and the lower chip carrier board, the diameter of the solder ball between the upper antenna board and the lower chip carrier board is greater than the thickness of the first chip, and the bottom of the first chip is provided with a solder ball connected to the upper rewiring layer; the upper surface of the second chip is provided with a metallized via connected to the solder ball at the bottom of the first chip.

8. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 1, characterized in that: The first chipset is embedded in the core layer of the lower chip carrier, the second chipset is arranged on the lower surface of the lower chip carrier, the upper surface of the second chip is provided with solder balls connected to the lower redistribution layer, and the first chip and the second chip are directly electrically connected through the solder balls; the lower surface of the second chip is provided with heat dissipation teeth for heat dissipation, the bottom of the millimeter wave system packaging structure is connected to the PCB board, and the PCB board is provided with an opening for accommodating the heat dissipation teeth.

9. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 1, characterized in that: The upper surface of the lower chip carrier is provided with a surface mounting component; the lower chip carrier is formed by stacking multiple material layers.

10. The three-dimensional heterogeneous integrated millimeter wave system packaging structure according to claim 1, characterized in that: The first chip adopts a silicon-based RF control chip, which is manufactured by CMOS, SiGe BiCMOS or SOI process; the second chip adopts a compound RF front-end chip, which is manufactured by GaAs, GaN or InP process.

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