Semiconductor laser and method for manufacturing same

Abstract

This semiconductor laser is provided with a groove (104) that is formed in a cladding layer (102). The groove (104) is formed so as to be positioned on an Si core (103) and to extend along the Si core (103). In addition, the groove (104) is formed so as to reach the Si core (103) in the thickness direction. A lower semiconductor layer (105) is formed on the cladding layer (102) by epitaxial growth from the upper surface of the Si core (103) on the bottom surface of the groove (104) so as to fill the groove (104).

Description

Semiconductor laser and its manufacturing method

[0001] The present invention relates to a semiconductor laser and a method for manufacturing the same.

[0002] To achieve compact, integrated, low-power, and low-cost optical transceivers, technology that integrates passive elements such as Si waveguides with active elements such as lasers, photodetectors, and modulators on Si substrates, which can be fabricated at low cost and with large diameters, has been attracting attention. Until now, mature Si microfabrication technology has already achieved monolithic integration of small, low-loss Si optical waveguide elements, photodetectors, and modulators on large-diameter Si substrates. Regarding laser integration on Si substrates, it has been difficult to fabricate lasers using indirect transition semiconductors such as Si and Ge, which have traditionally been used on silicon platforms. This necessitated the integration of heterogeneous direct transition semiconductors, such as III-V group compound semiconductors. However, thin-film laser integration has been achieved, as shown in Non-Patent Document 1.

[0003] The structure proposed in Non-Patent Document 1 is a thin film structure with a thickness of typically 350 nm or less so that the III-V compound semiconductor layer on Si does not exceed the critical film thickness. In this case, the effective refractive index of the III-V compound semiconductor layer is roughly matched with the effective refractive index of a 220 nm thick Si waveguide that is commonly used in the field of silicon photonics, which has the advantage of facilitating optical coupling between the III-V compound semiconductor layer and the Si waveguide.

[0004] However, laser integration with the above-described configuration has been achieved using so-called heterogeneous integration technologies, such as direct bonding and transfer printing. However, laser processing processes using heterogeneous integration technologies such as direct bonding require the use of expensive, small-sized III-V compound semiconductor substrates, unlike those using monolithic integration technologies. These create bottlenecks in material costs and throughput. For this reason, there is a demand for monolithic integration of high-performance thin-film semiconductor lasers with the structure proposed in Non-Patent Document 1.

[0005] However, because Si and III-V compound semiconductors have different lattice constants and thermal expansion coefficients, it is difficult to monolithically integrate high-quality III-V compound semiconductors on Si. The most common solution to this problem is to insert a thick buffer layer of several micrometers on the Si. However, the presence of this buffer layer has the fatal drawback of making it difficult to optically couple the active layer to the Si waveguide. For this reason, there is a demand for integrating high-quality III-V compound semiconductors on a thin buffer layer or without a buffer layer.

[0006] A technique called Aspect Ratio Trapping (ART) is known as a method for achieving this (Non-Patent Document 2). This technique uses Si layers 401 and 401a, first selective growth masks 402 and 402a, and second selective growth masks 403 and 403a, as shown in Figure 6. Grooves 404 and 404a are formed by the first selective growth masks 402 and 402a and the second selective growth masks 403 and 403a.

[0007] The groove depth h of the grooves 404, 404a is made larger than the groove width w of the grooves 404, 404a, and III-V compound semiconductor layers 405, 405a are epitaxially grown on the Si layers 401, 401a. During this growth, the growth of defects 406 generated at the interfaces between the Si layers 401, 401a and the III-V compound semiconductor layers 405, 405a is stopped (terminated) by the sidewalls of the grooves 404, 404a, and high-quality III-V compound semiconductor crystals are grown above the defect regions. A waveguide-type photodiode disclosed in Non-Patent Document 3 is an example of a thin-film optical device fabricated using this technique.

[0008] T. Aihara et al., "Membrane III-V / Si DFB Laser Using Uniform Grating and Width-Modulated Si Waveguide", Journal of Lightwave Technology, vol. 38, no. 11, pp. 2961-2967, 2020.JZ Li et al., "Defect reduction of GaAs epitaxy on Si (001) using selective aspect ratio trapping", Applied Physics Letters, vol. 91, no. 2, 021114, 2007.P. Wen et al., "Waveguide coupled III-V photodiodes monolithically integrated on Si", Nature Communications, vol. 13, no. 909, 2022.

[0009] However, in the optical device disclosed in Non-Patent Document 3, the III-V compound semiconductor layers are formed using epitaxial growth technology in the horizontal direction of the substrate using a Si layer as a seed crystal. Therefore, with this technology, the III-V compound semiconductor layers and the active layer are present on the same plane as the Si waveguide formed using the same Si layer. This poses a problem in that it is difficult to integrate the Si waveguide and the III-V compound semiconductor layers at different positions in the thickness direction, as disclosed in Non-Patent Document 1.

[0010] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to make it possible to more easily manufacture a semiconductor laser in which a Si waveguide and a III-V compound semiconductor layer are integrated at different positions in the thickness direction.

[0011] a lower semiconductor layer made of a compound semiconductor formed on the cladding layer, the lower semiconductor layer growing epitaxially from an upper surface of the Si core at the bottom of the groove to fill the groove and forming the cladding layer along the Si core; an active layer made of a compound semiconductor formed on the lower semiconductor layer, extending along the Si core and being optically coupled to the Si core; an upper semiconductor layer made of a compound semiconductor and formed on the active layer; p-type and n-type semiconductor layers made of compound semiconductors formed on the cladding layer and in contact with the active layer; an n-type electrode connected to the n-type semiconductor layer; a p-type electrode connected to the p-type semiconductor layer; and a resonator structure for confining light in the active layer, the p-type and n-type semiconductor layers being formed so as to sandwich the lower semiconductor layer, the active layer, and the upper semiconductor layer in a plan view, and the depth of the groove is greater than the width of the groove.

[0012] A method for manufacturing a semiconductor laser according to the present invention includes a first step of forming an optical waveguide on a substrate, the optical waveguide being made up of a Si core and a cladding layer in which the Si core is embedded; a second step of forming a groove in the cladding layer above the Si core, the groove extending along the Si core and reaching the Si core; a third step of forming a lower semiconductor layer made of a compound semiconductor on the cladding layer by epitaxial growth from the top surface of the Si core at the bottom of the groove, filling the groove and extending along the Si core; a fourth step of forming an active layer made of a compound semiconductor on the lower semiconductor layer, the active layer extending along the Si core in a state capable of being optically coupled to the Si core; a fifth step of forming an upper semiconductor layer made of a compound semiconductor on the active layer; a sixth step of forming a p-type semiconductor layer and an n-type semiconductor layer made of a silicon dioxide gas on the cladding layer in contact with the active layer; a seventh step of forming an n-type electrode connected to the n-type semiconductor layer and a p-type electrode connected to the p-type semiconductor layer; and an eighth step of forming a resonator structure for optical confinement in the active layer, wherein the p-type semiconductor layer and the n-type semiconductor layer are formed to sandwich the lower semiconductor layer, the active layer, and the upper semiconductor layer in a planar view, the grooves are formed so that their depth is greater than their width, and the lower semiconductor layer is formed by epitaxial growth in a state free of defects above the cladding layer by stopping the growth of defects generated from the upper surface of the Si core at the bottom of the groove at the side of the groove by aspect ratio trapping using the grooves.

[0013] As described above, according to the present invention, a lower semiconductor layer is formed on the cladding layer by epitaxial growth from the upper surface of the Si core at the bottom of the groove formed in the cladding layer above the Si core, and an active layer is then formed thereon. This makes it possible to more easily manufacture a semiconductor laser in which a Si waveguide and a III-V compound semiconductor layer are integrated at different positions in the thickness direction.

[0014] FIG. 1 is a cross-sectional view showing the configuration of a semiconductor laser according to an embodiment of the present invention. FIG. 2A is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 2B is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 2C is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 2D is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 2E is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 2F is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 2G is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 2H is a cross-sectional view showing the state of the semiconductor laser at an intermediate step for explaining a method for manufacturing a semiconductor laser according to an embodiment of the present invention. FIG. 3 is a characteristic diagram showing the dependence of the optical confinement factor of the active layer 106, Si core 103, and groove 104 on the width of groove 104 from 0 to 100 nm when the width of Si core 103 is 440 nm. Fig. 4 is a characteristic diagram showing the dependence of the optical confinement factor of the active layer 106, Si core 103, and groove 104 on the width of the groove 104 from 0 to 100 nm when the width of the Si core 103 is set to 700 nm. Fig. 5 is a characteristic diagram showing the dependence of the optical confinement factor of each layer when the width of the groove 104 is fixed at 100 nm and the width of the Si core 103 is changed from 250 nm to 800 nm. Fig. 6 is an explanatory diagram explaining aspect ratio trapping.

[0015] A semiconductor laser according to an embodiment of the present invention will be described below with reference to Fig. 1. This semiconductor laser includes a cladding layer 102 formed on a substrate 101 and a Si core 103 embedded in the cladding layer 102. The cladding layer 102 is made of silicon oxide (SiO2), for example. x1, and the Si core 103 and the cladding layer 102 form an optical waveguide.

[0016] This semiconductor laser also includes a groove 104 formed in the cladding layer 102. The groove 104 is disposed on the Si core 103 and extends along the Si core 103. The groove 104 is formed to reach the Si core 103 in the thickness direction. The bottom surface of the groove 104 becomes the upper surface of the Si core 103. The groove 104 is formed so that the depth of the groove 104 is greater than the width of the groove 104.

[0017] This semiconductor laser also includes, on the cladding layer 102, a lower semiconductor layer 105, an active layer 106, and an upper semiconductor layer 107, all made of III-V compound semiconductors.

[0018] The lower semiconductor layer 105 is formed on the cladding layer 102 by epitaxial growth from the upper surface of the Si core 103 at the bottom of the groove 104, filling the groove 104. The lower semiconductor layer 105 is formed by epitaxial growth in a state where there are no defects above the cladding layer 102, by using aspect ratio trapping (ART) using the groove 104 to stop the growth of defects generated from the upper surface of the Si core 103 at the bottom of the groove 104 at the side of the groove 104. The lower semiconductor layer 105 is also formed extending along the Si core 103. The lower semiconductor layer 105 can be made of, for example, undoped InP. The lower semiconductor layer 105 can be formed directly on the Si core 103.

[0019] The active layer 106 is formed on the lower semiconductor layer 105 in a state capable of optically coupling with the Si core 103. The active layer 106 is formed to extend along the Si core 103 together with the lower semiconductor layer 105. The active layer 106 may have, for example, a multiple quantum well structure in which well layers and barrier layers made of InGaAsP are alternately stacked. Alternatively, the active layer 106 may have a multiple quantum well structure in which well layers made of InGaAs and barrier layers made of InP are alternately stacked.

[0020] The upper semiconductor layer 107 is formed on the active layer 106. The upper semiconductor layer 107 is formed to extend along the Si core 103 together with the active layer 106. The upper semiconductor layer 107 may be made of, for example, undoped InP (i-InP). The lower semiconductor layer 105 and the upper semiconductor layer 107 may be clad to confine light to the active layer 106.

[0021] The Si core 103 and the active layer 106 can be roughly matched in effective refractive index, enabling highly efficient optical coupling between the Si core 103 and the active layer 106. Furthermore, by forming a double heterostructure with the lower semiconductor layer 105, the upper semiconductor layer 107, and the active layer 106, carriers can be more efficiently injected into the active layer 106.

[0022] Moreover, a diffraction grating 112 is formed above the active layer 106 as a resonator structure that confines light to the active layer 106. The diffraction grating 112 is composed of, for example, a grating pattern formed on the top surface of the upper semiconductor layer 107.

[0023] This semiconductor laser also includes a p-type semiconductor layer 108 and an n-type semiconductor layer 109 formed on the cladding layer 102 and in contact with the active layer 106. The p-type semiconductor layer 108 and the n-type semiconductor layer 109 are formed to sandwich the lower semiconductor layer 105, the active layer 106, and the upper semiconductor layer 107 in a plan view. With this configuration, a current is injected into the active layer 106 in a direction parallel to the plane of the substrate 101. The p-type semiconductor layer 108 has, for example, a Zn content of 1×10 18 cm -3 The n-type semiconductor layer 109 can be made of p-type InP doped to a degree of 1×10 18 cm -3 It may be constructed from lightly doped n-type InP.

[0024] The semiconductor laser also includes a p-type electrode 110 electrically connected to the p-type semiconductor layer 108, and an n-type electrode 111 electrically connected to the n-type semiconductor layer 109. In this example, the semiconductor laser also includes a first contact layer 114 formed on the p-type semiconductor layer 108, and a second contact layer 115 formed on the n-type semiconductor layer 109.

[0025] The p-type electrode 110 is formed on the first contact layer 114 in ohmic contact, and the n-type electrode 111 is formed on the second contact layer 115 in ohmic contact. The first contact layer 114 has a Zn content of 1×10 19 cm -3 The second contact layer 115 may be made of p-type InP doped to a degree of 1×10 19 cm -3 It may be constructed from lightly doped n-type InP.

[0026] An insulating layer 113 is formed on and in contact with the upper semiconductor layer 107 , the p-type semiconductor layer 108 , and the n-type semiconductor layer 109 between the first contact layer 114 and the second contact layer 115 .

[0027] As described above, the lower semiconductor layer 105 is formed by epitaxial growth from the upper surface of the Si core 103 at the bottom of the groove 104, using the Si core 103 as a seed crystal, thereby filling the groove 104. This allows defects (dislocations) that occur at the interface between the lower semiconductor layer 105 and the Si core 103 to be terminated on the inner wall of the groove 104, making the lower semiconductor layer 105 above the cladding layer 102 a high-quality crystal. For example, if the width w of the groove 104 is set to 100 (nm) and the height h of the groove 104 is set to 150 (nm), a sufficient ART effect can be expected, making it possible to grow a high-quality III-V compound semiconductor on the cladding layer 102. This means that a high-quality active layer 106 can be formed at a distance that allows optical coupling with the Si core 103.

[0028] The groove 104 can have a width of 0.1 μm or less. By making the groove 104 have a width of 0.1 μm or less, leakage of light from the Si core 103 to the lower semiconductor layer 105 side can be suppressed.

[0029] Next, a method for manufacturing a semiconductor laser according to an embodiment of the present invention will be described with reference to FIGS. 2A to 2H.

[0030] First, as shown in FIG. 2A , an optical waveguide consisting of a Si core 103 and a cladding layer 102 in which the Si core 103 is embedded is formed on a substrate 101 (step 1). Next, as shown in FIG. 2B , a groove 104 is formed in the cladding layer 102 above the Si core 103, extending along the Si core 103 and reaching the Si core 103 (step 2). For example, the groove 104 can be formed by selectively etching away the cladding layer 102 using a dry etching process using a mask pattern formed by known lithography techniques. The groove 104 is formed so that its depth is greater than its width. For example, the groove 104 is formed to have a width of 0.1 μm or less.

[0031] 2C , a lower semiconductor layer 105 is formed on the cladding layer 102, filling the grooves 104 and extending along the Si core 103 (third step). The lower semiconductor layer 105 is formed by epitaxial growth from the upper surface of the Si core 103 at the bottom of the grooves 104. For example, the lower semiconductor layer 105 is formed by epitaxially growing undoped InP using a well-known metalorganic chemical vapor deposition method.

[0032] The lower semiconductor layer 105 is formed by aspect ratio trapping using the trenches 104, in the process of growing a III-V compound semiconductor (e.g., InP), by stopping the growth of defects generated from the upper surface of the Si core 103 at the bottom of the trenches 104 at the side surfaces of the trenches 104, thereby performing epitaxial growth in a state where there are no defects above the cladding layer 102. During this epitaxial growth, growth in a direction parallel to the plane of the substrate 101 is appropriately controlled, and the width of the lower semiconductor layer 105 in the width direction of the trenches 104 is formed to a set value.

[0033] 2D , an active layer 106 made of a III-V compound semiconductor is formed on the lower semiconductor layer 105, extending along the Si core 103 and capable of optically coupling to the Si core 103 (step 4). The active layer 106 is formed by epitaxially growing the III-V compound semiconductor from the upper surface of the lower semiconductor layer 105. The sides of the lower semiconductor layer 105 are the upper surfaces of the cladding layer 102 made of a dielectric material such as silicon oxide, and by appropriately setting the growth conditions for the III-V compound semiconductor, the active layer 106 can be selectively grown only on the lower semiconductor layer 105.

[0034] 2E, an upper semiconductor layer 107 made of a III-V compound semiconductor is formed on the active layer 106 (step 5). For example, the lower semiconductor layer 105 and the upper semiconductor layer 107 are formed by epitaxially growing undoped InP using a well-known metalorganic vapor phase epitaxy method or the like. The sides of the lower semiconductor layer 105 are the upper surfaces of the cladding layer 102 made of a dielectric material such as silicon oxide, and by appropriately setting the growth conditions for the III-V compound semiconductor, the upper semiconductor layer 107 can be selectively grown only on the active layer 106.

[0035] 2F, a p-type semiconductor layer 108 and an n-type semiconductor layer 109 made of compound semiconductors are formed on the cladding layer 102 in contact with the active layer 106 (step 6). The p-type semiconductor layer 108 and the n-type semiconductor layer 109 are formed to sandwich the lower semiconductor layer 105, the active layer 106, and the upper semiconductor layer 107 in plan view.

[0036] For example, a III-V compound semiconductor (e.g., undoped InP) is grown (regrown) from the side of the lower semiconductor layer 105 (upper semiconductor layer 107) in a direction parallel to the plane of the substrate 101 (see References 1 and 2). Both sides of the stacked structure of the lower semiconductor layer 105, active layer 106, and upper semiconductor layer 107 are filled with the grown compound semiconductor layer. Next, a p-type semiconductor layer 108 is formed by doping a p-type impurity into the compound semiconductor layer on one side of the stacked structure of the lower semiconductor layer 105, active layer 106, and upper semiconductor layer 107. Furthermore, an n-type semiconductor layer 109 is formed by doping an n-type impurity into the compound semiconductor layer on the other side of the stacked structure of the lower semiconductor layer 105, active layer 106, and upper semiconductor layer 107.

[0037] Next, as shown in FIG. 2G, a diffraction grating 112 is formed above the active layer 106 as a resonator structure (eighth step).

[0038] Alternatively, a configuration may be adopted in which the first contact layer 114 is formed on the p-type semiconductor layer 108, and the second contact layer 115 is formed on the n-type semiconductor layer 109 (step 9). In this case, both sides of the stacked structure of the lower semiconductor layer 105, the active layer 106, and the upper semiconductor layer 107 are filled with a grown compound semiconductor layer (e.g., undoped InP), and then a compound semiconductor layer (e.g., undoped InGaAs) that will become the first contact layer 114 and a compound semiconductor layer (e.g., undoped InGaAs) that will become the second contact layer 115 are formed. Next, the compound semiconductor layer on one side of the stacked structure of the lower semiconductor layer 105, the active layer 106, and the upper semiconductor layer 107 is doped with a p-type impurity to form the p-type semiconductor layer 108 and the first contact layer 114. Furthermore, the compound semiconductor layer on the other side of the stacked structure of the lower semiconductor layer 105, the active layer 106, and the upper semiconductor layer 107 is doped with an n-type impurity to form an n-type semiconductor layer 109 and a second contact layer 115.

[0039] 2H , a p-type electrode 110 electrically connected to the p-type semiconductor layer 108 is formed on the first contact layer 114, and an n-type electrode 111 electrically connected to the n-type semiconductor layer 109 is formed on the second contact layer 115 (seventh step). Furthermore, an insulating layer 113 is formed on the upper semiconductor layer 107, the p-type semiconductor layer 108, and the n-type semiconductor layer 109 between the first contact layer 114 and the second contact layer 115.

[0040] As described above, according to the embodiment, there is no need for a process such as bonding a III-V compound semiconductor layer formed using a growth substrate made of III-V compound semiconductor to a Si substrate on which an optical waveguide using a Si core is formed. Furthermore, the core structure of the active layer 106 can be formed without patterning using photolithography and etching techniques, which simplifies the manufacturing process.

[0041] In the semiconductor laser according to the embodiment, the III-V compound semiconductor filling the grooves 104 is in contact with the upper surface of part of the Si core 103, which is expected to affect the light confinement in the active layer 106 and the Si core 103. The results of an investigation into this effect are shown below.

[0042] Fig. 3 shows the dependence of the optical confinement coefficient of the active layer 106, Si core 103, and groove 104 on the width of the groove 104 from 0 to 100 nm when the width of the Si core 103 is 440 nm. Fig. 4 shows the dependence of the optical confinement coefficient of the active layer 106, Si core 103, and groove 104 on the width of the groove 104 from 0 to 100 nm when the width of the Si core 103 is 700 nm. In Figs. 3 and 4, (a) shows the dependence of the optical confinement coefficient of the active layer 106, (b) shows the dependence of the optical confinement coefficient of the Si core 103, and (c) shows the dependence of the optical confinement coefficient of the groove 104.

[0043] Here, the active layer 106 has a multiple quantum well structure with a thickness of 100 nm, a width of 500 nm, and a refractive index of 3.5. The calculations were performed assuming that the lower semiconductor layer 105 and the upper semiconductor layer 107 were made of InP with a refractive index of 3.16, and the Si core 103 had a refractive index of 3.478. The calculation results when the groove 104 width was 0 nm correspond to the optical confinement coefficients of each layer in the case of a conventional structure in which the groove 104 does not exist.

[0044] When the width of the Si core 103 is 440 nm, the optical confinement factor of the active layer 106 remains almost unchanged even when the width of the groove 104 is increased, indicating that the presence of the groove 104 has almost no effect. On the other hand, the groove 104 is located in close proximity to the Si / III-V compound semiconductor interface, and it is expected that the crystal quality will be poor and optical loss will become significant. Therefore, it is desirable to minimize the optical intensity distribution in the groove 104 area. Based on the results of Figure 3, the optical confinement factor of the groove 104 increases monotonically with the width of the groove 104, so the width of the groove 104 needs to be as narrow as possible.

[0045] It can be seen that when the width of the Si core 103 is 700 nm, the optical confinement factor of the active layer 106 decreases compared to when the width is 440 nm, and the optical confinement factor of the Si core 103 increases. Based on this result, it can be seen that the optical confinement factor of each layer changes depending on the width of the Si core 103.

[0046] FIG. 5 shows the dependence of the optical confinement coefficient of each layer when the width of the groove 104 is fixed at 100 nm and the width of the Si core 103 is changed from 250 nm to 800 nm. In FIG. 5, (a) shows the dependence of the optical confinement coefficient of the active layer 106, (b) shows the dependence of the optical confinement coefficient of the Si core 103, and (c) shows the dependence of the optical confinement coefficient of the groove 104. As shown in FIG. 5, by adjusting the width of the Si core 103, the relationship between the optical confinement coefficients of the active layer 106 and the Si core 103 can also be adjusted. Returning to the discussion of the case where the width of the Si core 103 is 700 nm, the optical confinement coefficient of the active layer 106 hardly changes even when the width of the groove 104 is widened, similar to when the width is 440 nm. Furthermore, narrowing the width of the groove 104 reduces the optical confinement coefficient of the groove 104, and similarly reduces optical loss.

[0047] As described above, according to the present invention, epitaxial growth is performed from the upper surface of the Si core at the bottom of the groove formed in the cladding layer above the Si core, thereby forming a lower semiconductor layer on the cladding layer, and then forming an active layer on top of that. This makes it possible to more easily manufacture a semiconductor laser in which a Si waveguide and a III-V compound semiconductor layer are integrated at different positions in the thickness direction.

[0048] Some or all of the above-described embodiments may also be described as, but are not limited to, the following supplementary notes.

[0049] [Supplementary Note 1] An optical waveguide comprising a Si core formed on a substrate and a clad layer in which the Si core is embedded; a groove formed in the clad layer above the Si core, extending along the Si core and reaching the Si core; a lower semiconductor layer made of a compound semiconductor, formed on the clad layer by epitaxial growth from the upper surface of the Si core at the bottom of the groove to fill the groove and extending along the Si core; an active layer made of a compound semiconductor formed on the lower semiconductor layer, extending along the Si core in a state capable of being optically coupled to the Si core; a p-type electrode connected to the p-type semiconductor layer; and a resonator structure for confining light in the active layer, the p-type semiconductor layer and the n-type semiconductor layer being formed on the lower semiconductor layer, the active layer, and the upper semiconductor layer in a planar view.

[0050] [Supplementary Note 2] In the semiconductor laser according to Supplementary Note 1, the resonator structure is composed of a diffraction grating formed above the active layer.

[0051] [Supplementary Note 3] The semiconductor laser according to Supplementary Note 1 or 2, further comprising a first contact layer formed on the p-type semiconductor layer and a second contact layer formed on the n-type semiconductor layer, wherein the n-type electrode is formed on the first contact layer and the p-type electrode is formed on the second contact layer.

[0052] [Supplementary Note 4] In the semiconductor laser according to any one of Supplementary Notes 1 to 4, the groove has a groove width of 0.1 μm or less.

[0053] [Supplementary Note 5] A first step of forming an optical waveguide on a substrate, the optical waveguide comprising a Si core and a clad layer in which the Si core is embedded; a second step of forming a groove in the clad layer above the Si core, the groove extending along the Si core and reaching the Si core; a third step of forming a lower semiconductor layer made of a compound semiconductor on the clad layer, the lower semiconductor layer filling the groove and extending along the Si core by epitaxial growth from the upper surface of the Si core at the bottom of the groove; a fourth step of forming an active layer made of a compound semiconductor on the lower semiconductor layer, the active layer extending along the Si core in a state capable of being optically coupled to the Si core; a fifth step of forming an upper semiconductor layer made of a compound semiconductor on the active layer; and a fifth step of forming a p-type semiconductor layer and an n-type semiconductor layer made of a compound semiconductor. a sixth step of forming an n-type electrode connected to the n-type semiconductor layer and a p-type electrode connected to the p-type semiconductor layer on the cladding layer in contact with the active layer, a seventh step of forming an n-type electrode connected to the n-type semiconductor layer and a p-type electrode connected to the p-type semiconductor layer, and an eighth step of forming a resonator structure for confining light in the active layer, wherein the p-type semiconductor layer and the n-type semiconductor layer are formed to sandwich the lower semiconductor layer, the active layer, and the upper semiconductor layer in a planar view, the grooves are formed so that their depth is greater than their width, and the lower semiconductor layer is formed by epitaxially growing the lower semiconductor layer in a state where there are no defects above the cladding layer by stopping the growth of defects generated from an upper surface of the Si core at the bottom of the groove at the side of the groove by aspect ratio trapping using the grooves.

[0054] [Supplementary Note 6] The method for manufacturing a semiconductor laser according to Supplementary Note 5, wherein the resonator structure is configured by a diffraction grating formed above the active layer.

[0055] [Appendix 7] The method for manufacturing a semiconductor laser according to appendix 5 or 6, further comprising a ninth step of forming a first contact layer on the p-type semiconductor layer and a second contact layer on the n-type semiconductor layer, wherein the n-type electrode is formed on the first contact layer and the p-type electrode is formed on the second contact layer.

[0056] [Supplementary Note 8] In the method for manufacturing a semiconductor laser according to any one of Supplementary Notes 4 to 7, the groove is formed to have a groove width of 0.1 μm or less.

[0057] It should be noted that the present invention is not limited to the embodiments described above, and it is clear that many modifications and combinations can be made by a person having ordinary knowledge in the art within the technical concept of the present invention.

[0058] [References] [Reference 1] R. G. al., "Lateral epipitaxial overgrowth of GaAs by organometallic chemical vapor deposition", Applied Physics Letters, vol. 41, no. 6, pp. 545-547, 1982. [Reference 2] S. Naritsuka and T. Nishinaga, "Epitaxial lateral overgrowth of InP by liquid phase epitaxy", Journal of Crystal Growth, vol. 146, pp. 314-318, 1995.

[0059] 101...substrate, 102...cladding layer, 103...Si core, 104...groove, 105...lower semiconductor layer, 106...active layer, 107...upper semiconductor layer, 108...p-type semiconductor layer, 109...n-type semiconductor layer, 110...p-type electrode, 111...n-type electrode, 112...diffraction grating, 113...insulating layer, 114...first contact layer, 115...second contact layer.

Claims

an optical waveguide including a Si core formed on a substrate and a cladding layer in which the Si core is embedded; a groove formed in the cladding layer above the Si core, extending along the Si core and reaching the Si core; a lower semiconductor layer made of a compound semiconductor, which is formed on the cladding layer by epitaxial growth from the top surface of the Si core at the bottom surface of the groove to fill the groove and extend along the Si core; an active layer made of a compound semiconductor formed on the lower semiconductor layer, extending along the Si core in a state capable of optically coupling with the Si core; an upper semiconductor layer made of a compound semiconductor and formed on the active layer; a p-type semiconductor layer and an n-type semiconductor layer made of a compound semiconductor and formed on the cladding layer in contact with the active layer; an n-type electrode connected to the n-type semiconductor layer; a p-type electrode connected to the p-type semiconductor layer; and a resonator structure for confining light in the active layer, wherein the p-type semiconductor layer and the n-type semiconductor layer are formed to sandwich the lower semiconductor layer, the active layer, and the upper semiconductor layer in a plan view, The groove has a depth greater than a width.

2. A semiconductor laser according to claim 1, wherein said resonator structure is composed of a diffraction grating formed above said active layer.

3. A semiconductor laser according to claim 1, further comprising a first contact layer formed on said p-type semiconductor layer, and a second contact layer formed on said n-type semiconductor layer, said n-type electrode being formed on said first contact layer, and said p-type electrode being formed on said second contact layer.

4. A semiconductor laser according to any one of claims 1 to 3, wherein the groove has a width of 0.1 μm or less.

5. A method for fabricating an optical waveguide comprising: a first step of forming an optical waveguide on a substrate, the optical waveguide comprising a Si core and a cladding layer in which the Si core is embedded; a second step of forming a groove in the cladding layer on the Si core, the groove extending along the Si core and reaching the Si core; a third step of forming a lower semiconductor layer made of a compound semiconductor on the cladding layer, the lower semiconductor layer filling the groove and extending along the Si core by epitaxial growth from the top surface of the Si core at the bottom surface of the groove; a fourth step of forming an active layer made of a compound semiconductor on the lower semiconductor layer, the active layer extending along the Si core in a state capable of being optically coupled to the Si core; a fifth step of forming an upper semiconductor layer made of a compound semiconductor on the active layer; a sixth step of forming a p-type semiconductor layer and an n-type semiconductor layer made of a compound semiconductor on the cladding layer in contact with the active layer; a seventh step of forming an n-type electrode connected to the n-type semiconductor layer and a p-type electrode connected to the p-type semiconductor layer; and an eighth step of forming a resonator structure for optically confining light in the active layer. a p-type semiconductor layer and an n-type semiconductor layer that are formed to sandwich the lower semiconductor layer, the active layer, and the upper semiconductor layer in a planar view, the grooves being formed to have a depth greater than a width, and the lower semiconductor layer being formed by epitaxial growth in a state free of defects above the cladding layer by stopping growth of defects generated from an upper surface of the Si core at the bottom of the groove at a side surface of the groove by aspect ratio trapping using the grooves.

6. A method for manufacturing a semiconductor laser according to claim 5, wherein the resonator structure is constituted by a diffraction grating formed above the active layer.

7. A method for manufacturing a semiconductor laser according to claim 5, further comprising a ninth step of forming a first contact layer on the p-type semiconductor layer and a second contact layer on the n-type semiconductor layer, wherein the n-type electrode is formed on the first contact layer and the p-type electrode is formed on the second contact layer.

8. A method for manufacturing a semiconductor laser according to any one of claims 5 to 7, wherein the groove is formed to have a groove width of 0.1 μm or less.

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