Printed wiring board and method for manufacturing printed wiring board

Abstract

A printed wiring board according to one aspect of the present disclosure comprises: a base film; a first through-hole provided in the base film; a hole filling resin with which the first through-hole is filled; and a pad part formed at an end of the first through-hole on a surface of the base film. The pad part has a first region which is annular, and a second region which is disposed outside the outer peripheral edge of the first region. The average height of the first region is larger than the average height of the second region.

Description

Printed wiring board and method for manufacturing printed wiring board

[0001] This application claims priority to Japanese Patent Application No. 2023-119454, filed on July 21, 2023, and incorporates by reference all of the contents of that application.

[0002] A printed wiring board in which through holes are filled with a hole-filling resin is known (Patent Document 1).

[0003] JP 2016-66699 A

[0004] A printed wiring board according to one aspect of the present disclosure includes a base film, a first through-hole provided in the base film, a hole-filling resin filled in the first through-hole, and a pad portion formed on the surface of the base film at an end of the first through-hole. The pad portion has an annular first region and a second region disposed outside the outer periphery of the first region. The average height of the first region is greater than the average height of the second region.

[0005] FIG. 1 is a schematic cross-sectional view showing a printed wiring board according to an embodiment of the present disclosure. FIG. 2 is a schematic plan view of the printed wiring board of FIG. 1. FIG. 3 is a flow diagram showing a method for manufacturing the printed wiring board of FIG. 1. FIG. 4 is a schematic cross-sectional view showing a procedure for forming a first through hole in a step of forming the first through hole of FIG. 3. FIG. 5 is a schematic cross-sectional view showing a procedure subsequent to FIG. 4 in the step of forming the first through hole of FIG. 3. FIG. 6 is a schematic cross-sectional view showing a procedure for filling a hole with a filling resin in a step of filling a hole with a filling resin of FIG. 3. FIG. 7 is a schematic cross-sectional view showing a state at the completion of filling of the hole with the filling resin in the step of filling the hole with the filling resin of FIG. 3. FIG. 8 is a schematic cross-sectional view showing a procedure for forming a pad portion in a step of forming a pad portion of FIG. 3. FIG. 9 is a schematic cross-sectional view showing a procedure subsequent to FIG. 8 in the step of forming the pad portion of FIG. 3. FIG. 10 is a schematic cross-sectional view showing a state at the completion of formation of the pad portion in the step of forming the pad portion of FIG. 3. FIG. 11 is a schematic cross-sectional view showing a printed wiring board according to an embodiment different from the printed wiring board of FIG. 1. Fig. 12 is a schematic cross-sectional view showing a printed wiring board according to an embodiment different from the printed wiring boards of Fig. 1 and Fig. 11. Fig. 13 is a flow diagram showing a method for manufacturing the printed wiring board of Fig. 12. Fig. 14 is a schematic cross-sectional view showing a procedure for forming a conductive pattern in the step of forming the conductive pattern of Fig. 13. Fig. 15 is a schematic cross-sectional view showing a printed wiring board according to an embodiment different from the printed wiring boards of Fig. 1, Fig. 11 and Fig. 12.

[0006] Patent Document 1 describes a method of forming copper plating layers on the entire upper and lower surfaces of a resin panel and on the inner peripheral surfaces of through-holes in the resin panel, and then filling the through-holes with a hole-filling resin. Patent Document 1 also describes a method of polishing and removing the hole-filling resin protruding from the copper plating layer together with the copper plating layer to flatten it, and then depositing additional copper plating layers on the entire upper and lower surfaces of the resin panel, and forming a circuit pattern by a subtractive method.

[0007] In the conventional method described in Patent Document 1, after filling the through-holes with a filler resin, the entire copper plating layer disposed on the top and bottom surfaces of the resin panel and the filler resin protruding from the copper plating layer are polished to flatten the entire copper plating layer. However, this method can make it difficult to form a fine conductive pattern on the base film.

[0008] The present disclosure has been made in light of the above circumstances, and aims to provide a printed wiring board on which fine conductive patterns can be easily formed.

[0009] In the printed wiring board according to one aspect of the present disclosure, it is easy to form a fine conductive pattern.

[0010] First, embodiments of the present disclosure will be listed and described.

[0011] (1) A printed wiring board according to one aspect of the present disclosure includes a base film, a first through-hole provided in the base film, a hole-filling resin filled in the first through-hole, and a pad portion formed on a surface of the base film at an end of the first through-hole. The pad portion has an annular first region and a second region disposed outside the outer periphery of the first region. The average height of the first region is greater than the average height of the second region.

[0012] In the printed wiring board of the present disclosure, the average height of the first region is greater than the average height of the second region. In conventional printed wiring boards, the conductive pattern is formed using a subtractive method after polishing the surface of the hole-filling resin and the surface of the plating layer so that they are flush with each other. Therefore, the printed wiring board of the present disclosure is different from conventional printed wiring boards. Since the subtractive method is not required when producing the printed wiring board of the present disclosure, it is possible to form a fine conductive pattern on the base film.

[0013] (2) In the above (1), the printed wiring board of the present disclosure may have a step between the first region and the second region. In the printed wiring board of the present disclosure, the step can be easily formed between the first region and the second region.

[0014] (3) In (1) or (2) above, the first region and the second region may each have a plurality of plating layers, and the number of plating layers in the first region may be different from the number of plating layers in the second region. Furthermore, the number of plating layers in the first region may be greater than the number of plating layers in the second region. This makes it easy to make the average height of the first region greater than the average height of the second region.

[0015] (4) In the above (3), the first region may have a first electroless plated layer disposed directly or indirectly on the base film, a first electroplated layer laminated on the first electroless plated layer, a second electroless plated layer laminated on the first electroplated layer, and a second electroplated layer laminated on the second electroless plated layer, which makes it easy to make the average height of the first region greater than the average height of the second region.

[0016] (5) In the above (4), the second region may include the first electroless plated layer, the second electroless plated layer laminated on the first electroless plated layer, and the second electroplated layer laminated on the second electroless plated layer. This allows the average height of the second region to be smaller than the average height of the first region by a thickness equivalent to the thickness of the first electroplated layer. Therefore, the average height of the first region can be easily made larger than the average height of the second region.

[0017] (6) In the above (4) or (5), the pad portion may have a third region that fills an area within the inner periphery of the first region, and the third region may have the second electroless plated layer and the second electroplated layer laminated on the second electroless plated layer. This makes it possible to easily form a pad-on-via structure.

[0018] (7) In any one of (1) to (6) above, the arithmetic mean roughness Sa of the surface of the filling resin may be 1.0 μm or more and 10.0 μm or less, which tends to improve the anchoring effect for a member disposed on the surface of the filling resin.

[0019] (8) In any of (1) to (7) above, the printed wiring board of the present disclosure may further include second through holes that are not filled with resin. The average thickness of the second through holes may be greater than the average thickness of the first through holes. By providing second through holes that are not filled with hole-filling resin, through holes with high electrical and mechanical connection reliability can be easily formed.

[0020] (9) In any one of (1) to (8) above, the printed wiring board of the present disclosure may include a circuit disposed on the surface of the base film. The circuit may have an etch factor of 8 or more. Fine circuits can be formed on the printed wiring board of the present disclosure.

[0021] (10) A method for manufacturing a printed wiring board according to another aspect of the present disclosure includes the steps of forming a first through hole in a base film, filling the first through hole with a hole-filling resin, and, after the hole-filling resin filling step, forming a conductive pattern on a surface of the base film by a semi-additive method.

[0022] The method for manufacturing a printed wiring board according to the present disclosure includes a step of forming a conductive pattern on the surface of the base film by a semi-additive method after the step of filling the holes with a filling resin, making it easy to form a fine conductive pattern on the base film.

[0023] In this disclosure, "average height" refers to the average height at any 10 points. The height of the pad portion and the height of each region are measured relative to the surface of the base film. For example, the "height of the first region" refers to the distance from the surface of the base film to the surface of the first region, or the distance from an extension of the surface of the base film to the surface of the first region. The "height of the second region" refers to the distance from the surface of the base film to the surface of the second region. The "arithmetic mean roughness Sa" is a value measured in accordance with ISO 25178. The "etch factor of the circuit" refers to the ratio of the etching depth in the thickness direction of the circuit to the etching depth in the width direction of the circuit. The etch factor of the circuit is calculated as follows: A cross section of the circuit is observed at any 5 points, and the top width, bottom width, and thickness of the circuit at each cross section are measured. The etch factor of each cross section is calculated from these measurements. The average value of the etch factors of these cross sections is the etch factor of the circuit.

[0024] [Details of the embodiment of the present disclosure] Hereinafter, the embodiment of the present disclosure will be described with reference to the drawings. Each drawing is a schematic view, and the shape, dimensions, and ratios in the drawings may not correspond to those of the actual objects. In this disclosure, the terms "first," "second," etc. are used to distinguish the components to which they are attached, and do not limit the number, order, or priority of the components.

[0025] First Embodiment <Printed Wiring Board> The printed wiring board 10 in FIGS. 1 and 2 includes a base film 1, a first through-hole 2 provided in the base film 1, a hole-filling resin 3 filled in the first through-hole 2, and a pad portion 4 formed on the surface of the base film 1 at the end of the first through-hole 2. The pad portion 4 includes an annular first region R1 and a second region R2 disposed outside the outer periphery of the first region R1. The average height H1 of the first region R1 is greater than the average height H2 of the second region R2. In FIGS. 1 and 2, the printed wiring board 10 includes one base film 1. The printed wiring board of the present disclosure may include multiple base films. In the present disclosure, the term "through hole" includes a through-hole that penetrates all of the base films of the printed wiring board and an interstitial via hole that penetrates only some of the base films. The printed wiring board 10 may also include other components, such as an insulating layer, disposed on the base film 1.

[0026] The conductive pattern of a conventional printed wiring board is formed using a subtractive process after polishing so that the surface of the filler resin and the surface of the plating layer are flush with each other. The conductive pattern of the printed wiring board 10 is formed using a semi-additive process, for example, after filling the first through-hole 2 with filler resin 3. Therefore, the printed wiring board 10 differs from conventional printed wiring boards. In the printed wiring board 10, the average height H1 of the first region R1 can be made larger than the average height H2 of the second region R2. Because the subtractive process is not required to form the conductive pattern of the printed wiring board 10, it is possible to form a fine conductive pattern on the base film 1.

[0027] (Base Film) The base film 1 has insulating properties. The base film 1 may be flexible. When the base film 1 is flexible, the printed wiring board 10 can be a flexible printed wiring board. When the base film 1 is flexible, the main component of the base film 1 is, for example, polyimide, polyethylene terephthalate, liquid crystal polymer, or fluororesin. The base film 1 does not have to be flexible. In this case, the main component of the base film 1 is, for example, glass epoxy, paper phenol, paper epoxy, glass composite, or glass. The "main component" refers to the component with the largest content in terms of mass, for example, a component with a content of 50 mass% or more.

[0028] The lower limit of the average thickness of the base film 1 may be 3 μm, 5 μm, or 10 μm in order to increase the insulating strength and mechanical strength. The upper limit of the average thickness may be 200 μm, 150 μm, or 100 μm in order to make the printed wiring board 10 thinner. The "average thickness" is the average value of the thickness at any 10 points.

[0029] (First Through Hole) The first through hole 2 is formed by a through hole 2a penetrating the base film 1 and a plating layer laminated on the inner surface of the through hole 2a. The diameter of the through hole 2a may be uniform along its axis. The cross-sectional shape of the through hole 2a perpendicular to its axis is, for example, a circle.

[0030] The plating layers are a first electroless plated layer 11 that is laminated directly on the inner surface of the through hole 2a, and a first electroplated layer 12 that is laminated directly on the first electroless plated layer 11. The plating layers are two layers: the first electroless plated layer 11 and the first electroplated layer 12. The main components of the first electroless plated layer 11 and the first electroplated layer 12 may be the same or different. The main component of the first electroless plated layer 11 and the first electroplated layer 12 is not particularly limited, but may be, for example, copper.

[0031] The lower limit of the average thickness T1 (average thickness of the plating layer) of first through-hole 2 may be 5 μm, 10 μm, or 15 μm to improve the reliability of electrical connection. The upper limit of average thickness T1 may be 30 μm, 25 μm, or 20 μm to easily control the thicknesses of first electroless plating layer 11 and first electroplating layer 12.

[0032] The lower limit of the average diameter D of the first through holes 2 (average diameter based on the inner circumferential surface of the first electroplated layer 12) may be 100 μm, 150 μm, or 200 μm to facilitate filling of the first through holes 2 with the hole-filling resin 3. The upper limit of the average diameter D may be 1000 μm, 800 μm, or 500 μm to ensure sufficient filling of the first through holes 2 with the hole-filling resin 3. The "diameter" refers to the diameter of a perfect circle having an area equal to the area of ​​a cross section perpendicular to the axis of the through hole. The "average diameter" refers to the average value of diameters at any five points along the axis.

[0033] (Filling Resin) The internal space of the first through-hole 2 is filled with a filling resin 3. The filling resin 3 is fixed to the inner peripheral surface of the first electroplated layer 12. The main component of the filling resin 3 is a thermosetting resin such as an epoxy resin. The filling resin 3 may contain a filler. The main component of the filler is, for example, copper, silica, alumina, or calcium carbonate.

[0034] (Pad Portion) The pad portion 4 has a first region R1 and a second region R2 located outside the outer periphery of the first region R1. As shown in FIG. 2 , both the first region R1 and the second region R2 are annular. In the pad portion 4, there may be no region outside the outer periphery of the first region R1 that has a greater average height than the first region R1. The pad portion 4 also has a third region R3 that covers the area within the inner periphery of the first region R1. The third region R3 is located on the filling resin 3. The pad portion 4 has a pad-on-via structure, and the surface of the filling resin 3 is covered by the third region R3. The pad portion 4 may also have a connection region R4 between the first region R1 and the second region R2. The pad portion 4 includes a portion of the conductive base layer 15, a portion of the first electroless plated layer 11, a portion of the first electroplated layer 12, a portion of the second electroless plated layer 13, a portion of the second electroplated layer 14, and a portion of the filling resin 3.

[0035] [First Region] The first region R1 can be defined as the region with the largest average height H1 in the entire pad portion 4. The first region R1 includes the first electroplated layer 12 disposed on the base film 1 at the end of the first through hole 2. The first electroless plated layer 11 and the first electroplated layer 12 protrude outward from the end of the through hole 2a and are also disposed on the surface of the base film 1. The first region R1 includes the first electroless plated layer 11 and the first electroplated layer 12 disposed on the base film 1 and protrude from the through hole 2a. The first region R1 is the portion where the first electroplated layer 12 is present in a plan view. The height of the first region R1 is the distance from the surface of the base film 1 or an extension of the surface of the base film 1 to the surface of the second electroplated layer 14 (the distance from the surface of the base film 1 or an extension of the surface of the base film 1 to the exposed surface of the second electroplated layer 14 closest to the surface of the base film 1).

[0036] First region R1 has multiple plated layers: first electroless plated layer 11 disposed on base film 1, first electroless plated layer 12 laminated on first electroless plated layer 11, second electroless plated layer 13 laminated on first electroless plated layer 12, and second electroless plated layer 14 laminated on second electroless plated layer 13. In printed wiring board 10, average height H1 of first region R1 can easily be made greater than average height H2 of second region R2.

[0037] In first region R1, first electroless plated layer 11, first electroplated layer 12, second electroless plated layer 13, and second electroplated layer 14 are laminated directly on top of each other in this order. First region R1 has a conductive underlayer 15 disposed between base film 1 and first electroless plated layer 11. First region R1 has five layers, which are laminated directly on top of the surface of base film 1 in this order: conductive underlayer 15, first electroless plated layer 11, first electroplated layer 12, second electroless plated layer 13, and second electroplated layer 14.

[0038] The first region R1 has a portion that does not include the first electroless plated layer 11 and the conductive base layer 15. This portion is located further inward from the first through-hole 2 than the five-layer portion described above in a plan view. The height of the first region R1 may be uniform. In this case, the entire first region R1 is a flat portion. "Uniform height" means that the difference between the maximum height and the minimum height is 3 μm or less.

[0039] The printed wiring board 10 may have a step between the first region R1 and the second region R2. In the printed wiring board 10, the step can be easily formed between the first region R1 and the second region R2.

[0040] In the first region R1, the conductive base layer 15 is formed of a metal foil such as copper foil. The first electroless plated layer 11 is integrally formed of the same metal as the first electroless plated layer 11 constituting the first through-hole 2. Therefore, the thickness of the first electroless plated layer 11 constituting the first through-hole 2 is equal to the thickness of the first electroless plated layer 11 constituting the first region R1. The first electroplated layer 12 is integrally formed of the same plating metal as the first electroplated layer 12 constituting the first through-hole 2. The first electroplated layer 12 constituting the first region R1 can be polished when removing the filling resin 3, as described below. Therefore, the thickness of the first electroplated layer 12 constituting the first region R1 may be smaller than the thickness of the first electroplated layer 12 constituting the first through-hole 2. For example, the upper limit of the difference between the thickness of the first electroplated layer 12 constituting the first region R1 and the thickness of the first electroplated layer 12 constituting the first through-hole 2 may be 4 μm, 3 μm, or 2 μm.

[0041] Second electroless plated layer 13 is deposited during the process of forming a conductive pattern by, for example, a semi-additive method. Second electroless plated layer 13 may be a plated layer obtained by filling first through-holes 2 with plugging resin 3, forming an electroless plated layer over the entire surface of base film 1, and then removing a portion of the electroless plated layer by etching. The main component of second electroless plated layer 13 is not particularly limited, but is, for example, copper.

[0042] The second electroplated layer 14 is deposited during the process of forming a conductive pattern by, for example, a semi-additive method. The second electroplated layer 14 may be obtained by forming an electroless plated layer over the entire surface of the base film 1, forming a resist pattern on the electroless plated layer, and then electroplating the electroless plated layer exposed by the resist pattern. The main component of the second electroplated layer 14 is not particularly limited, but is, for example, copper.

[0043] [Second Region] The second region R2 may be the outermost region of the pad portion 4 (the region located at the outermost radial position of the first through hole 2 in a plan view). The second region R2 has multiple plating layers. The second region R2 has a first electroless plated layer 11, a second electroless plated layer 13 laminated on the first electroless plated layer 11, and a second electroless plated layer 14 laminated on the second electroless plated layer 13. In the printed wiring board 10, the average height H2 of the second region R2 relative to the average height H1 of the first region R1 can be made smaller by the thickness corresponding to the first electroplated layer 12. Therefore, the average height H1 of the first region R1 can be easily made larger than the average height H2 of the second region R2. The height of the second region R2 is the distance from the surface of the base film 1 to the surface of the second electroplated layer 14 (the distance from the surface of the base film 1 to the exposed surface of the second electroplated layer 14 closest to the surface of the base film 1).

[0044] In the pad portion 4, the number of plating layers in the first region R1 is different from the number of plating layers in the second region R2. More specifically, the first region R1 has an electroplated layer (first electroplated layer 12), while the second region R2 does not have an electroplated layer. Therefore, the number of plating layers in the first region R1 is greater than the number of plating layers in the second region R2. Therefore, the average height H1 of the first region R1 can be easily made greater than the average height H2 of the second region R2.

[0045] In second region R2, first electroless plated layer 11, second electroless plated layer 13, and second electroplated layer 14 are directly laminated in this order. Second region R2 has a conductive underlayer 15 disposed between base film 1 and first electroless plated layer 11. Second region R2 has four layers, laminated in this order from the surface of base film 1: conductive underlayer 15, first electroless plated layer 11, second electroless plated layer 13, and second electroplated layer 14. Second region R2 may be formed from only these four layers.

[0046] The height of the second region R2 may be uniform. In this case, the entire second region R2 is a flat portion. The height of the second region R2 may gradually decrease in a direction away from the axis of the through hole 2. In this case, the second region R2 may be formed integrally with the connection region R4. When the second region R2 is formed integrally with the connection region R4, there may be no step between the first region R1 and the second region R2.

[0047] In the second region R2, the conductive base layer 15 is integrally formed from the same metal foil as the conductive base layer 15 disposed in the first region R1. Therefore, the thickness of the conductive base layer 15 in the first region R1 is equal to the thickness of the conductive base layer 15 in the second region R2. The first electroless plated layer 11 is integrally formed from the same plating metal as the first electroless plated layer 11 disposed in the first region R1. Therefore, the thickness of the first electroless plated layer 11 in the first region R1 is equal to the thickness of the first electroless plated layer 11 in the second region R2. The second electroless plated layer 13 is integrally formed from the same plating metal as the second electroless plated layer 13 disposed in the first region R1. Therefore, the thickness of the second electroless plated layer 13 in the first region R1 is equal to the thickness of the second electroless plated layer 13 in the second region R2. The second electroless plated layer 14 is integrally formed from the same plating metal as the second electroless plated layer 14 disposed in the first region R1. Therefore, the thickness of the second electroplated layer 14 in the first region R1 is equal to the thickness of the second electroplated layer 14 in the second region R2.

[0048] Unlike the first region R1, the second region R2 does not have the first electroplated layer 12. Therefore, the average height of the flat portions in the second region R2 can be smaller than the height of the flat portions in the first region R1 by approximately the thickness of the first electroplated layer 12. The lower limit of the difference between the average height of the flat portions in the first region R1 and the average height of the flat portions in the second region R2 may be 5 μm, 10 μm, or 15 μm to ensure that the first electroplated layer 12 is sufficiently thick to enhance the electrical connection reliability of the first through-holes 2. The upper limit of this difference may be 30 μm, 25 μm, or 20 μm to easily control the thickness of the first electroplated layer 12.

[0049] [Third Region] The third region R3 is disposed on the filling resin 3 and covers the area within the inner periphery of the first region R1. The third region R3 has multiple plating layers. The third region R3 may also be formed solely of multiple plating layers.

[0050] The third region R3 has a second electroless plated layer 13 and a second electroplated layer 14 laminated on the second electroless plated layer 13. In the printed wiring board 10, since the pad portion 4 has the third region R3, a pad-on-via structure can be easily formed.

[0051] In the third region R3, the second electroless plated layer 13 and the second electroplated layer 14 are laminated in this order directly on the surface of the hole-filling resin 3. The third region R3 may be formed only from the second electroless plated layer 13 and the second electroplated layer 14.

[0052] The third region R3 may have a uniform height. In this case, the entire third region R3 is a flat portion. The surface of the third region R3 may be flush with the surface of the flat portion of the first region R1.

[0053] In the third region R3, the second electroless plated layer 13 is integrally formed from the same plating metal as the second electroless plated layer 13 disposed in the first region R1. Therefore, the thickness of the second electroless plated layer 13 in the first region R1 is equal to the thickness of the second electroless plated layer 13 in the third region R3. The second electroplated layer 14 is integrally formed from the same plating metal as the second electroplated layer 14 disposed in the first region R1. Therefore, the thickness of the second electroplated layer 14 in the first region R1 is equal to the thickness of the second electroplated layer 14 in the third region R3.

[0054] [Connection Region] The connection region R4 is, for example, annular. In plan view, the connection region R4 is located between the first region R1 and the second region R2. The connection region R4 includes a portion where the average height of the pad portion 4 gradually decreases from the first region R1 to the second region R2. The number of plating layers in the first region R1 is different from the number of plating layers in the second region R2. The connection region R4 may have a step. The surface of the connection region R4 may be an inclined surface. On the inclined surface, the height of the pad portion 4 decreases in a direction away from the axis of the first through hole 2.

[0055] The pad portion 4 may have a region other than the connection region R4 between the first region R1 and the second region R2. The first region R1 and the second region R2 may be directly connected to the connection region R4. The first region R1 and the second region R2 may be directly connected without the connection region R4 in between. In this case, a step may be formed at the boundary between the first region R1 and the second region R2 by a surface perpendicular to the flat portion of the first region R1.

[0056] 3, an example of a method for manufacturing the printed wiring board 10 will be described. The method for manufacturing the printed wiring board includes a step S1 of forming first through holes in a base film, a step S2 of filling the first through holes with a hole filling resin, and a step S3 of forming pad portions after the step S2 of filling the hole filling resin.

[0057] According to this manufacturing method, the printed wiring board 10 can be easily manufactured.

[0058] 4, in the step S1 of forming the first through hole, a through hole 2a is formed in a laminate having a base film 1 and a conductive underlayer 15 disposed on the surface of the base film 1. The through hole 2a can be formed by, for example, laser processing or drilling.

[0059] 5, in step S1 of forming the first through hole, electroless plating and electroplating are performed in this order on the inner peripheral surface of the through hole 2a to form the first through hole 2. The electroless plating in step S1 of forming the first through hole forms a first electroless plated layer 11. The electroplating in step S1 of forming the first through hole forms a first electroplated layer 12.

[0060] In step S1 of forming the first through holes, the first electroplated layer 12 may be formed by partial plating. In this case, damage to the entire surface of the base film 1 can be reduced when the filling resin 3 that has spilled over the surface of the first electroplated layer 12 is removed in step S2 of filling the holes with filling resin, which will be described later. As a result, distortion is less likely to occur on the surface of the plating layer.

[0061] 6 , in the step S2 of filling the hole with the hole filling resin, the internal space of the first through hole 2 is filled with the hole filling resin 3. In the step S2 of filling the hole with the hole filling resin, the hole filling resin 3 is filled along the axis of the first through hole 2 so as to overflow from the surface of the first electroplated layer 12. The hole filling resin 3 may be disposed up to the surface of the first electroplated layer 12.

[0062] 7 , in step S2 of filling the holes with the filling resin, the portion of the filling resin 3 that has spilled over the surface of the first electroplated layer 12 is removed. In step S2 of filling the holes with the filling resin, the filling resin 3 is removed by, for example, polishing. In step S2 of filling the holes with the filling resin, the surface of the first electroplated layer 12 may be polished together with the filling resin 3.

[0063] (Process for Forming Pad Portions) Process S3 for forming pad portions can be performed as part of the process for forming a conductive pattern on the surface of base film 1 by a semi-additive method. In process S3 for forming pad portions, electroless plating is performed on the entire surface of base film 1, as shown in FIG. 8 . An electroless plating layer is formed on the entire surface of base film 1 by electroless plating. The electroless plating layer is subsequently patterned to form second electroless plating layer 13. In process S3 for forming pad portions, before electroless plating, half etching may be performed on first electroplated layer 12 after process S2 for filling holes with filling resin in order to adjust the thickness.

[0064] 9, in the pad forming step S3, a resist pattern 16 is formed on the electroless plated layer. Electroplating is performed on the electroless plated layer exposed from the resist pattern 16. A second electroplated layer 14 is formed by the electroplating.

[0065] In step S3 of forming the pad portion, resist pattern 16 is removed as shown in Fig. 10. Furthermore, the electroless plated layer exposed by the removal of resist pattern 16 and the conductive underlayer disposed below the electroless plated layer are removed by etching. In this manner, a pad portion is formed, including a portion of conductive underlayer 15, a portion of first electroless plated layer 11, a portion of first electroless plated layer 12, second electroless plated layer 13, second electroless plated layer 14, and a portion of filling resin 3. As a result, printed wiring board 10 is obtained.

[0066] [Second Embodiment] <Printed Wiring Board> The printed wiring board 20 of Figure 11 includes a base film 1, a first through-hole 2 provided in the base film 1, a hole-filling resin 23 filled in the first through-hole 2, and a pad portion 4 formed on the surface of the base film 1 at the end of the first through-hole 2. The printed wiring board 20 differs from the printed wiring board 10 in that the surface 23a of the hole-filling resin 23 is roughened. Because the surface 23a of the hole-filling resin 23 is roughened, the anchoring effect for other components is improved. The configuration of the printed wiring board 20 can be the same as that of the printed wiring board 10, except that the surface 23a of the hole-filling resin 23 is roughened. The following describes only the hole-filling resin 23.

[0067] (Filling Resin) The internal space of the first through hole 2 is filled with a filling resin 23. The filling resin 23 is fixed to the inner peripheral surface of the first electroplated layer 12. The main component of the filling resin 23 is the same type of thermosetting resin as the filling resin 3.

[0068] The filling resin 23 may contain a filler. The main component of the filler is, for example, copper, silica, alumina, or calcium carbonate. When the filling resin 23 contains a filler, irregularities are likely to be formed on the surface 23a. In the printed wiring board 20, the surface 23a of the filling resin 23 can be roughened by removing the portion of the filling resin 23 that has overflowed from the surface of the first electroplated layer 12 with a laser. The filler exposed on the surface 23a of the filling resin 23 falls off, forming minute irregularities on the surface 23a. Furthermore, because the thermosetting resin is more easily removed than the filler, minute irregularities are formed on the surface 23a. As a result, the anchoring effect of the filling resin 23 on the component (the second electroless plated layer 13 in FIG. 11 ) placed on the surface 23a of the filling resin 23 is likely to be improved.

[0069] The lower limit of the arithmetic mean roughness Sa of the surface 23a of the filling resin 23 may be 0.1 μm, 1.0 μm, or 3.0 μm in order to improve the anchoring effect of the filling resin 23. The upper limit of the arithmetic mean roughness Sa may be 10.0 μm or 6.0 μm in order to easily roughen only the surface 23a of the filling resin 23, for example, by controlling the laser output.

[0070] The surface 23a of the filling resin 23 may be recessed relative to the surface of the first electroplated layer 12 that contacts the second electroless plated layer. In the printed wiring board 20, the surface 23a of the filling resin 23 can be recessed relative to the surface of the first electroplated layer 12 by selectively removing a portion of the filling resin 23 that fills the first through-hole 2, in addition to the portion of the filling resin 23 that overflows from the surface of the first electroplated layer 12. The lower limit of the average depth of the surface 23a of the filling resin 23 relative to the surface of the first electroplated layer 12 may be 5 μm, 10 μm, or 20 μm, in order to facilitate an anchoring effect when placing other components on the filling resin 23. The upper limit of the average depth may be 200 μm or 100 μm, in order to easily and reliably adhere the filling resin 23 to other components. The "average depth" is determined as follows: The depth is measured at 10 arbitrary points. From the measurements obtained, the deepest, second deepest, deepest, and second deepest values ​​are removed, and the average value of the remaining six depths is the "average depth."

[0071] Surface 23a of filling resin 23 may have a recess in the peripheral portion connected to through-hole 2. This recess can be formed by removing filling resin 23 filled in first through-hole 2 with a laser. This tends to improve the anchoring effect when another component is placed on filling resin 23.

[0072] <Method for Manufacturing Printed Wiring Board> An example of a method for manufacturing a printed wiring board 20 will be described. In the method for manufacturing a printed wiring board, in step S2 of filling the holes with filling resin, only the filling resin 23 is selectively removed with a laser. Only the portion of the filling resin 23 that has overflowed from the surface of the first electroplated layer 12 may be selectively removed. In addition to the portion that has overflowed from the first electroplated layer 12, a portion that has filled the first through-hole 2 may also be selectively removed. In step S2 of filling the holes with filling resin, the filling resin 23 can be selectively removed by controlling the wavelength, output, repetition frequency, and irradiation diameter of the laser.

[0073] The laser is, for example, a UV laser or a carbon dioxide laser. If a UV laser is used, it is easy to remove the desired area of ​​the filling resin 23 with high precision.

[0074] The lower limit of the wavelength of the laser may be 280 nm or 320 nm, and the upper limit of the wavelength may be 500 nm or 400 nm.

[0075] 12 includes a base film 1, a first through-hole 2 provided in the base film 1, a hole-filling resin 3 filled in the first through-hole 2, and a pad portion 4 formed on the surface of the base film 1 at an end of the first through-hole 2. The printed wiring board 30 includes a circuit 31 disposed on the surface of the base film 1. The circuit 31, together with the pad portion 4, constitutes a conductive pattern on the printed wiring board 30. The printed wiring board 30 may include other components, such as an insulating layer, disposed on the base film 1.

[0076] The base film 1, first through holes 2, hole filling resin 3, and pad portions 4 in the printed wiring board 30 can be the same as those in the printed wiring board 10. Only the circuit 31 will be described below.

[0077] (Circuit) The circuit 31 is formed by a semi-additive method. Using the semi-additive method can improve the accuracy of the circuit pattern compared to, for example, using a subtractive method. The circuit 31 has a layer structure similar to that of the second region R2 of the pad portion 4. The circuit 31 has four layers, stacked in this order from the surface of the base film 1: a conductive underlayer 15, a first electroless plated layer 11, a second electroless plated layer 13, and a second electroplated layer 14.

[0078] The lower limit of the etch factor of the circuit 31 may be 8 or 10 to improve the accuracy of the circuit pattern. In the printed wiring board 30, the circuit 31 can be formed by a semi-additive method, so the etch factor can be controlled to be equal to or higher than the lower limit. The upper limit of the etch factor of the circuit 31 is not particularly limited, but may be 20.

[0079] 13, an example of a method for manufacturing a printed wiring board 30 will be described. The method for manufacturing a printed wiring board includes a step S1 of forming first through holes in a base film, a step S2 of filling the first through holes with a hole filling resin, and a step S4 of forming a conductive pattern on the surface of the base film by a semi-additive method after the step S2 of filling the hole filling resin.

[0080] The method for manufacturing a printed wiring board includes the step S4 of forming a conductive pattern after the step S2 of filling the holes with a filling resin, so that a fine conductive pattern can be easily formed on the base film.

[0081] In the method for manufacturing a printed wiring board, step S1 of forming a first through hole and step S2 of filling the hole with a hole-filling resin can be performed in the same procedure as in the method for manufacturing a printed wiring board shown in Fig. 3. Only step S4 of forming a conductive pattern will be described below.

[0082] (Process for forming conductive patterns) Process S4 for forming conductive patterns includes process S3 for forming pad portions in Fig. 3. In process S4 for forming conductive patterns, electroless plating is performed on the entire surface of base film 1. An electroless plating layer is formed on the entire surface of base film 1 by electroless plating. Later, the electroless plating layer is patterned to form second electroless plating layer 13.

[0083] 14, in the step S4 of forming the conductive pattern, a resist pattern 36 is formed on the electroless plated layer. Electroplating is performed on the electroless plated layer exposed from the resist pattern 36. A second electroplated layer 14 is formed by the electroplating.

[0084] In step S4 of forming the conductive pattern, the resist pattern 36 is removed. Furthermore, the electroless plated layer exposed by removing the resist pattern 36 and the conductive base layer disposed below the electroless plated layer are removed by etching. As a result, the printed wiring board 30 is obtained.

[0085] 15 includes a base film 1, a first through-hole 2 provided in the base film 1, a hole-filling resin 3 filled in the first through-hole 2, and a pad portion 4 formed on the surface of the base film 1 at the end of the first through-hole 2. The printed wiring board 40 also includes a second through-hole 42 that is not filled with resin. The configuration of the printed wiring board 40 can be the same as that of the printed wiring board 10, except for the second through-hole 42. Only the second through-hole 42 will be described below.

[0086] (Second Through Hole) The second through hole 42 is provided in the base film 1. The second through hole 42 is composed of a through hole 2b penetrating the base film 1 and a plating layer laminated on the inner surface of the through hole 2b. The diameter of the through hole 2b may be uniform along its axis. The cross-sectional shape of the through hole 2b perpendicular to its axis is, for example, a circle.

[0087] The plating layer is composed of a first electroless plating layer 11 that is laminated directly on the inner peripheral surface of through hole 2b, a first electroless plating layer 12 that is laminated on first electroless plating layer 11, a second electroless plating layer 13 that is laminated on first electroless plating layer 12, and a second electroless plating layer 14 that is laminated on second electroless plating layer 13. First electroless plating layer 11, first electroless plating layer 12, second electroless plating layer 13, and second electroless plating layer 14 are each laminated directly on the inner peripheral surface of through hole 2b in this order.

[0088] The internal space of first through hole 2 is filled with hole filling resin 3, but the internal space of second through hole 42 is not filled with hole filling resin 3. Second through hole 42 has four layers including second electroless plated layer 13 and second electroplated layer 14. Therefore, the average thickness T2 of second through hole 42 (average thickness of the plated layers) is greater than the average thickness T1 of first through hole 2. This makes it easy to improve the electrical and strength connection reliability of second through hole 42.

[0089] The average thickness T2 of the second through holes 42 is greater than the average thickness T1 of the first through holes 2 by the combined thickness of the second electroless plated layer 13 and the second electroplated layer 14. The lower limit of the difference between the average thickness T2 of the second through holes 42 and the average thickness T1 of the first through holes 2 may be 5 μm or 10 μm to sufficiently increase the electrical and strength connection reliability of the second through holes 42. The upper limit of the difference may be 30 μm, 25 μm, or 20 μm to easily control the thickness of the second through holes 42.

[0090] <Method for Manufacturing Printed Wiring Board> A description will be given of an example of a method for manufacturing the printed wiring board 40. The method for manufacturing the printed wiring board includes a step of forming a first through hole in a base film, a step of forming a second through hole in the base film, a step of filling the first through hole with a hole filling resin, and a step of forming a pad portion after the step of filling the hole with the hole filling resin.

[0091] The method for manufacturing a printed wiring board can be performed in the same procedure as the method for manufacturing a printed wiring board shown in Fig. 3, except that it includes a step of forming the second through holes. Only the step of forming the second through holes will be described below.

[0092] (Step of forming second through holes) In the step of forming second through holes, through holes 2b are formed in a laminate having base film 1 and conductive base layer 15 disposed on the surface of base film 1. Through holes 2b can be formed simultaneously with the formation of through holes in the step of forming first through holes.

[0093] In the step of forming the second through-hole, electroless plating and electroplating are performed in this order on the inner peripheral surface of through-hole 2b. These plating processes are performed simultaneously with the electroless plating and electroplating processes in the step of forming the first through-hole. As a result, first electroless plated layer 11 and first electroplated layer 12 are laminated on the inner peripheral surface of through-hole 2b.

[0094] In the step of forming the second through-hole, electroless plating and electroplating are performed in this order on first electroplated layer 12. These plating processes are performed simultaneously with the electroless plating and electroplating processes in the step of forming the pad portion. As a result, second electroless plated layer 13 and second electroplated layer 14 are stacked in this order on first electroless plated layer 11 and first electroplated layer 12, thereby forming second through-hole 42.

[0095] [Other Embodiments] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is not limited to the configurations of the above-described embodiments, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0096] The printed wiring board and the method for manufacturing the printed wiring board of the present disclosure are not particularly limited to the configurations described in the above embodiments. For example, in the method for manufacturing the printed wiring board of the present disclosure, through holes may be formed in the base film after the step of filling the hole with a hole-filling resin. In the method for manufacturing the printed wiring board of the present disclosure, after the through holes are formed, a step of forming a pad portion or a step of forming a conductive pattern may be performed, and a plating layer may be laminated in the through holes to form through holes (third through holes). The average thickness of the third through holes may be approximately the same as the average thickness of the first through holes, and further, the third through holes may not be filled with resin. The thickness of the third through holes may be smaller than the thickness of the second through holes. Because resin is less likely to penetrate into the third through holes, it is easier to reduce the diameter of the through holes, for example.

[0097] In the third and fourth embodiments, the circuit 31 and the second through hole 42 are formed on the printed wiring board 10. In the present disclosure, the circuit may be formed on the printed wiring board 20, and the second through hole may be formed thereon.

[0098] The specific structures of the first, second, and third regions are not limited to those of the above embodiment. For example, each region may have an additional plating layer. The structure and material of the conductive base layer are not particularly limited. The conductive base layer may be a conductor layer other than a metal foil.

[0099] In the above embodiment, the pad portion has the third region so that the pad-on-via structure can be formed. The printed wiring board of the present disclosure does not necessarily have to have the third region.

[0100] REFERENCE SIGNS LIST 1 Base film 2 First through hole 2a, 2b Through hole 3, 23 Filling resin 4 Pad portion 10, 20, 30, 40 Printed wiring board 11 First electroless plated layer 12 First electroplated layer 13 Second electroless plated layer 14 Second electroplated layer 15 Conductive base layer 16, 36 Resist pattern 23a Surface of filling resin 31 Circuit 42 Second through hole D Average diameter of first through hole R1 First region R2 Second region R3 Third region R4 Connection region H1 Average height of first region H2 Average height of second region T1 Average thickness of first through hole T2 Average thickness of second through hole

Claims

1. A printed wiring board comprising: a base film; a first through hole provided in the base film; a hole-filling resin filled in the first through hole; and a pad portion formed on the surface of the base film at an end of the first through hole, wherein the pad portion has an annular first region and a second region positioned outside the outer periphery of the first region, and the average height of the first region is greater than the average height of the second region.

2. The printed wiring board according to claim 1, further comprising a step between said first region and said second region.

3. A printed wiring board as described in claim 1 or claim 2, wherein the first region and the second region each have a plurality of plating layers, and the number of plating layers in the first region is different from the number of plating layers in the second region.

4. The printed wiring board of claim 3, wherein the first region has a first electroless plating layer disposed directly or indirectly on the base film, a first electroless plating layer laminated on the first electroless plating layer, a second electroless plating layer laminated on the first electroless plating layer, and a second electroless plating layer laminated on the second electroless plating layer.

5. The printed wiring board as described in claim 4, wherein the second region has the first electroless plating layer, the second electroless plating layer laminated on the first electroless plating layer, and the second electroplating layer laminated on the second electroless plating layer.

6. A printed wiring board as described in claim 4 or claim 5, wherein the pad portion has a third region that fills the region within the inner edge of the first region, and the third region has the second electroless plating layer and the second electroplating layer laminated on the second electroless plating layer.

7. The printed wiring board according to any one of claims 1 to 6, wherein the arithmetic mean roughness Sa of the surface of the filling resin is 1.0 µm or more and 10.0 µm or less.

8. A printed wiring board as claimed in any one of claims 1 to 7, further comprising second through holes not filled with resin, the average thickness of said second through holes being greater than the average thickness of said first through holes.

9. The printed wiring board according to any one of claims 1 to 9, further comprising a circuit disposed on the surface of said base film, said circuit having an etch factor of 8 or more.

10. A method for manufacturing a printed wiring board comprising the steps of: forming a first through hole in a base film; filling the first through hole with a hole filling resin; and, after the hole filling resin filling step, forming a conductive pattern on the surface of the base film by a semi-additive method.

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