Signal detection apparatus, and redriver

Abstract

A signal detection apparatus, and a redriver. The signal detection apparatus comprises an amplification unit (100) and a comparison unit (200). The amplification unit (100) comprises a first amplification module (101) and a second amplification module (102), wherein the first amplification module (101) is used for performing amplification processing on a first differential signal pair, so as to obtain a first amplified differential signal pair; the second amplification module (102) is used for performing amplification processing on a reference signal pair, so as to obtain an amplified reference signal pair; a third end of the amplification unit (100) is used for outputting the first amplified differential signal pair and an amplified reference signal pair; and the first amplification module (101) is the same as the second amplification module (102). The comparison unit (200) is electrically connected to the third end of the amplification unit (100); and the comparison unit (200) is used for respectively comparing a first target signal and a second target signal with a reference threshold value, and outputting comparison results. Therefore, the problem of a signal detection result being inaccurate due to the impact of a process, power supply voltage and temperature on an existing high-speed signal detector is solved.

Description

Signal detection device and redriver

[0001] The present disclosure claims priority from patent document No. 202310967289.3 filed on August 2, 2023 and entitled “Signal Detection Device and Re-driver”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to the field of wired communication integrated circuits, and in particular to a signal detection device and a re-driver. Background Art

[0003] Redrivers can improve signal integrity over long-distance channels and reduce the equalization stress on receivers in high-speed serial circuits, and have been widely used in the field of wired communications for consumer electronics. During actual circuit use, the redriver needs to detect upstream transmission signals in real time to determine whether to activate the main circuit function, thereby saving power and improving product battery life. Because the high-speed signal received by the redriver is transmitted over a long channel, its amplitude is significantly attenuated. Therefore, the above-mentioned signal detector needs to distinguish small-amplitude valid signals from transmission noise, which limits the detection threshold range. If the detection threshold is large, the valid signal cannot wake up the redriver main circuit; if the detection threshold is small, less than the transmission noise amplitude, the redriver main circuit will be mistakenly woken up, resulting in wasted power. However, the performance of existing high-speed signal detectors is affected by changes in process, supply voltage, and temperature (PVT). Its detection threshold fluctuates over a large range, exceeding the limited range, which will cause circuit function failure.

[0004] Therefore, there is an urgent need for a method to solve the problem that existing high-speed signal detectors are affected by process, power supply voltage and temperature, resulting in inaccurate signal detection results.

[0005] Summary of the Invention

[0006] The main purpose of the present disclosure is to provide a signal detection device and a re-driver to at least solve the problem in the prior art that high-speed signal detectors are affected by process, power supply voltage and temperature, resulting in inaccurate signal detection results.

[0007] According to one aspect of the present disclosure, a signal detection device is provided, comprising: an amplifying unit, wherein a first end of the amplifying unit is used to input a first differential signal pair, a second end of the amplifying unit is used to input a reference signal pair, the amplifying unit comprising a first amplifying module and a second amplifying module, the first amplifying module being used to amplify the first differential signal pair to obtain a first differential amplified signal pair, the second amplifying module being used to amplify the reference signal pair to obtain a reference amplified signal, a third end of the amplifying unit being used to output the first differential amplified signal pair and the reference amplified signal pair, the first differential amplified signal pair comprising a first target signal and a second target signal, the reference amplified signal pair comprising a first target reference signal and a second target reference signal, the first amplifying module and the second amplifying module being identical; and a comparing unit being electrically connected to the third end of the amplifying unit, the comparing unit being used to compare the first target signal and the second target signal with a reference threshold value, respectively, and output a comparison result, wherein the reference threshold value is the difference between the first target reference signal and the second target reference signal.

[0008] Optionally, the first amplifying module and the second amplifying module respectively include a first switching device, a second switching device, a third switching device, a first impedance, and a second impedance. The second switching device is the same as the third switching device. The first end of the first switching device is used to input a first control voltage. The second end of the first switching device is electrically connected to the third end of the second switching device and the third end of the third switching device, respectively. The third end of the first switching device is connected to the ground end. The second end of the second switching device is electrically connected to the first end of the first impedance. The second end of the third switching device is electrically connected to the first end of the second impedance. The second end of the first impedance is electrically connected to the second end of the second impedance. The first end of the second switching device and the first end of the third switching device of the first amplifying module are used to input the first differential signal pair. The first end of the second switching device and the first end of the third switching device of the second amplifying module are used to input the reference signal pair. The second end of the second switching device and the second end of the third switching device of the first amplifying module are used to output the first differential amplified signal pair. The second end of the second switching device and the second end of the third switching device of the second amplifying module are used to output the reference amplified signal pair.

[0009] Optionally, the first switching device, the second switching device and the third switching device are NMOS tubes, the first impedance and the second impedance are resistors, the gate of the NMOS tube is the first end of the first switching device, the second switching device and the third switching device, the drain of the NMOS tube is the second end of the first switching device, the second switching device and the third switching device, and the source of the NMOS tube is the third end of the first switching device, the second switching device and the third switching device.

[0010] Optionally, the comparing unit includes a fourth switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, a tenth switching device, an eleventh switching device, a twelfth switching device, a third impedance, a fourth impedance, a fifth impedance, a sixth impedance, and an inverter. The fourth switching device, the fifth switching device, the sixth switching device, and the seventh switching device are the same, and the eighth switching device and the ninth switching device are the same. The first end of the fourth switching device and the first end of the fifth switching device are used to input the first differential amplified signal pair. The second end of the fourth switching device is electrically connected to the second end of the fifth switching device, the first end of the eighth switching device, the second end of the eighth switching device, and the first end of the third impedance, respectively. The second end of the third impedance is electrically connected to the first end of the fourth impedance and the first end of the ninth switching device, respectively. The third end of the eighth switching device is electrically connected to the second end of the fourth impedance, the third end of the ninth switching device, and the tenth switching device, respectively. The third end of the fourth switching device is electrically connected to the third end of the fifth switching device, the third end of the sixth switching device, the third end of the seventh switching device, the second end of the ninth switching device, and the first end of the tenth switching device. The third end of the fourth switching device is electrically connected to the third end of the fifth switching device, the third end of the sixth switching device, the third end of the seventh switching device, the second end of the eleventh switching device, and the first end of the fifth impedance. The first end of the eleventh switching device and the first end of the twelfth switching device are used to input a second control voltage. The third end of the eleventh switching device, the second end of the fifth impedance, the third end of the twelfth switching device, and the second end of the sixth impedance are connected to ground. The second end of the twelfth switching device is electrically connected to the second end of the tenth switching device, the first end of the sixth impedance, and the first end of the inverter. The second end of the inverter is used to output the comparison result.

[0011] Optionally, the eighth switching device, the ninth switching device, and the tenth switching device are PMOS tubes, the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eleventh switching device, and the twelfth switching device are NMOS tubes, the third impedance is a resistor, the fourth impedance, the fifth impedance, and the sixth impedance are capacitors, the gate of the PMOS tube is the first end of the eighth switching device, the ninth switching device, and the tenth switching device, the drain of the PMOS tube is the second end of the eighth switching device, the ninth switching device, and the tenth switching device, and the source of the PMOS tube is the eighth switching device. The gate of the NMOS transistor is the first end of the fourth, fifth, sixth, seventh, eleventh and twelfth switching devices, the drain of the NMOS transistor is the second end of the fourth, fifth, sixth, seventh, eleventh and twelfth switching devices, and the source of the NMOS transistor is the third end of the fourth, fifth, sixth, seventh, eleventh and twelfth switching devices.

[0012] Optionally, the signal detection device further includes: a reference signal generating unit electrically connected to the amplifying unit, the reference signal generating unit being used to generate the reference signal pair, the reference signal pair including a first reference signal and a second reference signal, the reference signal generating unit including an operational amplifier, a thirteenth switching device, a fourteenth switching device, a fifteenth switching device, a seventh impedance, an eighth impedance, a ninth impedance and a tenth impedance, the fourteenth switching device being the same as the fifteenth switching device, the ninth impedance being the same as the tenth impedance, the first end of the operational amplifier being used to input a third control voltage, the second end of the operational amplifier being electrically connected to the first end of the eighth impedance, the first end of the ninth impedance and the second end of the tenth impedance, respectively, The third end of the operational amplifier is electrically connected to the second end of the seventh impedance and the first end of the thirteenth switching device, the first end of the seventh impedance is electrically connected to the second end of the eighth impedance, the third end of the thirteenth switching device is used to input the power supply voltage, the second end of the thirteenth switching device is electrically connected to the second end of the ninth impedance and is used to output the first reference signal, the first end of the fourteenth switching device is electrically connected to the second end of the fourteenth switching device and the first end of the fifteenth switching device respectively and is used to input the control current, the third end of the fourteenth switching device and the third end of the fifteenth switching device are electrically connected to the ground end, and the second end of the fifteenth switching device is electrically connected to the first end of the tenth impedance and is used to output the second reference signal.

[0013] Optionally, the thirteenth switching device is a PMOS tube, the fourteenth switching device and the fifteenth switching device are NMOS tubes, the seventh impedance, the ninth impedance, and the tenth impedance are resistors, the eighth impedance is a capacitor, the gate of the PMOS tube is the first end of the thirteenth switching device, the drain of the PMOS tube is the second end of the thirteenth switching device, and the source of the PMOS tube is the third end of the thirteenth switching device, the gate of the NMOS tube is the first end of the fourteenth switching device and the fifteenth switching device, the drain of the NMOS tube is the second end of the fourteenth switching device and the fifteenth switching device, and the source of the NMOS tube is the third end of the fourteenth switching device and the fifteenth switching device.

[0014] Optionally, the signal detection device also includes: a signal processing unit, electrically connected to the amplification unit, for processing the second differential signal pair to obtain and output the first differential signal pair, the first differential signal pair including a first differential signal and a second differential signal, the second differential signal pair including a third differential signal and a fourth differential signal, the signal processing unit including an eleventh impedance, a twelfth impedance, a thirteenth impedance and a fourteenth impedance, the first end of the eleventh impedance being used to input the first differential signal, the second end of the eleventh impedance being electrically connected to the first end of the twelfth impedance and being used to output the third differential signal, the second end of the twelfth impedance being electrically connected to the first end of the thirteenth impedance and being used to input a third control voltage, the first end of the fourteenth impedance being used to input the second differential signal, the second end of the thirteenth impedance being electrically connected to the second end of the fourteenth impedance and being used to output the fourth differential signal.

[0015] Optionally, the eleventh impedance and the fourteenth impedance are capacitors, and the twelfth impedance and the thirteenth impedance are resistors.

[0016] According to another aspect of the present disclosure, a re-driver is provided, comprising: any one of the signal detection devices described above.

[0017] The technical solution disclosed herein is applied to provide a signal detection device. The device includes an amplifying unit and a comparing unit. The first end of the amplifying unit is used to input a first differential signal pair, and the second end of the amplifying unit is used to input a reference signal pair. The amplifying unit includes a first amplifying module and a second amplifying module. The first amplifying module is used to amplify the first differential signal pair to obtain a first differential amplified signal pair, and the second amplifying module is used to amplify the reference signal pair to obtain a reference amplified signal. The third end of the amplifying unit is used to output the first differential amplified signal pair and the reference amplified signal pair. The first differential amplified signal pair includes a first target signal and a second target signal, and the reference amplified signal pair includes a first target reference signal and a second target reference signal. The first amplifying module and the second amplifying module are identical. The comparing unit is electrically connected to the third end of the amplifying unit and is used to compare the magnitude of the first target signal and the second target signal with a reference threshold value, respectively, and output a comparison result. Because the amplifying unit includes two identical first amplifying modules and a second amplifying module, a completely matched signal gain path and reference voltage gain path are provided. This ensures that the signal and reference threshold values ​​are not affected by process, supply voltage, and temperature variations, thereby resolving the problem that existing high-speed signal detectors are affected by process, supply voltage, and temperature, resulting in inaccurate signal detection results. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which constitute part of the present disclosure, are intended to provide a further understanding of the present disclosure. The exemplary embodiments of the present disclosure and their descriptions are intended to explain the present disclosure and do not constitute an improper limitation of the present disclosure. In the accompanying drawings:

[0019] FIG1 shows a structural block diagram of a signal detection device provided according to an embodiment of the present disclosure;

[0020] FIG2 shows a structural block diagram of an amplification unit provided according to an embodiment of the present disclosure;

[0021] FIG3 shows a structural block diagram of a comparison unit provided according to an embodiment of the present disclosure;

[0022] FIG4 shows a structural block diagram of a reference signal generating unit provided according to an embodiment of the present disclosure;

[0023] FIG5 shows a structural block diagram of a signal processing method according to an embodiment of the present disclosure.

[0024] The above drawings include the following reference numerals: 100, amplifying unit; 101, first amplifying module; 102, second amplifying module; 103, first switching device; 104, second switching device; 105, third switching device; 106, first impedance; 107, second impedance; 200, comparing unit; 201, fourth switching device; 202, fifth switching device; 203, sixth switching device; 204, seventh switching device; 205, eighth switching device; 206, ninth switching device; 207, tenth switching device; 208, eleventh switching device; 209, twelfth switching device; 210, third impedance; 211, fourth impedance; 212, eighth switching device; 213, eighth switching device; 214, eighth switching device; 215, eighth switching device; 216, eighth switching device; 217, eighth switching device; 218, eighth switching device; 219, eighth switching device; 220, eighth switching device; 221, eighth switching device; 222, eighth switching device; 223, eighth switching device; 224, eighth switching device; 225, eighth switching device; 226, ninth switching device; 227, eighth switching device; 228, eighth switching device; 229, eighth switching device; 230, eighth switching device; 231, eighth switching device; 232, eighth switching device; 233, eighth switching device; 234, eighth switching device; 235, eighth switching device; 236, eighth switching device; 237, eighth switching device; 238, eighth switching device; 239, eighth switching device; 240, eighth switching device; 241, eighth switching device; 242, eighth switching device; 243, eighth switching device; 244, eighth switching device; 245, eighth switching device; 246, 2. Fifth impedance; 213. Sixth impedance; 214. Inverter; 300. Reference signal generating unit; 301. Operational amplifier; 302. Thirteenth switching device; 303. Fourteenth switching device; 304. Fifteenth switching device; 305. Seventh impedance; 306. Eighth impedance; 307. Ninth impedance; 308. Tenth impedance; 400. Signal processing unit; 401. Eleventh impedance; 402. Twelfth impedance; 403. Thirteenth impedance; 404. Fourteenth impedance. DETAILED DESCRIPTION

[0025] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments in the present disclosure may be combined with each other. The present disclosure will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0026] In order to enable those skilled in the art to better understand the solutions of the present disclosure, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the embodiments described are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present disclosure.

[0027] It should be noted that the terms "first," "second," and the like in the specification and claims of the present disclosure and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate for the embodiments of the present disclosure described herein. In addition, the terms "including" and "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or inherent to these processes, methods, products, or apparatus.

[0028] As introduced in the background technology, the performance of high-speed signal detectors in the prior art is affected by PVT changes, and their detection thresholds fluctuate over a large range. If they exceed the limited range, they will cause circuit function failure. To solve the above problems, the embodiments of the present disclosure provide a signal detection device and a re-driver.

[0029] The technical solutions in the embodiments of the present invention will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present invention.

[0030] FIG1 is a block diagram of a signal detection device according to an embodiment of the present disclosure. As shown in FIG1 , the device includes:

[0031] an amplifying unit 100, wherein a first end of the amplifying unit 100 is configured to input a first differential signal pair, and a second end of the amplifying unit 100 is configured to input a reference signal pair. The amplifying unit 100 includes a first amplifying module 101 and a second amplifying module 102. The first amplifying module 101 is configured to amplify the first differential signal pair to obtain a first differential amplified signal pair, and the second amplifying module 102 is configured to amplify the reference signal pair to obtain a reference amplified signal pair. A third end of the amplifying unit 100 is configured to output the first differential amplified signal pair and the reference amplified signal pair. The first differential amplified signal pair includes a first target signal and a second target signal, and the reference amplified signal pair includes a first target reference signal and a second target reference signal. The first amplifying module 101 and the second amplifying module 102 are identical.

[0032] Specifically, because the first differential signal pair received by the re-driver is transmitted over a relatively long channel, its amplitude is significantly attenuated. Therefore, the first amplification module 101 in the amplification unit is used to amplify the first differential signal pair. To ensure that the gain of the first differential signal pair is the same as that of the reference signal and is not affected by PVT variations, the second amplification module 102 is used to amplify the reference signal pair. First amplification module 101 and second amplification module 102 are identical, achieving fully matched signal gain and reference voltage gain in the signal detection device.

[0033] The comparison unit 200 is electrically connected to the third end of the above-mentioned amplification unit 100. The above-mentioned comparison unit 200 is used to respectively compare the size relationship between the above-mentioned first target signal and the above-mentioned second target signal and the reference threshold, and output a comparison result, wherein the above-mentioned reference threshold is the difference between the above-mentioned first target reference signal and the above-mentioned second target reference signal.

[0034] Specifically, if the first target signal or the second target signal is detected to be greater than or equal to the reference threshold, a high level is output; if the first target signal or the second target signal is detected to be less than the reference threshold, a low level is output, thereby realizing detection of the first differential signal pair.

[0035] This embodiment provides a signal detection device. The device includes an amplifying unit and a comparing unit. The first end of the amplifying unit is configured to input a first differential signal pair, and the second end of the amplifying unit is configured to input a reference signal pair. The amplifying unit includes a first amplifying module and a second amplifying module. The first amplifying module is configured to amplify the first differential signal pair to obtain a first differential amplified signal pair, and the second amplifying module is configured to amplify the reference signal pair to obtain a reference amplified signal. The third end of the amplifying unit is configured to output the first differential amplified signal pair and the reference amplified signal pair. The first differential amplified signal pair includes a first target signal and a second target signal, and the reference amplified signal pair includes a first target reference signal and a second target reference signal. The first amplifying module and the second amplifying module are identical. The comparing unit is electrically connected to the third end of the amplifying unit and is configured to compare the magnitude of the first target signal and the second target signal with a reference threshold, respectively, and output a comparison result. Because the amplifying unit includes two identical first amplifying modules and a second amplifying module, a completely matched signal gain path and reference voltage gain path are provided. This ensures that the signal and reference threshold are unaffected by variations in process, supply voltage, and temperature, thereby resolving the problem of inaccurate signal detection results caused by variations in process, supply voltage, and temperature in existing high-speed signal detectors.

[0036] In a specific implementation process, as shown in FIG2 , the first amplifying module and the second amplifying module respectively include a first switching device 103, a second switching device 104, a third switching device 105, a first impedance 106, and a second impedance 107. The second switching device 104 is the same as the third switching device 105. The first end of the first switching device 103 is used to input a first control voltage. The second end of the first switching device 103 is electrically connected to the third end of the second switching device 104 and the third end of the third switching device 105, respectively. The third end of the first switching device 103 is connected to the ground end. The second end of the second switching device 104 is electrically connected to the first end of the first impedance 106. The second end of the third switching device 105 is electrically connected to the third end of the third switching device 105. The first ends of the two impedances 107 are electrically connected, and the second end of the first impedance 106 is electrically connected to the second end of the second impedance 107. The first end of the second switch device 104 and the first end of the third switch device 105 of the first amplifying module are used to input the first differential signal pair. The first end of the second switch device 104 and the first end of the third switch device 105 of the second amplifying module are used to input the reference signal pair. The second end of the second switch device 104 and the second end of the third switch device 105 of the first amplifying module are used to output the first differential amplified signal pair. The second end of the second switch device 104 and the second end of the third switch device 105 of the second amplifying module are used to output the reference amplified signal pair. By arranging the first amplifying module and the second amplifying module to be completely identical in terms of transistor size, resistive load size, and current bias, the device can further ensure that the amplification gain ratio of the two signal groups is 1:1, and this ratio is not affected by PVT variations.

[0037] Specifically, the first amplification module for the differential data signal and the second amplification module for amplifying the reference voltage are completely consistent in terms of transistor size, resistor load size, and current bias, ensuring that the amplification gain ratio of the two groups of signals is 1:1, and this ratio is not affected by PVT changes. INP and V INN is the first differential signal pair mentioned above, V REFP and V REFN For the above reference signal pair, V AMP_P and V AMP_N is the first differential amplified signal pair, V AMP1_P and V AMP1_N For the above reference amplified signal pair, V B is the first control voltage mentioned above.

[0038] As shown in FIG2 , the first switching device 103, the second switching device 104, and the third switching device 105 of the present disclosure are NMOS transistors, the first impedance 106 and the second impedance 107 are resistors, the gates of the NMOS transistors are the first terminals of the first switching device 103, the second switching device 104, and the third switching device 105, the drains of the NMOS transistors are the second terminals of the first switching device 103, the second switching device 104, and the third switching device 105, and the sources of the NMOS transistors are the third terminals of the first switching device 103, the second switching device 104, and the third switching device 105. This device can further simplify the amplification unit.

[0039] Specifically, the first and second amplification modules employ a current-mode logic structure to amplify the channel attenuation signal. Current-mode logic (CML) is a high-speed MOS logic structure that operates by implementing a logic gate using a differential transistor pair. The transistor's source serves as the input, grounded current acts as a low-level signal, and the source current acts as a high-level signal. When the input is high, the source current flows through the transistor to the load, generating a high-level output. The output is differential, meaning the two output levels are almost completely opposite, minimizing space charge and electromagnetic fields.

[0040] As shown in FIG3 , the comparison unit includes a fourth switching device 201, a fifth switching device 202, a sixth switching device 203, a seventh switching device 204, an eighth switching device 205, a ninth switching device 206, a tenth switching device 207, an eleventh switching device 208, a twelfth switching device 209, a third impedance 210, a fourth impedance 211, a fifth impedance 212, a sixth impedance 213, and an inverter 214. The fourth switching device 201, the fifth switching device 202, the sixth switching device 203, and the seventh switching device 204 are the same, and the eighth switching device 205 and the ninth switching device 206 are the same. The first end of the fourth switching device 201 and the first end of the fifth switching device 202 are used to input the first differential amplified signal pair. The second end of the fourth switching device 201 is electrically connected to the second end of the fifth switching device 202, the first end of the eighth switching device 205, the second end of the eighth switching device 205, and the first end of the third impedance 210. The second end of the third impedance 210 is electrically connected to the first end of the fourth impedance 211 and the first end of the ninth switching device 206. The third end of the eighth switching device 205 is electrically connected to the second end of the fourth impedance 211, the first end of the ninth switching device 206, and the second end of the ninth switching device 206. The third end of the fourth switch device 201 is electrically connected to the third end of the fifth switch device 202, the third end of the sixth switch device 203, the third end of the seventh switch device 204, and the first end of the tenth switch device 207. The first end of the sixth switch device 203 and the first end of the seventh switch device 204 are used to input the reference amplified signal pair. The second end of the sixth switch device 203 is electrically connected to the second end of the seventh switch device 204, the second end of the ninth switch device 206, and the first end of the tenth switch device 207. The third end of the fourth switch device 201 is electrically connected to the third end of the fifth switch device 202, the third end of the sixth switch device 203, the third end of the seventh switch device 204, and the first end of the eleventh switch device 208. The second end of the 10th switching device 207 and the first end of the fifth impedance 212 are electrically connected. The first end of the 11th switching device 208 and the first end of the 12th switching device 209 are used to input the second control voltage. The third end of the 11th switching device 208, the second end of the fifth impedance 212, the third end of the 12th switching device 209, and the second end of the sixth impedance 213 are connected to the ground. The second end of the 12th switching device 209 is electrically connected to the second end of the 10th switching device 207, the first end of the sixth impedance 213, and the first end of the inverter 214, respectively. The second end of the inverter 214 is used to output the comparison result. This device can detect and compare signal amplitudes, thereby simplifying the signal detection device.

[0041] Specifically, the fourth switching device and the fifth switching device, the sixth switching device and the seventh switching device respectively form two rectifiers, and the rectifier output voltage V D and V D1 Related to the input signal amplitude, the larger the first differential amplifier pair and the reference amplifier signal pair, the greater the V D and V D1 If the reference threshold is set at a fixed value, then V D1 The value of V D Changes. A is the second control voltage, V AMP_P and V AMP_N is the first differential amplified signal pair, V AMP1_P and V AMP1_N For the above reference amplified signal pair, when V AMP_P 、V AMP_N When the amplitude increases, V D Decrease, V D1 Increase; when the amplitude of the first differential amplifier pair is greater than the reference amplifier signal pair, V D1 After the eighth and ninth switching devices, V O Pull it down close to ground and make V OUT The output is high. When the amplitude of the first differential amplifier pair decreases, V D Increase, V D1 Decrease; when the amplitude of the first differential amplifier pair is smaller than the reference amplifier signal pair, V D1 Through the eighth switching device and the ninth switching device, V O Pull it close to the power rail and make V OUT The output is low.

[0042] In some embodiments, as shown in FIG3 , the eighth switching device 205, the ninth switching device 206, and the tenth switching device 207 are PMOS transistors, the fourth switching device 201, the fifth switching device 202, the sixth switching device 203, the seventh switching device 204, the eleventh switching device 208, and the twelfth switching device 209 are NMOS transistors, the third impedance 210 is a resistor, the fourth impedance 211, the fifth impedance 212, and the sixth impedance 213 are capacitors, the gate of the PMOS transistor is the first end of the eighth switching device 205, the ninth switching device 206, and the tenth switching device 207, the drain of the PMOS transistor is the second end of the eighth switching device 205, the ninth switching device 206, and the tenth switching device 207, and the source of the PMOS transistor is the eighth switching device 205. The gate of the NMOS transistor is the first end of the fourth switching device 201, the fifth switching device 202, the sixth switching device 203, the seventh switching device 204, the eleventh switching device 208, and the twelfth switching device 209. The drain of the NMOS transistor is the second end of the fourth switching device 201, the fifth switching device 202, the sixth switching device 203, the seventh switching device 204, the eleventh switching device 208, and the twelfth switching device 209. The source of the NMOS transistor is the third end of the fourth switching device 201, the fifth switching device 202, the sixth switching device 203, the seventh switching device 204, the eleventh switching device 208, and the twelfth switching device 209. This device can further simplify the comparison unit.

[0043] Specifically, the sizes of the fourth switching device, the fifth switching device, the sixth switching device and the seventh switching device constituting the above-mentioned rectifier are kept consistent, and the sizes of the eighth switching device and the ninth switching device are kept consistent, which can ensure that the gain of the differential signal amplitude and the reference voltage remains 1:1 under any PVT conditions.

[0044] In some embodiments, as shown in FIG4 , the signal detection apparatus further includes: a reference signal generating unit 300 electrically connected to the amplifying unit, the reference signal generating unit 300 being configured to generate the reference signal pair, the reference signal pair including a first reference signal and a second reference signal, the reference signal generating unit 300 including an operational amplifier 301, a thirteenth switching device 302, a fourteenth switching device 303, a fifteenth switching device 304, a seventh impedance 305, an eighth impedance 306, a ninth impedance 307, and a tenth impedance 308, the fourteenth switching device 303 being the same as the fifteenth switching device 304, the ninth impedance 307 being the same as the tenth impedance 308, a first terminal of the operational amplifier 301 being configured to input a third control voltage, and a second terminal of the operational amplifier 301 being respectively connected to a first terminal of the eighth impedance 306, a first terminal of the ninth impedance 307, and a tenth impedance 308. 08, a third terminal of the operational amplifier 301 is electrically connected to the second terminal of the seventh impedance 305 and the first terminal of the thirteenth switch device 302, the first terminal of the seventh impedance 305 is electrically connected to the second terminal of the eighth impedance 306, the third terminal of the thirteenth switch device 302 is configured to input a power supply voltage, the second terminal of the thirteenth switch device 302 is electrically connected to the second terminal of the ninth impedance 307 and is configured to output the first reference signal, the first terminal of the fourteenth switch device 303 is electrically connected to the second terminal of the fourteenth switch device 303 and the first terminal of the fifteenth switch device 304, respectively, and is configured to input a control current, the third terminal of the fourteenth switch device 303 and the third terminal of the fifteenth switch device 304 are electrically connected to ground, and the second terminal of the fifteenth switch device 304 is electrically connected to the first terminal of the tenth impedance 308 and is configured to output the second reference signal. This apparatus can rapidly generate the reference signal pair.

[0045] Specifically, if the bias current is generated by a voltage-to-current converter and the voltage-to-current converter reference voltage is generated by a bandgap reference circuit, then the proportional relationship between the signal threshold voltage and the voltage-to-current converter reference voltage is determined by the proportional relationship between the resistors, so the reference threshold will not be affected by PVT changes.

[0046] In this embodiment, as shown in FIG4 , the thirteenth switching device 302 is a PMOS transistor, the fourteenth switching device 303 and the fifteenth switching device 304 are NMOS transistors, the seventh impedance 305, the ninth impedance 307, and the tenth impedance 308 are resistors, and the eighth impedance 306 is a capacitor. The gate of the PMOS transistor is the first end of the thirteenth switching device 302, the drain of the PMOS transistor is the second end of the thirteenth switching device 302, and the source of the PMOS transistor is the third end of the thirteenth switching device 302. The gate of the NMOS transistor is the first end of the fourteenth switching device 303 and the fifteenth switching device 304, the drain of the NMOS transistor is the second end of the fourteenth switching device 303 and the fifteenth switching device 304, and the source of the NMOS transistor is the third end of the fourteenth switching device 303 and the fifteenth switching device 304. This device can further simplify the reference signal generating unit.

[0047] Specifically, the operational amplifier, the thirteenth switch device and the ninth impedance form a negative feedback loop, which converts the voltage V C Locked at voltage V COM Up, I B_REF For the above control current, if the ninth impedance value and the tenth impedance value are kept consistent, and the sizes of the fourteenth switch device and the fifteenth switch device are kept consistent, then the input bias current and the ninth impedance and the tenth impedance can generate a reference threshold value.

[0048] As an optional solution, as shown in Figure 5, the above-mentioned signal detection device further includes: a signal processing unit 400, electrically connected to the above-mentioned amplification unit, for processing the second differential signal pair to obtain and output the above-mentioned first differential signal pair, where the above-mentioned first differential signal pair includes a first differential signal and a second differential signal, and the above-mentioned second differential signal pair includes a third differential signal and a fourth differential signal. The above-mentioned signal processing unit 400 includes an eleventh impedance 401, a twelfth impedance 402, a thirteenth impedance 403, and a fourteenth impedance 404. The first end of the above-mentioned eleventh impedance 401 is used to input the above-mentioned first differential signal, the second end of the above-mentioned eleventh impedance 401 is electrically connected to the first end of the above-mentioned twelfth impedance 402 and is used to output the above-mentioned third differential signal, the second end of the above-mentioned twelfth impedance 402 is electrically connected to the first end of the above-mentioned thirteenth impedance 403 and is used to input the third control voltage, the first end of the above-mentioned fourteenth impedance 404 is used to input the above-mentioned second differential signal, and the second end of the above-mentioned thirteenth impedance 403 is electrically connected to the second end of the above-mentioned fourteenth impedance 404 and is used to output the above-mentioned fourth differential signal. Since the second differential signal pair may not reach the operating voltage of the amplifying unit, the device may process the second differential signal pair before inputting it into the amplifying unit to further meet the operating conditions of the amplifying unit.

[0049] Specifically, the eleventh impedance, the twelfth impedance, the thirteenth impedance, and the fourteenth impedance can reconstruct the second differential signal pair. DP is the first differential signal, V DN is the second differential signal, V COM is a third control voltage, and the third control voltage may also be input to the reference signal generating unit 300 .

[0050] In an optional solution, as shown in Figure 5, the eleventh impedance 401 and the fourteenth impedance 404 are capacitors, and the twelfth impedance 402 and the thirteenth impedance 403 are resistors. This device can further simplify the signal processing unit.

[0051] Specifically, the eleventh impedance and the fourteenth impedance are capacitors for isolating direct current in the second differential signal pair, and the twelfth impedance and the thirteenth impedance are resistors for processing the second differential signal.

[0052] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a..." does not preclude the presence of additional identical elements in the process, method, commodity, or apparatus that includes the element.

[0053] From the above description, it can be seen that the above embodiments of the present disclosure achieve the following technical effects:

[0054] 1) The signal detection device disclosed herein includes an amplifying unit and a comparing unit. The first end of the amplifying unit is used to input a first differential signal pair, and the second end of the amplifying unit is used to input a reference signal pair. The amplifying unit includes a first amplifying module and a second amplifying module. The first amplifying module is used to amplify the first differential signal pair to obtain a first differential amplified signal pair, and the second amplifying module is used to amplify the reference signal pair to obtain a reference amplified signal. The third end of the amplifying unit is used to output the first differential amplified signal pair and the reference amplified signal pair. The first differential amplified signal pair includes a first target signal and a second target signal, and the reference amplified signal pair includes a first target reference signal and a second target reference signal. The first amplifying module and the second amplifying module are identical. The comparing unit is electrically connected to the third end of the amplifying unit and is used to compare the magnitude of the first target signal and the second target signal with a reference threshold value, respectively, and output a comparison result. Because the amplifying unit includes two identical first amplifying modules and second amplifying modules, a completely matched signal gain path and reference voltage gain path are provided. This ensures that the signal and reference threshold values ​​are not affected by process, power supply voltage, and temperature variations, thereby resolving the problem that existing high-speed signal detectors are affected by process, power supply voltage, and temperature, resulting in inaccurate signal detection results.

[0055] 2) The re-driver disclosed in the present invention includes a signal detection device, which includes an amplifying unit and a comparing unit. The first end of the amplifying unit is used to input a first differential signal pair, and the second end of the amplifying unit is used to input a reference signal pair. The amplifying unit includes a first amplifying module and a second amplifying module. The first amplifying module is used to amplify the first differential signal pair to obtain a first differential amplified signal pair, and the second amplifying module is used to amplify the reference signal pair to obtain a reference amplified signal. The third end of the amplifying unit is used to output the first differential amplified signal pair and the reference amplified signal pair. The first differential amplified signal pair includes a first target signal and a second target signal, and the reference amplified signal pair includes a first target reference signal and a second target reference signal. The first amplifying module and the second amplifying module are the same; the comparing unit is electrically connected to the third end of the amplifying unit, and the comparing unit is used to respectively compare the size relationship between the first target signal and the second target signal and the reference threshold, and output the comparison result. Since the amplification unit includes two completely identical first amplification modules and second amplification modules, it provides completely matching signal gain paths and reference voltage gain paths, which can ensure that the signal and reference threshold are not affected by changes in process, power supply voltage and temperature, and solve the problem that the high-speed signal detector of the existing re-driver is affected by the process, power supply voltage and temperature, resulting in inaccurate signal detection results.

[0056] The foregoing description is merely a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Those skilled in the art will readily appreciate that various modifications and variations are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present disclosure shall be included within the scope of protection of the present disclosure.

Claims

1. A signal detection device, characterized in that: include: an amplifying unit, wherein a first end of the amplifying unit is used to input a first differential signal pair, a second end of the amplifying unit is used to input a reference signal pair, the amplifying unit comprises a first amplifying module and a second amplifying module, the first amplifying module is used to amplify the first differential signal pair to obtain a first differential amplified signal pair, the second amplifying module is used to amplify the reference signal pair to obtain a reference amplified signal pair, a third end of the amplifying unit is used to output the first differential amplified signal pair and the reference amplified signal pair, the first differential amplified signal pair comprises a first target signal and a second target signal, the reference amplified signal pair comprises a first target reference signal and a second target reference signal, and the first amplifying module and the second amplifying module are the same; A comparison unit is electrically connected to the third end of the amplification unit, and is used to compare the first target signal and the second target signal with a reference threshold value, respectively, and output a comparison result, wherein the reference threshold value is a difference between the first target reference signal and the second target reference signal.

2. The signal detection device according to claim 1, characterized in that: The first amplifying module and the second amplifying module respectively include a first switching device, a second switching device, a third switching device, a first impedance and a second impedance. The second switching device is the same as the third switching device. The first end of the first switching device is used to input a first control voltage. The second end of the first switching device is electrically connected to the third end of the second switching device and the third end of the third switching device respectively. The third end of the first switching device is connected to the ground end. The second end of the second switching device is electrically connected to the first end of the first impedance. The second end of the third switching device is electrically connected to the first end of the second impedance. The second end of the first impedance is electrically connected to the second end of the second impedance. The first end of the second switching device and the first end of the third switching device of the first amplifying module are used to input the first differential signal pair. The first end of the second switching device and the first end of the third switching device of the second amplifying module are used to input the reference signal pair. The second end of the second switching device and the second end of the third switching device of the first amplifying module are used to output the first differential amplified signal pair. The second end of the second switching device and the second end of the third switching device of the second amplifying module are used to output the reference amplified signal pair.

3. The signal detection device according to claim 2, characterized in that: The first switching device, the second switching device and the third switching device are NMOS tubes, the first impedance and the second impedance are resistors, the gate of the NMOS tube is the first end of the first switching device, the second switching device and the third switching device, the drain of the NMOS tube is the second end of the first switching device, the second switching device and the third switching device, and the source of the NMOS tube is the third end of the first switching device, the second switching device and the third switching device.

4. The signal detection device according to claim 1, characterized in that: The comparing unit includes a fourth switching device, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a ninth switching device, a tenth switching device, an eleventh switching device, a twelfth switching device, a third impedance, a fourth impedance, a fifth impedance, a sixth impedance and an inverter. The fourth switching device, the fifth switching device, the sixth switching device and the seventh switching device are the same, the eighth switching device and the ninth switching device are the same, a first end of the fourth switching device and a first end of the fifth switching device are used to input the first differential amplification signal pair, a second end of the fourth switching device is electrically connected to the second end of the fifth switching device, the first end of the eighth switching device, the second end of the eighth switching device and the first end of the third impedance respectively, a second end of the third impedance is electrically connected to the first end of the fourth impedance and the first end of the ninth switching device respectively, a third end of the eighth switching device is electrically connected to the second end of the fourth impedance, the third end of the ninth switching device and the first end of the tenth switching device respectively The third end is electrically connected, the first end of the sixth switch device and the first end of the seventh switch device are used to input the reference amplified signal pair, the second end of the sixth switch device is electrically connected to the second end of the seventh switch device, the second end of the ninth switch device and the first end of the tenth switch device respectively, the third end of the fourth switch device is electrically connected to the third end of the fifth switch device, the third end of the sixth switch device, the third end of the seventh switch device, the second end of the eleventh switch device and the first end of the fifth impedance respectively, the first end of the eleventh switch device and the first end of the twelfth switch device are used to input the second control voltage, the third end of the eleventh switch device, the second end of the fifth impedance, the third end of the twelfth switch device and the second end of the sixth impedance are connected to the ground end, the second end of the twelfth switch device is electrically connected to the second end of the tenth switch device, the first end of the sixth impedance and the first end of the inverter respectively, and the second end of the inverter is used to output the comparison result.

5. The signal detection device according to claim 4, characterized in that: The eighth switch device, the ninth switch device and the tenth switch device are PMOS tubes, the fourth switch device, the fifth switch device, the sixth switch device, the seventh switch device, the eleventh switch device and the twelfth switch device are NMOS tubes, the third impedance is a resistor, the fourth impedance, the fifth impedance and the sixth impedance are capacitors, the gate of the PMOS tube is the first end of the eighth switch device, the ninth switch device and the tenth switch device, the drain of the PMOS tube is the second end of the eighth switch device, the ninth switch device and the tenth switch device, and the source of the PMOS tube is the eighth switch device, The ninth switching device and the third end of the tenth switching device, the gate of the NMOS tube is the first end of the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eleventh switching device and the twelfth switching device, the drain of the NMOS tube is the second end of the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eleventh switching device and the twelfth switching device, and the source of the NMOS tube is the third end of the fourth switching device, the fifth switching device, the sixth switching device, the seventh switching device, the eleventh switching device and the twelfth switching device.

6. The signal detection device according to claim 1, characterized in that: The signal detection device also includes: a reference signal generating unit, electrically connected to the amplifying unit, the reference signal generating unit being used to generate the reference signal pair, the reference signal pair comprising a first reference signal and a second reference signal, the reference signal generating unit comprising an operational amplifier, a thirteenth switching device, a fourteenth switching device, a fifteenth switching device, a seventh impedance, an eighth impedance, a ninth impedance and a tenth impedance, the fourteenth switching device being the same as the fifteenth switching device, the ninth impedance being the same as the tenth impedance, the first end of the operational amplifier being used to input a third control voltage, the second end of the operational amplifier being respectively electrically connected to the first end of the eighth impedance, the first end of the ninth impedance and the second end of the tenth impedance, the third end of the operational amplifier being electrically connected to the second end of the seventh impedance and the first end of the thirteenth switching device, the first end of the seventh impedance being electrically connected to the second end of the eighth impedance, the third end of the thirteenth switching device being used to input a power supply voltage, the second end of the thirteenth switching device being electrically connected to the second end of the ninth impedance and being used to output the first reference signal, the first end of the fourteenth switching device being respectively electrically connected to the second end of the fourteenth switching device and the first end of the fifteenth switching device and being used to output The third end of the fourteenth switch device and the third end of the fifteenth switch device are electrically connected to the ground terminal, and the second end of the fifteenth switch device is electrically connected to the first end of the tenth impedance and is used to output the second reference signal.

7. The signal detection device according to claim 6, characterized in that: The thirteenth switching device is a PMOS tube, the fourteenth switching device and the fifteenth switching device are NMOS tubes, the seventh impedance, the ninth impedance and the tenth impedance are resistors, the eighth impedance is a capacitor, the gate of the PMOS tube is the first end of the thirteenth switching device, the drain of the PMOS tube is the second end of the thirteenth switching device, the source of the PMOS tube is the third end of the thirteenth switching device, the gate of the NMOS tube is the first end of the fourteenth switching device and the fifteenth switching device, the drain of the NMOS tube is the second end of the fourteenth switching device and the fifteenth switching device, and the source of the NMOS tube is the third end of the fourteenth switching device and the fifteenth switching device.

8. The signal detection device according to claim 1, characterized in that: The signal detection device also includes: A signal processing unit is electrically connected to the amplification unit, and is used to process the second differential signal pair to obtain and output the first differential signal pair, wherein the first differential signal pair includes a first differential signal and a second differential signal, and the second differential signal pair includes a third differential signal and a fourth differential signal. The signal processing unit includes an eleventh impedance, a twelfth impedance, a thirteenth impedance and a fourteenth impedance, wherein the first end of the eleventh impedance is used to input the first differential signal, the second end of the eleventh impedance is electrically connected to the first end of the twelfth impedance and is used to output the third differential signal, the second end of the twelfth impedance is electrically connected to the first end of the thirteenth impedance and is used to input a third control voltage, the first end of the fourteenth impedance is used to input the second differential signal, the second end of the thirteenth impedance is electrically connected to the second end of the fourteenth impedance and is used to output the fourth differential signal.

9. The signal detection device according to claim 8, characterized in that: The eleventh impedance and the fourteenth impedance are capacitors, and the twelfth impedance and the thirteenth impedance are resistors.

10. A re-actuator, characterized in that: include: The signal detection device according to any one of claims 1 to 9.

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