Polycrystalline silicon layer and preparation method therefor, and passivated contact battery and preparation method therefor

Abstract

Disclosed in the present invention are a polycrystalline silicon layer and a preparation method therefor, and a passivated contact battery and a preparation method therefor. The polycrystalline silicon layer is used for a passivated contact battery. The polycrystalline silicon layer comprises a first polycrystalline silicon layer deposited first and a second polycrystalline silicon layer deposited later, wherein the first polycrystalline silicon layer is obtained by first depositing and then carrying out plasma treatment.

Description

Polycrystalline silicon layer and preparation method thereof, passivation contact cell and preparation method thereof

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on August 3, 2023, with application number 202310969601.2 and application name “Polycrystalline silicon layer and preparation method thereof, passivated contact cell and preparation method thereof”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present invention relates to the field of solar cells, and in particular to a polysilicon layer and a preparation method thereof, a passivation contact cell and a preparation method thereof. Background Art

[0003] In a passivated contact cell, a passivation contact layer consisting of a tunneling oxide layer and a polysilicon layer is deposited on the back of the cell, which can passivate the metal contact area on the back of the cell, reduce the recombination of photogenerated carriers of the solar cell in the metal contact area on the back of the cell, and thus improve the cell performance.

[0004] During the preparation of the polysilicon layer, phosphorus diffusion annealing is usually required to crystallize the intrinsic amorphous silicon film into a doped polysilicon layer. However, during the annealing process, the amorphous silicon film undergoes structural reorganization while crystallizing. During this structural reorganization, the amorphous silicon film releases a large amount of hydrogen atoms, which seep out and accumulate at the interface between the polysilicon layer and the tunneling oxide layer. This can easily lead to uneven thickness of the polysilicon layer, resulting in an increase in lateral transmission channels and even film shedding, seriously affecting battery efficiency and yield. At the same time, during the annealing process, phosphorus atoms are more likely to diffuse into the tunneling oxide layer, or even enter the interior of the silicon wafer, affecting the effectiveness of the tunneling oxide layer.

[0005] Summary of the Invention

[0006] The embodiments of the present invention disclose a polycrystalline silicon layer and a preparation method thereof, a passivated contact cell and a preparation method thereof. The H atom content of the polycrystalline silicon layer is reduced and the stability is improved. The H atoms are not easy to seep out and enrich during the subsequent annealing treatment, thereby making the defect passivation effect of the polycrystalline silicon layer better, and the crystallization rate and density of the polycrystalline silicon layer are also significantly improved.

[0007] The present invention discloses a polysilicon layer, which is used for passivating contact cells. The polysilicon layer comprises a first polysilicon layer deposited first and a second polysilicon layer deposited later, wherein the first polysilicon layer is obtained by first depositing and then undergoing plasma treatment.

[0008] As an optional implementation, in an embodiment of the present invention, the second polysilicon is not subjected to plasma treatment after being deposited.

[0009] As an optional implementation, in an embodiment of the present invention, the microstructure factor of the polysilicon layer is 10% to 20%.

[0010] As an optional implementation, in an embodiment of the present invention, the crystallization rate of the polysilicon layer is 80% to 95%.

[0011] As an optional implementation, in an embodiment of the present invention, the gas used in the plasma treatment is an inert gas and / or hydrogen.

[0012] As an optional implementation manner, in an embodiment of the present invention, the thickness of the first polysilicon layer is 5 nm to 30 nm.

[0013] As an optional implementation, in an embodiment of the present invention, the polysilicon layer includes an undoped intrinsic polysilicon layer or a doped polysilicon layer, and the deposition method of the polysilicon layer includes low-pressure chemical vapor deposition or plasma-enhanced chemical vapor deposition.

[0014] As an optional implementation manner, in an embodiment of the present invention, the polysilicon layer includes multiple layers of the first polysilicon layer, and each layer of the first polysilicon layer is deposited by first deposition and then plasma treatment.

[0015] In a second aspect, the present application further provides a method for preparing a polysilicon layer as described in the first aspect, comprising the following steps:

[0016] depositing a first polysilicon layer;

[0017] performing plasma treatment on the first polysilicon layer;

[0018] The second polysilicon layer is deposited on the first polysilicon layer treated by plasma to obtain the polysilicon layer.

[0019] As an optional implementation, in an embodiment of the present invention, the gas used in the plasma treatment is an inert gas and / or hydrogen.

[0020] As an optional implementation manner, in an embodiment of the present invention, the pressure is 50Pa to 500Pa, the power is 1000W to 12000W, and the time is 10s to 300s.

[0021] As an optional implementation, in an embodiment of the present invention, the pressure of the plasma treatment is 100Pa to 400Pa.

[0022] As an optional implementation, in an embodiment of the present invention, the power of the plasma treatment is 3000W to 9500W.

[0023] As an optional implementation, in an embodiment of the present invention, the plasma treatment time is 30s to 200s.

[0024] As an optional implementation, in an embodiment of the present invention, the temperature of the plasma treatment is 320°C to 550°C.

[0025] As an optional implementation, in an embodiment of the present invention, the microstructure factor of the polysilicon layer is 10% to 20%.

[0026] As an optional implementation, in an embodiment of the present invention, the crystallization rate of the polysilicon layer is 80% to 95%.

[0027] As an optional implementation manner, in an embodiment of the present invention, the thickness of the first polysilicon layer is 5 nm to 30 nm.

[0028] As an optional implementation, in an embodiment of the present invention, the polysilicon layer includes an undoped intrinsic polysilicon layer or a doped polysilicon layer, and the deposition method of the polysilicon layer includes low-pressure chemical vapor deposition or plasma-enhanced chemical vapor deposition.

[0029] As an optional implementation manner, in an embodiment of the present invention, the polysilicon layer includes multiple layers of the first polysilicon layer, and each layer of the first polysilicon layer is deposited by first deposition and then plasma treatment.

[0030] In a third aspect, the present application provides a passivated contact battery.

[0031] The passivation contact cell comprises a silicon wafer, and a tunneling oxide layer and the polysilicon layer stacked in sequence on the silicon wafer.

[0032] As an optional implementation, in an embodiment of the present invention, the silicon wafer is any one of an n-type single crystal silicon wafer, an n-type polycrystalline silicon wafer, a p-type single crystal silicon wafer or a p-type polycrystalline silicon wafer, and the tunneling oxide layer is a silicon oxide layer.

[0033] In a fourth aspect, the present application provides a method for preparing a passivated contact cell.

[0034] The preparation method of the passivated contact battery comprises the following steps:

[0035] Provide silicon wafers and perform pre-processing;

[0036] Sequentially preparing a tunnel oxide layer and the polysilicon layer on the back side of the pre-treated silicon wafer, and performing annealing treatment;

[0037] The passivated contact battery is obtained by post-processing.

[0038] Compared with the traditional technology, the present invention has the following advantages:

[0039] An embodiment of the present invention provides a polysilicon layer. After the first polysilicon layer is deposited, it is subjected to plasma bombardment and etching treatment. The originally disordered polysilicon network becomes more relaxed, and the Si atoms re-find more stable positions to arrange and grow. The SiH2, SiH3 and Si-Si bonds with weaker bond energy and unstable are easily broken and reorganized under the bombardment and etching of plasma, and are transformed into SiH and Si-Si bonds with stronger bond energy and higher stability. At the same time, hydrogen atoms are released, the hydrogen atom content of the polysilicon layer is reduced, and crystalline silicon particles are formed. Therefore, after plasma treatment, the lattice network arrangement of the first polysilicon layer is more orderly, and the structural stability and density are significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0041] FIG1 is a schematic structural diagram of a passivated contact cell disclosed in Example 1 of the present invention;

[0042] FIG2 is a schematic structural diagram of a passivated contact battery disclosed in Example 4 of the present invention;

[0043] FIG3 is a schematic structural diagram of a passivated contact cell disclosed in Comparative Example 1 of the present invention;

[0044] FIG4 is a Raman curve diagram of Example 1 of the present invention and Comparative Example 1;

[0045] FIG5 is an infrared spectrum test diagram of Example 1 of the present invention and Comparative Example 1.

[0046] Icons: 1. Silicon wafer; 2. Tunneling oxide layer; 31. First polysilicon layer; 311. First polysilicon layer A; 312. First polysilicon layer B; 32. Second polysilicon layer; 4. Silicon nitride layer; 5. Silver negative electrode. DETAILED DESCRIPTION

[0047] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0048] In a passivated contact cell, the process of preparing the passivated contact layer is generally to deposit intrinsic amorphous silicon on the back of the silicon wafer using low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD) technology, and then crystallize the intrinsic amorphous silicon into phosphorus-doped polysilicon through phosphorus diffusion annealing. However, using the above approach, especially using plasma-enhanced chemical vapor deposition technology, a large number of H atoms in the form of SiH, SiH2, and SiH3 will be present during the deposition of the thin film, and there will be unstable Si-Si bonds, among which the content of SiH2 and SiH3 with weaker bond energies is higher. These H atoms are at risk of easily seeping out and enriching during the subsequent annealing process. The unstable Si-Si bonds are prone to forming defects in the polysilicon layer, thereby reducing the structural stability of the polysilicon layer and making it easy for holes to appear, deteriorating the performance of the polysilicon film.

[0049] To solve the above problems, embodiments of the present application provide a polysilicon layer and a preparation method thereof, a passivation contact cell and a preparation method thereof.

[0050] In a first aspect, an embodiment of the present application provides a polysilicon layer.

[0051] The polysilicon layer is used for passivating the contact cell. The polysilicon layer comprises a first polysilicon layer deposited first and a second polysilicon layer deposited later. The first polysilicon layer is obtained by first depositing and then plasma treating.

[0052] An embodiment of the present invention provides a polysilicon layer. After the first polysilicon layer is deposited, it is subjected to plasma bombardment and etching treatment. The originally disordered polysilicon network becomes more relaxed, and the Si atoms re-find more stable positions to arrange and grow. The SiH2, SiH3 and Si-Si bonds with weaker bond energy and unstable are easily broken and reorganized under the bombardment and etching of plasma, and are transformed into SiH and Si-Si bonds with stronger bond energy and higher stability. At the same time, hydrogen atoms are released, the hydrogen atom content of the polysilicon layer is reduced, and crystalline silicon particles are formed. Therefore, after plasma treatment, the lattice network arrangement of the first polysilicon layer is more orderly, and the structural stability and density are significantly improved.

[0053] In some embodiments, the second polysilicon is not subjected to plasma treatment after deposition.

[0054] The above-mentioned first polysilicon layer has a high crystallization rate and density, and has better crystallization quality and higher structural stability. The first polysilicon layer is used as the growth substrate for the subsequent second polysilicon layer. Since the first polysilicon layer has a high crystallization quality and high structural stability, it is beneficial to guide the second polysilicon layer to grow in the direction of the crystal structure of the first polysilicon layer, thereby obtaining a second polysilicon layer with a higher crystallization rate and density and better structural stability.

[0055] It can be seen that by performing plasma treatment on the first polysilicon layer after the first polysilicon layer is deposited, the subsequently deposited second polysilicon layer does not need to undergo plasma treatment, and a second polysilicon layer with better crystallization quality and structural stability can be obtained, thereby promoting the improvement of the overall crystallization quality and structural stability of the polysilicon layer and improving the passivation effect of the passivation contact structure.

[0056] In summary, the polysilicon layer of the present application is mainly composed of SiH and Si-Si bonds with stable bond energy, and the hydrogen atom content in the polysilicon layer is reduced, and the structural stability is improved. During the subsequent annealing treatment, hydrogen atoms are not easy to seep out of the polysilicon layer, and it is even less likely that hydrogen atoms are enriched at the interface between the polysilicon and the tunneling oxide layer. The overall defects of the polysilicon layer are reduced, and the electrical performance is significantly improved.

[0057] In some embodiments, the microstructure factor of the polysilicon layer is 10% to 20%, and / or the crystallization rate of the polysilicon layer is 80% to 95%.

[0058] After plasma treatment, the polysilicon layer has fewer defects, a more ordered atomic arrangement, and a higher degree of crystallization and density. Consequently, the microstructure factor of the polysilicon layer is reduced to 10% to 20%, while the crystallization rate is increased to 80% to 95%. Both the microstructure factor and the crystallization rate demonstrate the effectiveness of plasma treatment on the polysilicon layer in this solution.

[0059] Exemplarily, the microstructure factor of the polysilicon layer is 10%, 12%, 13%, 15%, 16%, 18%, 20%, etc., and the crystallization rate is 80%, 82%, 84%, 86%, 88%, 90%, 92%, 95%, etc.

[0060] In some embodiments, the gas used in the plasma treatment is an inert gas and / or hydrogen.

[0061] Among the gases used in plasma treatment, inert gases are not easily incorporated into the polysilicon layer, and the polysilicon layer itself contains a large number of hydrogen atoms. When the inert gases and / or hydrogen play a bombardment and etching role, it is not easy to introduce impurities and bring negative effects to the polysilicon layer. In addition, both inert gases and hydrogen can produce better bombardment and etching effects on the polysilicon layer, which is beneficial to improving the performance of the polysilicon layer.

[0062] In some embodiments, the thickness of the first polysilicon layer is 5 nm to 30 nm.

[0063] The first polysilicon layer of this thickness can be fully and uniformly bombarded and etched by the plasma, resulting in a polysilicon layer with structural stability and fewer defects. If the thickness is too high, the amount of SiH2 and SiH3 converted to SiH will be greatly reduced due to insufficient and uneven bombardment, and it is still easy to cause more defects in the polysilicon layer during the subsequent annealing process. If the thickness is too low, the plasma treatment of the polysilicon layer will easily have an adverse effect on the tunneling oxide layer adjacent to the polysilicon layer in the passivation contact cell. Exemplarily, the thickness of the first polysilicon layer is 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, etc.

[0064] In some embodiments, the polysilicon layer includes an undoped intrinsic polysilicon layer or a doped polysilicon layer, and the polysilicon layer is deposited by low pressure chemical vapor deposition or plasma enhanced chemical vapor deposition.

[0065] The above-mentioned plasma treatment has high universality for various types of polysilicon layers, whether it is an undoped intrinsic polysilicon layer or a doped polysilicon layer, and can significantly improve the structural stability of the polysilicon layer and reduce the defects of the polysilicon layer.

[0066] The polysilicon layer can be deposited using either low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD), without affecting the effect of the plasma treatment on the first polysilicon layer. Compared to LPCVD, PECVD followed by plasma treatment of the polysilicon layer provides greater overall consistency in the production of the polysilicon layer, eliminating the need for equipment switching, facilitating industrial production and offering high industrial value.

[0067] In some embodiments, the polysilicon layer includes a first polysilicon layer.

[0068] In some embodiments, the polysilicon layer includes multiple first polysilicon layers, and each first polysilicon layer is deposited by first depositing and then plasma treating.

[0069] The first polysilicon layer may be two, three or more layers. Taking the first polysilicon layer including two layers as an example, one layer is first deposited and then plasma treated; another layer is deposited and then plasma treated; and then the second polysilicon layer is deposited.

[0070] If the first polysilicon layer is an n-layer, one layer is first deposited and then plasma treated; another layer is deposited and then plasma treated; another layer is deposited and then plasma treated; another layer is deposited and then plasma treated; another layer is deposited and then plasma treated, until all the first polysilicon layers of the n-layer are plasma treated; then the second polysilicon layer is deposited.

[0071] Each first polysilicon layer is subjected to plasma treatment, which can fully reduce the defects of each polysilicon layer, fully reduce the leakage and enrichment of hydrogen atoms, improve the passivation effect of the first polysilicon layer and promote the formation of crystalline particles in the first polysilicon layer, thereby improving the structural stability and density of the polysilicon.

[0072] In a second aspect, an embodiment of the present application provides a method for preparing a polysilicon layer as described in the first aspect.

[0073] The method for preparing the polysilicon layer comprises the following steps:

[0074] depositing a first polysilicon layer;

[0075] performing plasma treatment on the first polysilicon layer;

[0076] A second polysilicon layer is deposited on the first polysilicon layer treated by plasma to obtain the above-mentioned polysilicon layer.

[0077] In some embodiments, the gas used for plasma treatment is an inert gas and / or hydrogen, the pressure is 50 Pa to 500 Pa, the power is 1000 W to 12000 W, and the time is 10 s to 300 s.

[0078] The pressure and power of the plasma treatment are controlled to control the intensity of the plasma bombardment, and the plasma treatment time is controlled to break the weaker SiH2, SiH3, and Si-Si bonds, while maintaining the stability of the stronger SiH and Si-Si bonds. This also promotes the breaking and recombination of these weaker bonds to form more stable, stronger bonds. If the pressure of the plasma treatment is too low or the power is too high, the bombardment intensity will be too high, or the bombardment time will be too long, which will easily break not only the weaker bonds but also the stronger bonds, thereby damaging the structure of the polysilicon layer and reducing its performance. If the pressure is too high or the power is too low, the bombardment will be weak, or the bombardment time will be too short, and the weak bonds will not be effectively broken, and the treatment effect will not be achieved. Illustratively, the inert gas is argon, the pressure is 50Pa, 150Pa, 200Pa, 300Pa, 350Pa, 400Pa, 500Pa, the power is 1000W, 2000W, 3000W, 4000W, 5000W, 6000W, 7000W, 8000W, 9000W, 10000W, 11000W, 12000W, and the time is 10s, 50s, 100s, 150s, 200s, 250s, 300s.

[0079] Preferably, the pressure is 100 Pa to 400 Pa, and / or the power is 3000 W to 9500 W, and / or the temperature is 350° C. to 500° C., and / or the time is 30 seconds to 200 seconds. Under the above plasma treatment conditions, the plasma treatment effect of the first polysilicon layer is further improved, which is conducive to obtaining a polysilicon layer with better overall performance.

[0080] In some embodiments, the temperature of the plasma treatment is 320°C to 550°C.

[0081] The temperature range of the plasma treatment is the same as the overall temperature range for depositing the polysilicon layer. Therefore, in production, the temperature for depositing the first and second polysilicon layers can be set to the same value as the temperature for plasma treating the first polysilicon layer. This allows the temperature to remain consistent during the preparation of the polysilicon layer, eliminating the need for temperature switching. This reduces the waiting time required for temperature switching and improves production efficiency. Exemplary plasma treatment temperatures include 320°C, 350°C, 380°C, 400°C, 420°C, 450°C, 480°C, 500°C, 550°C, and the like.

[0082] Preferably, the temperature of the plasma treatment is between 350°C and 500°C.

[0083] In a third aspect, an embodiment of the present application provides a passivated contact battery.

[0084] The passivation contact cell comprises a silicon wafer, and a tunneling oxide layer and the polysilicon layer stacked in sequence on the silicon wafer.

[0085] The above-mentioned polysilicon layer can be arranged on the front or back side of the silicon wafer, or on both sides of the silicon wafer at the same time. As long as the passivation contact cell contains a polysilicon layer, the solution of this application can be used to improve the polysilicon layer to obtain a passivation contact cell with better passivation performance. This application does not make any specific restrictions on this.

[0086] The silicon wafer is any one of an n-type single crystal silicon wafer, an n-type multi-crystalline silicon wafer, a p-type single crystal silicon wafer, and a p-type multi-crystalline silicon wafer; the tunneling oxide layer is a silicon oxide layer with a thickness of 1 nm to 2 nm; and the passivation film layer is a silicon nitride layer with a thickness of 60 nm to 150 nm. For example, the thickness of the tunneling oxide layer is 1 nm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, 2 nm, etc., and the thickness of the passivation film layer is 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, etc.

[0087] A negative electrode is also provided on the back of the passivation contact battery. The negative electrode is a silver negative electrode 5 , and the silver negative electrode 5 forms an ohmic contact with the passivation film layer.

[0088] When the above-mentioned passivation contact structure is provided on the back side of the passivation contact cell, the front side of the passivation contact cell may further include a pn junction, a passivation film layer, and a positive electrode. The positive electrode penetrates the functional layer and contacts the crystalline silicon to form an ohmic contact. The pn junction is formed by a boron diffusion process, and the pn junction depth is 0.3μm to 1.5μm. The front side passivation film layer is composed of aluminum oxide and silicon nitride layers. The aluminum oxide thickness is 3nm to 15nm, and the silicon nitride layer thickness is 40nm to 150nm. The positive electrode may be a silver positive electrode, which penetrates the silicon nitride layer to form an ohmic contact with the crystalline silicon. Exemplarily, the thickness of the pn junction depth is 0.3μm, 0.5μm, 0.7μm, 0.9μm, 1.1μm, 1.3μm, 1.5μm, etc., the thickness of the aluminum oxide is 3nm, 3nm, 5nm, 7nm, 9nm, 11nm, 13nm, 15nm, etc., and the thickness of the silicon nitride layer is 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 110nm, 120nm, 130nm, 140nm, 150nm, etc.

[0089] In a fourth aspect, an embodiment of the present application provides a method for preparing a passivated contact cell as described in the third aspect.

[0090] The preparation method of the passivated contact battery comprises the following steps:

[0091] Provide silicon wafers and perform pre-processing;

[0092] Sequentially preparing a tunnel oxide layer and the polysilicon layer on the back side of the pre-treated silicon wafer, and performing annealing treatment;

[0093] The passivated contact cell was prepared by post-processing.

[0094] The technical solution of the present invention will be further described below in conjunction with more specific embodiments and drawings.

[0095] Example 1

[0096] A first embodiment of the present application provides a passivated contact cell, the passivated contact cell comprising:

[0097] An n-type single crystal silicon wafer 1 is formed on the front surface of the n-type single crystal silicon wafer 1. A front passivation layer of aluminum oxide and silicon nitride and a silver positive electrode are then deposited. The pn junction depth is 1 μm, the aluminum oxide layer is 10 nm thick, and the silicon nitride layer 4 is 100 nm thick. The silver positive electrode penetrates the silicon nitride layer 4 to form an ohmic contact with the crystalline silicon.

[0098] A passivation contact structure is provided on the back side of the n-type single crystal silicon wafer 1. Referring to FIG1 , FIG1 shows a schematic diagram of the n-type single crystal silicon wafer 1 and the passivation contact structure provided on the back side thereof. The passivation contact structure includes:

[0099] A tunneling oxide layer 2 stacked on the back of the n-type single crystal silicon wafer 1 has a thickness of 1.5 nm;

[0100] A first polysilicon layer 31 having a thickness of 5 nm is stacked on the side of the tunnel oxide layer 2 facing away from the n-type single crystal silicon wafer 1. The first polysilicon layer 31 is obtained by plasma treatment after deposition and is a phosphorus-doped polysilicon layer.

[0101] A second polysilicon layer 32 stacked on the side of the first polysilicon layer 31 facing away from the n-type single crystal silicon wafer 1 has a thickness of 170 nm. The second polysilicon layer 32 is a phosphorus-doped polysilicon layer;

[0102] A silicon nitride layer 4 stacked on the side of the second polysilicon layer 32 facing away from the n-type single crystal silicon wafer 1 has a thickness of 105 nm;

[0103] The silver negative electrode 5 is stacked on the side of the passivation film layer facing away from the n-type single crystal silicon wafer 1. The silver negative electrode 5 is sintered to penetrate the silicon nitride layer 4 and form an ohmic contact with the polysilicon layer.

[0104] This embodiment also provides a method for preparing the above-mentioned passivated contact battery, comprising the following steps:

[0105] An n-type single crystal silicon wafer 1 is provided. After pre-cleaning the n-type single crystal silicon wafer 1, oil stains and cutting damage layers on the surface of the silicon wafer 1 are removed to form a clean pyramid light-trapping structure. Boron is diffused on the front surface of the n-type single crystal silicon wafer 1 to form a pn junction. The glass layer coated around the edge and back surface is removed, and the back surface is polished.

[0106] 4 μm aluminum oxide and 70 μm thick silicon nitride layer 4 are deposited on the front surface of the n-type single crystal silicon wafer 1 , and then a silver positive electrode is printed. The silver positive electrode is sintered to pass through the silicon nitride layer 4 and contact the crystalline silicon to form an ohmic contact.

[0107] A tunneling oxide layer 2 and a first polysilicon layer 31 are sequentially deposited on the back side of an n-type single-crystalline silicon wafer 1 using plasma-enhanced chemical vapor deposition. The first polysilicon layer 31 is treated with Ar plasma at a pressure of 150 Pa, a power of 2000 W, a temperature of 350° C., and an Ar gas for 50 seconds. Subsequently, a second polysilicon layer 32 is deposited and annealed.

[0108] forming a silicon nitride layer 4 on the second polysilicon layer 32;

[0109] A silver negative electrode 5 is prepared by screen printing on the silicon nitride layer 4. After sintering, the silver negative electrode 5 passes through the silicon nitride layer 4 and contacts the polysilicon layer to form an ohmic contact.

[0110] Example 2

[0111] Embodiment 2 of the present application provides a passivated contact cell, which differs from embodiment 1 only in that: the thickness of the first polysilicon layer 31 is 30 nm, and the first polysilicon layer 31 is treated with H plasma. The plasma treatment pressure is 300 Pa, the power is 8000 W, the gas is H2, and the treatment time is 100 s. After that, the second polysilicon layer 32 is deposited, and the thickness of the second polysilicon layer 32 is 100 nm.

[0112] Example 3

[0113] Example 3 of the present application provides a passivated contact cell, which differs from Example 1 only in that: the thickness of the first polysilicon layer 31 is 30 nm, and the first polysilicon layer 31 is treated with Ar-H plasma. The plasma treatment pressure is 300 Pa, the power is 8000 W, the gas is a mixed gas of Ar and H2, the gas flow ratio of Ar and H2 is 0.5, the treatment time is 100 s, and then the second polysilicon layer 32 is deposited, and the thickness of the second polysilicon layer 32 is 100 nm.

[0114] Example 4

[0115] The fourth embodiment of the present application provides a passivated contact cell. The n-type monocrystalline silicon wafer 1 and the passivated contact structure behind it in the passivated contact cell refer to FIG2 . The only difference from the first embodiment is that the first polysilicon layer 31 is two layers, namely the first polysilicon layer A311 and the first polysilicon layer B312. The first polysilicon layer A311 The thickness is 30nm. After depositing the first polysilicon layer A311, the first polysilicon layer A311 is treated with Ar-H plasma. The plasma treatment pressure is 300Pa, the power is 8000W, the gas is a mixture of Ar and H2, and the treatment time is 20s. Then, the first polysilicon layer B312 is deposited. The thickness of the first polysilicon layer B312 is 30nm. The first polysilicon layer B312 is treated with Ar-H plasma. The plasma treatment pressure is 300Pa, the power is 8000W, the gas is a mixture of Ar and H2, and the treatment time is 20s. Then, the second polysilicon layer 32 is deposited. The thickness of the second polysilicon layer 32 is 115nm. The second polysilicon layer 32 is a phosphorus-doped polysilicon layer.

[0116] Example 5

[0117] Example 5 of the present application provides a passivated contact cell, which differs from Example 1 only in that the pressure of the plasma treatment is 500 Pa, the power is 12000 W, and the time is 10 s.

[0118] Example 6

[0119] Example 6 of the present application provides a passivated contact cell, which differs from Example 1 only in that the pressure of the plasma treatment is 50 Pa, the power is 1000 W, and the time is 300 s.

[0120] Example 7

[0121] Example 7 of the present application provides a passivated contact cell, which differs from Example 1 only in that the pressure of the plasma treatment is 600 Pa, the power is 15000 W, and the time is 10 s.

[0122] Example 8

[0123] Example 8 of the present application provides a passivated contact cell, which differs from Example 1 only in that the pressure of the plasma treatment is 40 Pa, the power is 900 W, and the time is 300 s.

[0124] Comparative Example 1

[0125] Comparative Example 1 of the present application provides a passivated contact cell. An n-type monocrystalline silicon wafer 1 and a passivated contact structure thereon are shown in FIG3 . The only difference from Example 1 is that the polysilicon layer of the passivated contact structure is annealed after deposition instead of undergoing plasma treatment. The details are as follows:

[0126] A tunneling oxide layer 2 with a thickness of 1.5 nm and a polysilicon layer with a thickness of 175 nm are sequentially deposited on the back side of the n-type single crystal silicon wafer 1 by plasma enhanced chemical vapor deposition, followed by annealing.

[0127] Experiment 1

[0128] The polysilicon layers in the above embodiments and comparative examples were subjected to Raman curve tests, and the test results of the crystallization rate are shown in Table 1. The comparison diagram of the Raman curves of the polysilicon layers in embodiment 1 and comparative example 1 is shown in FIG4 .

[0129] Experiment 2

[0130] The polysilicon layers in the above examples and comparative examples were tested by infrared spectroscopy (FTIR), and the microstructure factor R values ​​are shown in Table 1. The infrared spectrum comparison of the polysilicon layers in Example 1 and Comparative Example 1 is shown in Figure 5. In the infrared spectrum, 2000 cm -1 The peak represents SiH, 2100 cm -1 The peak represents SiH2, and the calculation formula of the microstructure factor R is:

[0131] Where, I 2000 Represents 2000cm -1 The peak intensity, I 2100 Representative 2100cm -1 Peak intensity.

[0132] Table 1

[0133] It can be seen from Table 1 in combination with Figure 4 that the crystallization rate Xc of the polysilicon layer in Example 1 is 88.1%, and the crystallization rate Xc of the polysilicon layer in Comparative Example 1 is 79.5%. The crystallization rate of the polysilicon layer in Example 1 is significantly higher than that of Comparative Example 1, which proves that the defects of the polysilicon layer in Example 1 are significantly less than those in Comparative Example 1, and the structure of the polysilicon layer in Example 1 is more orderly. Therefore, the crystallization performance of the polysilicon layer in Example 1 is better.

[0134] It can be seen from Table 1 in combination with Figure 5 that the microstructure factor R of the infrared spectrum of the polycrystalline silicon layer in Example 1 is 18.06%, and the microstructure factor R of the polycrystalline silicon layer in Comparative Example 1 is 20.60%. The microstructure factor R value of the polycrystalline silicon layer in Example 1 is significantly lower than the microstructure factor R value of the polycrystalline silicon layer in Comparative Example 1, indicating that the SiH2 content in the polycrystalline silicon layer is lower, the number of H atoms is reduced, and the structural arrangement of the polycrystalline silicon layer in Example 1 is more orderly. Therefore, the film density of the polycrystalline silicon layer in Example 1 is improved.

[0135] Experiment 3

[0136] The electrical properties of the passivated contact cells prepared in the above embodiments and comparative examples were tested: rated capacity Eta, open circuit voltage Voc, short circuit current Isc, and fill factor FF. The test value of comparative example 1 was used as the base value a, and the test values ​​of each embodiment and comparative example were used as b. The change rate of the test value of each embodiment and comparative example compared with that of comparative example 1 was calculated using the following calculation method:

[0137] The test results of Experiment 3 are shown in Table 2.

[0138] Table 2

[0139] As can be seen from the experimental results in Table 2, the FF, Eta, and Voc of Example 1 are significantly improved compared to those of Comparative Example 1, proving that plasma treatment after deposition of the polysilicon layer can passivate defects in the polysilicon layer, thereby increasing the crystallization rate and density of the polysilicon layer, thereby improving the stability of the polysilicon layer and promoting the improvement of the electrical performance of the passivated contact cell.

[0140] The FF, Eta, Isc and Voc test results of the passivated contact cells of Example 1, Example 2 and Example 3 gradually increase, proving that using hydrogen or inert gas as the gas used for plasma treatment of the polysilicon layer, or using hydrogen and inert gas as the gas used for plasma treatment of the polysilicon layer, can better passivate the defects of the polycrystalline layer and improve the stability of the polysilicon layer, thereby improving the electrical performance of the passivated contact cell, and with the increase of power and pressure, the cell efficiency is further improved.

[0141] From the comparison of the data of Example 4 and Example 1, it can be seen that the FF, Eta and Voc of the passivation contact cell of Example 4 are further improved compared with those of Example 1, which proves that increasing the number of layers of the first polysilicon layer and correspondingly increasing the number of plasma treatments are beneficial to further passivating the defects of the polysilicon layer and improving the crystallization and density of the polysilicon layer, thereby improving the electrical performance of the polysilicon layer and the passivation contact cell.

[0142] From the data comparison of Examples 4, 5, 6, 7 and 8, it can be seen that the FF, Eta and Voc of the passivation contact cell of Example 4 are improved to a greater extent, while the FF, Eta and Voc improvement effects of the passivation contact cells of Examples 5, 6, 7 and 8 are poor, which proves that plasma treatment within a specific intensity and a specific time range can significantly improve the performance of the polysilicon layer. If the intensity of the plasma treatment is too low, the defect passivation effect of the polysilicon layer is not good, and the electrical performance improvement effect of the polysilicon layer and the passivation contact cell is not good, but it is still higher than the control example.

[0143] The above is a detailed introduction to the polysilicon layer and its preparation method, the passivation contact cell and its preparation method disclosed in the embodiments of the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the polysilicon layer and its preparation method, the passivation contact cell and its preparation method and its core idea of ​​the present invention: At the same time, for general technical personnel in this field, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A polysilicon layer, characterized in that: The polysilicon layer is used for passivating the contact cell, and the polysilicon layer includes a first polysilicon layer deposited first and a second polysilicon layer deposited later, wherein the first polysilicon layer is obtained by first depositing and then undergoing plasma treatment.

2. The polysilicon layer according to claim 1, characterized in that: After the second polysilicon is deposited, it is not subjected to plasma treatment.

3. The polysilicon layer according to claim 1, characterized in that: The microstructure factor of the polysilicon layer is 10% to 20%.

4. The polysilicon layer according to claim 3, characterized in that: The crystallization rate of the polysilicon layer is 80% to 95%.

5. The polysilicon layer according to claim 1, characterized in that: The gas used in the plasma treatment is an inert gas and / or hydrogen.

6. The polysilicon layer according to claim 1, characterized in that: The thickness of the first polysilicon layer is 5 nm to 30 nm.

7. The polysilicon layer according to claim 1, characterized in that: The polysilicon layer includes an undoped intrinsic polysilicon layer or a doped polysilicon layer, and the deposition method of the polysilicon layer includes low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition.

8. The polysilicon layer according to any one of claims 1 to 7, characterized in that: The polysilicon layer includes multiple layers of the first polysilicon layer, and each layer of the first polysilicon layer is obtained by first depositing and then undergoing plasma treatment.

9. A method for preparing a polycrystalline silicon layer, characterized in that: The following steps are involved: depositing a first polysilicon layer; performing plasma treatment on the first polysilicon layer; A second polysilicon layer is deposited on the first polysilicon layer after the plasma treatment.

10. The method for preparing a polysilicon layer according to claim 9, characterized in that: The gas used in the plasma treatment is an inert gas and / or hydrogen.

11. The method for preparing a polysilicon layer according to claim 9, characterized in that: The pressure of the plasma treatment is 50Pa-500Pa, the power is 1000W-12000W, and the time is 10s-300s.

12. The method for preparing a polysilicon layer according to claim 11, characterized in that: The pressure of the plasma treatment is 100Pa-400Pa.

13. The method for preparing a polysilicon layer according to claim 11, characterized in that: The power of the plasma treatment is 3000W to 9500W.

14. The method for preparing a polysilicon layer according to claim 11, characterized in that: The plasma treatment time is 30s to 200s.

15. The method for preparing a polysilicon layer according to claim 9, characterized in that: The temperature of the plasma treatment is 320°C to 550°C.

16. The method for preparing a polysilicon layer according to claim 9, characterized in that: The microstructure factor of the polysilicon layer is 10% to 20%.

17. The method for preparing a polysilicon layer according to claim 16, characterized in that: The crystallization rate of the polysilicon layer is 80% to 95%.

18. The method for preparing a polysilicon layer according to claim 9, characterized in that: The thickness of the first polysilicon layer is 5 nm to 30 nm.

19. The method for preparing a polysilicon layer according to claim 9, characterized in that: The polysilicon layer includes an undoped intrinsic polysilicon layer or a doped polysilicon layer, and the deposition method of the polysilicon layer includes low-pressure chemical vapor deposition or plasma enhanced chemical vapor deposition.

20. The method for preparing a polysilicon layer according to claim 9, characterized in that: The polysilicon layer includes multiple layers of the first polysilicon layer, and each layer of the first polysilicon layer is obtained by first depositing and then undergoing plasma treatment.

21. A passivated contact battery, characterized in that: It comprises a silicon wafer and a tunneling oxide layer stacked sequentially on the silicon wafer, a polysilicon layer as described in any one of claims 1-8, or a polysilicon layer prepared by the preparation method as described in any one of claims 9-20.

22. The passivated contact cell according to claim 21, characterized in that: The silicon wafer is any one of an n-type single crystal silicon wafer, an n-type multi-crystalline silicon wafer, a p-type single crystal silicon wafer or a p-type multi-crystalline silicon wafer, and the tunneling oxide layer is a silicon oxide layer.

23. A method for preparing a passivated contact battery, characterized in that: The following steps are involved: Provide silicon wafers and perform pre-processing; Sequentially preparing a tunneling oxide layer and a polysilicon layer according to any one of claims 1 to 8 or a polysilicon layer prepared by the preparation method according to any one of claims 9 to 20 on the back side of the pre-treated silicon wafer, and performing annealing treatment; The passivated contact battery is obtained by post-processing.

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